
This commit back ports the DPLL related commits from the upstream kernel that are identified by Intel to provide the expected SyncE/GNSS functionality. There are totally 46 back ported commits included the four commits I added are used to resolve the conflicts during back porting. The 0046 patch is cherry picked from kernel-6.9. The 0031-0045 patches are cherry picked from kernel-6.8. The 0001-0030 patches are cherry picked from kernel-6.7. We also change the in-tree ice driver version to 6.6.40-stx.2 from 6.6.40-stx.1. * To fix the conflict of 91e43ca0090b ("ice: fix linking when CONFIG_PTP_1588_CLOCK=n"), we cherry pick 12a5a28b565b ("ice: remove ICE_F_PTP_EXTTS feature flag") and 89776a6a702e ("ice: check netlist before enabling ICE_F_GNSS"). Adjust 12a5a28b565b because 0d1b22367ec2 ("ice: fix pin assignment for E810-T without SMA control") already included the part code of 12a5a28b565b. https://git.yoctoproject.org/linux-yocto/commit/?id=0d1b22367ec2 * Cherry pick 7049fd5df7 ("netlink: specs: remove redundant type keys from attributes in subsets") to fix the the conflict of c3c6ab95c397 ("dpll: spec: add support for pin-dpll signal phase offset/adjust.") * Cherry pick be16574609f1 ("ice: introduce hw->phy_model for handling PTP PHY differences") to fix the confilict of 6db5f2cd9ebb ("ice: dpll:fix output pin capabilities"). Verification: - Build kernel and out of tree modules success for rt and std. - Install success onto a All-in-One lab with rt kernel. - Boot up successfully in the lab. - interfaces are up and pass packets for rt and std. - Check dmesg to see DDP package is loaded successfully and the version is 1.3.36.0 for rt and std, that is same with the OOT ice-1.14.9 driver. - The SyncE/GNSS functionality tests were done by the network team. Story: 2011056 Task: 50797 Change-Id: I715480681c7c43d53b0a0126b34135562e9d02a0 Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
1146 lines
31 KiB
Diff
1146 lines
31 KiB
Diff
From 42459316b61c38862e2046d4bd3071e559c668eb Mon Sep 17 00:00:00 2001
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From: Vadim Fedorenko <vadim.fedorenko@linux.dev>
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Date: Wed, 13 Sep 2023 21:49:37 +0100
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Subject: [PATCH 03/46] dpll: core: Add DPLL framework base functions
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DPLL framework is used to represent and configure DPLL devices
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in systems. Each device that has DPLL and can configure inputs
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and outputs can use this framework.
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Implement core framework functions for further interactions
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with device drivers implementing dpll subsystem, as well as for
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interactions of DPLL netlink framework part with the subsystem
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itself.
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Co-developed-by: Milena Olech <milena.olech@intel.com>
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Signed-off-by: Milena Olech <milena.olech@intel.com>
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Co-developed-by: Michal Michalik <michal.michalik@intel.com>
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Signed-off-by: Michal Michalik <michal.michalik@intel.com>
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Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
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Co-developed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
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Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
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Signed-off-by: Jiri Pirko <jiri@nvidia.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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(cherry picked from commit 9431063ad323ac864750aeba4d304389bc42ca4e)
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Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
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---
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MAINTAINERS | 11 +
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drivers/Kconfig | 2 +
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drivers/Makefile | 1 +
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drivers/dpll/Kconfig | 7 +
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drivers/dpll/Makefile | 9 +
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drivers/dpll/dpll_core.c | 789 +++++++++++++++++++++++++++++++++++++++
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drivers/dpll/dpll_core.h | 89 +++++
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include/linux/dpll.h | 133 +++++++
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8 files changed, 1041 insertions(+)
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create mode 100644 drivers/dpll/Kconfig
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create mode 100644 drivers/dpll/Makefile
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create mode 100644 drivers/dpll/dpll_core.c
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create mode 100644 drivers/dpll/dpll_core.h
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create mode 100644 include/linux/dpll.h
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diff --git a/MAINTAINERS b/MAINTAINERS
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index c030e0ba1fc7..531d44ed1e7b 100644
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--- a/MAINTAINERS
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+++ b/MAINTAINERS
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@@ -6365,6 +6365,17 @@ F: Documentation/networking/device_drivers/ethernet/freescale/dpaa2/switch-drive
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F: drivers/net/ethernet/freescale/dpaa2/dpaa2-switch*
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F: drivers/net/ethernet/freescale/dpaa2/dpsw*
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+DPLL SUBSYSTEM
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+M: Vadim Fedorenko <vadim.fedorenko@linux.dev>
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+M: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
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+M: Jiri Pirko <jiri@resnulli.us>
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+L: netdev@vger.kernel.org
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+S: Supported
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+F: Documentation/driver-api/dpll.rst
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+F: drivers/dpll/*
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+F: include/net/dpll.h
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+F: include/uapi/linux/dpll.h
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+
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DRBD DRIVER
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M: Philipp Reisner <philipp.reisner@linbit.com>
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M: Lars Ellenberg <lars.ellenberg@linbit.com>
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diff --git a/drivers/Kconfig b/drivers/Kconfig
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index efb66e25fa2d..8ba3e8b9ad72 100644
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--- a/drivers/Kconfig
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+++ b/drivers/Kconfig
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@@ -243,4 +243,6 @@ source "drivers/hte/Kconfig"
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source "drivers/cdx/Kconfig"
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+source "drivers/dpll/Kconfig"
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+
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endmenu
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diff --git a/drivers/Makefile b/drivers/Makefile
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index 1bec7819a837..722d15be0eb7 100644
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--- a/drivers/Makefile
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+++ b/drivers/Makefile
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@@ -197,5 +197,6 @@ obj-$(CONFIG_PECI) += peci/
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obj-$(CONFIG_HTE) += hte/
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obj-$(CONFIG_DRM_ACCEL) += accel/
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obj-$(CONFIG_CDX_BUS) += cdx/
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+obj-$(CONFIG_DPLL) += dpll/
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obj-$(CONFIG_S390) += s390/
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diff --git a/drivers/dpll/Kconfig b/drivers/dpll/Kconfig
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new file mode 100644
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index 000000000000..a4cae73f20d3
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--- /dev/null
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+++ b/drivers/dpll/Kconfig
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@@ -0,0 +1,7 @@
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+# SPDX-License-Identifier: GPL-2.0-only
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+#
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+# Generic DPLL drivers configuration
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+#
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+
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+config DPLL
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+ bool
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diff --git a/drivers/dpll/Makefile b/drivers/dpll/Makefile
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new file mode 100644
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index 000000000000..2e5b27850110
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--- /dev/null
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+++ b/drivers/dpll/Makefile
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@@ -0,0 +1,9 @@
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+# SPDX-License-Identifier: GPL-2.0
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+#
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+# Makefile for DPLL drivers.
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+#
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+
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+obj-$(CONFIG_DPLL) += dpll.o
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+dpll-y += dpll_core.o
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+dpll-y += dpll_netlink.o
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+dpll-y += dpll_nl.o
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diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c
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new file mode 100644
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index 000000000000..6449ba6a383b
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--- /dev/null
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+++ b/drivers/dpll/dpll_core.c
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@@ -0,0 +1,789 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * dpll_core.c - DPLL subsystem kernel-space interface implementation.
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+ *
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+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates
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+ * Copyright (c) 2023 Intel Corporation.
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+ */
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+
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+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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+
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+#include <linux/device.h>
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+#include <linux/err.h>
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+#include <linux/slab.h>
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+#include <linux/string.h>
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+
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+#include "dpll_core.h"
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+
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+/* Mutex lock to protect DPLL subsystem devices and pins */
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+DEFINE_MUTEX(dpll_lock);
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+
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+DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC);
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+DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC);
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+
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+static u32 dpll_xa_id;
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+
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+#define ASSERT_DPLL_REGISTERED(d) \
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+ WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED))
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+#define ASSERT_DPLL_NOT_REGISTERED(d) \
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+ WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED))
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+#define ASSERT_PIN_REGISTERED(p) \
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+ WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED))
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+
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+struct dpll_device_registration {
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+ struct list_head list;
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+ const struct dpll_device_ops *ops;
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+ void *priv;
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+};
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+
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+struct dpll_pin_registration {
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+ struct list_head list;
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+ const struct dpll_pin_ops *ops;
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+ void *priv;
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+};
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+
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+struct dpll_device *dpll_device_get_by_id(int id)
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+{
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+ if (xa_get_mark(&dpll_device_xa, id, DPLL_REGISTERED))
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+ return xa_load(&dpll_device_xa, id);
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+
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+ return NULL;
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+}
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+
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+static struct dpll_pin_registration *
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+dpll_pin_registration_find(struct dpll_pin_ref *ref,
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+ const struct dpll_pin_ops *ops, void *priv)
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+{
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+ struct dpll_pin_registration *reg;
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+
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+ list_for_each_entry(reg, &ref->registration_list, list) {
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+ if (reg->ops == ops && reg->priv == priv)
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+ return reg;
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+ }
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+ return NULL;
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+}
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+
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+static int
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+dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,
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+ const struct dpll_pin_ops *ops, void *priv)
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+{
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+ struct dpll_pin_registration *reg;
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+ struct dpll_pin_ref *ref;
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+ bool ref_exists = false;
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+ unsigned long i;
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+ int ret;
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+
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+ xa_for_each(xa_pins, i, ref) {
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+ if (ref->pin != pin)
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+ continue;
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+ reg = dpll_pin_registration_find(ref, ops, priv);
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+ if (reg) {
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+ refcount_inc(&ref->refcount);
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+ return 0;
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+ }
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+ ref_exists = true;
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+ break;
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+ }
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+
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+ if (!ref_exists) {
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+ ref = kzalloc(sizeof(*ref), GFP_KERNEL);
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+ if (!ref)
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+ return -ENOMEM;
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+ ref->pin = pin;
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+ INIT_LIST_HEAD(&ref->registration_list);
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+ ret = xa_insert(xa_pins, pin->pin_idx, ref, GFP_KERNEL);
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+ if (ret) {
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+ kfree(ref);
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+ return ret;
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+ }
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+ refcount_set(&ref->refcount, 1);
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+ }
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+
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+ reg = kzalloc(sizeof(*reg), GFP_KERNEL);
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+ if (!reg) {
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+ if (!ref_exists) {
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+ xa_erase(xa_pins, pin->pin_idx);
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+ kfree(ref);
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+ }
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+ return -ENOMEM;
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+ }
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+ reg->ops = ops;
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+ reg->priv = priv;
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+ if (ref_exists)
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+ refcount_inc(&ref->refcount);
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+ list_add_tail(®->list, &ref->registration_list);
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+
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+ return 0;
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+}
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+
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+static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,
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+ const struct dpll_pin_ops *ops, void *priv)
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+{
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+ struct dpll_pin_registration *reg;
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+ struct dpll_pin_ref *ref;
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+ unsigned long i;
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+
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+ xa_for_each(xa_pins, i, ref) {
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+ if (ref->pin != pin)
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+ continue;
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+ reg = dpll_pin_registration_find(ref, ops, priv);
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+ if (WARN_ON(!reg))
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+ return -EINVAL;
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+ if (refcount_dec_and_test(&ref->refcount)) {
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+ list_del(®->list);
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+ kfree(reg);
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+ xa_erase(xa_pins, i);
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+ WARN_ON(!list_empty(&ref->registration_list));
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+ kfree(ref);
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+ }
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+ return 0;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static int
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+dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,
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+ const struct dpll_pin_ops *ops, void *priv)
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+{
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+ struct dpll_pin_registration *reg;
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+ struct dpll_pin_ref *ref;
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+ bool ref_exists = false;
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+ unsigned long i;
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+ int ret;
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+
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+ xa_for_each(xa_dplls, i, ref) {
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+ if (ref->dpll != dpll)
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+ continue;
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+ reg = dpll_pin_registration_find(ref, ops, priv);
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+ if (reg) {
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+ refcount_inc(&ref->refcount);
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+ return 0;
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+ }
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+ ref_exists = true;
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+ break;
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+ }
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+
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+ if (!ref_exists) {
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+ ref = kzalloc(sizeof(*ref), GFP_KERNEL);
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+ if (!ref)
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+ return -ENOMEM;
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+ ref->dpll = dpll;
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+ INIT_LIST_HEAD(&ref->registration_list);
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+ ret = xa_insert(xa_dplls, dpll->id, ref, GFP_KERNEL);
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+ if (ret) {
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+ kfree(ref);
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+ return ret;
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+ }
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+ refcount_set(&ref->refcount, 1);
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+ }
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+
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+ reg = kzalloc(sizeof(*reg), GFP_KERNEL);
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+ if (!reg) {
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+ if (!ref_exists) {
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+ xa_erase(xa_dplls, dpll->id);
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+ kfree(ref);
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+ }
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+ return -ENOMEM;
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+ }
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+ reg->ops = ops;
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+ reg->priv = priv;
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+ if (ref_exists)
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+ refcount_inc(&ref->refcount);
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+ list_add_tail(®->list, &ref->registration_list);
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+
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+ return 0;
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+}
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+
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+static void
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+dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll,
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+ const struct dpll_pin_ops *ops, void *priv)
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+{
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+ struct dpll_pin_registration *reg;
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+ struct dpll_pin_ref *ref;
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+ unsigned long i;
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+
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+ xa_for_each(xa_dplls, i, ref) {
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+ if (ref->dpll != dpll)
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+ continue;
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+ reg = dpll_pin_registration_find(ref, ops, priv);
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+ if (WARN_ON(!reg))
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+ return;
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+ if (refcount_dec_and_test(&ref->refcount)) {
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+ list_del(®->list);
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+ kfree(reg);
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+ xa_erase(xa_dplls, i);
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+ WARN_ON(!list_empty(&ref->registration_list));
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+ kfree(ref);
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+ }
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+ return;
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+ }
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+}
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+
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+struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs)
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+{
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+ struct dpll_pin_ref *ref;
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+ unsigned long i = 0;
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+
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+ ref = xa_find(xa_refs, &i, ULONG_MAX, XA_PRESENT);
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+ WARN_ON(!ref);
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+ return ref;
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+}
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+
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+static struct dpll_device *
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+dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
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+{
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+ struct dpll_device *dpll;
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+ int ret;
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+
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+ dpll = kzalloc(sizeof(*dpll), GFP_KERNEL);
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+ if (!dpll)
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+ return ERR_PTR(-ENOMEM);
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+ refcount_set(&dpll->refcount, 1);
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+ INIT_LIST_HEAD(&dpll->registration_list);
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+ dpll->device_idx = device_idx;
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+ dpll->clock_id = clock_id;
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+ dpll->module = module;
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+ ret = xa_alloc_cyclic(&dpll_device_xa, &dpll->id, dpll, xa_limit_32b,
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+ &dpll_xa_id, GFP_KERNEL);
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+ if (ret < 0) {
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+ kfree(dpll);
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+ return ERR_PTR(ret);
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+ }
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+ xa_init_flags(&dpll->pin_refs, XA_FLAGS_ALLOC);
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+
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+ return dpll;
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+}
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+
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+/**
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+ * dpll_device_get - find existing or create new dpll device
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+ * @clock_id: clock_id of creator
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+ * @device_idx: idx given by device driver
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+ * @module: reference to registering module
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+ *
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+ * Get existing object of a dpll device, unique for given arguments.
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+ * Create new if doesn't exist yet.
|
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+ *
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+ * Context: Acquires a lock (dpll_lock)
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+ * Return:
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+ * * valid dpll_device struct pointer if succeeded
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+ * * ERR_PTR(X) - error
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+ */
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+struct dpll_device *
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+dpll_device_get(u64 clock_id, u32 device_idx, struct module *module)
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+{
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+ struct dpll_device *dpll, *ret = NULL;
|
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+ unsigned long index;
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+
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+ mutex_lock(&dpll_lock);
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+ xa_for_each(&dpll_device_xa, index, dpll) {
|
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+ if (dpll->clock_id == clock_id &&
|
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+ dpll->device_idx == device_idx &&
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+ dpll->module == module) {
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+ ret = dpll;
|
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+ refcount_inc(&ret->refcount);
|
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+ break;
|
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+ }
|
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+ }
|
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+ if (!ret)
|
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+ ret = dpll_device_alloc(clock_id, device_idx, module);
|
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+ mutex_unlock(&dpll_lock);
|
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+
|
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+ return ret;
|
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+}
|
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+EXPORT_SYMBOL_GPL(dpll_device_get);
|
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+
|
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+/**
|
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+ * dpll_device_put - decrease the refcount and free memory if possible
|
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+ * @dpll: dpll_device struct pointer
|
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+ *
|
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+ * Context: Acquires a lock (dpll_lock)
|
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+ * Drop reference for a dpll device, if all references are gone, delete
|
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+ * dpll device object.
|
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+ */
|
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+void dpll_device_put(struct dpll_device *dpll)
|
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+{
|
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+ mutex_lock(&dpll_lock);
|
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+ if (refcount_dec_and_test(&dpll->refcount)) {
|
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+ ASSERT_DPLL_NOT_REGISTERED(dpll);
|
|
+ WARN_ON_ONCE(!xa_empty(&dpll->pin_refs));
|
|
+ xa_destroy(&dpll->pin_refs);
|
|
+ xa_erase(&dpll_device_xa, dpll->id);
|
|
+ WARN_ON(!list_empty(&dpll->registration_list));
|
|
+ kfree(dpll);
|
|
+ }
|
|
+ mutex_unlock(&dpll_lock);
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_device_put);
|
|
+
|
|
+static struct dpll_device_registration *
|
|
+dpll_device_registration_find(struct dpll_device *dpll,
|
|
+ const struct dpll_device_ops *ops, void *priv)
|
|
+{
|
|
+ struct dpll_device_registration *reg;
|
|
+
|
|
+ list_for_each_entry(reg, &dpll->registration_list, list) {
|
|
+ if (reg->ops == ops && reg->priv == priv)
|
|
+ return reg;
|
|
+ }
|
|
+ return NULL;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dpll_device_register - register the dpll device in the subsystem
|
|
+ * @dpll: pointer to a dpll
|
|
+ * @type: type of a dpll
|
|
+ * @ops: ops for a dpll device
|
|
+ * @priv: pointer to private information of owner
|
|
+ *
|
|
+ * Make dpll device available for user space.
|
|
+ *
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ * Return:
|
|
+ * * 0 on success
|
|
+ * * negative - error value
|
|
+ */
|
|
+int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
|
|
+ const struct dpll_device_ops *ops, void *priv)
|
|
+{
|
|
+ struct dpll_device_registration *reg;
|
|
+ bool first_registration = false;
|
|
+
|
|
+ if (WARN_ON(!ops))
|
|
+ return -EINVAL;
|
|
+ if (WARN_ON(!ops->mode_get))
|
|
+ return -EINVAL;
|
|
+ if (WARN_ON(!ops->lock_status_get))
|
|
+ return -EINVAL;
|
|
+ if (WARN_ON(type < DPLL_TYPE_PPS || type > DPLL_TYPE_MAX))
|
|
+ return -EINVAL;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ reg = dpll_device_registration_find(dpll, ops, priv);
|
|
+ if (reg) {
|
|
+ mutex_unlock(&dpll_lock);
|
|
+ return -EEXIST;
|
|
+ }
|
|
+
|
|
+ reg = kzalloc(sizeof(*reg), GFP_KERNEL);
|
|
+ if (!reg) {
|
|
+ mutex_unlock(&dpll_lock);
|
|
+ return -ENOMEM;
|
|
+ }
|
|
+ reg->ops = ops;
|
|
+ reg->priv = priv;
|
|
+ dpll->type = type;
|
|
+ first_registration = list_empty(&dpll->registration_list);
|
|
+ list_add_tail(®->list, &dpll->registration_list);
|
|
+ if (!first_registration) {
|
|
+ mutex_unlock(&dpll_lock);
|
|
+ return 0;
|
|
+ }
|
|
+
|
|
+ xa_set_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED);
|
|
+ mutex_unlock(&dpll_lock);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_device_register);
|
|
+
|
|
+/**
|
|
+ * dpll_device_unregister - unregister dpll device
|
|
+ * @dpll: registered dpll pointer
|
|
+ * @ops: ops for a dpll device
|
|
+ * @priv: pointer to private information of owner
|
|
+ *
|
|
+ * Unregister device, make it unavailable for userspace.
|
|
+ * Note: It does not free the memory
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ */
|
|
+void dpll_device_unregister(struct dpll_device *dpll,
|
|
+ const struct dpll_device_ops *ops, void *priv)
|
|
+{
|
|
+ struct dpll_device_registration *reg;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ ASSERT_DPLL_REGISTERED(dpll);
|
|
+ reg = dpll_device_registration_find(dpll, ops, priv);
|
|
+ if (WARN_ON(!reg)) {
|
|
+ mutex_unlock(&dpll_lock);
|
|
+ return;
|
|
+ }
|
|
+ list_del(®->list);
|
|
+ kfree(reg);
|
|
+
|
|
+ if (!list_empty(&dpll->registration_list)) {
|
|
+ mutex_unlock(&dpll_lock);
|
|
+ return;
|
|
+ }
|
|
+ xa_clear_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED);
|
|
+ mutex_unlock(&dpll_lock);
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_device_unregister);
|
|
+
|
|
+static struct dpll_pin *
|
|
+dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
|
|
+ const struct dpll_pin_properties *prop)
|
|
+{
|
|
+ struct dpll_pin *pin;
|
|
+ int ret;
|
|
+
|
|
+ pin = kzalloc(sizeof(*pin), GFP_KERNEL);
|
|
+ if (!pin)
|
|
+ return ERR_PTR(-ENOMEM);
|
|
+ pin->pin_idx = pin_idx;
|
|
+ pin->clock_id = clock_id;
|
|
+ pin->module = module;
|
|
+ if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX ||
|
|
+ prop->type > DPLL_PIN_TYPE_MAX)) {
|
|
+ ret = -EINVAL;
|
|
+ goto err;
|
|
+ }
|
|
+ pin->prop = prop;
|
|
+ refcount_set(&pin->refcount, 1);
|
|
+ xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC);
|
|
+ xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC);
|
|
+ ret = xa_alloc(&dpll_pin_xa, &pin->id, pin, xa_limit_16b, GFP_KERNEL);
|
|
+ if (ret)
|
|
+ goto err;
|
|
+ return pin;
|
|
+err:
|
|
+ xa_destroy(&pin->dpll_refs);
|
|
+ xa_destroy(&pin->parent_refs);
|
|
+ kfree(pin);
|
|
+ return ERR_PTR(ret);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dpll_pin_get - find existing or create new dpll pin
|
|
+ * @clock_id: clock_id of creator
|
|
+ * @pin_idx: idx given by dev driver
|
|
+ * @module: reference to registering module
|
|
+ * @prop: dpll pin properties
|
|
+ *
|
|
+ * Get existing object of a pin (unique for given arguments) or create new
|
|
+ * if doesn't exist yet.
|
|
+ *
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ * Return:
|
|
+ * * valid allocated dpll_pin struct pointer if succeeded
|
|
+ * * ERR_PTR(X) - error
|
|
+ */
|
|
+struct dpll_pin *
|
|
+dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module,
|
|
+ const struct dpll_pin_properties *prop)
|
|
+{
|
|
+ struct dpll_pin *pos, *ret = NULL;
|
|
+ unsigned long i;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ xa_for_each(&dpll_pin_xa, i, pos) {
|
|
+ if (pos->clock_id == clock_id &&
|
|
+ pos->pin_idx == pin_idx &&
|
|
+ pos->module == module) {
|
|
+ ret = pos;
|
|
+ refcount_inc(&ret->refcount);
|
|
+ break;
|
|
+ }
|
|
+ }
|
|
+ if (!ret)
|
|
+ ret = dpll_pin_alloc(clock_id, pin_idx, module, prop);
|
|
+ mutex_unlock(&dpll_lock);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_pin_get);
|
|
+
|
|
+/**
|
|
+ * dpll_pin_put - decrease the refcount and free memory if possible
|
|
+ * @pin: pointer to a pin to be put
|
|
+ *
|
|
+ * Drop reference for a pin, if all references are gone, delete pin object.
|
|
+ *
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ */
|
|
+void dpll_pin_put(struct dpll_pin *pin)
|
|
+{
|
|
+ mutex_lock(&dpll_lock);
|
|
+ if (refcount_dec_and_test(&pin->refcount)) {
|
|
+ xa_destroy(&pin->dpll_refs);
|
|
+ xa_destroy(&pin->parent_refs);
|
|
+ xa_erase(&dpll_pin_xa, pin->id);
|
|
+ kfree(pin);
|
|
+ }
|
|
+ mutex_unlock(&dpll_lock);
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_pin_put);
|
|
+
|
|
+static int
|
|
+__dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
|
|
+ const struct dpll_pin_ops *ops, void *priv)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ ret = dpll_xa_ref_pin_add(&dpll->pin_refs, pin, ops, priv);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+ ret = dpll_xa_ref_dpll_add(&pin->dpll_refs, dpll, ops, priv);
|
|
+ if (ret)
|
|
+ goto ref_pin_del;
|
|
+ xa_set_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED);
|
|
+
|
|
+ return ret;
|
|
+
|
|
+ref_pin_del:
|
|
+ dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv);
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dpll_pin_register - register the dpll pin in the subsystem
|
|
+ * @dpll: pointer to a dpll
|
|
+ * @pin: pointer to a dpll pin
|
|
+ * @ops: ops for a dpll pin ops
|
|
+ * @priv: pointer to private information of owner
|
|
+ *
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ * Return:
|
|
+ * * 0 on success
|
|
+ * * negative - error value
|
|
+ */
|
|
+int
|
|
+dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
|
|
+ const struct dpll_pin_ops *ops, void *priv)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ if (WARN_ON(!ops) ||
|
|
+ WARN_ON(!ops->state_on_dpll_get) ||
|
|
+ WARN_ON(!ops->direction_get))
|
|
+ return -EINVAL;
|
|
+ if (ASSERT_DPLL_REGISTERED(dpll))
|
|
+ return -EINVAL;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ if (WARN_ON(!(dpll->module == pin->module &&
|
|
+ dpll->clock_id == pin->clock_id)))
|
|
+ ret = -EINVAL;
|
|
+ else
|
|
+ ret = __dpll_pin_register(dpll, pin, ops, priv);
|
|
+ mutex_unlock(&dpll_lock);
|
|
+
|
|
+ return ret;
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_pin_register);
|
|
+
|
|
+static void
|
|
+__dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,
|
|
+ const struct dpll_pin_ops *ops, void *priv)
|
|
+{
|
|
+ dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv);
|
|
+ dpll_xa_ref_dpll_del(&pin->dpll_refs, dpll, ops, priv);
|
|
+ if (xa_empty(&pin->dpll_refs))
|
|
+ xa_clear_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED);
|
|
+}
|
|
+
|
|
+/**
|
|
+ * dpll_pin_unregister - unregister dpll pin from dpll device
|
|
+ * @dpll: registered dpll pointer
|
|
+ * @pin: pointer to a pin
|
|
+ * @ops: ops for a dpll pin
|
|
+ * @priv: pointer to private information of owner
|
|
+ *
|
|
+ * Note: It does not free the memory
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ */
|
|
+void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,
|
|
+ const struct dpll_pin_ops *ops, void *priv)
|
|
+{
|
|
+ if (WARN_ON(xa_empty(&dpll->pin_refs)))
|
|
+ return;
|
|
+ if (WARN_ON(!xa_empty(&pin->parent_refs)))
|
|
+ return;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ __dpll_pin_unregister(dpll, pin, ops, priv);
|
|
+ mutex_unlock(&dpll_lock);
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_pin_unregister);
|
|
+
|
|
+/**
|
|
+ * dpll_pin_on_pin_register - register a pin with a parent pin
|
|
+ * @parent: pointer to a parent pin
|
|
+ * @pin: pointer to a pin
|
|
+ * @ops: ops for a dpll pin
|
|
+ * @priv: pointer to private information of owner
|
|
+ *
|
|
+ * Register a pin with a parent pin, create references between them and
|
|
+ * between newly registered pin and dplls connected with a parent pin.
|
|
+ *
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ * Return:
|
|
+ * * 0 on success
|
|
+ * * negative - error value
|
|
+ */
|
|
+int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
|
|
+ const struct dpll_pin_ops *ops, void *priv)
|
|
+{
|
|
+ struct dpll_pin_ref *ref;
|
|
+ unsigned long i, stop;
|
|
+ int ret;
|
|
+
|
|
+ if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX))
|
|
+ return -EINVAL;
|
|
+
|
|
+ if (WARN_ON(!ops) ||
|
|
+ WARN_ON(!ops->state_on_pin_get) ||
|
|
+ WARN_ON(!ops->direction_get))
|
|
+ return -EINVAL;
|
|
+ if (ASSERT_PIN_REGISTERED(parent))
|
|
+ return -EINVAL;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv);
|
|
+ if (ret)
|
|
+ goto unlock;
|
|
+ refcount_inc(&pin->refcount);
|
|
+ xa_for_each(&parent->dpll_refs, i, ref) {
|
|
+ ret = __dpll_pin_register(ref->dpll, pin, ops, priv);
|
|
+ if (ret) {
|
|
+ stop = i;
|
|
+ goto dpll_unregister;
|
|
+ }
|
|
+ }
|
|
+ mutex_unlock(&dpll_lock);
|
|
+
|
|
+ return ret;
|
|
+
|
|
+dpll_unregister:
|
|
+ xa_for_each(&parent->dpll_refs, i, ref)
|
|
+ if (i < stop)
|
|
+ __dpll_pin_unregister(ref->dpll, pin, ops, priv);
|
|
+ refcount_dec(&pin->refcount);
|
|
+ dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv);
|
|
+unlock:
|
|
+ mutex_unlock(&dpll_lock);
|
|
+ return ret;
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_pin_on_pin_register);
|
|
+
|
|
+/**
|
|
+ * dpll_pin_on_pin_unregister - unregister dpll pin from a parent pin
|
|
+ * @parent: pointer to a parent pin
|
|
+ * @pin: pointer to a pin
|
|
+ * @ops: ops for a dpll pin
|
|
+ * @priv: pointer to private information of owner
|
|
+ *
|
|
+ * Context: Acquires a lock (dpll_lock)
|
|
+ * Note: It does not free the memory
|
|
+ */
|
|
+void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin,
|
|
+ const struct dpll_pin_ops *ops, void *priv)
|
|
+{
|
|
+ struct dpll_pin_ref *ref;
|
|
+ unsigned long i;
|
|
+
|
|
+ mutex_lock(&dpll_lock);
|
|
+ dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv);
|
|
+ refcount_dec(&pin->refcount);
|
|
+ xa_for_each(&pin->dpll_refs, i, ref)
|
|
+ __dpll_pin_unregister(ref->dpll, pin, ops, priv);
|
|
+ mutex_unlock(&dpll_lock);
|
|
+}
|
|
+EXPORT_SYMBOL_GPL(dpll_pin_on_pin_unregister);
|
|
+
|
|
+static struct dpll_device_registration *
|
|
+dpll_device_registration_first(struct dpll_device *dpll)
|
|
+{
|
|
+ struct dpll_device_registration *reg;
|
|
+
|
|
+ reg = list_first_entry_or_null((struct list_head *)&dpll->registration_list,
|
|
+ struct dpll_device_registration, list);
|
|
+ WARN_ON(!reg);
|
|
+ return reg;
|
|
+}
|
|
+
|
|
+void *dpll_priv(struct dpll_device *dpll)
|
|
+{
|
|
+ struct dpll_device_registration *reg;
|
|
+
|
|
+ reg = dpll_device_registration_first(dpll);
|
|
+ return reg->priv;
|
|
+}
|
|
+
|
|
+const struct dpll_device_ops *dpll_device_ops(struct dpll_device *dpll)
|
|
+{
|
|
+ struct dpll_device_registration *reg;
|
|
+
|
|
+ reg = dpll_device_registration_first(dpll);
|
|
+ return reg->ops;
|
|
+}
|
|
+
|
|
+static struct dpll_pin_registration *
|
|
+dpll_pin_registration_first(struct dpll_pin_ref *ref)
|
|
+{
|
|
+ struct dpll_pin_registration *reg;
|
|
+
|
|
+ reg = list_first_entry_or_null(&ref->registration_list,
|
|
+ struct dpll_pin_registration, list);
|
|
+ WARN_ON(!reg);
|
|
+ return reg;
|
|
+}
|
|
+
|
|
+void *dpll_pin_on_dpll_priv(struct dpll_device *dpll,
|
|
+ struct dpll_pin *pin)
|
|
+{
|
|
+ struct dpll_pin_registration *reg;
|
|
+ struct dpll_pin_ref *ref;
|
|
+
|
|
+ ref = xa_load(&dpll->pin_refs, pin->pin_idx);
|
|
+ if (!ref)
|
|
+ return NULL;
|
|
+ reg = dpll_pin_registration_first(ref);
|
|
+ return reg->priv;
|
|
+}
|
|
+
|
|
+void *dpll_pin_on_pin_priv(struct dpll_pin *parent,
|
|
+ struct dpll_pin *pin)
|
|
+{
|
|
+ struct dpll_pin_registration *reg;
|
|
+ struct dpll_pin_ref *ref;
|
|
+
|
|
+ ref = xa_load(&pin->parent_refs, parent->pin_idx);
|
|
+ if (!ref)
|
|
+ return NULL;
|
|
+ reg = dpll_pin_registration_first(ref);
|
|
+ return reg->priv;
|
|
+}
|
|
+
|
|
+const struct dpll_pin_ops *dpll_pin_ops(struct dpll_pin_ref *ref)
|
|
+{
|
|
+ struct dpll_pin_registration *reg;
|
|
+
|
|
+ reg = dpll_pin_registration_first(ref);
|
|
+ return reg->ops;
|
|
+}
|
|
+
|
|
+static int __init dpll_init(void)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ ret = genl_register_family(&dpll_nl_family);
|
|
+ if (ret)
|
|
+ goto error;
|
|
+
|
|
+ return 0;
|
|
+
|
|
+error:
|
|
+ mutex_destroy(&dpll_lock);
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static void __exit dpll_exit(void)
|
|
+{
|
|
+ genl_unregister_family(&dpll_nl_family);
|
|
+ mutex_destroy(&dpll_lock);
|
|
+}
|
|
+
|
|
+subsys_initcall(dpll_init);
|
|
+module_exit(dpll_exit);
|
|
diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h
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new file mode 100644
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index 000000000000..5585873c5c1b
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--- /dev/null
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+++ b/drivers/dpll/dpll_core.h
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@@ -0,0 +1,89 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates
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+ * Copyright (c) 2023 Intel and affiliates
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+ */
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+
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+#ifndef __DPLL_CORE_H__
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+#define __DPLL_CORE_H__
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+
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+#include <linux/dpll.h>
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+#include <linux/list.h>
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+#include <linux/refcount.h>
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+#include "dpll_nl.h"
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+
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+#define DPLL_REGISTERED XA_MARK_1
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+
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+/**
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+ * struct dpll_device - stores DPLL device internal data
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+ * @id: unique id number for device given by dpll subsystem
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+ * @device_idx: id given by dev driver
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+ * @clock_id: unique identifier (clock_id) of a dpll
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+ * @module: module of creator
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+ * @type: type of a dpll
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+ * @pin_refs: stores pins registered within a dpll
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+ * @refcount: refcount
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+ * @registration_list: list of registered ops and priv data of dpll owners
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+ **/
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+struct dpll_device {
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+ u32 id;
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+ u32 device_idx;
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+ u64 clock_id;
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+ struct module *module;
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+ enum dpll_type type;
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+ struct xarray pin_refs;
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+ refcount_t refcount;
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+ struct list_head registration_list;
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+};
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+
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+/**
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+ * struct dpll_pin - structure for a dpll pin
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+ * @id: unique id number for pin given by dpll subsystem
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+ * @pin_idx: index of a pin given by dev driver
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+ * @clock_id: clock_id of creator
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+ * @module: module of creator
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+ * @dpll_refs: hold referencees to dplls pin was registered with
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+ * @parent_refs: hold references to parent pins pin was registered with
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+ * @prop: pointer to pin properties given by registerer
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+ * @rclk_dev_name: holds name of device when pin can recover clock from it
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+ * @refcount: refcount
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+ **/
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+struct dpll_pin {
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+ u32 id;
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+ u32 pin_idx;
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+ u64 clock_id;
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+ struct module *module;
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+ struct xarray dpll_refs;
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+ struct xarray parent_refs;
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+ const struct dpll_pin_properties *prop;
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+ refcount_t refcount;
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+};
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+
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+/**
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+ * struct dpll_pin_ref - structure for referencing either dpll or pins
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+ * @dpll: pointer to a dpll
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+ * @pin: pointer to a pin
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+ * @registration_list: list of ops and priv data registered with the ref
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+ * @refcount: refcount
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+ **/
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+struct dpll_pin_ref {
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+ union {
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+ struct dpll_device *dpll;
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+ struct dpll_pin *pin;
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+ };
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+ struct list_head registration_list;
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+ refcount_t refcount;
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+};
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+
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+void *dpll_priv(struct dpll_device *dpll);
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+void *dpll_pin_on_dpll_priv(struct dpll_device *dpll, struct dpll_pin *pin);
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+void *dpll_pin_on_pin_priv(struct dpll_pin *parent, struct dpll_pin *pin);
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+
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+const struct dpll_device_ops *dpll_device_ops(struct dpll_device *dpll);
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+struct dpll_device *dpll_device_get_by_id(int id);
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+const struct dpll_pin_ops *dpll_pin_ops(struct dpll_pin_ref *ref);
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+struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs);
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+extern struct xarray dpll_device_xa;
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+extern struct xarray dpll_pin_xa;
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+extern struct mutex dpll_lock;
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+#endif
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diff --git a/include/linux/dpll.h b/include/linux/dpll.h
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new file mode 100644
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index 000000000000..b47c3560b937
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--- /dev/null
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+++ b/include/linux/dpll.h
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@@ -0,0 +1,133 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates
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+ * Copyright (c) 2023 Intel and affiliates
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+ */
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+
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+#ifndef __DPLL_H__
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+#define __DPLL_H__
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+
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+#include <uapi/linux/dpll.h>
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+#include <linux/device.h>
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+#include <linux/netlink.h>
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+
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+struct dpll_device;
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+struct dpll_pin;
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+
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+struct dpll_device_ops {
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+ int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv,
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+ enum dpll_mode *mode, struct netlink_ext_ack *extack);
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+ bool (*mode_supported)(const struct dpll_device *dpll, void *dpll_priv,
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+ const enum dpll_mode mode,
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+ struct netlink_ext_ack *extack);
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+ int (*lock_status_get)(const struct dpll_device *dpll, void *dpll_priv,
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+ enum dpll_lock_status *status,
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+ struct netlink_ext_ack *extack);
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+ int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv,
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+ s32 *temp, struct netlink_ext_ack *extack);
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+};
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+
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+struct dpll_pin_ops {
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+ int (*frequency_set)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll, void *dpll_priv,
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+ const u64 frequency,
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+ struct netlink_ext_ack *extack);
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+ int (*frequency_get)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll, void *dpll_priv,
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+ u64 *frequency, struct netlink_ext_ack *extack);
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+ int (*direction_set)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll, void *dpll_priv,
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+ const enum dpll_pin_direction direction,
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+ struct netlink_ext_ack *extack);
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+ int (*direction_get)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll, void *dpll_priv,
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+ enum dpll_pin_direction *direction,
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+ struct netlink_ext_ack *extack);
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+ int (*state_on_pin_get)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_pin *parent_pin,
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+ void *parent_pin_priv,
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+ enum dpll_pin_state *state,
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+ struct netlink_ext_ack *extack);
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+ int (*state_on_dpll_get)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll,
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+ void *dpll_priv, enum dpll_pin_state *state,
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+ struct netlink_ext_ack *extack);
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+ int (*state_on_pin_set)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_pin *parent_pin,
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+ void *parent_pin_priv,
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+ const enum dpll_pin_state state,
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+ struct netlink_ext_ack *extack);
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+ int (*state_on_dpll_set)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll,
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+ void *dpll_priv,
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+ const enum dpll_pin_state state,
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+ struct netlink_ext_ack *extack);
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+ int (*prio_get)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll, void *dpll_priv,
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+ u32 *prio, struct netlink_ext_ack *extack);
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+ int (*prio_set)(const struct dpll_pin *pin, void *pin_priv,
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+ const struct dpll_device *dpll, void *dpll_priv,
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+ const u32 prio, struct netlink_ext_ack *extack);
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+};
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+
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+struct dpll_pin_frequency {
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+ u64 min;
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+ u64 max;
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+};
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+
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+#define DPLL_PIN_FREQUENCY_RANGE(_min, _max) \
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+ { \
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+ .min = _min, \
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+ .max = _max, \
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+ }
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+
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+#define DPLL_PIN_FREQUENCY(_val) DPLL_PIN_FREQUENCY_RANGE(_val, _val)
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+#define DPLL_PIN_FREQUENCY_1PPS \
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+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_1_HZ)
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+#define DPLL_PIN_FREQUENCY_10MHZ \
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+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_MHZ)
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+#define DPLL_PIN_FREQUENCY_IRIG_B \
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+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_KHZ)
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+#define DPLL_PIN_FREQUENCY_DCF77 \
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+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ)
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+
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+struct dpll_pin_properties {
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+ const char *board_label;
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+ const char *panel_label;
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+ const char *package_label;
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+ enum dpll_pin_type type;
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+ unsigned long capabilities;
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+ u32 freq_supported_num;
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+ struct dpll_pin_frequency *freq_supported;
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+};
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+
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+struct dpll_device *
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+dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module);
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+
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+void dpll_device_put(struct dpll_device *dpll);
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+
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+int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
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+ const struct dpll_device_ops *ops, void *priv);
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+
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+void dpll_device_unregister(struct dpll_device *dpll,
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+ const struct dpll_device_ops *ops, void *priv);
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+
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+struct dpll_pin *
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+dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module,
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+ const struct dpll_pin_properties *prop);
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+
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+int dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
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+ const struct dpll_pin_ops *ops, void *priv);
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+
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+void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin,
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+ const struct dpll_pin_ops *ops, void *priv);
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+
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+void dpll_pin_put(struct dpll_pin *pin);
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+
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+int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
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+ const struct dpll_pin_ops *ops, void *priv);
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+
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+void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin,
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+ const struct dpll_pin_ops *ops, void *priv);
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+
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+#endif
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--
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2.43.0
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