diff --git a/debian_iso_image.inc b/debian_iso_image.inc index c3b9ac86..4217d205 100644 --- a/debian_iso_image.inc +++ b/debian_iso_image.inc @@ -28,14 +28,14 @@ libbnxt-re #kernel-std/kernel-rt linux-compiler-gcc-10-x86 -linux-headers-6.6.0-1-amd64 -linux-rt-headers-6.6.0-1-rt-amd64 -linux-headers-6.6.0-1-common -linux-rt-headers-6.6.0-1-rt-common -linux-image-6.6.0-1-amd64-unsigned -linux-rt-image-6.6.0-1-rt-amd64-unsigned -linux-kbuild-6.6 -linux-rt-kbuild-6.6 +linux-headers-6.12.0-1-amd64 +linux-rt-headers-6.12.0-1-rt-amd64 +linux-headers-6.12.0-1-common +linux-rt-headers-6.12.0-1-rt-common +linux-image-6.12.0-1-amd64-unsigned +linux-rt-image-6.12.0-1-rt-amd64-unsigned +linux-kbuild-6.12 +linux-rt-kbuild-6.12 linux-libc-dev linux-perf diff --git a/kernel-rt/debian/deb_patches/0014-Correct-the-patches-for-the-linux-kernel-6.12.x.patch b/kernel-rt/debian/deb_patches/0014-Correct-the-patches-for-the-linux-kernel-6.12.x.patch new file mode 100644 index 00000000..2aa6b718 --- /dev/null +++ b/kernel-rt/debian/deb_patches/0014-Correct-the-patches-for-the-linux-kernel-6.12.x.patch @@ -0,0 +1,479 @@ +From bc68f1325d88d333af7953908536957ac1851601 Mon Sep 17 00:00:00 2001 +From: Jiping Ma +Date: Sun, 16 Mar 2025 10:41:37 +0000 +Subject: [PATCH 13/19] Correct the patches for the linux kernel 6.12.x + +Signed-off-by: Jiping Ma +--- + ...-module.lds-under-arch-directory-too.patch | 29 +++--- + debian/patches/debian/kernelvariables.patch | 4 +- + ...support-asciidoctor-for-documentatio.patch | 3 +- + debian/patches/debian/version.patch | 95 ++++++------------- + ...ecure_boot-flag-to-indicate-secure-b.patch | 12 +-- + ...e-kernel-if-booted-in-secure-boot-mo.patch | 71 ++++++-------- + 6 files changed, 84 insertions(+), 130 deletions(-) + +diff --git a/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch b/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch +index eea69e4558..9f550a1cfa 100644 +--- a/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch ++++ b/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch +@@ -22,31 +22,32 @@ Therefore, we move module.lds under the arch build directory in + rules.real and change Makefile.modfinal to look for it in both places. + + --- +-Index: linux/scripts/Makefile.modfinal +-=================================================================== +---- linux.orig/scripts/Makefile.modfinal +-+++ linux/scripts/Makefile.modfinal +-@@ -29,12 +29,13 @@ quiet_cmd_cc_o_c = CC [M] $@ ++ scripts/Makefile.modfinal | 6 ++++-- ++ 1 file changed, 4 insertions(+), 2 deletions(-) ++ ++--- a/scripts/Makefile.modfinal +++++ b/scripts/Makefile.modfinal ++@@ -33,11 +33,13 @@ quiet_cmd_cc_o_c = CC [M] $@ ++ $(extmod_prefix).module-common.o: $(srctree)/scripts/module-common.c FORCE + $(call if_changed_dep,cc_o_c) + +- ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(SRCARCH)/Makefile.postlink) + +ARCH_MODULE_LDS := $(word 1,$(wildcard scripts/module.lds arch/$(SRCARCH)/module.lds)) +- +++ + quiet_cmd_ld_ko_o = LD [M] $@ +- cmd_ld_ko_o += \ ++ cmd_ld_ko_o = \ + $(LD) -r $(KBUILD_LDFLAGS) \ + $(KBUILD_LDFLAGS_MODULE) $(LDFLAGS_MODULE) \ +-- -T scripts/module.lds -o $@ $(filter %.o, $^); \ +-+ -T $(ARCH_MODULE_LDS) -o $@ $(filter %.o, $^); \ +- $(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true) ++- -T scripts/module.lds -o $@ $(filter %.o, $^) +++ -T $(ARCH_MODULE_LDS) -o $@ $(filter %.o, $^) + + quiet_cmd_btf_ko = BTF [M] $@ +-@@ -57,7 +58,7 @@ if_changed_except = $(if $(call newer_pr ++ cmd_btf_ko = \ ++@@ -57,7 +59,7 @@ if_changed_except = $(if $(call newer_pr + printf '%s\n' 'savedcmd_$@ := $(make-cmd)' > $(dot-target).cmd, @:) + + # Re-generate module BTFs if either module's .ko or vmlinux changed +--%.ko: %.o %.mod.o scripts/module.lds $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE +-+%.ko: %.o %.mod.o $(ARCH_MODULE_LDS) $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE ++-%.ko: %.o %.mod.o $(extmod_prefix).module-common.o scripts/module.lds $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE +++%.ko: %.o %.mod.o $(extmod_prefix).module-common.o $(ARCH_MODULE_LDS) $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE + +$(call if_changed_except,ld_ko_o,vmlinux) + ifdef CONFIG_DEBUG_INFO_BTF_MODULES + +$(if $(newer-prereqs),$(call cmd,btf_ko)) +diff --git a/debian/patches/debian/kernelvariables.patch b/debian/patches/debian/kernelvariables.patch +index 2196c8a435..ef427ab195 100644 +--- a/debian/patches/debian/kernelvariables.patch ++++ b/debian/patches/debian/kernelvariables.patch +@@ -17,7 +17,7 @@ use of $(ARCH) needs to be moved after this. + --- + --- a/Makefile + +++ b/Makefile +-@@ -395,36 +395,6 @@ include $(srctree)/scripts/subarch.inclu ++@@ -406,36 +406,6 @@ include $(srctree)/scripts/subarch.inclu + # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile + ARCH ?= $(SUBARCH) + +@@ -54,7 +54,7 @@ use of $(ARCH) needs to be moved after this. + KCONFIG_CONFIG ?= .config + export KCONFIG_CONFIG + +-@@ -540,6 +510,35 @@ RUSTFLAGS_KERNEL = ++@@ -551,6 +521,35 @@ RUSTFLAGS_KERNEL = + AFLAGS_KERNEL = + LDFLAGS_vmlinux = + +diff --git a/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch b/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch +index 3971218b68..a1cbb2c0bd 100644 +--- a/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch ++++ b/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch +@@ -6,9 +6,8 @@ Forwarded: not-needed + + --- + tools/lib/perf/Documentation/Makefile | 2 +- +- tools/lib/traceevent/Documentation/Makefile | 2 +- + tools/perf/Documentation/Makefile | 2 +- +- 3 files changed, 3 insertions(+), 3 deletions(-) ++ 2 files changed, 2 insertions(+), 2 deletions(-) + + diff --git a/tools/lib/perf/Documentation/Makefile b/tools/lib/perf/Documentation/Makefile + index 972754082a85..272d06173a3e 100644 +diff --git a/debian/patches/debian/version.patch b/debian/patches/debian/version.patch +index 47fc6c0dce..7093df77ae 100644 +--- a/debian/patches/debian/version.patch ++++ b/debian/patches/debian/version.patch +@@ -7,19 +7,16 @@ For distribution binary packages we assume + $DISTRIBUTION_OFFICIAL_BUILD, $DISTRIBUTOR and $DISTRIBUTION_VERSION + are set. + --- +- Makefile | 15 ++++++++++++++- +- arch/ia64/kernel/process.c | 5 +++-- ++ Makefile | 16 +++++++++++++++- + arch/powerpc/kernel/process.c | 6 ++++-- + arch/x86/um/sysrq_64.c | 6 ++++-- + kernel/hung_task.c | 6 ++++-- +- lib/dump_stack.c | 6 ++++-- +- 6 files changed, 33 insertions(+), 11 deletions(-) ++ lib/dump_stack.c | 7 +++++-- ++ 5 files changed, 32 insertions(+), 9 deletions(-) + +-Index: linux/Makefile +-=================================================================== +---- linux.orig/Makefile +-+++ linux/Makefile +-@@ -1263,7 +1263,8 @@ PHONY += prepare archprepare ++--- a/Makefile +++++ b/Makefile ++@@ -1196,7 +1196,8 @@ PHONY += prepare archprepare + + archprepare: outputmakefile archheaders archscripts scripts include/config/kernel.release \ + asm-generic $(version_h) include/generated/utsrelease.h \ +@@ -29,7 +26,7 @@ Index: linux/Makefile + + prepare0: archprepare + $(Q)$(MAKE) $(build)=scripts/mod +-@@ -1321,6 +1322,16 @@ define filechk_version.h ++@@ -1254,6 +1255,16 @@ define filechk_version.h + echo \#define LINUX_VERSION_SUBLEVEL $(SUBLEVEL) + endef + +@@ -43,10 +40,10 @@ Index: linux/Makefile + +endef + +endif + + +- $(version_h): PATCHLEVEL := $(or $(PATCHLEVEL), 0) +- $(version_h): SUBLEVEL := $(or $(SUBLEVEL), 0) ++ $(version_h): private PATCHLEVEL := $(or $(PATCHLEVEL), 0) ++ $(version_h): private SUBLEVEL := $(or $(SUBLEVEL), 0) + $(version_h): FORCE +-@@ -1335,6 +1346,9 @@ filechk_compile.h = $(srctree)/scripts/m ++@@ -1268,6 +1279,9 @@ filechk_compile.h = $(srctree)/scripts/m + include/generated/compile.h: FORCE + $(call filechk,compile.h) + +@@ -56,34 +53,8 @@ Index: linux/Makefile + PHONY += headerdep + headerdep: + $(Q)find $(srctree)/include/ -name '*.h' | xargs --max-args 1 \ +-Index: linux/arch/ia64/kernel/process.c +-=================================================================== +---- linux.orig/arch/ia64/kernel/process.c +-+++ linux/arch/ia64/kernel/process.c +-@@ -35,6 +35,7 @@ +- #include +- #include +- #include +-+#include +- +- #include +- #include +-@@ -102,9 +103,9 @@ show_regs (struct pt_regs *regs) +- print_modules(); +- printk("\n"); +- show_regs_print_info(KERN_DEFAULT); +-- printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n", +-+ printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s%s)\n", +- regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(), +-- init_utsname()->release); +-+ init_utsname()->release, LINUX_PACKAGE_ID); +- printk("ip is at %pS\n", (void *)ip); +- printk("unat: %016lx pfs : %016lx rsc : %016lx\n", +- regs->ar_unat, regs->ar_pfs, regs->ar_rsc); +-Index: linux/arch/powerpc/kernel/process.c +-=================================================================== +---- linux.orig/arch/powerpc/kernel/process.c +-+++ linux/arch/powerpc/kernel/process.c ++--- a/arch/powerpc/kernel/process.c +++++ b/arch/powerpc/kernel/process.c + @@ -38,6 +38,7 @@ + #include + #include +@@ -92,7 +63,7 @@ Index: linux/arch/powerpc/kernel/process.c + + #include + #include +-@@ -1520,8 +1521,9 @@ static void __show_regs(struct pt_regs * ++@@ -1560,8 +1561,9 @@ static void __show_regs(struct pt_regs * + + printk("NIP: "REG" LR: "REG" CTR: "REG"\n", + regs->nip, regs->link, regs->ctr); +@@ -104,18 +75,16 @@ Index: linux/arch/powerpc/kernel/process.c + printk("MSR: "REG" ", regs->msr); + print_msr_bits(regs->msr); + pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); +-Index: linux/arch/x86/um/sysrq_64.c +-=================================================================== +---- linux.orig/arch/x86/um/sysrq_64.c +-+++ linux/arch/x86/um/sysrq_64.c +-@@ -9,6 +9,7 @@ ++--- a/arch/x86/um/sysrq_64.c +++++ b/arch/x86/um/sysrq_64.c ++@@ -10,6 +10,7 @@ + #include + #include + #include + +#include + #include + #include +- #include ++ + @@ -17,8 +18,9 @@ void show_regs(struct pt_regs *regs) + { + printk("\n"); +@@ -128,10 +97,8 @@ Index: linux/arch/x86/um/sysrq_64.c + printk(KERN_INFO "RIP: %04lx:%pS\n", PT_REGS_CS(regs) & 0xffff, + (void *)PT_REGS_IP(regs)); + printk(KERN_INFO "RSP: %016lx EFLAGS: %08lx\n", PT_REGS_SP(regs), +-Index: linux/kernel/hung_task.c +-=================================================================== +---- linux.orig/kernel/hung_task.c +-+++ linux/kernel/hung_task.c ++--- a/kernel/hung_task.c +++++ b/kernel/hung_task.c + @@ -24,6 +24,7 @@ + #include + +@@ -140,7 +107,7 @@ Index: linux/kernel/hung_task.c + + /* + * The number of tasks checked: +-@@ -131,10 +132,11 @@ static void check_hung_task(struct task_ ++@@ -132,10 +133,11 @@ static void check_hung_task(struct task_ + sysctl_hung_task_warnings--; + pr_err("INFO: task %s:%d blocked for more than %ld seconds.\n", + t->comm, t->pid, (jiffies - t->last_switch_time) / HZ); +@@ -154,10 +121,8 @@ Index: linux/kernel/hung_task.c + pr_err("\"echo 0 > /proc/sys/kernel/hung_task_timeout_secs\"" + " disables this message.\n"); + sched_show_task(t); +-Index: linux/lib/dump_stack.c +-=================================================================== +---- linux.orig/lib/dump_stack.c +-+++ linux/lib/dump_stack.c ++--- a/lib/dump_stack.c +++++ b/lib/dump_stack.c + @@ -14,6 +14,7 @@ + #include + #include +@@ -166,14 +131,16 @@ Index: linux/lib/dump_stack.c + + static char dump_stack_arch_desc_str[128]; + +-@@ -54,13 +55,15 @@ void __init dump_stack_set_arch_desc(con ++@@ -54,7 +55,7 @@ void __init dump_stack_set_arch_desc(con + */ + void dump_stack_print_info(const char *log_lvl) + { +-- printk("%sCPU: %d PID: %d Comm: %.20s %s%s %s %.*s" BUILD_ID_FMT "\n", +-+ printk("%sCPU: %d PID: %d Comm: %.20s %s%s %s %.*s %s" BUILD_ID_FMT "\n", +- log_lvl, raw_smp_processor_id(), current->pid, current->comm, +- kexec_crash_loaded() ? "Kdump: loaded " : "", ++- printk("%sCPU: %d UID: %u PID: %d Comm: %.20s %s%s %s %.*s" BUILD_ID_FMT "\n", +++ printk("%sCPU: %d UID: %u PID: %d Comm: %.20s %s%s %s %.*s %s" BUILD_ID_FMT "\n", ++ log_lvl, raw_smp_processor_id(), ++ __kuid_val(current_real_cred()->euid), ++ current->pid, current->comm, ++@@ -62,7 +63,9 @@ void dump_stack_print_info(const char *l + print_tainted(), + init_utsname()->release, + (int)strcspn(init_utsname()->version, " "), +@@ -182,5 +149,5 @@ Index: linux/lib/dump_stack.c + + LINUX_PACKAGE_ID, + + BUILD_ID_VAL); + +- if (dump_stack_arch_desc_str[0] != '\0') +- printk("%sHardware name: %s\n", ++ if (get_taint()) ++ printk("%s%s\n", log_lvl, print_tainted_verbose()); +diff --git a/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch b/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch +index 6a8940da52..822beab21c 100644 +--- a/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch ++++ b/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch +@@ -31,7 +31,7 @@ cc: linux-efi@vger.kernel.org + + --- a/arch/x86/kernel/setup.c + +++ b/arch/x86/kernel/setup.c +-@@ -1205,19 +1205,7 @@ void __init setup_arch(char **cmdline_p) ++@@ -1193,19 +1193,7 @@ void __init setup_arch(char **cmdline_p) + /* Allocate bigger log buffer */ + setup_log_buf(1); + +@@ -54,7 +54,7 @@ cc: linux-efi@vger.kernel.org + + --- a/drivers/firmware/efi/Makefile + +++ b/drivers/firmware/efi/Makefile +-@@ -27,6 +27,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_m ++@@ -25,6 +25,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_m + obj-$(CONFIG_EFI_BOOTLOADER_CONTROL) += efibc.o + obj-$(CONFIG_EFI_TEST) += test/ + obj-$(CONFIG_EFI_DEV_PATH_PARSER) += dev-path-parser.o +@@ -106,7 +106,7 @@ cc: linux-efi@vger.kernel.org + +} + --- a/include/linux/efi.h + +++ b/include/linux/efi.h +-@@ -849,6 +849,14 @@ extern int __init efi_setup_pcdp_console ++@@ -871,6 +871,14 @@ extern int __init efi_setup_pcdp_console + #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ + #define EFI_MEM_NO_SOFT_RESERVE 11 /* Is the kernel configured to ignore soft reservations? */ + #define EFI_PRESERVE_BS_REGIONS 12 /* Are EFI boot-services memory segments available? */ +@@ -121,7 +121,7 @@ cc: linux-efi@vger.kernel.org + + #ifdef CONFIG_EFI + /* +-@@ -873,6 +881,7 @@ static inline bool efi_rt_services_suppo ++@@ -895,6 +903,7 @@ static inline bool efi_rt_services_suppo + return (efi.runtime_supported_mask & mask) == mask; + } + extern void efi_find_mirror(void); +@@ -129,7 +129,7 @@ cc: linux-efi@vger.kernel.org + #else + static inline bool efi_enabled(int feature) + { +-@@ -892,6 +901,7 @@ static inline bool efi_rt_services_suppo ++@@ -914,6 +923,7 @@ static inline bool efi_rt_services_suppo + } + + static inline void efi_find_mirror(void) {} +@@ -137,7 +137,7 @@ cc: linux-efi@vger.kernel.org + #endif + + extern int efi_status_to_err(efi_status_t status); +-@@ -1107,13 +1117,6 @@ static inline bool efi_runtime_disabled( ++@@ -1133,13 +1143,6 @@ static inline bool efi_runtime_disabled( + extern void efi_call_virt_check_flags(unsigned long flags, const void *caller); + extern unsigned long efi_call_virt_save_flags(void); + +diff --git a/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch b/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch +index 0ab4db9957..6fff3f8967 100644 +--- a/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch ++++ b/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch +@@ -13,22 +13,20 @@ description: + + Signed-off-by: Ben Hutchings + [Salvatore Bonaccorso: After fixing https://bugs.debian.org/956197 the +-help text for LOCK_DOWN_IN_EFI_SECURE_BOOT needs to be adjusted to +-mention that lockdown is triggered in integrity mode] ++help text for LOCK_DOWN_IN_EFI_SECURE_BOOT was adjusted to mention that ++lockdown is triggered in integrity mode (https://bugs.debian.org/1025417)] + Signed-off-by: Salvatore Bonaccorso + --- +- arch/x86/kernel/setup.c | 4 ++-- +- drivers/firmware/efi/secureboot.c | 5 +++++ +- include/linux/security.h | 6 ++++++ +- security/lockdown/Kconfig | 15 +++++++++++++++ +- security/lockdown/lockdown.c | 2 +- +- 5 files changed, 29 insertions(+), 3 deletions(-) ++ arch/x86/kernel/setup.c | 4 ++-- ++ drivers/firmware/efi/secureboot.c | 3 +++ ++ include/linux/security.h | 6 ++++++ ++ security/lockdown/Kconfig | 15 +++++++++++++++ ++ security/lockdown/lockdown.c | 2 +- ++ 5 files changed, 27 insertions(+), 3 deletions(-) + +-Index: debian-kernel/arch/x86/kernel/setup.c +-=================================================================== +---- debian-kernel.orig/arch/x86/kernel/setup.c +-+++ debian-kernel/arch/x86/kernel/setup.c +-@@ -1028,6 +1028,8 @@ void __init setup_arch(char **cmdline_p) ++--- a/arch/x86/kernel/setup.c +++++ b/arch/x86/kernel/setup.c ++@@ -904,6 +904,8 @@ void __init setup_arch(char **cmdline_p) + if (efi_enabled(EFI_BOOT)) + efi_init(); + +@@ -37,7 +35,7 @@ Index: debian-kernel/arch/x86/kernel/setup.c + reserve_ibft_region(); + x86_init.resources.dmi_setup(); + +-@@ -1190,8 +1192,6 @@ void __init setup_arch(char **cmdline_p) ++@@ -1070,8 +1072,6 @@ void __init setup_arch(char **cmdline_p) + /* Allocate bigger log buffer */ + setup_log_buf(1); + +@@ -46,10 +44,8 @@ Index: debian-kernel/arch/x86/kernel/setup.c + reserve_initrd(); + + acpi_table_upgrade(); +-Index: debian-kernel/drivers/firmware/efi/secureboot.c +-=================================================================== +---- debian-kernel.orig/drivers/firmware/efi/secureboot.c +-+++ debian-kernel/drivers/firmware/efi/secureboot.c ++--- a/drivers/firmware/efi/secureboot.c +++++ b/drivers/firmware/efi/secureboot.c + @@ -15,6 +15,7 @@ + #include + #include +@@ -69,19 +65,17 @@ Index: debian-kernel/drivers/firmware/efi/secureboot.c + pr_info("Secure boot enabled\n"); + break; + default: +-Index: debian-kernel/include/linux/security.h +-=================================================================== +---- debian-kernel.orig/include/linux/security.h +-+++ debian-kernel/include/linux/security.h +-@@ -486,6 +486,7 @@ int security_inode_notifysecctx(struct inode *inode, void *ctx, u32 ctxlen); ++--- a/include/linux/security.h +++++ b/include/linux/security.h ++@@ -522,6 +522,7 @@ int security_inode_notifysecctx(struct i + int security_inode_setsecctx(struct dentry *dentry, void *ctx, u32 ctxlen); + int security_inode_getsecctx(struct inode *inode, void **ctx, u32 *ctxlen); + int security_locked_down(enum lockdown_reason what); + +int lock_kernel_down(const char *where, enum lockdown_reason level); +- #else /* CONFIG_SECURITY */ +- +- static inline int call_blocking_lsm_notifier(enum lsm_event event, void *data) +-@@ -1404,6 +1405,11 @@ static inline int security_locked_down(enum lockdown_reason what) ++ int lsm_fill_user_ctx(struct lsm_ctx __user *uctx, u32 *uctx_len, ++ void *val, size_t val_len, u64 id, u64 flags); ++ int security_bdev_alloc(struct block_device *bdev); ++@@ -1504,6 +1505,11 @@ static inline int security_locked_down(e + { + return 0; + } +@@ -90,13 +84,11 @@ Index: debian-kernel/include/linux/security.h + +{ + + return -EOPNOTSUPP; + +} +- #endif /* CONFIG_SECURITY */ +- +- #if defined(CONFIG_SECURITY) && defined(CONFIG_WATCH_QUEUE) +-Index: debian-kernel/security/lockdown/Kconfig +-=================================================================== +---- debian-kernel.orig/security/lockdown/Kconfig +-+++ debian-kernel/security/lockdown/Kconfig ++ static inline int lsm_fill_user_ctx(struct lsm_ctx __user *uctx, ++ u32 *uctx_len, void *val, size_t val_len, ++ u64 id, u64 flags) ++--- a/security/lockdown/Kconfig +++++ b/security/lockdown/Kconfig + @@ -45,3 +45,18 @@ config LOCK_DOWN_KERNEL_FORCE_CONFIDENTI + disabled. + +@@ -116,11 +108,9 @@ Index: debian-kernel/security/lockdown/Kconfig + + + + Enabling this option results in kernel lockdown being + + triggered in integrity mode if EFI Secure Boot is set. +-Index: debian-kernel/security/lockdown/lockdown.c +-=================================================================== +---- debian-kernel.orig/security/lockdown/lockdown.c +-+++ debian-kernel/security/lockdown/lockdown.c +-@@ -23,7 +23,7 @@ static const enum lockdown_reason lockdo ++--- a/security/lockdown/lockdown.c +++++ b/security/lockdown/lockdown.c ++@@ -24,7 +24,7 @@ static const enum lockdown_reason lockdo + /* + * Put the kernel into lock-down mode. + */ +@@ -129,6 +119,3 @@ Index: debian-kernel/security/lockdown/lockdown.c + { + if (kernel_locked_down >= level) + return -EPERM; +--- +-2.43.0 +- +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0015-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch b/kernel-rt/debian/deb_patches/0015-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch new file mode 100644 index 00000000..7b86b0b2 --- /dev/null +++ b/kernel-rt/debian/deb_patches/0015-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch @@ -0,0 +1,44 @@ +From 7002ca5a870f7deb4e40fda2d2f8834b2af16176 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 5 Aug 2024 04:30:36 +0200 +Subject: [PATCH 14/20] d/rules.real: Unset KBUILD_HOSTCFLAGS etc. instead of + overriding to be empty + +The upstream Makefile tries to add some flags to KBUILD_HOSTCFLAGS, +and now fails to build anything if we override it to be empty: + + .../scripts/kconfig/util.c:11:10: fatal error: hashtable.h: No such file or directory + 11 | #include + | ^~~~~~~~~~~~~ + compilation terminated. + +Instead of overriding these flags variables to be empty, unset them in +the environment. + +(cherry picked from commit f77deecbb5d46f1f5034f348952152b0c2d584f7) +Signed-off-by: Jiping Ma +--- + debian/rules.real | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/debian/rules.real b/debian/rules.real +index 19b3d7d..00f2a33 100644 +--- a/debian/rules.real ++++ b/debian/rules.real +@@ -42,10 +42,12 @@ undefine LANGUAGE + stamp = [ -d $(dir $@) ] || mkdir $(dir $@); touch $@ + + setup_env := env -u ABINAME -u ARCH -u FEATURESET -u FLAVOUR -u VERSION -u LOCALVERSION ++# XXX: All the tools leak flags between host and build all the time, just don't care. See #1050991. ++setup_env += -u KBUILD_HOSTCFLAGS -u HOSTCFLAGS -u KBUILD_HOSTLDFLAGS + setup_env += DISTRIBUTION_OFFICIAL_BUILD=1 DISTRIBUTOR="$(DISTRIBUTOR)" DISTRIBUTION_VERSION="$(SOURCEVERSION)" KBUILD_BUILD_TIMESTAMP="$(SOURCE_DATE)" KBUILD_BUILD_VERSION_TIMESTAMP="StarlingX $(DISTRIBUTOR) $(SOURCEVERSION) ($(SOURCE_DATE_UTC_ISO))" + setup_env += KBUILD_VERBOSE=$(if $(filter terse,$(DEB_BUILD_OPTIONS)),0,1) + +-MAKE_CLEAN = $(setup_env) $(MAKE) KCFLAGS=-fdebug-prefix-map=$(CURDIR)/= KBUILD_HOSTCFLAGS='$(CFLAGS) $(CPPFLAGS)' HOSTCFLAGS='$(CFLAGS) $(CPPFLAGS)' KBUILD_HOSTLDFLAGS='$(LDFLAGS)' ++MAKE_CLEAN = $(setup_env) $(MAKE) KCFLAGS=-fdebug-prefix-map=$(CURDIR)/= + MAKE_SELF := $(MAKE) -f debian/rules.real $(MAKEOVERRIDES) + MAKEOVERRIDES = + +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0016-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch b/kernel-rt/debian/deb_patches/0016-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch new file mode 100644 index 00000000..a809f931 --- /dev/null +++ b/kernel-rt/debian/deb_patches/0016-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch @@ -0,0 +1,31 @@ +From b0947b6fad8cd0774a3709c721a6cfc7c71fb957 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 5 Aug 2024 04:40:27 +0200 +Subject: [PATCH 15/20] d/rules.d/Makefile.inc: Add scripts/include to header + include path + +In 6.11 some headers used by user-space tools have been moved under +scripts/include, and the upstream Makefile now adds scripts/include to +the header include path for these tools. We need to do the same. + +(cherry picked from commit 0d0d62b7d1cc23f87e921629ca51d2989392d8fb) +Signed-off-by: Jiping Ma +--- + debian/rules.d/Makefile.inc | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/debian/rules.d/Makefile.inc b/debian/rules.d/Makefile.inc +index 55eae14..386217b 100644 +--- a/debian/rules.d/Makefile.inc ++++ b/debian/rules.d/Makefile.inc +@@ -12,6 +12,7 @@ CFLAGS := $(shell dpkg-buildflags --get CFLAGS) -Wall + CPPFLAGS := $(shell dpkg-buildflags --get CPPFLAGS) \ + -I$(top_srcdir)/$(OUTDIR) \ + -I$(top_srcdir)/debian/build/build-tools/$(OUTDIR) \ ++ -I$(top_srcdir)/scripts/include \ + -isystem $(top_srcdir)/debian/build/build-tools/include + CXXFLAGS := $(shell dpkg-buildflags --get CXXFLAGS) -Wall + LDFLAGS := $(shell dpkg-buildflags --get LDFLAGS) +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0017-linux-cpupower-Update-turbostat-Makefile-to-define-B.patch b/kernel-rt/debian/deb_patches/0017-linux-cpupower-Update-turbostat-Makefile-to-define-B.patch new file mode 100644 index 00000000..ad603921 --- /dev/null +++ b/kernel-rt/debian/deb_patches/0017-linux-cpupower-Update-turbostat-Makefile-to-define-B.patch @@ -0,0 +1,31 @@ +From 97e8ebe05e2b4572a39954ad64101bedb062228e Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Sat, 6 Jul 2024 06:32:05 +0200 +Subject: [PATCH 16/20] linux-cpupower: Update turbostat Makefile to define + BUILD_BUG_HEADER + +turbostat continues to abuse headers not meant for-user-space, now +including . Define the necessary macro so it can +find that. + +(cherry picked from commit 4ad01663251dc89c2290aa29aef5917b4c9f1cb9) +Signed-off-by: Jiping Ma +--- + debian/rules.d/tools/power/x86/turbostat/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/debian/rules.d/tools/power/x86/turbostat/Makefile b/debian/rules.d/tools/power/x86/turbostat/Makefile +index eb5124d..9f5275c 100644 +--- a/debian/rules.d/tools/power/x86/turbostat/Makefile ++++ b/debian/rules.d/tools/power/x86/turbostat/Makefile +@@ -4,6 +4,6 @@ installdir = /usr/sbin + + include $(top_rulesdir)/Makefile.inc + +-CPPFLAGS += -I"$(top_srcdir)/tools/include" -DMSRHEADER='"$(top_srcdir)/arch/x86/include/asm/msr-index.h"' -DINTEL_FAMILY_HEADER='"$(top_srcdir)/arch/x86/include/asm/intel-family.h"' ++CPPFLAGS += -I"$(top_srcdir)/tools/include" -DMSRHEADER='"$(top_srcdir)/arch/x86/include/asm/msr-index.h"' -DINTEL_FAMILY_HEADER='"$(top_srcdir)/arch/x86/include/asm/intel-family.h"' -DBUILD_BUG_HEADER='"$(top_srcdir)/include/linux/build_bug.h"' + + LDLIBS += -lcap -lrt +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0018-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch b/kernel-rt/debian/deb_patches/0018-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch new file mode 100644 index 00000000..1d823c4d --- /dev/null +++ b/kernel-rt/debian/deb_patches/0018-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch @@ -0,0 +1,252 @@ +From 6e811f58e0ba18b827893b56f10d30632fca72de Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Sat, 6 Jul 2024 06:28:03 +0200 +Subject: [PATCH 17/20] hyperv-daemons: Update for upstream removal of + hv_fcopy_daemon + +- Don't try to build it. +- Remove the init script, service file, and udev rule. +- Use dpkg-maintscript rm_conffile to remove the init script on + upgrade. +- In preinst, stop the service only if upgrading from an older + version. In postinst do nothing with it. +- Remove it from the package description. + +(cherry picked from commit fced95b415be4c1fbeec29e02a667168f00ee8e4) +Signed-off-by: Jiping Ma +--- + debian/hyperv-daemons.hv-fcopy-daemon.init | 109 ------------------ + debian/hyperv-daemons.hv-fcopy-daemon.service | 10 -- + debian/hyperv-daemons.maintscript | 1 + + debian/hyperv-daemons.postinst | 2 +- + debian/hyperv-daemons.preinst | 6 +- + debian/hyperv-daemons.udev | 1 - + debian/rules.d/tools/hv/Makefile | 1 - + debian/rules.real | 2 +- + debian/templates/tools-unversioned.control.in | 5 +- + 9 files changed, 9 insertions(+), 128 deletions(-) + delete mode 100644 debian/hyperv-daemons.hv-fcopy-daemon.init + delete mode 100644 debian/hyperv-daemons.hv-fcopy-daemon.service + +diff --git a/debian/hyperv-daemons.hv-fcopy-daemon.init b/debian/hyperv-daemons.hv-fcopy-daemon.init +deleted file mode 100644 +index 5866dc6..0000000 +--- a/debian/hyperv-daemons.hv-fcopy-daemon.init ++++ /dev/null +@@ -1,109 +0,0 @@ +-#! /bin/sh +-### BEGIN INIT INFO +-# Provides: hv-fcopy-daemon +-# Required-Start: $remote_fs $syslog +-# Required-Stop: $remote_fs $syslog +-# Default-Start: 2 3 4 5 +-# Default-Stop: 0 1 6 +-# Short-Description: Hyper-V file copy service (FCOPY) daemon +-### END INIT INFO +- +-PATH=/sbin:/usr/sbin:/bin:/usr/bin +-DESC="Hyper-V file copy service (FCOPY) daemon" +-NAME=hv_fcopy_daemon +-DAEMON=/usr/sbin/$NAME +-PIDFILE=/run/$NAME.pid +-SCRIPTNAME=/etc/init.d/hv-fcopy-daemon +- +-# Exit if the package is not installed +-[ -x "$DAEMON" ] || exit 0 +- +-# Exit if the kernel device does not exist +-[ -e "/dev/vmbus/hv_fcopy" ] || exit 0 +- +-# Load the VERBOSE setting and other rcS variables +-. /lib/init/vars.sh +- +-# Define LSB log_* functions. +-. /lib/lsb/init-functions +- +-# +-# Function that starts the daemon/service +-# +-do_start() +-{ +- # Return +- # 0 if daemon has been started +- # 1 if daemon was already running +- # 2 if daemon could not be started +- start-stop-daemon --start --quiet --pidfile $PIDFILE --exec $DAEMON --test > /dev/null \ +- || return 1 +- start-stop-daemon --start --quiet --pidfile $PIDFILE --exec $DAEMON --background --make-pidfile -- -n \ +- || return 2 +-} +- +-# +-# Function that stops the daemon/service +-# +-do_stop() +-{ +- # Return +- # 0 if daemon has been stopped +- # 1 if daemon was already stopped +- # 2 if daemon could not be stopped +- # other if a failure occurred +- start-stop-daemon --stop --quiet --retry=TERM/30/KILL/5 --pidfile $PIDFILE --name $NAME +- [ "$?" = 2 ] && return 2 +- start-stop-daemon --stop --quiet --oknodo --retry=0/30/KILL/5 --exec $DAEMON +- RETVAL=$? +- [ "$RETVAL" = 2 ] && return 2 +- # Many daemons don't delete their pidfiles when they exit. +- rm -f $PIDFILE +- return "$RETVAL" +-} +- +-case "$1" in +- start) +- [ "$VERBOSE" != no ] && log_daemon_msg "Starting $DESC" "$NAME" +- do_start +- case "$?" in +- 0|1) [ "$VERBOSE" != no ] && log_end_msg 0 ;; +- 2) [ "$VERBOSE" != no ] && log_end_msg 1 ;; +- esac +- ;; +- stop) +- [ "$VERBOSE" != no ] && log_daemon_msg "Stopping $DESC" "$NAME" +- do_stop +- case "$?" in +- 0|1) [ "$VERBOSE" != no ] && log_end_msg 0 ;; +- 2) [ "$VERBOSE" != no ] && log_end_msg 1 ;; +- esac +- ;; +- status) +- status_of_proc -p "$PIDFILE" "$DAEMON" "$NAME" +- ;; +- restart|force-reload) +- log_daemon_msg "Restarting $DESC" "$NAME" +- do_stop +- case "$?" in +- 0|1) +- do_start +- case "$?" in +- 0) log_end_msg 0 ;; +- 1) log_end_msg 1 ;; # Old process is still running +- *) log_end_msg 1 ;; # Failed to start +- esac +- ;; +- *) +- # Failed to stop +- log_end_msg 1 +- ;; +- esac +- ;; +- *) +- echo "Usage: $SCRIPTNAME {start|stop|status|restart|force-reload}" >&2 +- exit 3 +- ;; +-esac +- +-: +diff --git a/debian/hyperv-daemons.hv-fcopy-daemon.service b/debian/hyperv-daemons.hv-fcopy-daemon.service +deleted file mode 100644 +index d8e4d3b..0000000 +--- a/debian/hyperv-daemons.hv-fcopy-daemon.service ++++ /dev/null +@@ -1,10 +0,0 @@ +-[Unit] +-Description=Hyper-V file copy service (FCOPY) daemon +-Conflicts=hyperv-daemons.hv-fcopy-daemon.service +-BindsTo=sys-devices-virtual-misc-vmbus\x21hv_fcopy.device +- +-[Service] +-ExecStart=/usr/sbin/hv_fcopy_daemon -n +- +-[Install] +-WantedBy=multi-user.target +diff --git a/debian/hyperv-daemons.maintscript b/debian/hyperv-daemons.maintscript +index a2f28e4..96ed55f 100644 +--- a/debian/hyperv-daemons.maintscript ++++ b/debian/hyperv-daemons.maintscript +@@ -1,3 +1,4 @@ + mv_conffile /etc/init.d/hyperv-daemons.hv-fcopy-daemon /etc/init.d/hv-fcopy-daemon 5.8~rc7-1~exp1 ++rm_conffile /etc/init.d/hv-fcopy-daemon 6.10~rc6-1~exp1 + mv_conffile /etc/init.d/hyperv-daemons.hv-kvp-daemon /etc/init.d/hv-kvp-daemon 5.8~rc7-1~exp1 + mv_conffile /etc/init.d/hyperv-daemons.hv-vss-daemon /etc/init.d/hv-vss-daemon 5.8~rc7-1~exp1 +diff --git a/debian/hyperv-daemons.postinst b/debian/hyperv-daemons.postinst +index 3573c9c..9bee3f6 100644 +--- a/debian/hyperv-daemons.postinst ++++ b/debian/hyperv-daemons.postinst +@@ -8,7 +8,7 @@ if [ "$1" = "configure" ]; then + udevadm trigger || true + else + # On upgrade make sure running daemons are restarted +- systemctl try-restart hv-fcopy-daemon.service hv-kvp-daemon.service hv-vss-daemon.service ++ systemctl try-restart hv-kvp-daemon.service hv-vss-daemon.service + fi + fi + fi +diff --git a/debian/hyperv-daemons.preinst b/debian/hyperv-daemons.preinst +index 5810d29..fc13e51 100644 +--- a/debian/hyperv-daemons.preinst ++++ b/debian/hyperv-daemons.preinst +@@ -2,7 +2,11 @@ + set -e + + if [ "$1" = "upgrade" ]; then +- for i in fcopy kvp vss; do ++ services='kvp vss' ++ if dpkg --compare-versions "$2" lt 6.10~rc6-1~exp1; then ++ services="fcopy $services" ++ fi ++ for i in $services; do + if [ -d /run/systemd/system ]; then + systemctl stop hyperv-daemons.hv-$i-daemon.service 2>/dev/null || true + fi +diff --git a/debian/hyperv-daemons.udev b/debian/hyperv-daemons.udev +index 1daacac..60e9102 100644 +--- a/debian/hyperv-daemons.udev ++++ b/debian/hyperv-daemons.udev +@@ -1,3 +1,2 @@ +-KERNEL=="vmbus/hv_fcopy", TAG+="systemd", ENV{SYSTEMD_WANTS}+="hv-fcopy-daemon.service" + KERNEL=="vmbus/hv_kvp", TAG+="systemd", ENV{SYSTEMD_WANTS}+="hv-kvp-daemon.service" + KERNEL=="vmbus/hv_vss", TAG+="systemd", ENV{SYSTEMD_WANTS}+="hv-vss-daemon.service" +diff --git a/debian/rules.d/tools/hv/Makefile b/debian/rules.d/tools/hv/Makefile +index 5f00f55..8e4c305 100644 +--- a/debian/rules.d/tools/hv/Makefile ++++ b/debian/rules.d/tools/hv/Makefile +@@ -6,7 +6,6 @@ include $(top_rulesdir)/Makefile.inc + else + + PROGS = \ +- hv_fcopy_daemon \ + hv_kvp_daemon \ + hv_vss_daemon + +diff --git a/debian/rules.real b/debian/rules.real +index 00f2a33..0e681da 100644 +--- a/debian/rules.real ++++ b/debian/rules.real +@@ -714,7 +714,7 @@ binary_hyperv-daemons: build_hyperv-daemons + ifeq (,$(filter nodoc,$(DEB_BUILD_PROFILES))) + dh_installdocs + endif +- for service in fcopy kvp vss; do \ ++ for service in kvp vss; do \ + dh_installsystemd --name hv-$$service-daemon --no-enable --no-start \ + || break; \ + dh_installinit --name hv-$$service-daemon \ +diff --git a/debian/templates/tools-unversioned.control.in b/debian/templates/tools-unversioned.control.in +index e899567..b4ff16f 100644 +--- a/debian/templates/tools-unversioned.control.in ++++ b/debian/templates/tools-unversioned.control.in +@@ -124,10 +124,7 @@ Depends: ${shlibs:Depends}, ${misc:Depends} + Section: admin + Description: Support daemons for Linux running on Hyper-V + Suite of daemons for Linux guests running on Hyper-V, consisting of +- hv_fcopy_daemon, hv_kvp_daemon and hv_vss_daemon. +- . +- hv_fcopy_daemon provides the file copy service, allowing the host to +- copy files into the guest. ++ hv_kvp_daemon and hv_vss_daemon. + . + hv_kvp_daemon provides the key-value pair (KVP) service, allowing the + host to get and set the IP networking configuration of the guest. +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0019-d-rules.d-certs-Add-newly-required-include-directory.patch b/kernel-rt/debian/deb_patches/0019-d-rules.d-certs-Add-newly-required-include-directory.patch new file mode 100644 index 00000000..2a645835 --- /dev/null +++ b/kernel-rt/debian/deb_patches/0019-d-rules.d-certs-Add-newly-required-include-directory.patch @@ -0,0 +1,26 @@ +From cefab4ea0b88f7fd09881ba5f297fa51f75fb812 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 7 Oct 2024 16:45:27 +0200 +Subject: [PATCH 18/20] d/rules.d/certs: Add newly required include directory + to CPPFLAGS + +(cherry picked from commit 3a17dcbfe0be6bf2b8f5e79692decb8fe26153b3) +Signed-off-by: Jiping Ma +--- + debian/rules.d/certs/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/debian/rules.d/certs/Makefile b/debian/rules.d/certs/Makefile +index 7ff7bae..12f01ef 100644 +--- a/debian/rules.d/certs/Makefile ++++ b/debian/rules.d/certs/Makefile +@@ -3,5 +3,5 @@ PROGS = \ + + include $(top_rulesdir)/Makefile.inc + +-CPPFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 ++CPPFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -I$(top_srcdir)/scripts + extract-cert: LDLIBS += -lcrypto +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0020-Disable-building-rtla-since-bullseye-s-libtraceevent.patch b/kernel-rt/debian/deb_patches/0020-Disable-building-rtla-since-bullseye-s-libtraceevent.patch new file mode 100644 index 00000000..1d64e9fc --- /dev/null +++ b/kernel-rt/debian/deb_patches/0020-Disable-building-rtla-since-bullseye-s-libtraceevent.patch @@ -0,0 +1,55 @@ +From 8158acbc7b23f4b4ce6fa302504fa4c6590a794d Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 3 Oct 2022 03:06:12 +0200 +Subject: [PATCH 19/20] Disable building rtla, since bullseye's libtraceevent + and libtracefs are too old + +The build-dependencies for rtla aren't currently versioned, but the +upstream Makefile checks for libtraceevent >= 1.5 and libtracefs >= +1.3 which are not satisfiable in bullseye. For now, disable building +rtla. This can be reverted if newer versions of those libraries are +added to bullseye-backports. + +See discussion at merge request kernel-team/linux!539. + +(cherry picked from commit 15b6859742d404abdcd68bcb589f8a8e2dfb6ce4) +Signed-off-by: Jiping Ma +--- + debian/templates/tools-unversioned.control.in | 24 +++++++++---------- + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/debian/templates/tools-unversioned.control.in b/debian/templates/tools-unversioned.control.in +index b4ff16f..72cac03 100644 +--- a/debian/templates/tools-unversioned.control.in ++++ b/debian/templates/tools-unversioned.control.in +@@ -133,15 +133,15 @@ Description: Support daemons for Linux running on Hyper-V + hv_vss_daemon provides the volume shadow copy service (VSS), allowing + the host to freeze the guest filesystems while taking a snapshot. + +-Package: rtla +-Meta-Rules-Target: rtla +-Build-Profiles: +-Architecture: amd64 arm64 armhf i386 x32 +-Build-Depends: libtracefs-dev (>= 1.3), libtraceevent-dev (>= 1:1.5), python3-docutils +-Depends: ${shlibs:Depends} +-Section: devel +-Description: Real-Time Linux Analysis tools +- rtla provides a set of commands for analysing the real-time +- properties of Linux. rtla uses kernel tracing capabilities to +- provide precise information about the properties and root causes of +- unexpected results. ++#Package: rtla ++#Meta-Rules-Target: rtla ++#Build-Profiles: ++#Architecture: amd64 arm64 armhf i386 x32 ++#Build-Depends: libtracefs-dev (>= 1.3), libtraceevent-dev (>= 1:1.5), python3-docutils ++#Depends: ${shlibs:Depends} ++#Section: devel ++#Description: Real-Time Linux Analysis tools ++# rtla provides a set of commands for analysing the real-time ++# properties of Linux. rtla uses kernel tracing capabilities to ++# provide precise information about the properties and root causes of ++# unexpected results. +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0021-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch b/kernel-rt/debian/deb_patches/0021-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch new file mode 100644 index 00000000..03ddb49b --- /dev/null +++ b/kernel-rt/debian/deb_patches/0021-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch @@ -0,0 +1,32 @@ +From ebfc1ceafd46d2d1e96e95cfd89078ba1812ce54 Mon Sep 17 00:00:00 2001 +From: Jiping Ma +Date: Tue, 18 Mar 2025 05:48:02 +0000 +Subject: [PATCH 20/20] Drop all ia64 configs due to upstream dropping IA64 + arch + +In upstream commit cf8e8658100d4eae80ce9b21f7a81cb024dd5057 the whole +IA64 architecture was dropped, so remove Debian's configuration files +wrt IA64 as well. + +(cherry picked from commit b4b93560d441770b1bfe2429d17ac5bbde17f237) +[jm: Remove ia64 in debian/config/defines.] +Signed-off-by: Jiping Ma +--- + debian/config/defines | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/debian/config/defines b/debian/config/defines +index f1ca81b..ef01dc9 100644 +--- a/debian/config/defines ++++ b/debian/config/defines +@@ -117,7 +117,6 @@ arches: + armhf + hppa + i386 +- ia64 + m68k + mips + mips64 +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/0022-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch b/kernel-rt/debian/deb_patches/0022-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch new file mode 100644 index 00000000..0c0cac5e --- /dev/null +++ b/kernel-rt/debian/deb_patches/0022-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch @@ -0,0 +1,34 @@ +From f2ba48fc0e28bdba0f80473f960763a4cdac1708 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Sat, 16 Nov 2024 23:50:11 +0100 +Subject: [PATCH] linux-kbuild: Add scripts/module-common.c (Closes: #1087495) + +Since upstream commit fdf94e4403ec "kbuild: compile constant module +information only once", some module information is compiled from +scripts/module-common.c and this needs to be available to out-of-tree +module builds. + +This was previously not noticed due to the accidentally disabled +headers-kbuild tests. + +(cherry picked from commit b93faa99519d9788617b7d73f8334190e53442a3) +Signed-off-by: Jiping Ma +--- + debian/rules.d/scripts/Makefile | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/debian/rules.d/scripts/Makefile b/debian/rules.d/scripts/Makefile +index c913e25e9c..a858eeb17e 100644 +--- a/debian/rules.d/scripts/Makefile ++++ b/debian/rules.d/scripts/Makefile +@@ -8,6 +8,7 @@ DATA = \ + Kbuild.include \ + Makefile.* \ + mkversion \ ++ module-common.c \ + module-common.lds \ + subarch.include + +-- +2.47.1 + diff --git a/kernel-rt/debian/deb_patches/series b/kernel-rt/debian/deb_patches/series index e210c1ba..400a5b1f 100644 --- a/kernel-rt/debian/deb_patches/series +++ b/kernel-rt/debian/deb_patches/series @@ -11,3 +11,12 @@ 0011-Update-the-patch-for-kernel-6.6.40.patch 0012-mod-fix-the-undefined-errors.patch 0013-build-size.patch +0014-Correct-the-patches-for-the-linux-kernel-6.12.x.patch +0015-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch +0016-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch +0017-linux-cpupower-Update-turbostat-Makefile-to-define-B.patch +0018-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch +0019-d-rules.d-certs-Add-newly-required-include-directory.patch +0020-Disable-building-rtla-since-bullseye-s-libtraceevent.patch +0021-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch +0022-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch diff --git a/kernel-rt/debian/dl_hook b/kernel-rt/debian/dl_hook index ccbfaedd..019b06e5 100755 --- a/kernel-rt/debian/dl_hook +++ b/kernel-rt/debian/dl_hook @@ -24,7 +24,7 @@ # building. # Tools needed: tar/sed -KERNEL_HEAD_COMMIT=94762e4ed9eafc254a5522cf9107e2f450f79dc8 +KERNEL_HEAD_COMMIT=7c2d49c69f3f7e59a598fa8f618b37836fd56404 DEBIAN_FILE=linux_6.1.27-1~bpo11%2B1.debian.tar.xz tar xvf linux-yocto-${KERNEL_HEAD_COMMIT}.tar.gz diff --git a/kernel-rt/debian/meta_data.yaml b/kernel-rt/debian/meta_data.yaml index 7d958b4e..eb33ac26 100644 --- a/kernel-rt/debian/meta_data.yaml +++ b/kernel-rt/debian/meta_data.yaml @@ -1,14 +1,14 @@ --- -debver: 6.6.71 +debver: 6.12.18 debname: linux-rt dl_hook: dl_hook dl_files: - linux-yocto-94762e4ed9eafc254a5522cf9107e2f450f79dc8.tar.gz: + linux-yocto-7c2d49c69f3f7e59a598fa8f618b37836fd56404.tar.gz: topdir: null url: "https://git.yoctoproject.org/linux-yocto/snapshot/\ - linux-yocto-94762e4ed9eafc254a5522cf9107e2f450f79dc8.tar.gz" - sha256sum: a6ec1d5108e798fd3bf7b3e977976412a333aef2d553920b677995e60ad5c5fe + linux-yocto-7c2d49c69f3f7e59a598fa8f618b37836fd56404.tar.gz" + sha256sum: ab33bb25e83816f94093dcf3fbce6efc8dbba06254bcf55e882cd8ca6a5bb393 linux_6.1.27-1~bpo11%2B1.debian.tar.xz: topdir: null url: diff --git a/kernel-rt/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch b/kernel-rt/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch index aa3aa70b..089026b4 100644 --- a/kernel-rt/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch +++ b/kernel-rt/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch @@ -1,7 +1,7 @@ -From 52de1a7c4bcaf87293a85cc80324bb23ca6c1508 Mon Sep 17 00:00:00 2001 +From 4642b81ace18e84ce74a4389f8ef0b771431f3f5 Mon Sep 17 00:00:00 2001 From: Chris Friesen Date: Thu, 17 Jun 2021 07:44:04 +0000 -Subject: [PATCH 01/17] Notification of death of arbitrary processes +Subject: [PATCH 01/16] Notification of death of arbitrary processes Note: this commit was copied from Titanium Cloud Rel2 @@ -28,6 +28,8 @@ Signed-off-by: Peng Zhang Signed-off-by: Li Zhou [jm: Adapted the patch for context changes.] Signed-off-by: Jiping Ma +[jm: Adapted the patch for context changes.] +Signed-off-by: Jiping Ma --- include/linux/init_task.h | 9 ++ include/linux/sched.h | 6 + @@ -38,15 +40,15 @@ Signed-off-by: Jiping Ma kernel/death_notify.c | 228 +++++++++++++++++++++++++++++++++++++ kernel/death_notify.h | 46 ++++++++ kernel/exit.c | 6 + - kernel/fork.c | 4 + - kernel/signal.c | 11 ++ + kernel/fork.c | 5 +- + kernel/signal.c | 9 ++ kernel/sys.c | 8 ++ - 12 files changed, 351 insertions(+) + 12 files changed, 349 insertions(+), 1 deletion(-) create mode 100644 kernel/death_notify.c create mode 100644 kernel/death_notify.h diff --git a/include/linux/init_task.h b/include/linux/init_task.h -index 40fc5813cf93..4fe260a1c280 100644 +index bccb3f1f6262..88275e28ccad 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h @@ -25,6 +25,15 @@ @@ -66,11 +68,11 @@ index 40fc5813cf93..4fe260a1c280 100644 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE diff --git a/include/linux/sched.h b/include/linux/sched.h -index 77f01ac385f7..7b92c4d35ddd 100644 +index 8982820dae21..a94c5f5e5c20 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h -@@ -1254,6 +1254,12 @@ struct task_struct { - short il_prev; +@@ -1313,6 +1313,12 @@ struct task_struct { + u8 il_weight; short pref_node_fork; #endif +#ifdef CONFIG_SIGEXIT @@ -83,15 +85,15 @@ index 77f01ac385f7..7b92c4d35ddd 100644 int numa_scan_seq; unsigned int numa_scan_period; diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h -index 370ed14b1ae0..4d5d1c7b7902 100644 +index 35791791a879..27852b28ab88 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -63,6 +63,22 @@ # define PR_ENDIAN_LITTLE 1 /* True little endian mode */ # define PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo little endian */ -+#define PR_DO_NOTIFY_TASK_STATE 17 /* Set/get notification for task -+ state changes */ ++#define PR_DO_NOTIFY_TASK_STATE 17 /* Set/get notification for task ++ state changes */ + +/* This is the data structure for requestion process death + * (and other state change) information. Sig of -1 means @@ -110,36 +112,36 @@ index 370ed14b1ae0..4d5d1c7b7902 100644 #define PR_GET_SECCOMP 21 #define PR_SET_SECCOMP 22 diff --git a/init/Kconfig b/init/Kconfig -index e403a2925635..b946cfd059b9 100644 +index 7256fa127530..38737731dbed 100644 --- a/init/Kconfig +++ b/init/Kconfig -@@ -1866,6 +1866,21 @@ config DEBUG_PERF_USE_VMALLOC +@@ -1927,6 +1927,21 @@ config DEBUG_PERF_USE_VMALLOC endmenu +config SIGEXIT -+ bool "Notification of death of arbitrary processes" -+ default n -+ help -+ When enabled this exposes a new feature which may be called to request -+ notification when an arbitrary process changes state. The caller specifies -+ a pid, signal number, and event mask, and when that pid dies, or is -+ stopped, or anything else that would normally cause a SIGCHLD, the -+ kernel will send the specified signal to the caller if the event is in -+ the event mask originally passed down. The siginfo_t struct will -+ contain the same information as would be included with SIGCHLD. ++ bool "Notification of death of arbitrary processes" ++ default n ++ help ++ When enabled this exposes a new feature which may be called to request ++ notification when an arbitrary process changes state. The caller specifies ++ a pid, signal number, and event mask, and when that pid dies, or is ++ stopped, or anything else that would normally cause a SIGCHLD, the ++ kernel will send the specified signal to the caller if the event is in ++ the event mask originally passed down. The siginfo_t struct will ++ contain the same information as would be included with SIGCHLD. + -+ This is exposed to userspace via the prctl() -+ call with the PR_DO_NOTIFY_TASK_STATE option ++ This is exposed to userspace via the prctl() ++ call with the PR_DO_NOTIFY_TASK_STATE option + config SYSTEM_DATA_VERIFICATION def_bool n select SYSTEM_TRUSTED_KEYRING diff --git a/init/init_task.c b/init/init_task.c -index ff6c4b9bfe6b..ce224088251c 100644 +index 136a8231355a..7cabef0ca921 100644 --- a/init/init_task.c +++ b/init/init_task.c -@@ -129,6 +129,7 @@ struct task_struct init_task +@@ -138,6 +138,7 @@ struct task_struct init_task __aligned(L1_CACHE_BYTES) = { .alloc_lock = __SPIN_LOCK_UNLOCKED(init_task.alloc_lock), .journal_info = NULL, INIT_CPU_TIMERS(init_task) @@ -148,17 +150,17 @@ index ff6c4b9bfe6b..ce224088251c 100644 .timer_slack_ns = 50000, /* 50 usec default slack */ .thread_pid = &init_struct_pid, diff --git a/kernel/Makefile b/kernel/Makefile -index ce105a5558fc..11fec2c76af0 100644 +index 87866b037fbe..a5d38470e0b3 100644 --- a/kernel/Makefile +++ b/kernel/Makefile -@@ -113,6 +113,7 @@ obj-$(CONFIG_KCSAN) += kcsan/ +@@ -115,6 +115,7 @@ obj-$(CONFIG_KCSAN) += kcsan/ obj-$(CONFIG_SHADOW_CALL_STACK) += scs.o obj-$(CONFIG_HAVE_STATIC_CALL) += static_call.o obj-$(CONFIG_HAVE_STATIC_CALL_INLINE) += static_call_inline.o +obj-$(CONFIG_SIGEXIT) += death_notify.o obj-$(CONFIG_CFI_CLANG) += cfi.o - obj-$(CONFIG_NUMA) += numa.o + obj-$(CONFIG_PERF_EVENTS) += events/ diff --git a/kernel/death_notify.c b/kernel/death_notify.c new file mode 100644 index 000000000000..5819d35a2564 @@ -446,49 +448,50 @@ index 000000000000..14a0995b79af +#endif + diff --git a/kernel/exit.c b/kernel/exit.c -index 21a59a6e1f2e..0b1bf34a1550 100644 +index 619f0014c33b..12eefc9f3e24 100644 --- a/kernel/exit.c +++ b/kernel/exit.c -@@ -73,6 +73,9 @@ - #include - #include +@@ -77,6 +77,9 @@ #include + + #include "exit.h" +#ifdef CONFIG_SIGEXIT +#include "death_notify.h" +#endif /* * The default value should be high enough to not crash a system that randomly -@@ -251,6 +254,9 @@ void release_task(struct task_struct *p) +@@ -253,6 +256,9 @@ void release_task(struct task_struct *p) cgroup_release(p); write_lock_irq(&tasklist_lock); +#ifdef CONFIG_SIGEXIT + release_notify_others(p); -+#endif ++#endif ptrace_release_task(p); thread_pid = get_pid(p->thread_pid); __exit_signal(p); diff --git a/kernel/fork.c b/kernel/fork.c -index 869467885640..9a79ab5b7d77 100644 +index 8434ff53ab23..00f2f7392078 100644 --- a/kernel/fork.c +++ b/kernel/fork.c -@@ -2466,6 +2466,10 @@ __latent_entropy struct task_struct *copy_process( +@@ -2358,7 +2358,10 @@ __latent_entropy struct task_struct *copy_process( RCU_INIT_POINTER(p->bpf_storage, NULL); p->bpf_ctx = NULL; #endif +- +#ifdef CONFIG_SIGEXIT + INIT_LIST_HEAD(&p->notify); + INIT_LIST_HEAD(&p->monitor); +#endif - /* Perform scheduler related setup. Assign this task to a CPU. */ retval = sched_fork(clone_flags, p); + if (retval) diff --git a/kernel/signal.c b/kernel/signal.c -index 09019017d669..883f7fa7f738 100644 +index 2ae45e6eb6bb..c181894345b9 100644 --- a/kernel/signal.c +++ b/kernel/signal.c -@@ -57,6 +57,9 @@ +@@ -58,6 +58,9 @@ #include #include #include /* for syscall_get_* */ @@ -498,22 +501,20 @@ index 09019017d669..883f7fa7f738 100644 /* * SLAB caches for signal bits. -@@ -2150,6 +2153,10 @@ bool do_notify_parent(struct task_struct *tsk, int sig) +@@ -2145,6 +2148,9 @@ bool do_notify_parent(struct task_struct *tsk, int sig) __wake_up_parent(tsk, tsk->parent); spin_unlock_irqrestore(&psig->siglock, flags); +#ifdef CONFIG_SIGEXIT + do_notify_others(tsk, &info); +#endif -+ return autoreap; } -@@ -2222,6 +2229,10 @@ static void do_notify_parent_cldstop(struct task_struct *tsk, +@@ -2217,6 +2223,9 @@ static void do_notify_parent_cldstop(struct task_struct *tsk, */ __wake_up_parent(tsk, parent); spin_unlock_irqrestore(&sighand->siglock, flags); -+ +#ifdef CONFIG_SIGEXIT + do_notify_others(tsk, &info); +#endif @@ -521,7 +522,7 @@ index 09019017d669..883f7fa7f738 100644 /* diff --git a/kernel/sys.c b/kernel/sys.c -index 44b575990333..4db207723ff9 100644 +index 4da31f28fda8..ad4f05c66e9f 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -76,6 +76,9 @@ @@ -534,7 +535,7 @@ index 44b575990333..4db207723ff9 100644 #ifndef SET_UNALIGN_CTL # define SET_UNALIGN_CTL(a, b) (-EINVAL) -@@ -2575,6 +2578,11 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, +@@ -2599,6 +2602,11 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, else error = PR_MCE_KILL_DEFAULT; break; @@ -547,5 +548,5 @@ index 44b575990333..4db207723ff9 100644 error = prctl_set_mm(arg2, arg3, arg4, arg5); break; -- -2.43.0 +2.47.1 diff --git a/kernel-rt/debian/patches/0003-affine-compute-kernel-threads.patch b/kernel-rt/debian/patches/0003-affine-compute-kernel-threads.patch index 82fe2c08..5f55958e 100644 --- a/kernel-rt/debian/patches/0003-affine-compute-kernel-threads.patch +++ b/kernel-rt/debian/patches/0003-affine-compute-kernel-threads.patch @@ -1,7 +1,7 @@ -From 004708f2e02a4ae97672d2c618effa7cdbbe38a6 Mon Sep 17 00:00:00 2001 +From 0213e30fa1f6d2a9015b4bf136d10f07a6b91d3b Mon Sep 17 00:00:00 2001 From: Chris Friesen Date: Tue, 24 Nov 2015 16:27:28 -0500 -Subject: [PATCH] affine compute kernel threads +Subject: [PATCH 03/16] affine compute kernel threads This is a kernel enhancement to configure the cpu affinity of kernel threads via kernel boot option kthread_cpus=. The compute @@ -32,6 +32,8 @@ Signed-off-by: Vefa Bicakci Signed-off-by: Jiping Ma [lz: Adapted the patch for upgrading kernel from 5.10 to 6.6] Signed-off-by: Li Zhou +[jm: Adapted the patch for upgrading kernel from 6.6 to 6.12] +Signed-off-by: Jiping Ma --- .../admin-guide/kernel-parameters.txt | 10 ++++++++ include/linux/cpumask.h | 3 +++ @@ -42,46 +44,47 @@ Signed-off-by: Li Zhou 6 files changed, 43 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index 59f7b400d..acc7025c1 100644 +index bf3aacb1ceb7..b6d995d47ea1 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -2473,6 +2473,16 @@ +@@ -2637,6 +2637,16 @@ See also Documentation/trace/kprobetrace.rst "Kernel Boot Parameter" section. -+ kthread_cpus= [KNL, SMP] Only run kernel threads on the specified -+ list of processors. The kernel will start threads -+ on the indicated processors only (unless there -+ are specific reasons to run a thread with -+ different affinities). This can be used to make -+ init start on certain processors and also to -+ control where kmod and other user space threads -+ are being spawned. Allows to keep kernel threads -+ away from certain cores unless absoluteluy necessary. ++ kthread_cpus= [KNL, SMP] Only run kernel threads on the specified ++ list of processors. The kernel will start threads ++ on the indicated processors only (unless there ++ are specific reasons to run a thread with ++ different affinities). This can be used to make ++ init start on certain processors and also to ++ control where kmod and other user space threads ++ are being spawned. Allows to keep kernel threads ++ away from certain cores unless absoluteluy necessary. + - kpti= [ARM64] Control page table isolation of user - and kernel address spaces. + kpti= [ARM64,EARLY] Control page table isolation of + user and kernel address spaces. Default: enabled on cores which need mitigation. diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h -index c2aa0aa26..2919c2aef 100644 +index 9278a50d514f..2b91ee73365b 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h -@@ -61,6 +61,7 @@ static inline void set_nr_cpu_ids(unsigned int nr) - * cpu_present_mask - has bit 'cpu' set iff cpu is populated +@@ -84,6 +84,7 @@ static __always_inline void set_nr_cpu_ids(unsigned int nr) + * cpu_enabled_mask - has bit 'cpu' set iff cpu can be brought online * cpu_online_mask - has bit 'cpu' set iff cpu available to scheduler * cpu_active_mask - has bit 'cpu' set iff cpu available to migration + * cpu_kthread_mask - has bit 'cpu' set iff general kernel threads allowed * * If !CONFIG_HOTPLUG_CPU, present == possible, and active == online. * -@@ -93,11 +94,13 @@ extern struct cpumask __cpu_possible_mask; - extern struct cpumask __cpu_online_mask; +@@ -117,12 +118,14 @@ extern struct cpumask __cpu_online_mask; + extern struct cpumask __cpu_enabled_mask; extern struct cpumask __cpu_present_mask; extern struct cpumask __cpu_active_mask; +extern struct cpumask __cpu_kthread_mask; extern struct cpumask __cpu_dying_mask; #define cpu_possible_mask ((const struct cpumask *)&__cpu_possible_mask) #define cpu_online_mask ((const struct cpumask *)&__cpu_online_mask) + #define cpu_enabled_mask ((const struct cpumask *)&__cpu_enabled_mask) #define cpu_present_mask ((const struct cpumask *)&__cpu_present_mask) #define cpu_active_mask ((const struct cpumask *)&__cpu_active_mask) +#define cpu_kthread_mask ((const struct cpumask *)&__cpu_kthread_mask) @@ -89,10 +92,10 @@ index c2aa0aa26..2919c2aef 100644 extern atomic_t __num_online_cpus; diff --git a/init/main.c b/init/main.c -index bd4ce7345..c40b2c441 100644 +index a7aaae73743e..569c18d1622c 100644 --- a/init/main.c +++ b/init/main.c -@@ -1633,6 +1633,8 @@ static noinline void __init kernel_init_freeable(void) +@@ -1593,6 +1593,8 @@ static noinline void __init kernel_init_freeable(void) do_basic_setup(); @@ -102,10 +105,10 @@ index bd4ce7345..c40b2c441 100644 wait_for_initramfs(); diff --git a/kernel/cpu.c b/kernel/cpu.c -index 98a7a7b14..d051b4097 100644 +index 9ee6c9145b1d..7ab2274c0b8b 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c -@@ -2651,6 +2651,29 @@ EXPORT_SYMBOL(__cpu_dying_mask); +@@ -3121,6 +3121,29 @@ EXPORT_SYMBOL(__cpu_dying_mask); atomic_t __num_online_cpus __read_mostly; EXPORT_SYMBOL(__num_online_cpus); @@ -136,10 +139,10 @@ index 98a7a7b14..d051b4097 100644 { cpumask_copy(&__cpu_present_mask, src); diff --git a/kernel/kthread.c b/kernel/kthread.c -index f97fd01a2..2bd5d136e 100644 +index 9bb36897b6c6..77d2b3f577f4 100644 --- a/kernel/kthread.c +++ b/kernel/kthread.c -@@ -355,7 +355,7 @@ static int kthread(void *_create) +@@ -368,7 +368,7 @@ static int kthread(void *_create) * back to default in case they have been changed. */ sched_setscheduler_nocheck(current, SCHED_NORMAL, ¶m); @@ -148,7 +151,7 @@ index f97fd01a2..2bd5d136e 100644 /* OK, tell user we're spawned, wait for stop or wakeup */ __set_current_state(TASK_UNINTERRUPTIBLE); -@@ -722,7 +722,7 @@ int kthreadd(void *unused) +@@ -743,7 +743,7 @@ int kthreadd(void *unused) /* Setup a clean context for our children to inherit. */ set_task_comm(tsk, "kthreadd"); ignore_signals(tsk); @@ -158,10 +161,10 @@ index f97fd01a2..2bd5d136e 100644 current->flags |= PF_NOFREEZE; diff --git a/kernel/umh.c b/kernel/umh.c -index fbf872c62..43e3f4567 100644 +index ff1f13a27d29..0dec76b539a7 100644 --- a/kernel/umh.c +++ b/kernel/umh.c -@@ -82,6 +82,9 @@ static int call_usermodehelper_exec_async(void *data) +@@ -79,6 +79,9 @@ static int call_usermodehelper_exec_async(void *data) */ current->fs->umask = 0022; @@ -172,5 +175,5 @@ index fbf872c62..43e3f4567 100644 * Our parent (unbound workqueue) runs with elevated scheduling * priority. Avoid propagating that into the userspace child. -- -2.17.1 +2.47.1 diff --git a/kernel-rt/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch b/kernel-rt/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch index 186a94ad..2c1f9be5 100644 --- a/kernel-rt/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch +++ b/kernel-rt/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch @@ -1,7 +1,7 @@ -From 130eb445c6abc1dec0cb9d24b2b7e4cba13f7037 Mon Sep 17 00:00:00 2001 +From b40833737594a50e69a505f0da82168c5d998ca6 Mon Sep 17 00:00:00 2001 From: Chris Friesen Date: Thu, 12 May 2016 18:00:00 -0400 -Subject: [PATCH] Make kernel start eth devices at offset +Subject: [PATCH 05/16] Make kernel start eth devices at offset In order to avoid naming collisions, we want to make the kernel start naming its "ethX" devices at eth1000 instead of eth0. This @@ -12,27 +12,29 @@ Signed-off-by: Zhang Zhiguo Signed-off-by: Jiping Ma [lz: Adapted the patch for context changes.] Signed-off-by: Li Zhou +[jm: Adapted the patch for context changes.] +Signed-off-by: Jiping Ma --- net/core/dev.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/net/core/dev.c b/net/core/dev.c -index 9bf90b2a7..9526361a0 100644 +index c761f862bc5a..d91ad9228b19 100644 --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -1119,6 +1119,12 @@ static int __dev_alloc_name(struct net *net, const char *name, char *buf) - __set_bit(i, inuse); - } - -+ /* STX extension, want kernel to start at eth1000 */ -+ if (strcmp(name, "eth%d") == 0) { -+ for (i=0; i < 1000; i++) -+ set_bit(i, inuse); -+ } -+ - i = find_first_zero_bit(inuse, max_netdevices); - bitmap_free(inuse); +@@ -1203,6 +1203,12 @@ static int __dev_alloc_name(struct net *net, const char *name, char *res) + __set_bit(i, inuse); } + ++ /* STX extension, want kernel to start at eth1000 */ ++ if (strcmp(name, "eth%d") == 0) { ++ for (i=0; i < 1000; i++) ++ set_bit(i, inuse); ++ } ++ + i = find_first_zero_bit(inuse, max_netdevices); + bitmap_free(inuse); + if (i == max_netdevices) -- -2.17.1 +2.47.1 diff --git a/kernel-rt/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch b/kernel-rt/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch index 04f55171..0f3c416e 100644 --- a/kernel-rt/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch +++ b/kernel-rt/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch @@ -1,8 +1,8 @@ -From f311c0cd55b9fb90696350d8545cf46381ccc805 Mon Sep 17 00:00:00 2001 +From 43085ada69718fca39228c84919732d445fa1235 Mon Sep 17 00:00:00 2001 From: Matt Peters Date: Mon, 30 May 2016 10:51:02 -0400 -Subject: [PATCH] intel-iommu: allow ignoring Ethernet device RMRR with IOMMU - passthrough +Subject: [PATCH 06/16] intel-iommu: allow ignoring Ethernet device RMRR with + IOMMU passthrough Some BIOS's are reporting DMAR RMRR entries for Ethernet devices which is causing problems when PCI passthrough is enabled. These @@ -23,6 +23,8 @@ Signed-off-by: Li Zhou Signed-off-by: Jiping Ma [lz: Adapted the patch for upgrading kernel from 5.10 to 6.6.] Signed-off-by: Li Zhou +[jm: Adapted the patch for upgrading kernel from 6.6 to 6.12.] +Signed-off-by: Jiping Ma --- .../admin-guide/kernel-parameters.txt | 5 +++++ Documentation/arch/x86/iommu.rst | 18 +++++++++++++++ @@ -30,23 +32,23 @@ Signed-off-by: Li Zhou 3 files changed, 44 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index 44b3c3f8c..d7c13e702 100644 +index b6d995d47ea1..c182de48eabb 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -2115,6 +2115,11 @@ +@@ -2218,6 +2218,11 @@ bypassed by not enabling DMAR with this option. In this case, gfx device will use physical address for DMA. + eth_no_rmrr [Default Off] -+ With this option provided, the kernel will ignore -+ any specified RMRR regions specified by the BIOS -+ for PCI ethernet devices. Confirm with your hardware -+ vendor the RMRR regions are indeed invalid first. ++ With this option provided, the kernel will ignore ++ any specified RMRR regions specified by the BIOS ++ for PCI ethernet devices. Confirm with your hardware ++ vendor the RMRR regions are indeed invalid first. strict [Default Off] Deprecated, equivalent to iommu.strict=1. sp_off [Default Off] diff --git a/Documentation/arch/x86/iommu.rst b/Documentation/arch/x86/iommu.rst -index 42c7a6faa..edcbff38c 100644 +index 41fbadfe2221..5a02c241774d 100644 --- a/Documentation/arch/x86/iommu.rst +++ b/Documentation/arch/x86/iommu.rst @@ -35,6 +35,24 @@ regions will fail. Hence BIOS uses RMRR to specify these regions along with @@ -75,18 +77,18 @@ index 42c7a6faa..edcbff38c 100644 ^^^^^^^^^^^^^^^^^ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c -index 4c3707384..6b185695a 100644 +index 9c46a4cd3848..ea0ffcf82d7e 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c -@@ -293,6 +293,7 @@ EXPORT_SYMBOL_GPL(intel_iommu_enabled); +@@ -209,6 +209,7 @@ int intel_iommu_enabled = 0; + EXPORT_SYMBOL_GPL(intel_iommu_enabled); - static int dmar_map_gfx = 1; static int intel_iommu_superpage = 1; +static int intel_iommu_ethrmrr = 1; static int iommu_identity_mapping; static int iommu_skip_te_disable; - -@@ -339,6 +340,15 @@ static int __init intel_iommu_setup(char *str) + static int disable_igfx_iommu; +@@ -256,6 +257,15 @@ static int __init intel_iommu_setup(char *str) } else if (!strncmp(str, "forcedac", 8)) { pr_warn("intel_iommu=forcedac deprecated; use iommu.forcedac instead\n"); iommu_dma_forcedac = true; @@ -102,7 +104,7 @@ index 4c3707384..6b185695a 100644 } else if (!strncmp(str, "strict", 6)) { pr_warn("intel_iommu=strict deprecated; use iommu.strict=1 instead\n"); iommu_set_dma_strict(); -@@ -2518,8 +2528,18 @@ static bool device_rmrr_is_relaxable(struct device *dev) +@@ -2025,8 +2035,18 @@ static bool device_rmrr_is_relaxable(struct device *dev) pdev = to_pci_dev(dev); if (IS_USB_DEVICE(pdev) || IS_GFX_DEVICE(pdev)) return true; @@ -121,7 +123,7 @@ index 4c3707384..6b185695a 100644 + } } - /* + static int device_def_domain_type(struct device *dev) -- -2.17.1 +2.47.1 diff --git a/kernel-rt/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch b/kernel-rt/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch index b38c2999..eed361ca 100644 --- a/kernel-rt/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch +++ b/kernel-rt/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch @@ -1,7 +1,7 @@ -From c335a673dea2fd4c0452d88975cc2045d0934d14 Mon Sep 17 00:00:00 2001 +From b51ab594903af7cc209b4d8ca905db403a99772c Mon Sep 17 00:00:00 2001 From: "M. Vefa Bicakci" Date: Thu, 9 Sep 2021 04:56:46 -0400 -Subject: [PATCH] workqueue: Affine rescuer threads and unbound wqs +Subject: [PATCH 10/16] workqueue: Affine rescuer threads and unbound wqs This commit ensures that workqueue rescuer threads are affined to the platform CPUs specified by the "kthread_cpus" kernel argument. Prior to @@ -27,24 +27,29 @@ Signed-off-by: Jiping Ma [lz: Adapted the patch for upgrading kernel from 5.10 to 6.6 according to M. Vefa Bicakci's suggestion.] Signed-off-by: Li Zhou +[jm: Adapted the patch for upgrading kernel from 6.6 to 6.12.] +Signed-off-by: Jiping Ma --- - kernel/workqueue.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) + kernel/workqueue.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/kernel/workqueue.c b/kernel/workqueue.c -index e6a95bb74..a15ad43c8 100644 +index 3f0f7cf15ed2..d39a4db6bb65 100644 --- a/kernel/workqueue.c +++ b/kernel/workqueue.c -@@ -4659,7 +4659,7 @@ static int init_rescuer(struct workqueue_struct *wq) +@@ -5559,10 +5559,7 @@ static int init_rescuer(struct workqueue_struct *wq) } wq->rescuer = rescuer; -- kthread_bind_mask(rescuer->task, cpu_possible_mask); +- if (wq->flags & WQ_UNBOUND) +- kthread_bind_mask(rescuer->task, unbound_effective_cpumask(wq)); +- else +- kthread_bind_mask(rescuer->task, cpu_possible_mask); + kthread_bind_mask(rescuer->task, cpu_kthread_mask); wake_up_process(rescuer->task); return 0; -@@ -6545,6 +6545,7 @@ void __init workqueue_init_early(void) +@@ -7727,6 +7724,7 @@ void __init workqueue_init_early(void) cpumask_copy(wq_unbound_cpumask, cpu_possible_mask); restrict_unbound_cpumask("HK_TYPE_WQ", housekeeping_cpumask(HK_TYPE_WQ)); restrict_unbound_cpumask("HK_TYPE_DOMAIN", housekeeping_cpumask(HK_TYPE_DOMAIN)); @@ -53,5 +58,5 @@ index e6a95bb74..a15ad43c8 100644 restrict_unbound_cpumask("workqueue.unbound_cpus", &wq_cmdline_cpumask); -- -2.17.1 +2.47.1 diff --git a/kernel-rt/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch b/kernel-rt/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch index 96ae3b96..25a4ebe1 100644 --- a/kernel-rt/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch +++ b/kernel-rt/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch @@ -1,7 +1,8 @@ -From ed051d788e0f7d177bec80d7b594e7b889b975bd Mon Sep 17 00:00:00 2001 +From ac36a126f58faacde2237fc06dc38600f9d3789c Mon Sep 17 00:00:00 2001 From: "M. Vefa Bicakci" Date: Wed, 4 Jan 2023 20:36:53 -0500 -Subject: [PATCH] Revert "sched/idle: Move quiet_vmstate() into the NOHZ code" +Subject: [PATCH 13/16] Revert "sched/idle: Move quiet_vmstate() into the NOHZ + code" This reverts commit 62cb1188ed86a9cf082fd2f757d4dd9b54741f24. @@ -78,16 +79,18 @@ Jim Somerville during the debugging and investigation of this issue. Signed-off-by: M. Vefa Bicakci +[Adjust the patch to adapt to the kernel 6.12.x.] +Signed-off-by: Jiping Ma --- kernel/sched/idle.c | 1 + kernel/time/tick-sched.c | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c -index f26ab2675..9298330c5 100644 +index 53bb9193c537..e7c4d47f9537 100644 --- a/kernel/sched/idle.c +++ b/kernel/sched/idle.c -@@ -274,6 +274,7 @@ static void do_idle(void) +@@ -268,6 +268,7 @@ static void do_idle(void) */ __current_set_polling(); @@ -96,10 +99,10 @@ index f26ab2675..9298330c5 100644 while (!need_resched()) { diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c -index 1ad89eec2..468e756f1 100644 +index e0c47259e91a..31bbff551ed9 100644 --- a/kernel/time/tick-sched.c +++ b/kernel/time/tick-sched.c -@@ -25,7 +25,6 @@ +@@ -26,7 +26,6 @@ #include #include #include @@ -107,14 +110,14 @@ index 1ad89eec2..468e756f1 100644 #include -@@ -932,7 +931,6 @@ static void tick_nohz_stop_tick(struct tick_sched *ts, int cpu) +@@ -1047,7 +1046,6 @@ static void tick_nohz_stop_tick(struct tick_sched *ts, int cpu) */ - if (!ts->tick_stopped) { + if (!tick_sched_flag_test(ts, TS_FLAG_STOPPED)) { calc_load_nohz_start(); - quiet_vmstat(); ts->last_tick = hrtimer_get_expires(&ts->sched_timer); - ts->tick_stopped = 1; + tick_sched_flag_set(ts, TS_FLAG_STOPPED); -- -2.17.1 +2.47.1 diff --git a/kernel-rt/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch b/kernel-rt/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch index 709accbb..56d7b473 100644 --- a/kernel-rt/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch +++ b/kernel-rt/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch @@ -1,7 +1,7 @@ -From d3a94bc5b2139aeb6f6d1f05c2bd47a8f9ad2650 Mon Sep 17 00:00:00 2001 +From fc7e2942cbc9864da546678d65f201244b6685dc Mon Sep 17 00:00:00 2001 From: Jim Somerville Date: Fri, 14 Apr 2023 15:29:22 -0400 -Subject: [PATCH] Port negative dentries limit feature from 3.10 +Subject: [PATCH 14/16] Port negative dentries limit feature from 3.10 This ports the Redhat feature forward from the 3.10 kernel version. @@ -34,12 +34,14 @@ Replace "&zero_ul" with "SYSCTL_LONG_ZERO" according to: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/ commit/?id=b1f2aff888af54a057c2c3c0d88a13ef5d37b52a.] Signed-off-by: Li Zhou +[jm: Adapted the patch for 6.12.x.] +Signed-off-by: Jiping Ma --- fs/dcache.c | 185 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 183 insertions(+), 2 deletions(-) diff --git a/fs/dcache.c b/fs/dcache.c -index 576ad162c..0fff744af 100644 +index 3a01c42c6639..bef98597df07 100644 --- a/fs/dcache.c +++ b/fs/dcache.c @@ -32,6 +32,7 @@ @@ -50,7 +52,7 @@ index 576ad162c..0fff744af 100644 #include "internal.h" #include "mount.h" -@@ -124,6 +125,65 @@ struct dentry_stat_t { +@@ -132,6 +133,65 @@ struct dentry_stat_t { long dummy; /* Reserved for future use */ }; @@ -80,7 +82,7 @@ index 576ad162c..0fff744af 100644 +/* + * Sysctl proc handler for dcache_negativ3_dentry_limit_sysctl. + */ -+int proc_dcache_negative_dentry_limit(struct ctl_table *ctl, int write, ++static int proc_dcache_negative_dentry_limit(const struct ctl_table *ctl, int write, + void __user *buffer, size_t *lenp, + loff_t *ppos) +{ @@ -116,7 +118,7 @@ index 576ad162c..0fff744af 100644 static DEFINE_PER_CPU(long, nr_dentry); static DEFINE_PER_CPU(long, nr_dentry_unused); static DEFINE_PER_CPU(long, nr_dentry_negative); -@@ -191,6 +251,15 @@ static struct ctl_table fs_dcache_sysctls[] = { +@@ -199,6 +259,15 @@ static struct ctl_table fs_dcache_sysctls[] = { .mode = 0444, .proc_handler = proc_nr_dentry, }, @@ -129,10 +131,10 @@ index 576ad162c..0fff744af 100644 + .extra1 = SYSCTL_LONG_ZERO, + .extra2 = SYSCTL_ONE_HUNDRED, + }, - { } }; -@@ -1202,8 +1271,9 @@ void shrink_dentry_list(struct list_head *list) + static int __init init_fs_dcache_sysctls(void) +@@ -1088,8 +1157,9 @@ void shrink_dentry_list(struct list_head *list) } } @@ -144,7 +146,7 @@ index 576ad162c..0fff744af 100644 { struct list_head *freeable = arg; struct dentry *dentry = container_of(item, struct dentry, d_lru); -@@ -1254,12 +1324,29 @@ static enum lru_status dentry_lru_isolate(struct list_head *item, +@@ -1140,12 +1210,29 @@ static enum lru_status dentry_lru_isolate(struct list_head *item, return LRU_ROTATE; } @@ -174,7 +176,7 @@ index 576ad162c..0fff744af 100644 /** * prune_dcache_sb - shrink the dcache * @sb: superblock -@@ -1283,6 +1370,20 @@ long prune_dcache_sb(struct super_block *sb, struct shrink_control *sc) +@@ -1169,6 +1256,20 @@ long prune_dcache_sb(struct super_block *sb, struct shrink_control *sc) return freed; } @@ -195,7 +197,7 @@ index 576ad162c..0fff744af 100644 static enum lru_status dentry_lru_isolate_shrink(struct list_head *item, struct list_lru_one *lru, spinlock_t *lru_lock, void *arg) { -@@ -1677,6 +1778,86 @@ static enum d_walk_ret umount_check(void *_data, struct dentry *dentry) +@@ -1549,6 +1650,86 @@ static enum d_walk_ret umount_check(void *_data, struct dentry *dentry) return D_WALK_CONTINUE; } @@ -283,5 +285,5 @@ index 576ad162c..0fff744af 100644 { shrink_dcache_parent(dentry); -- -2.17.1 +2.47.1 diff --git a/kernel-rt/debian/patches/0016-Add-driver-versions-for-ice-i40e-and-iavf.patch b/kernel-rt/debian/patches/0016-Add-driver-versions-for-ice-i40e-and-iavf.patch deleted file mode 100644 index 5b9e21f0..00000000 --- a/kernel-rt/debian/patches/0016-Add-driver-versions-for-ice-i40e-and-iavf.patch +++ /dev/null @@ -1,282 +0,0 @@ -From b866d25ee24d62641b9e16a509d08ed4a4e0e1c7 Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Sun, 31 Mar 2024 20:13:57 -0700 -Subject: [PATCH] Add driver versions for ice, i40e and iavf - -As we need driver version to track driver information, add -the necessary driver version for the Intel drivers. - -Signed-off-by: Jiping Ma ---- - Makefile | 8 +++++++- - drivers/net/ethernet/intel/i40e/i40e.h | 1 + - drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 2 ++ - drivers/net/ethernet/intel/i40e/i40e_main.c | 16 ++++++++++------ - drivers/net/ethernet/intel/iavf/iavf.h | 1 + - drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 1 + - drivers/net/ethernet/intel/iavf/iavf_main.c | 8 ++++++-- - drivers/net/ethernet/intel/ice/ice.h | 1 + - drivers/net/ethernet/intel/ice/ice_ethtool.c | 1 + - drivers/net/ethernet/intel/ice/ice_main.c | 15 +++++++++------ - 10 files changed, 39 insertions(+), 15 deletions(-) - -diff --git a/Makefile b/Makefile -index 8ed7620308d1..2235636756b9 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,6 +1227,9 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds -+ICE_STX = "-stx.0" -+I40E_STX = "-stx.0" -+IAVF_STX = "-stx.0" - - uts_len := 64 - define filechk_utsrelease.h -@@ -1249,7 +1252,10 @@ define filechk_version.h - ((c) > 255 ? 255 : (c)))'; \ - echo \#define LINUX_VERSION_MAJOR $(VERSION); \ - echo \#define LINUX_VERSION_PATCHLEVEL $(PATCHLEVEL); \ -- echo \#define LINUX_VERSION_SUBLEVEL $(SUBLEVEL) -+ echo \#define LINUX_VERSION_SUBLEVEL $(SUBLEVEL); \ -+ echo \#define LINUX_ICE_DRIVER_VERSION \"$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(ICE_STX)\"; \ -+ echo \#define LINUX_I40E_DRIVER_VERSION \"$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(I40E_STX)\"; \ -+ echo \#define LINUX_IAVF_DRIVER_VERSION \"$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(IAVF_STX)\" - endef - - ifneq ($(DISTRIBUTION_OFFICIAL_BUILD),) -diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h -index 3e6839ac1f0f..a72be4e1b318 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e.h -+++ b/drivers/net/ethernet/intel/i40e/i40e.h -@@ -1102,6 +1102,7 @@ static inline u32 i40e_get_pf_count(struct i40e_hw *hw) - int i40e_up(struct i40e_vsi *vsi); - void i40e_down(struct i40e_vsi *vsi); - extern const char i40e_driver_name[]; -+extern const char i40e_driver_version_str[]; - void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags); - void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired); - int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); -diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -index 4e90570ba780..d6a019b27add 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -@@ -2005,6 +2005,8 @@ static void i40e_get_drvinfo(struct net_device *netdev, - struct i40e_pf *pf = vsi->back; - - strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); -+ strlcpy(drvinfo->version, i40e_driver_version_str, -+ sizeof(drvinfo->version)); - strscpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), - sizeof(drvinfo->fw_version)); - strscpy(drvinfo->bus_info, pci_name(pf->pdev), -diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c -index f8d1a994c2f6..b8043e8cb9e2 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_main.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c -@@ -1,13 +1,13 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2013 - 2021 Intel Corporation. */ - --#include - #include - #include - #include - #include - #include - #include -+#include - - /* Local includes */ - #include "i40e.h" -@@ -28,6 +28,8 @@ const char i40e_driver_name[] = "i40e"; - static const char i40e_driver_string[] = - "Intel(R) Ethernet Connection XL710 Network Driver"; - -+#define DRV_VERSION LINUX_I40E_DRIVER_VERSION -+const char i40e_driver_version_str[] = DRV_VERSION; - static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation."; - - /* a bit of forward declarations */ -@@ -101,6 +103,7 @@ MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX - MODULE_AUTHOR("Intel Corporation, "); - MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); - MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); - - static struct workqueue_struct *i40e_wq; - -@@ -10783,11 +10786,11 @@ static void i40e_send_version(struct i40e_pf *pf) - { - struct i40e_driver_version dv; - -- dv.major_version = 0xff; -- dv.minor_version = 0xff; -- dv.build_version = 0xff; -+ dv.major_version = LINUX_VERSION_MAJOR; -+ dv.minor_version = LINUX_VERSION_PATCHLEVEL; -+ dv.build_version = LINUX_VERSION_SUBLEVEL; - dv.subbuild_version = 0; -- strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string)); -+ strscpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); - i40e_aq_send_driver_version(&pf->hw, &dv, NULL); - } - -@@ -16768,7 +16771,8 @@ static int __init i40e_init_module(void) - { - int err; - -- pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string); -+ pr_info("%s: %s - version %s\n", i40e_driver_name, -+ i40e_driver_string, i40e_driver_version_str); - pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); - - /* There is no need to throttle the number of active tasks because -diff --git a/drivers/net/ethernet/intel/iavf/iavf.h b/drivers/net/ethernet/intel/iavf/iavf.h -index 431d9d62c8c6..fec2e5bb77df 100644 ---- a/drivers/net/ethernet/intel/iavf/iavf.h -+++ b/drivers/net/ethernet/intel/iavf/iavf.h -@@ -468,6 +468,7 @@ struct iavf_device { - - /* needed by iavf_ethtool.c */ - extern char iavf_driver_name[]; -+extern const char iavf_driver_version[]; - - static inline const char *iavf_state_str(enum iavf_state_t state) - { -diff --git a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c -index 1ac97bd606e3..204f8305f728 100644 ---- a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c -+++ b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c -@@ -586,6 +586,7 @@ static void iavf_get_drvinfo(struct net_device *netdev, - struct iavf_adapter *adapter = netdev_priv(netdev); - - strscpy(drvinfo->driver, iavf_driver_name, 32); -+ strlcpy(drvinfo->version, iavf_driver_version, 32); - strscpy(drvinfo->fw_version, "N/A", 4); - strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); - drvinfo->n_priv_flags = IAVF_PRIV_FLAGS_STR_LEN; -diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethernet/intel/iavf/iavf_main.c -index ce0b91999526..10a96793c123 100644 ---- a/drivers/net/ethernet/intel/iavf/iavf_main.c -+++ b/drivers/net/ethernet/intel/iavf/iavf_main.c -@@ -1,6 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2013 - 2018 Intel Corporation. */ - -+#include - #include "iavf.h" - #include "iavf_prototype.h" - #include "iavf_client.h" -@@ -21,6 +22,8 @@ char iavf_driver_name[] = "iavf"; - static const char iavf_driver_string[] = - "Intel(R) Ethernet Adaptive Virtual Function Network Driver"; - -+#define DRV_VERSION LINUX_IAVF_DRIVER_VERSION -+const char iavf_driver_version[] = DRV_VERSION; - static const char iavf_copyright[] = - "Copyright (c) 2013 - 2018 Intel Corporation."; - -@@ -47,6 +50,7 @@ MODULE_ALIAS("i40evf"); - MODULE_AUTHOR("Intel Corporation, "); - MODULE_DESCRIPTION("Intel(R) Ethernet Adaptive Virtual Function Network Driver"); - MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); - - static const struct net_device_ops iavf_netdev_ops; - -@@ -5326,8 +5330,8 @@ static struct pci_driver iavf_driver = { - **/ - static int __init iavf_init_module(void) - { -- pr_info("iavf: %s\n", iavf_driver_string); -- -+ pr_info("iavf: %s - version %s\n", iavf_driver_string, -+ iavf_driver_version); - pr_info("%s\n", iavf_copyright); - - return pci_register_driver(&iavf_driver); -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index c7962f322db2..2695794a5df7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -77,6 +77,7 @@ - #include "ice_gnss.h" - #include "ice_irq.h" - -+extern const char ice_drv_ver[]; - #define ICE_BAR0 0 - #define ICE_REQ_DESC_MULTIPLE 32 - #define ICE_MIN_NUM_DESC 64 -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 39b5f24be7e4..456cf4785c74 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -358,6 +358,7 @@ __ice_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo, - orom = &hw->flash.orom; - - strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver)); -+ strscpy(drvinfo->version, ice_drv_ver, sizeof(drvinfo->version)); - - /* Display NVM version (from which the firmware version can be - * determined) which contains more pertinent information. -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 600a2f537087..149984fb8ab0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -5,7 +5,7 @@ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - --#include -+#include - #include - #include "ice.h" - #include "ice_base.h" -@@ -25,7 +25,9 @@ - #include "ice_vsi_vlan_ops.h" - #include - -+#define DRV_VERSION LINUX_ICE_DRIVER_VERSION - #define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver" -+const char ice_drv_ver[] = DRV_VERSION; - static const char ice_driver_string[] = DRV_SUMMARY; - static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation."; - -@@ -36,6 +38,7 @@ static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation."; - MODULE_AUTHOR("Intel Corporation, "); - MODULE_DESCRIPTION(DRV_SUMMARY); - MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); - MODULE_FIRMWARE(ICE_DDP_PKG_FILE); - - static int debug = -1; -@@ -4198,11 +4201,11 @@ static int ice_send_version(struct ice_pf *pf) - { - struct ice_driver_ver dv; - -- dv.major_ver = 0xff; -- dv.minor_ver = 0xff; -- dv.build_ver = 0xff; -+ dv.major_ver = LINUX_VERSION_MAJOR; -+ dv.minor_ver = LINUX_VERSION_PATCHLEVEL; -+ dv.build_ver = LINUX_VERSION_SUBLEVEL; - dv.subbuild_ver = 0; -- strscpy((char *)dv.driver_string, UTS_RELEASE, -+ strscpy((char *)dv.driver_string, DRV_VERSION, - sizeof(dv.driver_string)); - return ice_aq_send_driver_ver(&pf->hw, &dv, NULL); - } -@@ -5657,7 +5660,7 @@ static int __init ice_module_init(void) - { - int status = -ENOMEM; - -- pr_info("%s\n", ice_driver_string); -+ pr_info("%s - version %s\n", ice_driver_string, ice_drv_ver); - pr_info("%s\n", ice_copyright); - - ice_wq = alloc_workqueue("%s", 0, 0, KBUILD_MODNAME); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/0016-tools-Fix-the-build-errors.patch b/kernel-rt/debian/patches/0016-tools-Fix-the-build-errors.patch new file mode 100644 index 00000000..0689e09e --- /dev/null +++ b/kernel-rt/debian/patches/0016-tools-Fix-the-build-errors.patch @@ -0,0 +1,78 @@ +From ca2a6b12ce2421e4e70705059b143e2f43c65efe Mon Sep 17 00:00:00 2001 +From: Jiping Ma +Date: Tue, 18 Mar 2025 07:24:15 +0000 +Subject: [PATCH 16/16] tools: Fix the build errors + +Add "{ }" in the code block of case to fix the following build error. + +tools/power/x86/turbostat/turbostat.c:2811:4: error: a label can +only be part of a statement and a declaration is not a statement + 2811 | const unsigned long value_raw = t->pmt_counter[i]; + | ^~~~~ + +Signed-off-by: Jiping Ma +--- + tools/power/x86/turbostat/turbostat.c | 30 ++++++++++++++++----------- + 1 file changed, 18 insertions(+), 12 deletions(-) + +diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c +index 235e82fe7d0a..9a3d38259042 100644 +--- a/tools/power/x86/turbostat/turbostat.c ++++ b/tools/power/x86/turbostat/turbostat.c +@@ -2808,11 +2808,13 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data + break; + + case PMT_TYPE_XTAL_TIME: +- const unsigned long value_raw = t->pmt_counter[i]; +- const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; ++ { ++ const unsigned long value_raw = t->pmt_counter[i]; ++ const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; + +- outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); +- break; ++ outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); ++ break; ++ } + } + } + +@@ -2889,11 +2891,13 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data + break; + + case PMT_TYPE_XTAL_TIME: +- const unsigned long value_raw = c->pmt_counter[i]; +- const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; ++ { ++ const unsigned long value_raw = c->pmt_counter[i]; ++ const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; + +- outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); +- break; ++ outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); ++ break; ++ } + } + } + +@@ -3088,11 +3092,13 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data + break; + + case PMT_TYPE_XTAL_TIME: +- const unsigned long value_raw = p->pmt_counter[i]; +- const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; ++ { ++ const unsigned long value_raw = p->pmt_counter[i]; ++ const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; + +- outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); +- break; ++ outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); ++ break; ++ } + } + } + +-- +2.47.1 + diff --git a/kernel-rt/debian/patches/0017-ice-Use-irq_update_affinity_hint.patch b/kernel-rt/debian/patches/0017-ice-Use-irq_update_affinity_hint.patch deleted file mode 100644 index 46e3eb98..00000000 --- a/kernel-rt/debian/patches/0017-ice-Use-irq_update_affinity_hint.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 6cdb8d6b6ca8d1cdc7e7f6dbc2469fb81fc4062e Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Fri, 10 May 2024 20:24:31 -0700 -Subject: [PATCH] ice: Use irq_update_affinity_hint - -This commit makes the ice device driver use the irq_update_affinity_hint -function instead of the irq_set_affinity_hint function. This is done -because the latter function sets the IRQ CPU affinities, whereas the -former does not, and this allows the use of the default IRQ affinity CPU -mask provided via the irqaffinity= kernel command line option. - -Please note that this patch was not cherry-picked from an upstream -commit. The changes have been inspired by the i40e and iavf device -driver patches in the following patch series: - https://lore.kernel.org/netdev/20210903152430.244937-1-nitesh@redhat.com/t/#u - -The aforementioned patches have been mainlined as of this writing with -the following merge commit by Linus Torvalds: - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=147cc5838c0f5c76e908b816e924ca378e0d4735 - -And the i40e and iavf patches are accessible at: - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d34c54d1739c2cdf2e4437b74e6da269147f4987 - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0f9744f4ed539f2e847d7ed41993b243e3ba5cff - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/Makefile b/Makefile -index 2235636756b9..b545b2a4e667 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.0" -+ICE_STX = "-stx.1" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 149984fb8ab0..c5ef2f422c34 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -2574,7 +2574,7 @@ static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename) - irq_num = vsi->q_vectors[vector]->irq.virq; - if (!IS_ENABLED(CONFIG_RFS_ACCEL)) - irq_set_affinity_notifier(irq_num, NULL); -- irq_set_affinity_hint(irq_num, NULL); -+ irq_update_affinity_hint(irq_num, NULL); - devm_free_irq(dev, irq_num, &vsi->q_vectors[vector]); - } - return err; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/0018-sched-debug-Fix-the-runnable-tasks-output.patch b/kernel-rt/debian/patches/0018-sched-debug-Fix-the-runnable-tasks-output.patch deleted file mode 100644 index d57a44cb..00000000 --- a/kernel-rt/debian/patches/0018-sched-debug-Fix-the-runnable-tasks-output.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 3fda533e3df1a170a69c0634f7d182501d92a430 Mon Sep 17 00:00:00 2001 -From: Peng Zhang -Date: Tue, 1 Apr 2025 15:39:34 +0800 -Subject: [PATCH] sched/debug: Fix the runnable tasks output - -The current runnable tasks output looks like: - - runnable tasks: - S task PID tree-key switches prio wait-time sum-exec sum-sleep - ------------------------------------------------------------------------------------------------------------- - Ikworker/R-rcu_g 4 0.129049 E 0.620179 0.750000 0.002920 2 100 0.000000 0.002920 0.000000 0.000000 0 0 / - Ikworker/R-sync_ 5 0.125328 E 0.624147 0.750000 0.001840 2 100 0.000000 0.001840 0.000000 0.000000 0 0 / - Ikworker/R-slub_ 6 0.120835 E 0.628680 0.750000 0.001800 2 100 0.000000 0.001800 0.000000 0.000000 0 0 / - Ikworker/R-netns 7 0.114294 E 0.634701 0.750000 0.002400 2 100 0.000000 0.002400 0.000000 0.000000 0 0 / - I kworker/0:1 9 508.781746 E 511.754666 3.000000 151.575240 224 120 0.000000 151.575240 0.000000 0.000000 0 0 / - -Which is messy. Remove the duplicate printing of sum_exec_runtime and -tidy up the layout to make it look like: - - runnable tasks: - S task PID vruntime eligible deadline slice sum-exec switches prio wait-time sum-sleep sum-block node group-id group-path - ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- - I kworker/0:3 1698 295.001459 E 297.977619 3.000000 38.862920 9 120 0.000000 0.000000 0.000000 0 0 / - I kworker/0:4 1702 278.026303 E 281.026303 3.000000 9.918760 3 120 0.000000 0.000000 0.000000 0 0 / - S NetworkManager 2646 0.377936 E 2.598104 3.000000 98.535880 314 120 0.000000 0.000000 0.000000 0 0 /system.slice/NetworkManager.service - S virtqemud 2689 0.541016 E 2.440104 3.000000 50.967960 80 120 0.000000 0.000000 0.000000 0 0 /system.slice/virtqemud.service - S gsd-smartcard 3058 73.604144 E 76.475904 3.000000 74.033320 88 120 0.000000 0.000000 0.000000 0 0 /user.slice/user-42.slice/session-c1.scope - -Reviewed-by: Christoph Lameter (Ampere) -Signed-off-by: Huang Shijie -Signed-off-by: Peter Zijlstra (Intel) -Link: https://lkml.kernel.org/r/20240906053019.7874-1-shijie@os.amperecomputing.com -(Adapted for context change) -Signed-off-by: Peng Zhang -(cherry picked from commit 2cab4bd024d23f658e40dce209dfd012f4e8b19a) ---- - kernel/sched/debug.c | 31 +++++++++++++++++++++++-------- - 1 file changed, 23 insertions(+), 8 deletions(-) - -diff --git a/kernel/sched/debug.c b/kernel/sched/debug.c -index 4c3d0d9f3..acdce2ee1 100644 ---- a/kernel/sched/debug.c -+++ b/kernel/sched/debug.c -@@ -579,7 +579,7 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p) - else - SEQ_printf(m, " %c", task_state_to_char(p)); - -- SEQ_printf(m, "%15s %5d %9Ld.%06ld %c %9Ld.%06ld %9Ld.%06ld %9Ld.%06ld %9Ld %5d ", -+ SEQ_printf(m, " %15s %5d %9Ld.%06ld %c %9Ld.%06ld %9Ld.%06ld %9Ld.%06ld %9Ld %5d ", - p->comm, task_pid_nr(p), - SPLIT_NS(p->se.vruntime), - entity_eligible(cfs_rq_of(&p->se), &p->se) ? 'E' : 'N', -@@ -589,17 +589,16 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p) - (long long)(p->nvcsw + p->nivcsw), - p->prio); - -- SEQ_printf(m, "%9lld.%06ld %9lld.%06ld %9lld.%06ld %9lld.%06ld", -+ SEQ_printf(m, "%9lld.%06ld %9lld.%06ld %9lld.%06ld", - SPLIT_NS(schedstat_val_or_zero(p->stats.wait_sum)), -- SPLIT_NS(p->se.sum_exec_runtime), - SPLIT_NS(schedstat_val_or_zero(p->stats.sum_sleep_runtime)), - SPLIT_NS(schedstat_val_or_zero(p->stats.sum_block_runtime))); - - #ifdef CONFIG_NUMA_BALANCING -- SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p)); -+ SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p)); - #endif - #ifdef CONFIG_CGROUP_SCHED -- SEQ_printf_task_group_path(m, task_group(p), " %s") -+ SEQ_printf_task_group_path(m, task_group(p), " %s") - #endif - - SEQ_printf(m, "\n"); -@@ -611,10 +610,26 @@ static void print_rq(struct seq_file *m, struct rq *rq, int rq_cpu) - - SEQ_printf(m, "\n"); - SEQ_printf(m, "runnable tasks:\n"); -- SEQ_printf(m, " S task PID tree-key switches prio" -- " wait-time sum-exec sum-sleep\n"); -+ SEQ_printf(m, " S task PID vruntime eligible " -+ "deadline slice sum-exec switches " -+ "prio wait-time sum-sleep sum-block" -+#ifdef CONFIG_NUMA_BALANCING -+ " node group-id" -+#endif -+#ifdef CONFIG_CGROUP_SCHED -+ " group-path" -+#endif -+ "\n"); - SEQ_printf(m, "-------------------------------------------------------" -- "------------------------------------------------------\n"); -+ "------------------------------------------------------" -+ "------------------------------------------------------" -+#ifdef CONFIG_NUMA_BALANCING -+ "--------------" -+#endif -+#ifdef CONFIG_CGROUP_SCHED -+ "--------------" -+#endif -+ "\n"); - - rcu_read_lock(); - for_each_process_thread(g, p) { --- -2.34.1 - diff --git a/kernel-rt/debian/patches/0084-ipv6-remove-max_size-check-inline-with-ipv4.patch b/kernel-rt/debian/patches/0084-ipv6-remove-max_size-check-inline-with-ipv4.patch deleted file mode 100644 index 30d24266..00000000 --- a/kernel-rt/debian/patches/0084-ipv6-remove-max_size-check-inline-with-ipv4.patch +++ /dev/null @@ -1,207 +0,0 @@ -From a616a8c8e5e479cc01a752f93a9887ed51bb150e Mon Sep 17 00:00:00 2001 -From: Jon Maxwell -Date: Thu, 12 Jan 2023 12:25:32 +1100 -Subject: [PATCH] ipv6: remove max_size check inline with ipv4 - -In ip6_dst_gc() replace: - - if (entries > gc_thresh) - -With: - - if (entries > ops->gc_thresh) - -Sending Ipv6 packets in a loop via a raw socket triggers an issue where a -route is cloned by ip6_rt_cache_alloc() for each packet sent. This quickly -consumes the Ipv6 max_size threshold which defaults to 4096 resulting in -these warnings: - -[1] 99.187805] dst_alloc: 7728 callbacks suppressed -[2] Route cache is full: consider increasing sysctl net.ipv6.route.max_size. -. -. -[300] Route cache is full: consider increasing sysctl net.ipv6.route.max_size. - -When this happens the packet is dropped and sendto() gets a network is -unreachable error: - -remaining pkt 200557 errno 101 -remaining pkt 196462 errno 101 -. -. -remaining pkt 126821 errno 101 - -Implement David Aherns suggestion to remove max_size check seeing that Ipv6 -has a GC to manage memory usage. Ipv4 already does not check max_size. - -Here are some memory comparisons for Ipv4 vs Ipv6 with the patch: - -Test by running 5 instances of a program that sends UDP packets to a raw -socket 5000000 times. Compare Ipv4 and Ipv6 performance with a similar -program. - -Ipv4: - -Before test: - -MemFree: 29427108 kB -Slab: 237612 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 2881 3990 192 42 2 : tunables 0 0 0 - -During test: - -MemFree: 29417608 kB -Slab: 247712 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 44394 44394 192 42 2 : tunables 0 0 0 - -After test: - -MemFree: 29422308 kB -Slab: 238104 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -Ipv6 with patch: - -Errno 101 errors are not observed anymore with the patch. - -Before test: - -MemFree: 29422308 kB -Slab: 238104 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -During Test: - -MemFree: 29431516 kB -Slab: 240940 kB - -ip6_dst_cache 11980 12064 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -After Test: - -MemFree: 29441816 kB -Slab: 238132 kB - -ip6_dst_cache 1902 2432 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -Tested-by: Andrea Mayer -Signed-off-by: Jon Maxwell -Reviewed-by: David Ahern -Link: https://lore.kernel.org/r/20230112012532.311021-1-jmaxwell37@gmail.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit af6d10345ca76670c1b7c37799f0d5576ccef277) -Signed-off-by: Jiping Ma ---- - include/net/dst_ops.h | 2 +- - net/core/dst.c | 8 ++------ - net/ipv6/route.c | 13 +++++-------- - 3 files changed, 8 insertions(+), 15 deletions(-) - -diff --git a/include/net/dst_ops.h b/include/net/dst_ops.h -index 88ff7bb2bb9b..632086b2f644 100644 ---- a/include/net/dst_ops.h -+++ b/include/net/dst_ops.h -@@ -16,7 +16,7 @@ struct dst_ops { - unsigned short family; - unsigned int gc_thresh; - -- int (*gc)(struct dst_ops *ops); -+ void (*gc)(struct dst_ops *ops); - struct dst_entry * (*check)(struct dst_entry *, __u32 cookie); - unsigned int (*default_advmss)(const struct dst_entry *); - unsigned int (*mtu)(const struct dst_entry *); -diff --git a/net/core/dst.c b/net/core/dst.c -index fb3bcba87744..453ec8aafc4a 100644 ---- a/net/core/dst.c -+++ b/net/core/dst.c -@@ -83,12 +83,8 @@ void *dst_alloc(struct dst_ops *ops, struct net_device *dev, - - if (ops->gc && - !(flags & DST_NOCOUNT) && -- dst_entries_get_fast(ops) > ops->gc_thresh) { -- if (ops->gc(ops)) { -- pr_notice_ratelimited("Route cache is full: consider increasing sysctl net.ipv6.route.max_size.\n"); -- return NULL; -- } -- } -+ dst_entries_get_fast(ops) > ops->gc_thresh) -+ ops->gc(ops); - - dst = kmem_cache_alloc(ops->kmem_cachep, GFP_ATOMIC); - if (!dst) -diff --git a/net/ipv6/route.c b/net/ipv6/route.c -index a6d5c99f65a3..b23e42efb3df 100644 ---- a/net/ipv6/route.c -+++ b/net/ipv6/route.c -@@ -89,7 +89,7 @@ static struct dst_entry *ip6_negative_advice(struct dst_entry *); - static void ip6_dst_destroy(struct dst_entry *); - static void ip6_dst_ifdown(struct dst_entry *, - struct net_device *dev, int how); --static int ip6_dst_gc(struct dst_ops *ops); -+static void ip6_dst_gc(struct dst_ops *ops); - - static int ip6_pkt_discard(struct sk_buff *skb); - static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); -@@ -3184,11 +3184,10 @@ struct dst_entry *icmp6_dst_alloc(struct net_device *dev, - return dst; - } - --static int ip6_dst_gc(struct dst_ops *ops) -+static void ip6_dst_gc(struct dst_ops *ops) - { - struct net *net = container_of(ops, struct net, ipv6.ip6_dst_ops); - int rt_min_interval = net->ipv6.sysctl.ip6_rt_gc_min_interval; -- int rt_max_size = net->ipv6.sysctl.ip6_rt_max_size; - int rt_elasticity = net->ipv6.sysctl.ip6_rt_gc_elasticity; - int rt_gc_timeout = net->ipv6.sysctl.ip6_rt_gc_timeout; - unsigned long rt_last_gc = net->ipv6.ip6_rt_last_gc; -@@ -3196,11 +3195,10 @@ static int ip6_dst_gc(struct dst_ops *ops) - int entries; - - entries = dst_entries_get_fast(ops); -- if (entries > rt_max_size) -+ if (entries > ops->gc_thresh) - entries = dst_entries_get_slow(ops); - -- if (time_after(rt_last_gc + rt_min_interval, jiffies) && -- entries <= rt_max_size) -+ if (time_after(rt_last_gc + rt_min_interval, jiffies)) - goto out; - - fib6_run_gc(atomic_inc_return(&net->ipv6.ip6_rt_gc_expire), net, true); -@@ -3210,7 +3208,6 @@ static int ip6_dst_gc(struct dst_ops *ops) - out: - val = atomic_read(&net->ipv6.ip6_rt_gc_expire); - atomic_set(&net->ipv6.ip6_rt_gc_expire, val - (val >> rt_elasticity)); -- return entries > rt_max_size; - } - - static int ip6_nh_lookup_table(struct net *net, struct fib6_config *cfg, -@@ -6363,7 +6360,7 @@ static int __net_init ip6_route_net_init(struct net *net) - #endif - - net->ipv6.sysctl.flush_delay = 0; -- net->ipv6.sysctl.ip6_rt_max_size = 4096; -+ net->ipv6.sysctl.ip6_rt_max_size = INT_MAX; - net->ipv6.sysctl.ip6_rt_gc_min_interval = HZ / 2; - net->ipv6.sysctl.ip6_rt_gc_timeout = 60*HZ; - net->ipv6.sysctl.ip6_rt_gc_interval = 30*HZ; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch b/kernel-rt/debian/patches/ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch deleted file mode 100644 index d0ad7896..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch +++ /dev/null @@ -1,684 +0,0 @@ -From ba0d88d4ff54805aac7aec77cc5b05d0df9114da Mon Sep 17 00:00:00 2001 -From: Michal Michalik -Date: Thu, 27 Jul 2023 15:50:34 +0200 -Subject: [PATCH 01/36] ice: Auxbus devices & driver for E822 TS - -There is a problem in HW in E822-based devices leading to race -condition. -It might happen that, in order: -- PF0 (which owns the PHC) requests few timestamps, -- PF1 requests a timestamp, -- interrupt is being triggered and both PF0 and PF1 threads are woken -up, -- PF0 got one timestamp, still waiting for others so not going to sleep, -- PF1 gets it's timestamp, process it and go to sleep, -- PF1 requests a timestamp again, -- just before PF0 goes to sleep timestamp of PF1 appear, -- PF0 finishes all it's timestamps and go to sleep (PF1 also sleeping). -That leaves PF1 timestamp memory not read, which lead to blocking the -next interrupt from arriving. - -Fix it by adding auxiliary devices and only one driver to handle all the -timestamps for all PF's by PHC owner. In the past each PF requested it's -own timestamps and process it from the start till the end which causes -problem described above. Currently each PF requests the timestamps as -before, but the actual reading of the completed timestamps is being done -by the PTP auxiliary driver, which is registered by the PF which owns PHC. - -Additionally, the newly introduced auxiliary driver/devices for PTP clock -owner will be used for other features in all products (including E810). - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Signed-off-by: Michal Michalik -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit d938a8cca88a5f02f523f95fe3d2d1214f4b4a8d) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 12 + - .../net/ethernet/intel/ice/ice_hw_autogen.h | 1 + - drivers/net/ethernet/intel/ice/ice_main.c | 11 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 393 +++++++++++++++++- - drivers/net/ethernet/intel/ice/ice_ptp.h | 30 ++ - 5 files changed, 430 insertions(+), 17 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index b9cd0113b859..0a3d76d184ba 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -671,6 +671,18 @@ static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) - return !!qv->ch; /* Enable it to run with TC */ - } - -+/** -+ * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt -+ * @pf: Board private structure -+ * -+ * Return true if this PF should respond to the Tx timestamp interrupt -+ * indication in the miscellaneous OICR interrupt handler. -+ */ -+static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) -+{ -+ return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; -+} -+ - /** - * ice_irq_dynamic_ena - Enable default interrupt generation settings - * @hw: pointer to HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -index 531cc2194741..6756f3d51d14 100644 ---- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -@@ -231,6 +231,7 @@ - #define PFINT_SB_CTL 0x0016B600 - #define PFINT_SB_CTL_MSIX_INDX_M ICE_M(0x7FF, 0) - #define PFINT_SB_CTL_CAUSE_ENA_M BIT(30) -+#define PFINT_TSYN_MSK 0x0016C980 - #define QINT_RQCTL(_QRX) (0x00150000 + ((_QRX) * 4)) - #define QINT_RQCTL_MSIX_INDX_S 0 - #define QINT_RQCTL_MSIX_INDX_M ICE_M(0x7FF, 0) -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 8a6acb5a722e..39cb6ee52abe 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3190,7 +3190,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (!hw->reset_ongoing) -+ if (!hw->reset_ongoing && ice_ptp_pf_handles_tx_interrupt(pf)) - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); - } - -@@ -7444,8 +7444,13 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - } - - /* configure PTP timestamping after VSI rebuild */ -- if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_cfg_timestamp(pf, false); -+ if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) { -+ if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -+ ice_ptp_cfg_timestamp(pf, false); -+ else if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) -+ /* for E82x PHC owner always need to have interrupts */ -+ ice_ptp_cfg_timestamp(pf, true); -+ } - - err = ice_vsi_rebuild_by_type(pf, ICE_VSI_SWITCHDEV_CTRL); - if (err) { -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 3648d3cccacc..e3012608c9dd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -255,6 +255,24 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, - return ice_ptp_set_sma_e810t(info, pin, func); - } - -+/** -+ * ice_ptp_configure_tx_tstamp - Enable or disable Tx timestamp interrupt -+ * @pf: The PF pointer to search in -+ * @on: bool value for whether timestamp interrupt is enabled or disabled -+ */ -+static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) -+{ -+ u32 val; -+ -+ /* Configure the Tx timestamp interrupt */ -+ val = rd32(&pf->hw, PFINT_OICR_ENA); -+ if (on) -+ val |= PFINT_OICR_TSYN_TX_M; -+ else -+ val &= ~PFINT_OICR_TSYN_TX_M; -+ wr32(&pf->hw, PFINT_OICR_ENA, val); -+} -+ - /** - * ice_set_tx_tstamp - Enable or disable Tx timestamping - * @pf: The PF pointer to search in -@@ -263,7 +281,6 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, - static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - { - struct ice_vsi *vsi; -- u32 val; - u16 i; - - vsi = ice_get_main_vsi(pf); -@@ -277,13 +294,8 @@ static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - vsi->tx_rings[i]->ptp_tx = on; - } - -- /* Configure the Tx timestamp interrupt */ -- val = rd32(&pf->hw, PFINT_OICR_ENA); -- if (on) -- val |= PFINT_OICR_TSYN_TX_M; -- else -- val &= ~PFINT_OICR_TSYN_TX_M; -- wr32(&pf->hw, PFINT_OICR_ENA, val); -+ if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -+ ice_ptp_configure_tx_tstamp(pf, on); - - pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; - } -@@ -674,9 +686,6 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - int err; - u8 idx; - -- if (!tx->init) -- return; -- - ptp_port = container_of(tx, struct ice_ptp_port, tx); - pf = ptp_port_to_pf(ptp_port); - hw = &pf->hw; -@@ -774,6 +783,39 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - } - } - -+/** -+ * ice_ptp_tx_tstamp_owner - Process Tx timestamps for all ports on the device -+ * @pf: Board private structure -+ */ -+static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) -+{ -+ struct ice_ptp_port *port; -+ unsigned int i; -+ -+ mutex_lock(&pf->ptp.ports_owner.lock); -+ list_for_each_entry(port, &pf->ptp.ports_owner.ports, list_member) { -+ struct ice_ptp_tx *tx = &port->tx; -+ -+ if (!tx || !tx->init) -+ continue; -+ -+ ice_ptp_process_tx_tstamp(tx); -+ } -+ mutex_unlock(&pf->ptp.ports_owner.lock); -+ -+ for (i = 0; i < ICE_MAX_QUAD; i++) { -+ u64 tstamp_ready; -+ int err; -+ -+ /* Read the Tx ready status first */ -+ err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); -+ if (err || tstamp_ready) -+ return ICE_TX_TSTAMP_WORK_PENDING; -+ } -+ -+ return ICE_TX_TSTAMP_WORK_DONE; -+} -+ - /** - * ice_ptp_tx_tstamp - Process Tx timestamps for this function. - * @tx: Tx tracking structure to initialize -@@ -2448,7 +2490,21 @@ s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - */ - enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf) - { -- return ice_ptp_tx_tstamp(&pf->ptp.port.tx); -+ switch (pf->ptp.tx_interrupt_mode) { -+ case ICE_PTP_TX_INTERRUPT_NONE: -+ /* This device has the clock owner handle timestamps for it */ -+ return ICE_TX_TSTAMP_WORK_DONE; -+ case ICE_PTP_TX_INTERRUPT_SELF: -+ /* This device handles its own timestamps */ -+ return ice_ptp_tx_tstamp(&pf->ptp.port.tx); -+ case ICE_PTP_TX_INTERRUPT_ALL: -+ /* This device handles timestamps for all ports */ -+ return ice_ptp_tx_tstamp_owner(pf); -+ default: -+ WARN_ONCE(1, "Unexpected Tx timestamp interrupt mode %u\n", -+ pf->ptp.tx_interrupt_mode); -+ return ICE_TX_TSTAMP_WORK_DONE; -+ } - } - - static void ice_ptp_periodic_work(struct kthread_work *work) -@@ -2557,6 +2613,187 @@ void ice_ptp_reset(struct ice_pf *pf) - dev_err(ice_pf_to_dev(pf), "PTP reset failed %d\n", err); - } - -+/** -+ * ice_ptp_aux_dev_to_aux_pf - Get auxiliary PF handle for the auxiliary device -+ * @aux_dev: auxiliary device to get the auxiliary PF for -+ */ -+static struct ice_pf * -+ice_ptp_aux_dev_to_aux_pf(struct auxiliary_device *aux_dev) -+{ -+ struct ice_ptp_port *aux_port; -+ struct ice_ptp *aux_ptp; -+ -+ aux_port = container_of(aux_dev, struct ice_ptp_port, aux_dev); -+ aux_ptp = container_of(aux_port, struct ice_ptp, port); -+ -+ return container_of(aux_ptp, struct ice_pf, ptp); -+} -+ -+/** -+ * ice_ptp_aux_dev_to_owner_pf - Get PF handle for the auxiliary device -+ * @aux_dev: auxiliary device to get the PF for -+ */ -+static struct ice_pf * -+ice_ptp_aux_dev_to_owner_pf(struct auxiliary_device *aux_dev) -+{ -+ struct ice_ptp_port_owner *ports_owner; -+ struct auxiliary_driver *aux_drv; -+ struct ice_ptp *owner_ptp; -+ -+ if (!aux_dev->dev.driver) -+ return NULL; -+ -+ aux_drv = to_auxiliary_drv(aux_dev->dev.driver); -+ ports_owner = container_of(aux_drv, struct ice_ptp_port_owner, -+ aux_driver); -+ owner_ptp = container_of(ports_owner, struct ice_ptp, ports_owner); -+ return container_of(owner_ptp, struct ice_pf, ptp); -+} -+ -+/** -+ * ice_ptp_auxbus_probe - Probe auxiliary devices -+ * @aux_dev: PF's auxiliary device -+ * @id: Auxiliary device ID -+ */ -+static int ice_ptp_auxbus_probe(struct auxiliary_device *aux_dev, -+ const struct auxiliary_device_id *id) -+{ -+ struct ice_pf *owner_pf = ice_ptp_aux_dev_to_owner_pf(aux_dev); -+ struct ice_pf *aux_pf = ice_ptp_aux_dev_to_aux_pf(aux_dev); -+ -+ if (WARN_ON(!owner_pf)) -+ return -ENODEV; -+ -+ INIT_LIST_HEAD(&aux_pf->ptp.port.list_member); -+ mutex_lock(&owner_pf->ptp.ports_owner.lock); -+ list_add(&aux_pf->ptp.port.list_member, -+ &owner_pf->ptp.ports_owner.ports); -+ mutex_unlock(&owner_pf->ptp.ports_owner.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_ptp_auxbus_remove - Remove auxiliary devices from the bus -+ * @aux_dev: PF's auxiliary device -+ */ -+static void ice_ptp_auxbus_remove(struct auxiliary_device *aux_dev) -+{ -+ struct ice_pf *owner_pf = ice_ptp_aux_dev_to_owner_pf(aux_dev); -+ struct ice_pf *aux_pf = ice_ptp_aux_dev_to_aux_pf(aux_dev); -+ -+ mutex_lock(&owner_pf->ptp.ports_owner.lock); -+ list_del(&aux_pf->ptp.port.list_member); -+ mutex_unlock(&owner_pf->ptp.ports_owner.lock); -+} -+ -+/** -+ * ice_ptp_auxbus_shutdown -+ * @aux_dev: PF's auxiliary device -+ */ -+static void ice_ptp_auxbus_shutdown(struct auxiliary_device *aux_dev) -+{ -+ /* Doing nothing here, but handle to auxbus driver must be satisfied */ -+} -+ -+/** -+ * ice_ptp_auxbus_suspend -+ * @aux_dev: PF's auxiliary device -+ * @state: power management state indicator -+ */ -+static int -+ice_ptp_auxbus_suspend(struct auxiliary_device *aux_dev, pm_message_t state) -+{ -+ /* Doing nothing here, but handle to auxbus driver must be satisfied */ -+ return 0; -+} -+ -+/** -+ * ice_ptp_auxbus_resume -+ * @aux_dev: PF's auxiliary device -+ */ -+static int ice_ptp_auxbus_resume(struct auxiliary_device *aux_dev) -+{ -+ /* Doing nothing here, but handle to auxbus driver must be satisfied */ -+ return 0; -+} -+ -+/** -+ * ice_ptp_auxbus_create_id_table - Create auxiliary device ID table -+ * @pf: Board private structure -+ * @name: auxiliary bus driver name -+ */ -+static struct auxiliary_device_id * -+ice_ptp_auxbus_create_id_table(struct ice_pf *pf, const char *name) -+{ -+ struct auxiliary_device_id *ids; -+ -+ /* Second id left empty to terminate the array */ -+ ids = devm_kcalloc(ice_pf_to_dev(pf), 2, -+ sizeof(struct auxiliary_device_id), GFP_KERNEL); -+ if (!ids) -+ return NULL; -+ -+ snprintf(ids[0].name, sizeof(ids[0].name), "ice.%s", name); -+ -+ return ids; -+} -+ -+/** -+ * ice_ptp_register_auxbus_driver - Register PTP auxiliary bus driver -+ * @pf: Board private structure -+ */ -+static int ice_ptp_register_auxbus_driver(struct ice_pf *pf) -+{ -+ struct auxiliary_driver *aux_driver; -+ struct ice_ptp *ptp; -+ struct device *dev; -+ char *name; -+ int err; -+ -+ ptp = &pf->ptp; -+ dev = ice_pf_to_dev(pf); -+ aux_driver = &ptp->ports_owner.aux_driver; -+ INIT_LIST_HEAD(&ptp->ports_owner.ports); -+ mutex_init(&ptp->ports_owner.lock); -+ name = devm_kasprintf(dev, GFP_KERNEL, "ptp_aux_dev_%u_%u_clk%u", -+ pf->pdev->bus->number, PCI_SLOT(pf->pdev->devfn), -+ ice_get_ptp_src_clock_index(&pf->hw)); -+ -+ aux_driver->name = name; -+ aux_driver->shutdown = ice_ptp_auxbus_shutdown; -+ aux_driver->suspend = ice_ptp_auxbus_suspend; -+ aux_driver->remove = ice_ptp_auxbus_remove; -+ aux_driver->resume = ice_ptp_auxbus_resume; -+ aux_driver->probe = ice_ptp_auxbus_probe; -+ aux_driver->id_table = ice_ptp_auxbus_create_id_table(pf, name); -+ if (!aux_driver->id_table) -+ return -ENOMEM; -+ -+ err = auxiliary_driver_register(aux_driver); -+ if (err) { -+ devm_kfree(dev, aux_driver->id_table); -+ dev_err(dev, "Failed registering aux_driver, name <%s>\n", -+ name); -+ } -+ -+ return err; -+} -+ -+/** -+ * ice_ptp_unregister_auxbus_driver - Unregister PTP auxiliary bus driver -+ * @pf: Board private structure -+ */ -+static void ice_ptp_unregister_auxbus_driver(struct ice_pf *pf) -+{ -+ struct auxiliary_driver *aux_driver = &pf->ptp.ports_owner.aux_driver; -+ -+ auxiliary_driver_unregister(aux_driver); -+ devm_kfree(ice_pf_to_dev(pf), aux_driver->id_table); -+ -+ mutex_destroy(&pf->ptp.ports_owner.lock); -+} -+ - /** - * ice_ptp_prepare_for_reset - Prepare PTP for reset - * @pf: Board private structure -@@ -2635,7 +2872,15 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - /* Release the global hardware lock */ - ice_ptp_unlock(hw); - -- if (!ice_is_e810(hw)) { -+ if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) { -+ /* The clock owner for this device type handles the timestamp -+ * interrupt for all ports. -+ */ -+ ice_ptp_configure_tx_tstamp(pf, true); -+ -+ /* React on all quads interrupts for E82x */ -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); -+ - /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); - if (err) -@@ -2650,8 +2895,16 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - /* Store the PTP clock index for other PFs */ - ice_set_ptp_clock_index(pf); - -- return 0; -+ err = ice_ptp_register_auxbus_driver(pf); -+ if (err) { -+ dev_err(ice_pf_to_dev(pf), "Failed to register PTP auxbus driver"); -+ goto err_aux; -+ } - -+ return 0; -+err_aux: -+ ice_clear_ptp_clock_index(pf); -+ ptp_clock_unregister(pf->ptp.clock); - err_clk: - pf->ptp.clock = NULL; - err_exit: -@@ -2701,6 +2954,13 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); - case ICE_PHY_E822: -+ /* Non-owner PFs don't react to any interrupts on E82x, -+ * neither on own quad nor on others -+ */ -+ if (!ice_ptp_pf_handles_tx_interrupt(pf)) { -+ ice_ptp_configure_tx_tstamp(pf, false); -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); -+ } - kthread_init_delayed_work(&ptp_port->ov_work, - ice_ptp_wait_for_offsets); - -@@ -2711,6 +2971,101 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - } - } - -+/** -+ * ice_ptp_release_auxbus_device -+ * @dev: device that utilizes the auxbus -+ */ -+static void ice_ptp_release_auxbus_device(struct device *dev) -+{ -+ /* Doing nothing here, but handle to auxbux device must be satisfied */ -+} -+ -+/** -+ * ice_ptp_create_auxbus_device - Create PTP auxiliary bus device -+ * @pf: Board private structure -+ */ -+static int ice_ptp_create_auxbus_device(struct ice_pf *pf) -+{ -+ struct auxiliary_device *aux_dev; -+ struct ice_ptp *ptp; -+ struct device *dev; -+ char *name; -+ int err; -+ u32 id; -+ -+ ptp = &pf->ptp; -+ id = ptp->port.port_num; -+ dev = ice_pf_to_dev(pf); -+ -+ aux_dev = &ptp->port.aux_dev; -+ -+ name = devm_kasprintf(dev, GFP_KERNEL, "ptp_aux_dev_%u_%u_clk%u", -+ pf->pdev->bus->number, PCI_SLOT(pf->pdev->devfn), -+ ice_get_ptp_src_clock_index(&pf->hw)); -+ -+ aux_dev->name = name; -+ aux_dev->id = id; -+ aux_dev->dev.release = ice_ptp_release_auxbus_device; -+ aux_dev->dev.parent = dev; -+ -+ err = auxiliary_device_init(aux_dev); -+ if (err) -+ goto aux_err; -+ -+ err = auxiliary_device_add(aux_dev); -+ if (err) { -+ auxiliary_device_uninit(aux_dev); -+ goto aux_err; -+ } -+ -+ return 0; -+aux_err: -+ dev_err(dev, "Failed to create PTP auxiliary bus device <%s>\n", name); -+ devm_kfree(dev, name); -+ return err; -+} -+ -+/** -+ * ice_ptp_remove_auxbus_device - Remove PTP auxiliary bus device -+ * @pf: Board private structure -+ */ -+static void ice_ptp_remove_auxbus_device(struct ice_pf *pf) -+{ -+ struct auxiliary_device *aux_dev = &pf->ptp.port.aux_dev; -+ -+ auxiliary_device_delete(aux_dev); -+ auxiliary_device_uninit(aux_dev); -+ -+ memset(aux_dev, 0, sizeof(*aux_dev)); -+} -+ -+/** -+ * ice_ptp_init_tx_interrupt_mode - Initialize device Tx interrupt mode -+ * @pf: Board private structure -+ * -+ * Initialize the Tx timestamp interrupt mode for this device. For most device -+ * types, each PF processes the interrupt and manages its own timestamps. For -+ * E822-based devices, only the clock owner processes the timestamps. Other -+ * PFs disable the interrupt and do not process their own timestamps. -+ */ -+static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf) -+{ -+ switch (pf->hw.phy_model) { -+ case ICE_PHY_E822: -+ /* E822 based PHY has the clock owner process the interrupt -+ * for all ports. -+ */ -+ if (ice_pf_src_tmr_owned(pf)) -+ pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_ALL; -+ else -+ pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_NONE; -+ break; -+ default: -+ /* other PHY types handle their own Tx interrupt */ -+ pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_SELF; -+ } -+} -+ - /** - * ice_ptp_init - Initialize PTP hardware clock support - * @pf: Board private structure -@@ -2731,6 +3086,8 @@ void ice_ptp_init(struct ice_pf *pf) - - ice_ptp_init_phy_model(hw); - -+ ice_ptp_init_tx_interrupt_mode(pf); -+ - /* If this function owns the clock hardware, it must allocate and - * configure the PTP clock device to represent it. - */ -@@ -2753,6 +3110,10 @@ void ice_ptp_init(struct ice_pf *pf) - if (err) - goto err; - -+ err = ice_ptp_create_auxbus_device(pf); -+ if (err) -+ goto err; -+ - dev_info(ice_pf_to_dev(pf), "PTP init successful\n"); - return; - -@@ -2781,6 +3142,8 @@ void ice_ptp_release(struct ice_pf *pf) - /* Disable timestamping for both Tx and Rx */ - ice_ptp_cfg_timestamp(pf, false); - -+ ice_ptp_remove_auxbus_device(pf); -+ - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); - - clear_bit(ICE_FLAG_PTP, pf->flags); -@@ -2804,5 +3167,7 @@ void ice_ptp_release(struct ice_pf *pf) - ptp_clock_unregister(pf->ptp.clock); - pf->ptp.clock = NULL; - -+ ice_ptp_unregister_auxbus_driver(pf); -+ - dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 995a57019ba7..d94c22329df0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -157,7 +157,9 @@ struct ice_ptp_tx { - * ready for PTP functionality. It is used to track the port initialization - * and determine when the port's PHY offset is valid. - * -+ * @list_member: list member structure of auxiliary device - * @tx: Tx timestamp tracking for this port -+ * @aux_dev: auxiliary device associated with this port - * @ov_work: delayed work task for tracking when PHY offset is valid - * @ps_lock: mutex used to protect the overall PTP PHY start procedure - * @link_up: indicates whether the link is up -@@ -165,7 +167,9 @@ struct ice_ptp_tx { - * @port_num: the port number this structure represents - */ - struct ice_ptp_port { -+ struct list_head list_member; - struct ice_ptp_tx tx; -+ struct auxiliary_device aux_dev; - struct kthread_delayed_work ov_work; - struct mutex ps_lock; /* protects overall PTP PHY start procedure */ - bool link_up; -@@ -173,11 +177,35 @@ struct ice_ptp_port { - u8 port_num; - }; - -+enum ice_ptp_tx_interrupt { -+ ICE_PTP_TX_INTERRUPT_NONE = 0, -+ ICE_PTP_TX_INTERRUPT_SELF, -+ ICE_PTP_TX_INTERRUPT_ALL, -+}; -+ -+/** -+ * struct ice_ptp_port_owner - data used to handle the PTP clock owner info -+ * -+ * This structure contains data necessary for the PTP clock owner to correctly -+ * handle the timestamping feature for all attached ports. -+ * -+ * @aux_driver: the structure carring the auxiliary driver information -+ * @ports: list of porst handled by this port owner -+ * @lock: protect access to ports list -+ */ -+struct ice_ptp_port_owner { -+ struct auxiliary_driver aux_driver; -+ struct list_head ports; -+ struct mutex lock; -+}; -+ - #define GLTSYN_TGT_H_IDX_MAX 4 - - /** - * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK -+ * @tx_interrupt_mode: the TX interrupt mode for the PTP clock - * @port: data for the PHY port initialization procedure -+ * @ports_owner: data for the auxiliary driver owner - * @work: delayed work function for periodic tasks - * @cached_phc_time: a cached copy of the PHC time for timestamp extension - * @cached_phc_jiffies: jiffies when cached_phc_time was last updated -@@ -197,7 +225,9 @@ struct ice_ptp_port { - * @late_cached_phc_updates: number of times cached PHC update is late - */ - struct ice_ptp { -+ enum ice_ptp_tx_interrupt tx_interrupt_mode; - struct ice_ptp_port port; -+ struct ice_ptp_port_owner ports_owner; - struct kthread_delayed_work work; - u64 cached_phc_time; - unsigned long cached_phc_jiffies; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch b/kernel-rt/debian/patches/ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch deleted file mode 100644 index 3078a79b..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch +++ /dev/null @@ -1,95 +0,0 @@ -From f6af978ef435067b4c9f5ff5e159f8b65d969268 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Fri, 8 Sep 2023 14:37:14 -0700 -Subject: [PATCH 02/36] ice: introduce ice_pf_src_tmr_owned - -Add ice_pf_src_tmr_owned() macro to check the function capability bit -indicating if the current function owns the PTP hardware clock. This is -slightly shorter than the more verbose access via -hw.func_caps.ts_func_info.src_tmr_owned. Use this where possible rather -than open coding its equivalent. - -Signed-off-by: Jacob Keller -Signed-off-by: Tony Nguyen -(cherry picked from commit 42d40bb21e332151da6fb689bf7d4af8195866ed) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 ++ - drivers/net/ethernet/intel/ice/ice_lib.c | 2 +- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 6 +++--- - 4 files changed, 7 insertions(+), 5 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 0a3d76d184ba..54a98c4032b7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -197,6 +197,8 @@ extern const char ice_drv_ver[]; - - #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) - -+#define ice_pf_src_tmr_owned(pf) ((pf)->hw.func_caps.ts_func_info.src_tmr_owned) -+ - enum ice_feature { - ICE_F_DSCP, - ICE_F_PHY_RCLK, -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 632091487413..106ef843f4b5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4010,7 +4010,7 @@ void ice_init_feature_support(struct ice_pf *pf) - if (ice_is_phy_rclk_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_PHY_RCLK); - /* If we don't own the timer - don't enable other caps */ -- if (!pf->hw.func_caps.ts_func_info.src_tmr_owned) -+ if (!ice_pf_src_tmr_owned(pf)) - break; - if (ice_is_cgu_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_CGU); -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 39cb6ee52abe..e957529b3fd6 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3200,7 +3200,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - ena_mask &= ~PFINT_OICR_TSYN_EVNT_M; - -- if (hw->func_caps.ts_func_info.src_tmr_owned) { -+ if (ice_pf_src_tmr_owned(pf)) { - /* Save EVENTs from GLTSYN register */ - pf->ptp.ext_ts_irq |= gltsyn_stat & - (GLTSYN_STAT_EVENT0_M | -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index e3012608c9dd..b1951357ba9f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -448,7 +448,7 @@ static void ice_clear_ptp_clock_index(struct ice_pf *pf) - int err; - - /* Do not clear the index if we don't own the timer */ -- if (!hw->func_caps.ts_func_info.src_tmr_owned) -+ if (!ice_pf_src_tmr_owned(pf)) - return; - - tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -@@ -2538,7 +2538,7 @@ void ice_ptp_reset(struct ice_pf *pf) - if (test_bit(ICE_PFR_REQ, pf->state)) - goto pfr; - -- if (!hw->func_caps.ts_func_info.src_tmr_owned) -+ if (!ice_pf_src_tmr_owned(pf)) - goto reset_ts; - - err = ice_ptp_init_phc(hw); -@@ -3091,7 +3091,7 @@ void ice_ptp_init(struct ice_pf *pf) - /* If this function owns the clock hardware, it must allocate and - * configure the PTP clock device to represent it. - */ -- if (hw->func_caps.ts_func_info.src_tmr_owned) { -+ if (ice_pf_src_tmr_owned(pf)) { - err = ice_ptp_init_owner(pf); - if (err) - goto err; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch b/kernel-rt/debian/patches/ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch deleted file mode 100644 index 206d655f..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 3c155fbf8e2a0546302a01cc06e8ece18468148e Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Fri, 1 Dec 2023 10:08:42 -0800 -Subject: [PATCH 03/36] ice: Re-enable timestamping correctly after reset - -During reset, TX_TSYN interrupt should be processed as it may process -timestamps in brief moments before and after reset. -Timestamping should be enabled on VSIs at the end of reset procedure. -On ice_get_phy_tx_tstamp_ready error, interrupt should not be rearmed -because error only happens on resets. - -Reviewed-by: Jesse Brandeburg -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 1cc5b6eaad92d69fe4d84bbee5c12ee297d56296) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 19 ++++++++++--------- - 2 files changed, 11 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index e957529b3fd6..d2f3b4374d14 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3190,7 +3190,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (!hw->reset_ongoing && ice_ptp_pf_handles_tx_interrupt(pf)) -+ if (ice_ptp_pf_handles_tx_interrupt(pf)) - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); - } - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index b1951357ba9f..92459589f6ce 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -809,7 +809,9 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) - - /* Read the Tx ready status first */ - err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); -- if (err || tstamp_ready) -+ if (err) -+ break; -+ else if (tstamp_ready) - return ICE_TX_TSTAMP_WORK_PENDING; - } - -@@ -2535,12 +2537,10 @@ void ice_ptp_reset(struct ice_pf *pf) - int err, itr = 1; - u64 time_diff; - -- if (test_bit(ICE_PFR_REQ, pf->state)) -+ if (test_bit(ICE_PFR_REQ, pf->state) || -+ !ice_pf_src_tmr_owned(pf)) - goto pfr; - -- if (!ice_pf_src_tmr_owned(pf)) -- goto reset_ts; -- - err = ice_ptp_init_phc(hw); - if (err) - goto err; -@@ -2584,10 +2584,6 @@ void ice_ptp_reset(struct ice_pf *pf) - goto err; - } - --reset_ts: -- /* Restart the PHY timestamping block */ -- ice_ptp_reset_phy_timestamping(pf); -- - pfr: - /* Init Tx structures */ - if (ice_is_e810(&pf->hw)) { -@@ -2603,6 +2599,11 @@ void ice_ptp_reset(struct ice_pf *pf) - - set_bit(ICE_FLAG_PTP, pf->flags); - -+ /* Restart the PHY timestamping block */ -+ if (!test_bit(ICE_PFR_REQ, pf->state) && -+ ice_pf_src_tmr_owned(pf)) -+ ice_ptp_restart_all_phy(pf); -+ - /* Start periodic work going */ - kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch b/kernel-rt/debian/patches/ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch deleted file mode 100644 index 29d0c524..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 214f06259ade960e3790b62f96bc1b75e5b76e79 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Fri, 1 Dec 2023 10:08:43 -0800 -Subject: [PATCH 04/36] ice: periodically kick Tx timestamp interrupt - -The E822 hardware for Tx timestamping keeps track of how many -outstanding timestamps are still in the PHY memory block. It will not -generate a new interrupt to the MAC until all of the timestamps in the -region have been read. - -If somehow all the available data is not read, but the driver has exited -its interrupt routine already, the PHY will not generate a new interrupt -even if new timestamp data is captured. Because no interrupt is -generated, the driver never processes the timestamp data. This state -results in a permanent failure for all future Tx timestamps. - -It is not clear how the driver and hardware could enter this state. -However, if it does, there is currently no recovery mechanism. - -Add a recovery mechanism via the periodic PTP work thread which invokes -ice_ptp_periodic_work(). Introduce a new check, -ice_ptp_maybe_trigger_tx_interrupt() which checks the PHY timestamp -ready bitmask. If any bits are set, trigger a software interrupt by -writing to PFINT_OICR. - -Once triggered, the main timestamp processing thread will read through -the PHY data and clear the outstanding timestamp data. Once cleared, new -data should trigger interrupts as expected. - -This should allow recovery from such a state rather than leaving the -device in a state where we cannot process Tx timestamps. - -It is possible that this function checks for timestamp data -simultaneously with the interrupt, and it might trigger additional -unnecessary interrupts. This will cause a small amount of additional -processing. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Andrii Staikov -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 712e876371f8350c446a33577cf4a0aedcd4742a) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 50 ++++++++++++++++++++++++ - 1 file changed, 50 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 92459589f6ce..0d6c7215e0c1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -2509,6 +2509,54 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf) - } - } - -+/** -+ * ice_ptp_maybe_trigger_tx_interrupt - Trigger Tx timstamp interrupt -+ * @pf: Board private structure -+ * -+ * The device PHY issues Tx timestamp interrupts to the driver for processing -+ * timestamp data from the PHY. It will not interrupt again until all -+ * current timestamp data is read. In rare circumstances, it is possible that -+ * the driver fails to read all outstanding data. -+ * -+ * To avoid getting permanently stuck, periodically check if the PHY has -+ * outstanding timestamp data. If so, trigger an interrupt from software to -+ * process this data. -+ */ -+static void ice_ptp_maybe_trigger_tx_interrupt(struct ice_pf *pf) -+{ -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ bool trigger_oicr = false; -+ unsigned int i; -+ -+ if (ice_is_e810(hw)) -+ return; -+ -+ if (!ice_pf_src_tmr_owned(pf)) -+ return; -+ -+ for (i = 0; i < ICE_MAX_QUAD; i++) { -+ u64 tstamp_ready; -+ int err; -+ -+ err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); -+ if (!err && tstamp_ready) { -+ trigger_oicr = true; -+ break; -+ } -+ } -+ -+ if (trigger_oicr) { -+ /* Trigger a software interrupt, to ensure this data -+ * gets processed. -+ */ -+ dev_dbg(dev, "PTP periodic task detected waiting timestamps. Triggering Tx timestamp interrupt now.\n"); -+ -+ wr32(hw, PFINT_OICR, PFINT_OICR_TSYN_TX_M); -+ ice_flush(hw); -+ } -+} -+ - static void ice_ptp_periodic_work(struct kthread_work *work) - { - struct ice_ptp *ptp = container_of(work, struct ice_ptp, work.work); -@@ -2520,6 +2568,8 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - - err = ice_ptp_update_cached_phctime(pf); - -+ ice_ptp_maybe_trigger_tx_interrupt(pf); -+ - /* Run twice a second or reschedule if phc update failed */ - kthread_queue_delayed_work(ptp->kworker, &ptp->work, - msecs_to_jiffies(err ? 10 : 500)); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch b/kernel-rt/debian/patches/ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch deleted file mode 100644 index a31b8b17..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch +++ /dev/null @@ -1,81 +0,0 @@ -From c25fc364d599195403ed9ba51ef8fa6ed3b642ff Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 26 Jul 2023 11:27:44 -0700 -Subject: [PATCH 05/36] ice: PTP: Rename macros used for PHY/QUAD port - definitions - -The ice_fill_phy_msg_e822 function uses several macros to specify the -correct address when sending a sideband message to the PHY block in -hardware. - -The names of these macros are fairly generic and confusing. Future -development is going to extend the driver to support new hardware families -which have different relationships between PHY and QUAD. Rename the macros -for clarity and to indicate that they are E822 specific. This also matches -closer to the hardware specification in the data sheet. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 64fd7de2469dd52a7f1517ce95ae22fcb391a8a1) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 8 ++++---- - drivers/net/ethernet/intel/ice/ice_type.h | 14 +++++++------- - 2 files changed, 11 insertions(+), 11 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index a299af39a7c4..03c4aa995e8d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -294,9 +294,9 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - { - int phy_port, phy, quadtype; - -- phy_port = port % ICE_PORTS_PER_PHY; -- phy = port / ICE_PORTS_PER_PHY; -- quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_NUM_QUAD_TYPE; -+ phy_port = port % ICE_PORTS_PER_PHY_E822; -+ phy = port / ICE_PORTS_PER_PHY_E822; -+ quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E822; - - if (quadtype == 0) { - msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port); -@@ -628,7 +628,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - - msg->dest_dev = rmn_0; - -- if ((quad % ICE_NUM_QUAD_TYPE) == 0) -+ if ((quad % ICE_QUADS_PER_PHY_E822) == 0) - addr = Q_0_BASE + offset; - else - addr = Q_1_BASE + offset; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 4cd131546aa9..bb5d8b681bc2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -909,13 +909,13 @@ struct ice_hw { - /* INTRL granularity in 1 us */ - u8 intrl_gran; - --#define ICE_PHY_PER_NAC 1 --#define ICE_MAX_QUAD 2 --#define ICE_NUM_QUAD_TYPE 2 --#define ICE_PORTS_PER_QUAD 4 --#define ICE_PHY_0_LAST_QUAD 1 --#define ICE_PORTS_PER_PHY 8 --#define ICE_NUM_EXTERNAL_PORTS ICE_PORTS_PER_PHY -+#define ICE_PHY_PER_NAC_E822 1 -+#define ICE_MAX_QUAD 2 -+#define ICE_QUADS_PER_PHY_E822 2 -+#define ICE_PORTS_PER_PHY_E822 8 -+#define ICE_PORTS_PER_QUAD 4 -+#define ICE_PORTS_PER_PHY_E810 4 -+#define ICE_NUM_EXTERNAL_PORTS (ICE_MAX_QUAD * ICE_PORTS_PER_QUAD) - - /* Active package version (currently active) */ - struct ice_pkg_ver active_pkg_ver; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch b/kernel-rt/debian/patches/ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch deleted file mode 100644 index 0faf7dd3..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 13f48f4c94ad4d317e7c7ccaa188a11850a8aa32 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 26 Jul 2023 11:27:45 -0700 -Subject: [PATCH 06/36] ice: PTP: move quad value check inside - ice_fill_phy_msg_e822 - -The callers of ice_fill_phy_msg_e822 check for whether the quad number is -within the expected range. Move this check inside the ice_fill_phy_msg_e822 -function instead of duplicating it twice. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit dd84744cf5ea967c8d53aae6b6a45703dbc5c5c4) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 19 ++++++++++++------- - 1 file changed, 12 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 03c4aa995e8d..e024b88ce32b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -621,11 +621,14 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - * Fill a message buffer for accessing a register in a quad shared between - * multiple PHYs. - */ --static void -+static int - ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - { - u32 addr; - -+ if (quad >= ICE_MAX_QUAD) -+ return -EINVAL; -+ - msg->dest_dev = rmn_0; - - if ((quad % ICE_QUADS_PER_PHY_E822) == 0) -@@ -635,6 +638,8 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - - msg->msg_addr_low = lower_16_bits(addr); - msg->msg_addr_high = upper_16_bits(addr); -+ -+ return 0; - } - - /** -@@ -653,10 +658,10 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- if (quad >= ICE_MAX_QUAD) -- return -EINVAL; -+ err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ if (err) -+ return err; - -- ice_fill_quad_msg_e822(&msg, quad, offset); - msg.opcode = ice_sbq_msg_rd; - - err = ice_sbq_rw_reg(hw, &msg); -@@ -687,10 +692,10 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- if (quad >= ICE_MAX_QUAD) -- return -EINVAL; -+ err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ if (err) -+ return err; - -- ice_fill_quad_msg_e822(&msg, quad, offset); - msg.opcode = ice_sbq_msg_wr; - msg.data = val; - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch b/kernel-rt/debian/patches/ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch deleted file mode 100644 index a2e95af6..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 7dae9333af82f6c9e2db1940c3a10ae38dabea7b Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 21 Nov 2023 13:12:55 -0800 -Subject: [PATCH 07/36] ice: remove ptp_tx ring parameter flag - -Before performing a Tx timestamp in ice_stamp(), the driver checks a ptp_tx -ring variable to see if timestamping is enabled on that ring. This value is -set for all rings whenever userspace configures Tx timestamping. - -Ostensibly this was done to avoid wasting cycles checking other fields when -timestamping has not been enabled. However, for Tx timestamps we already -get an individual per-SKB flag indicating whether userspace wants to -request a timestamp on that packet. We do not gain much by also having -a separate flag to check for whether timestamping was enabled. - -In fact, the driver currently fails to restore the field after a PF reset. -Because of this, if a PF reset occurs, timestamps will be disabled. - -Since this flag doesn't add value in the hotpath, remove it and always -provide a timestamp if the SKB flag has been set. - -A following change will fix the reset path to properly restore user -timestamping configuration completely. - -This went unnoticed for some time because one of the most common -applications using Tx timestamps, ptp4l, will reconfigure the socket as -part of its fault recovery logic. - -Fixes: ea9b847cda64 ("ice: enable transmit timestamps for E810 devices") -Signed-off-by: Jacob Keller -Reviewed-by: Jesse Brandeburg -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 0ffb08b1a45bd6b7694e01da0e1d9e3e788418fb) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 14 -------------- - drivers/net/ethernet/intel/ice/ice_txrx.c | 3 --- - drivers/net/ethernet/intel/ice/ice_txrx.h | 1 - - 3 files changed, 18 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 0d6c7215e0c1..c03153bdb7c3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -280,20 +280,6 @@ static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) - */ - static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - { -- struct ice_vsi *vsi; -- u16 i; -- -- vsi = ice_get_main_vsi(pf); -- if (!vsi) -- return; -- -- /* Set the timestamp enable flag for all the Tx rings */ -- ice_for_each_txq(vsi, i) { -- if (!vsi->tx_rings[i]) -- continue; -- vsi->tx_rings[i]->ptp_tx = on; -- } -- - if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) - ice_ptp_configure_tx_tstamp(pf, on); - -diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.c b/drivers/net/ethernet/intel/ice/ice_txrx.c -index 24c914015973..9170a3e8f088 100644 ---- a/drivers/net/ethernet/intel/ice/ice_txrx.c -+++ b/drivers/net/ethernet/intel/ice/ice_txrx.c -@@ -2305,9 +2305,6 @@ ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb, - if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) - return; - -- if (!tx_ring->ptp_tx) -- return; -- - /* Tx timestamps cannot be sampled when doing TSO */ - if (first->tx_flags & ICE_TX_FLAGS_TSO) - return; -diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.h b/drivers/net/ethernet/intel/ice/ice_txrx.h -index 407d4c320097..b28b9826bbcd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_txrx.h -+++ b/drivers/net/ethernet/intel/ice/ice_txrx.h -@@ -381,7 +381,6 @@ struct ice_tx_ring { - #define ICE_TX_FLAGS_RING_VLAN_L2TAG2 BIT(2) - u8 flags; - u8 dcb_tc; /* Traffic class of ring */ -- u8 ptp_tx; - } ____cacheline_internodealigned_in_smp; - - static inline bool ice_ring_uses_build_skb(struct ice_rx_ring *ring) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch b/kernel-rt/debian/patches/ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch deleted file mode 100644 index 9b7c9ca9..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch +++ /dev/null @@ -1,160 +0,0 @@ -From 99007ca6255e2c35256bd97fa141705d301eb934 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 21 Nov 2023 13:12:56 -0800 -Subject: [PATCH 08/36] ice: unify logic for programming PFINT_TSYN_MSK - -Commit d938a8cca88a ("ice: Auxbus devices & driver for E822 TS") modified -how Tx timestamps are handled for E822 devices. On these devices, only the -clock owner handles reading the Tx timestamp data from firmware. To do -this, the PFINT_TSYN_MSK register is modified from the default value to one -which enables reacting to a Tx timestamp on all PHY ports. - -The driver currently programs PFINT_TSYN_MSK in different places depending -on whether the port is the clock owner or not. For the clock owner, the -PFINT_TSYN_MSK value is programmed during ice_ptp_init_owner just before -calling ice_ptp_tx_ena_intr to program the PHY ports. - -For the non-clock owner ports, the PFINT_TSYN_MSK is programmed during -ice_ptp_init_port. - -If a large enough device reset occurs, the PFINT_TSYN_MSK register will be -reset to the default value in which only the PHY associated directly with -the PF will cause the Tx timestamp interrupt to trigger. - -The driver lacks logic to reprogram the PFINT_TSYN_MSK register after a -device reset. For the E822 device, this results in the PF no longer -responding to interrupts for other ports. This results in failure to -deliver Tx timestamps to user space applications. - -Rename ice_ptp_configure_tx_tstamp to ice_ptp_cfg_tx_interrupt, and unify -the logic for programming PFINT_TSYN_MSK and PFINT_OICR_ENA into one place. -This function will program both registers according to the combination of -user configuration and device requirements. - -This ensures that PFINT_TSYN_MSK is always restored when we configure the -Tx timestamp interrupt. - -Fixes: d938a8cca88a ("ice: Auxbus devices & driver for E822 TS") -Signed-off-by: Jacob Keller -Reviewed-by: Jesse Brandeburg -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 7d606a1e2d0575b6c3a2600f43f90d1e409f9661) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 60 ++++++++++++++---------- - 1 file changed, 34 insertions(+), 26 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index c03153bdb7c3..b0bba866e8a2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -256,21 +256,42 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, - } - - /** -- * ice_ptp_configure_tx_tstamp - Enable or disable Tx timestamp interrupt -- * @pf: The PF pointer to search in -- * @on: bool value for whether timestamp interrupt is enabled or disabled -+ * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device -+ * @pf: Board private structure -+ * -+ * Program the device to respond appropriately to the Tx timestamp interrupt -+ * cause. - */ --static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) -+static void ice_ptp_cfg_tx_interrupt(struct ice_pf *pf) - { -+ struct ice_hw *hw = &pf->hw; -+ bool enable; - u32 val; - -+ switch (pf->ptp.tx_interrupt_mode) { -+ case ICE_PTP_TX_INTERRUPT_ALL: -+ /* React to interrupts across all quads. */ -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); -+ enable = true; -+ break; -+ case ICE_PTP_TX_INTERRUPT_NONE: -+ /* Do not react to interrupts on any quad. */ -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); -+ enable = false; -+ break; -+ case ICE_PTP_TX_INTERRUPT_SELF: -+ default: -+ enable = pf->ptp.tstamp_config.tx_type == HWTSTAMP_TX_ON; -+ break; -+ } -+ - /* Configure the Tx timestamp interrupt */ -- val = rd32(&pf->hw, PFINT_OICR_ENA); -- if (on) -+ val = rd32(hw, PFINT_OICR_ENA); -+ if (enable) - val |= PFINT_OICR_TSYN_TX_M; - else - val &= ~PFINT_OICR_TSYN_TX_M; -- wr32(&pf->hw, PFINT_OICR_ENA, val); -+ wr32(hw, PFINT_OICR_ENA, val); - } - - /** -@@ -280,10 +301,9 @@ static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) - */ - static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - { -- if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -- ice_ptp_configure_tx_tstamp(pf, on); -- - pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; -+ -+ ice_ptp_cfg_tx_interrupt(pf); - } - - /** -@@ -2909,15 +2929,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - /* Release the global hardware lock */ - ice_ptp_unlock(hw); - -- if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) { -- /* The clock owner for this device type handles the timestamp -- * interrupt for all ports. -- */ -- ice_ptp_configure_tx_tstamp(pf, true); -- -- /* React on all quads interrupts for E82x */ -- wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); -- -+ if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); - if (err) -@@ -2991,13 +3003,6 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); - case ICE_PHY_E822: -- /* Non-owner PFs don't react to any interrupts on E82x, -- * neither on own quad nor on others -- */ -- if (!ice_ptp_pf_handles_tx_interrupt(pf)) { -- ice_ptp_configure_tx_tstamp(pf, false); -- wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); -- } - kthread_init_delayed_work(&ptp_port->ov_work, - ice_ptp_wait_for_offsets); - -@@ -3142,6 +3147,9 @@ void ice_ptp_init(struct ice_pf *pf) - /* Start the PHY timestamping block */ - ice_ptp_reset_phy_timestamping(pf); - -+ /* Configure initial Tx interrupt settings */ -+ ice_ptp_cfg_tx_interrupt(pf); -+ - set_bit(ICE_FLAG_PTP, pf->flags); - err = ice_ptp_init_work(pf, ptp); - if (err) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch b/kernel-rt/debian/patches/ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch deleted file mode 100644 index 76770529..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch +++ /dev/null @@ -1,147 +0,0 @@ -From e5a65377977e338a8f7baf92892481acf1c62403 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 26 Jul 2023 11:27:43 -0700 -Subject: [PATCH 09/36] ice: PTP: Clean up timestamp registers correctly - -E822 PHY TS registers should not be written and the only way to clean up -them is to reset QUAD memory. - -To ensure that the status bit for the timestamp index is cleared, ensure -that ice_clear_phy_tstamp implementations first read the timestamp out. -Implementations which can write the register continue to do so. - -Add a note to indicate this function should only be called on timestamps -which have their valid bit set. Update the dynamic debug messages to -reflect the actual action taken. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit be65a1a33bdee3912daac50aa6c5270ec9c37010) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 70 +++++++++++++-------- - 1 file changed, 45 insertions(+), 25 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index e024b88ce32b..cd28430cfdda 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -759,29 +759,32 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - * @quad: the quad to read from - * @idx: the timestamp index to reset - * -- * Clear a timestamp, resetting its valid bit, from the PHY quad block that is -- * shared between the internal PHYs on the E822 devices. -+ * Read the timestamp out of the quad to clear its timestamp status bit from -+ * the PHY quad block that is shared between the internal PHYs of the E822 -+ * devices. -+ * -+ * Note that unlike E810, software cannot directly write to the quad memory -+ * bank registers. E822 relies on the ice_get_phy_tx_tstamp_ready() function -+ * to determine which timestamps are valid. Reading a timestamp auto-clears -+ * the valid bit. -+ * -+ * To directly clear the contents of the timestamp block entirely, discarding -+ * all timestamp data at once, software should instead use -+ * ice_ptp_reset_ts_memory_quad_e822(). -+ * -+ * This function should only be called on an idx whose bit is set according to -+ * ice_get_phy_tx_tstamp_ready(). - */ - static int - ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) - { -- u16 lo_addr, hi_addr; -+ u64 unused_tstamp; - int err; - -- lo_addr = (u16)TS_L(Q_REG_TX_MEMORY_BANK_START, idx); -- hi_addr = (u16)TS_H(Q_REG_TX_MEMORY_BANK_START, idx); -- -- err = ice_write_quad_reg_e822(hw, quad, lo_addr, 0); -- if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear low PTP timestamp register, err %d\n", -- err); -- return err; -- } -- -- err = ice_write_quad_reg_e822(hw, quad, hi_addr, 0); -+ err = ice_read_phy_tstamp_e822(hw, quad, idx, &unused_tstamp); - if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear high PTP timestamp register, err %d\n", -- err); -+ ice_debug(hw, ICE_DBG_PTP, "Failed to read the timestamp register for quad %u, idx %u, err %d\n", -+ quad, idx, err); - return err; - } - -@@ -2816,28 +2819,39 @@ ice_read_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp) - * @lport: the lport to read from - * @idx: the timestamp index to reset - * -- * Clear a timestamp, resetting its valid bit, from the timestamp block of the -- * external PHY on the E810 device. -+ * Read the timestamp and then forcibly overwrite its value to clear the valid -+ * bit from the timestamp block of the external PHY on the E810 device. -+ * -+ * This function should only be called on an idx whose bit is set according to -+ * ice_get_phy_tx_tstamp_ready(). - */ - static int ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) - { - u32 lo_addr, hi_addr; -+ u64 unused_tstamp; - int err; - -+ err = ice_read_phy_tstamp_e810(hw, lport, idx, &unused_tstamp); -+ if (err) { -+ ice_debug(hw, ICE_DBG_PTP, "Failed to read the timestamp register for lport %u, idx %u, err %d\n", -+ lport, idx, err); -+ return err; -+ } -+ - lo_addr = TS_EXT(LOW_TX_MEMORY_BANK_START, lport, idx); - hi_addr = TS_EXT(HIGH_TX_MEMORY_BANK_START, lport, idx); - - err = ice_write_phy_reg_e810(hw, lo_addr, 0); - if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear low PTP timestamp register, err %d\n", -- err); -+ ice_debug(hw, ICE_DBG_PTP, "Failed to clear low PTP timestamp register for lport %u, idx %u, err %d\n", -+ lport, idx, err); - return err; - } - - err = ice_write_phy_reg_e810(hw, hi_addr, 0); - if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear high PTP timestamp register, err %d\n", -- err); -+ ice_debug(hw, ICE_DBG_PTP, "Failed to clear high PTP timestamp register for lport %u, idx %u, err %d\n", -+ lport, idx, err); - return err; - } - -@@ -3519,9 +3533,15 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - * @block: the block to read from - * @idx: the timestamp index to reset - * -- * Clear a timestamp, resetting its valid bit, from the timestamp block. For -- * E822 devices, the block is the quad to clear from. For E810 devices, the -- * block is the logical port to clear from. -+ * Clear a timestamp from the timestamp block, discarding its value without -+ * returning it. This resets the memory status bit for the timestamp index -+ * allowing it to be reused for another timestamp in the future. -+ * -+ * For E822 devices, the block number is the PHY quad to clear from. For E810 -+ * devices, the block number is the logical port to clear from. -+ * -+ * This function must only be called on a timestamp index whose valid bit is -+ * set according to ice_get_phy_tx_tstamp_ready(). - */ - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - { --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch b/kernel-rt/debian/patches/ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch deleted file mode 100644 index 2a88fb45..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch +++ /dev/null @@ -1,65 +0,0 @@ -From e2a74a0a7dd399b0ee2ddd4889c609dedb85bfb5 Mon Sep 17 00:00:00 2001 -From: Michal Michalik -Date: Thu, 27 Jul 2023 15:50:35 +0200 -Subject: [PATCH 10/36] ice: Use PTP auxbus for all PHYs restart in E822 - -The E822 (and other devices based on the same PHY) is having issue while -setting the PHC timer - the PHY timers are drifting from the PHC. After -such a set all PHYs need to be restarted and resynchronised - do it -using auxiliary bus. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Michal Michalik -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit af3c5c8748e6d286d4f2dd9800f9d27f29b8e2ef) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 24 +++++++++++++++++++++--- - 1 file changed, 21 insertions(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index b0bba866e8a2..42eb1418eb90 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1496,6 +1496,24 @@ static void ice_ptp_reset_phy_timestamping(struct ice_pf *pf) - ice_ptp_port_phy_restart(&pf->ptp.port); - } - -+/** -+ * ice_ptp_restart_all_phy - Restart all PHYs to recalibrate timestamping -+ * @pf: Board private structure -+ */ -+static void ice_ptp_restart_all_phy(struct ice_pf *pf) -+{ -+ struct list_head *entry; -+ -+ list_for_each(entry, &pf->ptp.ports_owner.ports) { -+ struct ice_ptp_port *port = list_entry(entry, -+ struct ice_ptp_port, -+ list_member); -+ -+ if (port->link_up) -+ ice_ptp_port_phy_restart(port); -+ } -+} -+ - /** - * ice_ptp_adjfine - Adjust clock increment rate - * @info: the driver's PTP info structure -@@ -1933,9 +1951,9 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts) - /* Reenable periodic outputs */ - ice_ptp_enable_all_clkout(pf); - -- /* Recalibrate and re-enable timestamp block */ -- if (pf->ptp.port.link_up) -- ice_ptp_port_phy_restart(&pf->ptp.port); -+ /* Recalibrate and re-enable timestamp blocks for E822/E823 */ -+ if (hw->phy_model == ICE_PHY_E822) -+ ice_ptp_restart_all_phy(pf); - exit: - if (err) { - dev_err(ice_pf_to_dev(pf), "PTP failed to set time %d\n", err); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0011-ice-Rename-E822-to-E82X.patch b/kernel-rt/debian/patches/ice-VDF/0011-ice-Rename-E822-to-E82X.patch deleted file mode 100644 index 5f259989..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0011-ice-Rename-E822-to-E82X.patch +++ /dev/null @@ -1,2177 +0,0 @@ -From ed199ec1c5886cf9830921b9380cf91ee216f26f Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Fri, 1 Dec 2023 10:08:44 -0800 -Subject: [PATCH 11/36] ice: Rename E822 to E82X - -When code is applicable for both E822 and E823 devices, rename it from -E822 to E82X. -ICE_PHY_PER_NAC_E822 was unused, so just remove it. - -Signed-off-by: Karol Kolacinski -Reviewed-by: Przemek Kitszel -Reviewed-by: Simon Horman -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit a39dd252d552ab3212fea55330081ee64a9e5573) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 48 +- - drivers/net/ethernet/intel/ice/ice_ptp.h | 2 +- - .../net/ethernet/intel/ice/ice_ptp_consts.h | 12 +- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 444 +++++++++--------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 48 +- - drivers/net/ethernet/intel/ice/ice_type.h | 7 +- - 6 files changed, 280 insertions(+), 281 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 42eb1418eb90..2e6e1fc84d11 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -7,7 +7,7 @@ - - #define E810_OUT_PROP_DELAY_NS 1 - --#define UNKNOWN_INCVAL_E822 0x100000000ULL -+#define UNKNOWN_INCVAL_E82X 0x100000000ULL - - static const struct ptp_pin_desc ice_pin_desc_e810t[] = { - /* name idx func chan */ -@@ -987,7 +987,7 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - } - - /** -- * ice_ptp_init_tx_e822 - Initialize tracking for Tx timestamps -+ * ice_ptp_init_tx_e82x - Initialize tracking for Tx timestamps - * @pf: Board private structure - * @tx: the Tx tracking structure to initialize - * @port: the port this structure tracks -@@ -998,11 +998,11 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - * registers into chunks based on the port number. - */ - static int --ice_ptp_init_tx_e822(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) -+ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) - { - tx->block = port / ICE_PORTS_PER_QUAD; -- tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E822; -- tx->len = INDEX_PER_PORT_E822; -+ tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; -+ tx->len = INDEX_PER_PORT_E82X; - tx->verify_cached = 0; - - return ice_ptp_alloc_tx_tracker(tx); -@@ -1205,10 +1205,10 @@ static u64 ice_base_incval(struct ice_pf *pf) - - if (ice_is_e810(hw)) - incval = ICE_PTP_NOMINAL_INCVAL_E810; -- else if (ice_e822_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) -- incval = ice_e822_nominal_incval(ice_e822_time_ref(hw)); -+ else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) -+ incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); - else -- incval = UNKNOWN_INCVAL_E822; -+ incval = UNKNOWN_INCVAL_E82X; - - dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", - incval); -@@ -1237,10 +1237,10 @@ static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port) - - /* need to read FIFO state */ - if (offs == 0 || offs == 1) -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_FIFO01_STATUS, -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_FIFO01_STATUS, - &val); - else -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_FIFO23_STATUS, -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_FIFO23_STATUS, - &val); - - if (err) { -@@ -1268,7 +1268,7 @@ static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port) - dev_dbg(ice_pf_to_dev(pf), - "Port %d Tx FIFO still not empty; resetting quad %d\n", - port->port_num, quad); -- ice_ptp_reset_ts_memory_quad_e822(hw, quad); -+ ice_ptp_reset_ts_memory_quad_e82x(hw, quad); - port->tx_fifo_busy_cnt = FIFO_OK; - return 0; - } -@@ -1313,8 +1313,8 @@ static void ice_ptp_wait_for_offsets(struct kthread_work *work) - - tx_err = ice_ptp_check_tx_fifo(port); - if (!tx_err) -- tx_err = ice_phy_cfg_tx_offset_e822(hw, port->port_num); -- rx_err = ice_phy_cfg_rx_offset_e822(hw, port->port_num); -+ tx_err = ice_phy_cfg_tx_offset_e82x(hw, port->port_num); -+ rx_err = ice_phy_cfg_rx_offset_e82x(hw, port->port_num); - if (tx_err || rx_err) { - /* Tx and/or Rx offset not yet configured, try again later */ - kthread_queue_delayed_work(pf->ptp.kworker, -@@ -1343,7 +1343,7 @@ ice_ptp_port_phy_stop(struct ice_ptp_port *ptp_port) - - kthread_cancel_delayed_work_sync(&ptp_port->ov_work); - -- err = ice_stop_phy_timer_e822(hw, port, true); -+ err = ice_stop_phy_timer_e82x(hw, port, true); - if (err) - dev_err(ice_pf_to_dev(pf), "PTP failed to set PHY port %d down, err %d\n", - port, err); -@@ -1386,7 +1386,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - ptp_port->tx_fifo_busy_cnt = 0; - - /* Start the PHY timer in Vernier mode */ -- err = ice_start_phy_timer_e822(hw, port); -+ err = ice_start_phy_timer_e82x(hw, port); - if (err) - goto out_unlock; - -@@ -1435,7 +1435,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - case ICE_PHY_E810: - /* Do not reconfigure E810 PHY */ - return; -- case ICE_PHY_E822: -+ case ICE_PHY_E82X: - ice_ptp_port_phy_restart(ptp_port); - return; - default: -@@ -1461,7 +1461,7 @@ static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) - ice_ptp_reset_ts_memory(hw); - - for (quad = 0; quad < ICE_MAX_QUAD; quad++) { -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, - &val); - if (err) - break; -@@ -1475,7 +1475,7 @@ static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) - val &= ~Q_REG_TX_MEM_GBL_CFG_INTR_ENA_M; - } - -- err = ice_write_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, -+ err = ice_write_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, - val); - if (err) - break; -@@ -1713,7 +1713,7 @@ static int ice_ptp_cfg_clkout(struct ice_pf *pf, unsigned int chan, - if (ice_is_e810(hw)) - start_time -= E810_OUT_PROP_DELAY_NS; - else -- start_time -= ice_e822_pps_delay(ice_e822_time_ref(hw)); -+ start_time -= ice_e82x_pps_delay(ice_e82x_time_ref(hw)); - - /* 2. Write TARGET time */ - wr32(hw, GLTSYN_TGT_L(chan, tmr_idx), lower_32_bits(start_time)); -@@ -1952,7 +1952,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts) - ice_ptp_enable_all_clkout(pf); - - /* Recalibrate and re-enable timestamp blocks for E822/E823 */ -- if (hw->phy_model == ICE_PHY_E822) -+ if (hw->phy_model == ICE_PHY_E82X) - ice_ptp_restart_all_phy(pf); - exit: - if (err) { -@@ -2665,7 +2665,7 @@ void ice_ptp_reset(struct ice_pf *pf) - } else { - kthread_init_delayed_work(&ptp->port.ov_work, - ice_ptp_wait_for_offsets); -- err = ice_ptp_init_tx_e822(pf, &ptp->port.tx, -+ err = ice_ptp_init_tx_e82x(pf, &ptp->port.tx, - ptp->port.port_num); - } - if (err) -@@ -3020,11 +3020,11 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); -- case ICE_PHY_E822: -+ case ICE_PHY_E82X: - kthread_init_delayed_work(&ptp_port->ov_work, - ice_ptp_wait_for_offsets); - -- return ice_ptp_init_tx_e822(pf, &ptp_port->tx, -+ return ice_ptp_init_tx_e82x(pf, &ptp_port->tx, - ptp_port->port_num); - default: - return -ENODEV; -@@ -3111,7 +3111,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf) - static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf) - { - switch (pf->hw.phy_model) { -- case ICE_PHY_E822: -+ case ICE_PHY_E82X: - /* E822 based PHY has the clock owner process the interrupt - * for all ports. - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index d94c22329df0..a3ae008a3539 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -147,7 +147,7 @@ struct ice_ptp_tx { - - /* Quad and port information for initializing timestamp blocks */ - #define INDEX_PER_QUAD 64 --#define INDEX_PER_PORT_E822 16 -+#define INDEX_PER_PORT_E82X 16 - #define INDEX_PER_PORT_E810 64 - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h -index 4109aa3b2fcd..2c4dab0c48ab 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h -@@ -9,17 +9,17 @@ - */ - /* Constants defined for the PTP 1588 clock hardware. */ - --/* struct ice_time_ref_info_e822 -+/* struct ice_time_ref_info_e82x - * - * E822 hardware can use different sources as the reference for the PTP - * hardware clock. Each clock has different characteristics such as a slightly - * different frequency, etc. - * - * This lookup table defines several constants that depend on the current time -- * reference. See the struct ice_time_ref_info_e822 for information about the -+ * reference. See the struct ice_time_ref_info_e82x for information about the - * meaning of each constant. - */ --const struct ice_time_ref_info_e822 e822_time_ref[NUM_ICE_TIME_REF_FREQ] = { -+const struct ice_time_ref_info_e82x e822_time_ref[NUM_ICE_TIME_REF_FREQ] = { - /* ICE_TIME_REF_FREQ_25_000 -> 25 MHz */ - { - /* pll_freq */ -@@ -81,7 +81,7 @@ const struct ice_time_ref_info_e822 e822_time_ref[NUM_ICE_TIME_REF_FREQ] = { - }, - }; - --const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { -+const struct ice_cgu_pll_params_e82x e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { - /* ICE_TIME_REF_FREQ_25_000 -> 25 MHz */ - { - /* refclk_pre_div */ -@@ -155,7 +155,7 @@ const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { - }, - }; - --/* struct ice_vernier_info_e822 -+/* struct ice_vernier_info_e82x - * - * E822 hardware calibrates the delay of the timestamp indication from the - * actual packet transmission or reception during the initialization of the -@@ -168,7 +168,7 @@ const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { - * used by this link speed, and that the register should be cleared by writing - * 0. Other values specify the clock frequency in Hz. - */ --const struct ice_vernier_info_e822 e822_vernier[NUM_ICE_PTP_LNK_SPD] = { -+const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD] = { - /* ICE_PTP_LNK_SPD_1G */ - { - /* tx_par_clk */ -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index cd28430cfdda..7337e7e710ed 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -284,19 +284,19 @@ static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw) - */ - - /** -- * ice_fill_phy_msg_e822 - Fill message data for a PHY register access -+ * ice_fill_phy_msg_e82x - Fill message data for a PHY register access - * @msg: the PHY message buffer to fill in - * @port: the port to access - * @offset: the register offset - */ - static void --ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) -+ice_fill_phy_msg_e82x(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - { - int phy_port, phy, quadtype; - -- phy_port = port % ICE_PORTS_PER_PHY_E822; -- phy = port / ICE_PORTS_PER_PHY_E822; -- quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E822; -+ phy_port = port % ICE_PORTS_PER_PHY_E82X; -+ phy = port / ICE_PORTS_PER_PHY_E82X; -+ quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E82X; - - if (quadtype == 0) { - msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port); -@@ -315,7 +315,7 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - } - - /** -- * ice_is_64b_phy_reg_e822 - Check if this is a 64bit PHY register -+ * ice_is_64b_phy_reg_e82x - Check if this is a 64bit PHY register - * @low_addr: the low address to check - * @high_addr: on return, contains the high address of the 64bit register - * -@@ -323,7 +323,7 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - * represented as two 32bit registers. If it is, return the appropriate high - * register offset to use. - */ --static bool ice_is_64b_phy_reg_e822(u16 low_addr, u16 *high_addr) -+static bool ice_is_64b_phy_reg_e82x(u16 low_addr, u16 *high_addr) - { - switch (low_addr) { - case P_REG_PAR_PCS_TX_OFFSET_L: -@@ -368,7 +368,7 @@ static bool ice_is_64b_phy_reg_e822(u16 low_addr, u16 *high_addr) - } - - /** -- * ice_is_40b_phy_reg_e822 - Check if this is a 40bit PHY register -+ * ice_is_40b_phy_reg_e82x - Check if this is a 40bit PHY register - * @low_addr: the low address to check - * @high_addr: on return, contains the high address of the 40bit value - * -@@ -377,7 +377,7 @@ static bool ice_is_64b_phy_reg_e822(u16 low_addr, u16 *high_addr) - * upper 32 bits in the high register. If it is, return the appropriate high - * register offset to use. - */ --static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr) -+static bool ice_is_40b_phy_reg_e82x(u16 low_addr, u16 *high_addr) - { - switch (low_addr) { - case P_REG_TIMETUS_L: -@@ -413,7 +413,7 @@ static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr) - } - - /** -- * ice_read_phy_reg_e822 - Read a PHY register -+ * ice_read_phy_reg_e82x - Read a PHY register - * @hw: pointer to the HW struct - * @port: PHY port to read from - * @offset: PHY register offset to read -@@ -422,12 +422,12 @@ static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr) - * Read a PHY register for the given port over the device sideband queue. - */ - static int --ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val) -+ice_read_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e822(&msg, port, offset); -+ ice_fill_phy_msg_e82x(&msg, port, offset); - msg.opcode = ice_sbq_msg_rd; - - err = ice_sbq_rw_reg(hw, &msg); -@@ -443,7 +443,7 @@ ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - } - - /** -- * ice_read_64b_phy_reg_e822 - Read a 64bit value from PHY registers -+ * ice_read_64b_phy_reg_e82x - Read a 64bit value from PHY registers - * @hw: pointer to the HW struct - * @port: PHY port to read from - * @low_addr: offset of the lower register to read from -@@ -455,7 +455,7 @@ ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - * known to be two parts of a 64bit value. - */ - static int --ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) -+ice_read_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - { - u32 low, high; - u16 high_addr; -@@ -464,20 +464,20 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - /* Only operate on registers known to be split into two 32bit - * registers. - */ -- if (!ice_is_64b_phy_reg_e822(low_addr, &high_addr)) { -+ if (!ice_is_64b_phy_reg_e82x(low_addr, &high_addr)) { - ice_debug(hw, ICE_DBG_PTP, "Invalid 64b register addr 0x%08x\n", - low_addr); - return -EINVAL; - } - -- err = ice_read_phy_reg_e822(hw, port, low_addr, &low); -+ err = ice_read_phy_reg_e82x(hw, port, low_addr, &low); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read from low register 0x%08x\n, err %d", - low_addr, err); - return err; - } - -- err = ice_read_phy_reg_e822(hw, port, high_addr, &high); -+ err = ice_read_phy_reg_e82x(hw, port, high_addr, &high); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read from high register 0x%08x\n, err %d", - high_addr, err); -@@ -490,7 +490,7 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - } - - /** -- * ice_write_phy_reg_e822 - Write a PHY register -+ * ice_write_phy_reg_e82x - Write a PHY register - * @hw: pointer to the HW struct - * @port: PHY port to write to - * @offset: PHY register offset to write -@@ -499,12 +499,12 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - * Write a PHY register for the given port over the device sideband queue. - */ - static int --ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val) -+ice_write_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e822(&msg, port, offset); -+ ice_fill_phy_msg_e82x(&msg, port, offset); - msg.opcode = ice_sbq_msg_wr; - msg.data = val; - -@@ -519,7 +519,7 @@ ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val) - } - - /** -- * ice_write_40b_phy_reg_e822 - Write a 40b value to the PHY -+ * ice_write_40b_phy_reg_e82x - Write a 40b value to the PHY - * @hw: pointer to the HW struct - * @port: port to write to - * @low_addr: offset of the low register -@@ -529,7 +529,7 @@ ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val) - * it up into two chunks, the lower 8 bits and the upper 32 bits. - */ - static int --ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) -+ice_write_40b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - { - u32 low, high; - u16 high_addr; -@@ -538,7 +538,7 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - /* Only operate on registers known to be split into a lower 8 bit - * register and an upper 32 bit register. - */ -- if (!ice_is_40b_phy_reg_e822(low_addr, &high_addr)) { -+ if (!ice_is_40b_phy_reg_e82x(low_addr, &high_addr)) { - ice_debug(hw, ICE_DBG_PTP, "Invalid 40b register addr 0x%08x\n", - low_addr); - return -EINVAL; -@@ -547,14 +547,14 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - low = (u32)(val & P_REG_40B_LOW_M); - high = (u32)(val >> P_REG_40B_HIGH_S); - -- err = ice_write_phy_reg_e822(hw, port, low_addr, low); -+ err = ice_write_phy_reg_e82x(hw, port, low_addr, low); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to low register 0x%08x\n, err %d", - low_addr, err); - return err; - } - -- err = ice_write_phy_reg_e822(hw, port, high_addr, high); -+ err = ice_write_phy_reg_e82x(hw, port, high_addr, high); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to high register 0x%08x\n, err %d", - high_addr, err); -@@ -565,7 +565,7 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - } - - /** -- * ice_write_64b_phy_reg_e822 - Write a 64bit value to PHY registers -+ * ice_write_64b_phy_reg_e82x - Write a 64bit value to PHY registers - * @hw: pointer to the HW struct - * @port: PHY port to read from - * @low_addr: offset of the lower register to read from -@@ -577,7 +577,7 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - * a 64bit value. - */ - static int --ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) -+ice_write_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - { - u32 low, high; - u16 high_addr; -@@ -586,7 +586,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - /* Only operate on registers known to be split into two 32bit - * registers. - */ -- if (!ice_is_64b_phy_reg_e822(low_addr, &high_addr)) { -+ if (!ice_is_64b_phy_reg_e82x(low_addr, &high_addr)) { - ice_debug(hw, ICE_DBG_PTP, "Invalid 64b register addr 0x%08x\n", - low_addr); - return -EINVAL; -@@ -595,14 +595,14 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - low = lower_32_bits(val); - high = upper_32_bits(val); - -- err = ice_write_phy_reg_e822(hw, port, low_addr, low); -+ err = ice_write_phy_reg_e82x(hw, port, low_addr, low); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to low register 0x%08x\n, err %d", - low_addr, err); - return err; - } - -- err = ice_write_phy_reg_e822(hw, port, high_addr, high); -+ err = ice_write_phy_reg_e82x(hw, port, high_addr, high); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to high register 0x%08x\n, err %d", - high_addr, err); -@@ -613,7 +613,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - } - - /** -- * ice_fill_quad_msg_e822 - Fill message data for quad register access -+ * ice_fill_quad_msg_e82x - Fill message data for quad register access - * @msg: the PHY message buffer to fill in - * @quad: the quad to access - * @offset: the register offset -@@ -622,7 +622,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - * multiple PHYs. - */ - static int --ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) -+ice_fill_quad_msg_e82x(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - { - u32 addr; - -@@ -631,7 +631,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - - msg->dest_dev = rmn_0; - -- if ((quad % ICE_QUADS_PER_PHY_E822) == 0) -+ if ((quad % ICE_QUADS_PER_PHY_E82X) == 0) - addr = Q_0_BASE + offset; - else - addr = Q_1_BASE + offset; -@@ -643,7 +643,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - } - - /** -- * ice_read_quad_reg_e822 - Read a PHY quad register -+ * ice_read_quad_reg_e82x - Read a PHY quad register - * @hw: pointer to the HW struct - * @quad: quad to read from - * @offset: quad register offset to read -@@ -653,12 +653,12 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - * shared between multiple PHYs. - */ - int --ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) -+ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(&msg, quad, offset); - if (err) - return err; - -@@ -677,7 +677,7 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - } - - /** -- * ice_write_quad_reg_e822 - Write a PHY quad register -+ * ice_write_quad_reg_e82x - Write a PHY quad register - * @hw: pointer to the HW struct - * @quad: quad to write to - * @offset: quad register offset to write -@@ -687,12 +687,12 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - * shared between multiple PHYs. - */ - int --ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) -+ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(&msg, quad, offset); - if (err) - return err; - -@@ -710,7 +710,7 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - } - - /** -- * ice_read_phy_tstamp_e822 - Read a PHY timestamp out of the quad block -+ * ice_read_phy_tstamp_e82x - Read a PHY timestamp out of the quad block - * @hw: pointer to the HW struct - * @quad: the quad to read from - * @idx: the timestamp index to read -@@ -721,7 +721,7 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - * family of devices. - */ - static int --ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) -+ice_read_phy_tstamp_e82x(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - { - u16 lo_addr, hi_addr; - u32 lo, hi; -@@ -730,14 +730,14 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - lo_addr = (u16)TS_L(Q_REG_TX_MEMORY_BANK_START, idx); - hi_addr = (u16)TS_H(Q_REG_TX_MEMORY_BANK_START, idx); - -- err = ice_read_quad_reg_e822(hw, quad, lo_addr, &lo); -+ err = ice_read_quad_reg_e82x(hw, quad, lo_addr, &lo); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read low PTP timestamp register, err %d\n", - err); - return err; - } - -- err = ice_read_quad_reg_e822(hw, quad, hi_addr, &hi); -+ err = ice_read_quad_reg_e82x(hw, quad, hi_addr, &hi); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read high PTP timestamp register, err %d\n", - err); -@@ -754,7 +754,7 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - } - - /** -- * ice_clear_phy_tstamp_e822 - Clear a timestamp from the quad block -+ * ice_clear_phy_tstamp_e82x - Clear a timestamp from the quad block - * @hw: pointer to the HW struct - * @quad: the quad to read from - * @idx: the timestamp index to reset -@@ -770,18 +770,18 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - * - * To directly clear the contents of the timestamp block entirely, discarding - * all timestamp data at once, software should instead use -- * ice_ptp_reset_ts_memory_quad_e822(). -+ * ice_ptp_reset_ts_memory_quad_e82x(). - * - * This function should only be called on an idx whose bit is set according to - * ice_get_phy_tx_tstamp_ready(). - */ - static int --ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) -+ice_clear_phy_tstamp_e82x(struct ice_hw *hw, u8 quad, u8 idx) - { - u64 unused_tstamp; - int err; - -- err = ice_read_phy_tstamp_e822(hw, quad, idx, &unused_tstamp); -+ err = ice_read_phy_tstamp_e82x(hw, quad, idx, &unused_tstamp); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read the timestamp register for quad %u, idx %u, err %d\n", - quad, idx, err); -@@ -792,33 +792,33 @@ ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) - } - - /** -- * ice_ptp_reset_ts_memory_quad_e822 - Clear all timestamps from the quad block -+ * ice_ptp_reset_ts_memory_quad_e82x - Clear all timestamps from the quad block - * @hw: pointer to the HW struct - * @quad: the quad to read from - * - * Clear all timestamps from the PHY quad block that is shared between the - * internal PHYs on the E822 devices. - */ --void ice_ptp_reset_ts_memory_quad_e822(struct ice_hw *hw, u8 quad) -+void ice_ptp_reset_ts_memory_quad_e82x(struct ice_hw *hw, u8 quad) - { -- ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, Q_REG_TS_CTRL_M); -- ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, ~(u32)Q_REG_TS_CTRL_M); -+ ice_write_quad_reg_e82x(hw, quad, Q_REG_TS_CTRL, Q_REG_TS_CTRL_M); -+ ice_write_quad_reg_e82x(hw, quad, Q_REG_TS_CTRL, ~(u32)Q_REG_TS_CTRL_M); - } - - /** -- * ice_ptp_reset_ts_memory_e822 - Clear all timestamps from all quad blocks -+ * ice_ptp_reset_ts_memory_e82x - Clear all timestamps from all quad blocks - * @hw: pointer to the HW struct - */ --static void ice_ptp_reset_ts_memory_e822(struct ice_hw *hw) -+static void ice_ptp_reset_ts_memory_e82x(struct ice_hw *hw) - { - unsigned int quad; - - for (quad = 0; quad < ICE_MAX_QUAD; quad++) -- ice_ptp_reset_ts_memory_quad_e822(hw, quad); -+ ice_ptp_reset_ts_memory_quad_e82x(hw, quad); - } - - /** -- * ice_read_cgu_reg_e822 - Read a CGU register -+ * ice_read_cgu_reg_e82x - Read a CGU register - * @hw: pointer to the HW struct - * @addr: Register address to read - * @val: storage for register value read -@@ -827,7 +827,7 @@ static void ice_ptp_reset_ts_memory_e822(struct ice_hw *hw) - * applicable to E822 devices. - */ - static int --ice_read_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 *val) -+ice_read_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 *val) - { - struct ice_sbq_msg_input cgu_msg; - int err; -@@ -850,7 +850,7 @@ ice_read_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 *val) - } - - /** -- * ice_write_cgu_reg_e822 - Write a CGU register -+ * ice_write_cgu_reg_e82x - Write a CGU register - * @hw: pointer to the HW struct - * @addr: Register address to write - * @val: value to write into the register -@@ -859,7 +859,7 @@ ice_read_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 *val) - * applicable to E822 devices. - */ - static int --ice_write_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 val) -+ice_write_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 val) - { - struct ice_sbq_msg_input cgu_msg; - int err; -@@ -925,7 +925,7 @@ static const char *ice_clk_src_str(u8 clk_src) - } - - /** -- * ice_cfg_cgu_pll_e822 - Configure the Clock Generation Unit -+ * ice_cfg_cgu_pll_e82x - Configure the Clock Generation Unit - * @hw: pointer to the HW struct - * @clk_freq: Clock frequency to program - * @clk_src: Clock source to select (TIME_REF, or TCX0) -@@ -934,7 +934,7 @@ static const char *ice_clk_src_str(u8 clk_src) - * time reference, enabling the PLL which drives the PTP hardware clock. - */ - static int --ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, -+ice_cfg_cgu_pll_e82x(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - enum ice_clk_src clk_src) - { - union tspll_ro_bwm_lf bwm_lf; -@@ -963,15 +963,15 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - return -EINVAL; - } - -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD9, &dw9.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &dw9.val); - if (err) - return err; - -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD24, &dw24.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &dw24.val); - if (err) - return err; - -- err = ice_read_cgu_reg_e822(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); -+ err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); - if (err) - return err; - -@@ -986,43 +986,43 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - if (dw24.field.ts_pll_enable) { - dw24.field.ts_pll_enable = 0; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD24, dw24.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val); - if (err) - return err; - } - - /* Set the frequency */ - dw9.field.time_ref_freq_sel = clk_freq; -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD9, dw9.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val); - if (err) - return err; - - /* Configure the TS PLL feedback divisor */ -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD19, &dw19.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD19, &dw19.val); - if (err) - return err; - - dw19.field.tspll_fbdiv_intgr = e822_cgu_params[clk_freq].feedback_div; - dw19.field.tspll_ndivratio = 1; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD19, dw19.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD19, dw19.val); - if (err) - return err; - - /* Configure the TS PLL post divisor */ -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD22, &dw22.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD22, &dw22.val); - if (err) - return err; - - dw22.field.time1588clk_div = e822_cgu_params[clk_freq].post_pll_div; - dw22.field.time1588clk_sel_div2 = 0; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD22, dw22.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD22, dw22.val); - if (err) - return err; - - /* Configure the TS PLL pre divisor and clock source */ -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD24, &dw24.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &dw24.val); - if (err) - return err; - -@@ -1030,21 +1030,21 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - dw24.field.tspll_fbdiv_frac = e822_cgu_params[clk_freq].frac_n_div; - dw24.field.time_ref_sel = clk_src; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD24, dw24.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val); - if (err) - return err; - - /* Finally, enable the PLL */ - dw24.field.ts_pll_enable = 1; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD24, dw24.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val); - if (err) - return err; - - /* Wait to verify if the PLL locks */ - usleep_range(1000, 5000); - -- err = ice_read_cgu_reg_e822(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); -+ err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); - if (err) - return err; - -@@ -1064,18 +1064,18 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - } - - /** -- * ice_init_cgu_e822 - Initialize CGU with settings from firmware -+ * ice_init_cgu_e82x - Initialize CGU with settings from firmware - * @hw: pointer to the HW structure - * - * Initialize the Clock Generation Unit of the E822 device. - */ --static int ice_init_cgu_e822(struct ice_hw *hw) -+static int ice_init_cgu_e82x(struct ice_hw *hw) - { - struct ice_ts_func_info *ts_info = &hw->func_caps.ts_func_info; - union tspll_cntr_bist_settings cntr_bist; - int err; - -- err = ice_read_cgu_reg_e822(hw, TSPLL_CNTR_BIST_SETTINGS, -+ err = ice_read_cgu_reg_e82x(hw, TSPLL_CNTR_BIST_SETTINGS, - &cntr_bist.val); - if (err) - return err; -@@ -1084,7 +1084,7 @@ static int ice_init_cgu_e822(struct ice_hw *hw) - cntr_bist.field.i_plllock_sel_0 = 0; - cntr_bist.field.i_plllock_sel_1 = 0; - -- err = ice_write_cgu_reg_e822(hw, TSPLL_CNTR_BIST_SETTINGS, -+ err = ice_write_cgu_reg_e82x(hw, TSPLL_CNTR_BIST_SETTINGS, - cntr_bist.val); - if (err) - return err; -@@ -1092,7 +1092,7 @@ static int ice_init_cgu_e822(struct ice_hw *hw) - /* Configure the CGU PLL using the parameters from the function - * capabilities. - */ -- err = ice_cfg_cgu_pll_e822(hw, ts_info->time_ref, -+ err = ice_cfg_cgu_pll_e82x(hw, ts_info->time_ref, - (enum ice_clk_src)ts_info->clk_src); - if (err) - return err; -@@ -1113,7 +1113,7 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - int err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_WL, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_WL, - PTP_VERNIER_WL); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to set vernier window length for port %u, err %d\n", -@@ -1126,12 +1126,12 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) - } - - /** -- * ice_ptp_init_phc_e822 - Perform E822 specific PHC initialization -+ * ice_ptp_init_phc_e82x - Perform E822 specific PHC initialization - * @hw: pointer to HW struct - * - * Perform PHC initialization steps specific to E822 devices. - */ --static int ice_ptp_init_phc_e822(struct ice_hw *hw) -+static int ice_ptp_init_phc_e82x(struct ice_hw *hw) - { - int err; - u32 regval; -@@ -1145,7 +1145,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw) - wr32(hw, PF_SB_REM_DEV_CTL, regval); - - /* Initialize the Clock Generation Unit */ -- err = ice_init_cgu_e822(hw); -+ err = ice_init_cgu_e82x(hw); - if (err) - return err; - -@@ -1154,7 +1154,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw) - } - - /** -- * ice_ptp_prep_phy_time_e822 - Prepare PHY port with initial time -+ * ice_ptp_prep_phy_time_e82x - Prepare PHY port with initial time - * @hw: pointer to the HW struct - * @time: Time to initialize the PHY port clocks to - * -@@ -1164,7 +1164,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw) - * units of nominal nanoseconds. - */ - static int --ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) -+ice_ptp_prep_phy_time_e82x(struct ice_hw *hw, u32 time) - { - u64 phy_time; - u8 port; -@@ -1177,14 +1177,14 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) - - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - /* Tx case */ -- err = ice_write_64b_phy_reg_e822(hw, port, -+ err = ice_write_64b_phy_reg_e82x(hw, port, - P_REG_TX_TIMER_INC_PRE_L, - phy_time); - if (err) - goto exit_err; - - /* Rx case */ -- err = ice_write_64b_phy_reg_e822(hw, port, -+ err = ice_write_64b_phy_reg_e82x(hw, port, - P_REG_RX_TIMER_INC_PRE_L, - phy_time); - if (err) -@@ -1201,7 +1201,7 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) - } - - /** -- * ice_ptp_prep_port_adj_e822 - Prepare a single port for time adjust -+ * ice_ptp_prep_port_adj_e82x - Prepare a single port for time adjust - * @hw: pointer to HW struct - * @port: Port number to be programmed - * @time: time in cycles to adjust the port Tx and Rx clocks -@@ -1216,7 +1216,7 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) - * Negative adjustments are supported using 2s complement arithmetic. - */ - static int --ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) -+ice_ptp_prep_port_adj_e82x(struct ice_hw *hw, u8 port, s64 time) - { - u32 l_time, u_time; - int err; -@@ -1225,23 +1225,23 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) - u_time = upper_32_bits(time); - - /* Tx case */ -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_TIMER_INC_PRE_L, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TIMER_INC_PRE_L, - l_time); - if (err) - goto exit_err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_TIMER_INC_PRE_U, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TIMER_INC_PRE_U, - u_time); - if (err) - goto exit_err; - - /* Rx case */ -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_TIMER_INC_PRE_L, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TIMER_INC_PRE_L, - l_time); - if (err) - goto exit_err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_TIMER_INC_PRE_U, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TIMER_INC_PRE_U, - u_time); - if (err) - goto exit_err; -@@ -1255,7 +1255,7 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) - } - - /** -- * ice_ptp_prep_phy_adj_e822 - Prep PHY ports for a time adjustment -+ * ice_ptp_prep_phy_adj_e82x - Prep PHY ports for a time adjustment - * @hw: pointer to HW struct - * @adj: adjustment in nanoseconds - * -@@ -1264,7 +1264,7 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) - * ADJ_TIME or ADJ_TIME_AT_TIME sync command. - */ - static int --ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) -+ice_ptp_prep_phy_adj_e82x(struct ice_hw *hw, s32 adj) - { - s64 cycles; - u8 port; -@@ -1281,7 +1281,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - int err; - -- err = ice_ptp_prep_port_adj_e822(hw, port, cycles); -+ err = ice_ptp_prep_port_adj_e82x(hw, port, cycles); - if (err) - return err; - } -@@ -1290,7 +1290,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) - } - - /** -- * ice_ptp_prep_phy_incval_e822 - Prepare PHY ports for time adjustment -+ * ice_ptp_prep_phy_incval_e82x - Prepare PHY ports for time adjustment - * @hw: pointer to HW struct - * @incval: new increment value to prepare - * -@@ -1299,13 +1299,13 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) - * issuing an INIT_INCVAL command. - */ - static int --ice_ptp_prep_phy_incval_e822(struct ice_hw *hw, u64 incval) -+ice_ptp_prep_phy_incval_e82x(struct ice_hw *hw, u64 incval) - { - int err; - u8 port; - - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_TIMETUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_TIMETUS_L, - incval); - if (err) - goto exit_err; -@@ -1337,7 +1337,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - int err; - - /* Tx case */ -- err = ice_read_64b_phy_reg_e822(hw, port, P_REG_TX_CAPTURE_L, tx_ts); -+ err = ice_read_64b_phy_reg_e82x(hw, port, P_REG_TX_CAPTURE_L, tx_ts); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read REG_TX_CAPTURE, err %d\n", - err); -@@ -1348,7 +1348,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - (unsigned long long)*tx_ts); - - /* Rx case */ -- err = ice_read_64b_phy_reg_e822(hw, port, P_REG_RX_CAPTURE_L, rx_ts); -+ err = ice_read_64b_phy_reg_e82x(hw, port, P_REG_RX_CAPTURE_L, rx_ts); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_CAPTURE, err %d\n", - err); -@@ -1362,7 +1362,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - } - - /** -- * ice_ptp_write_port_cmd_e822 - Prepare a single PHY port for a timer command -+ * ice_ptp_write_port_cmd_e82x - Prepare a single PHY port for a timer command - * @hw: pointer to HW struct - * @port: Port to which cmd has to be sent - * @cmd: Command to be sent to the port -@@ -1372,8 +1372,8 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - * Do not use this function directly. If you want to configure exactly one - * port, use ice_ptp_one_port_cmd() instead. - */ --static int --ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd) -+static int ice_ptp_write_port_cmd_e82x(struct ice_hw *hw, u8 port, -+ enum ice_ptp_tmr_cmd cmd) - { - u32 cmd_val, val; - u8 tmr_idx; -@@ -1403,7 +1403,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - - /* Tx case */ - /* Read, modify, write */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_TX_TMR_CMD, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_TX_TMR_CMD, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_TMR_CMD, err %d\n", - err); -@@ -1414,7 +1414,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - val &= ~TS_CMD_MASK; - val |= cmd_val; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_TMR_CMD, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TMR_CMD, val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write back TX_TMR_CMD, err %d\n", - err); -@@ -1423,7 +1423,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - - /* Rx case */ - /* Read, modify, write */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_TMR_CMD, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_TMR_CMD, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_TMR_CMD, err %d\n", - err); -@@ -1434,7 +1434,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - val &= ~TS_CMD_MASK; - val |= cmd_val; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_TMR_CMD, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TMR_CMD, val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write back RX_TMR_CMD, err %d\n", - err); -@@ -1469,7 +1469,7 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - else - cmd = ICE_PTP_NOP; - -- err = ice_ptp_write_port_cmd_e822(hw, port, cmd); -+ err = ice_ptp_write_port_cmd_e82x(hw, port, cmd); - if (err) - return err; - } -@@ -1478,7 +1478,7 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - } - - /** -- * ice_ptp_port_cmd_e822 - Prepare all ports for a timer command -+ * ice_ptp_port_cmd_e82x - Prepare all ports for a timer command - * @hw: pointer to the HW struct - * @cmd: timer command to prepare - * -@@ -1486,14 +1486,14 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - * command. - */ - static int --ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) -+ice_ptp_port_cmd_e82x(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - { - u8 port; - - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - int err; - -- err = ice_ptp_write_port_cmd_e822(hw, port, cmd); -+ err = ice_ptp_write_port_cmd_e82x(hw, port, cmd); - if (err) - return err; - } -@@ -1509,7 +1509,7 @@ ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - */ - - /** -- * ice_phy_get_speed_and_fec_e822 - Get link speed and FEC based on serdes mode -+ * ice_phy_get_speed_and_fec_e82x - Get link speed and FEC based on serdes mode - * @hw: pointer to HW struct - * @port: the port to read from - * @link_out: if non-NULL, holds link speed on success -@@ -1519,7 +1519,7 @@ ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - * algorithm. - */ - static int --ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port, -+ice_phy_get_speed_and_fec_e82x(struct ice_hw *hw, u8 port, - enum ice_ptp_link_spd *link_out, - enum ice_ptp_fec_mode *fec_out) - { -@@ -1528,7 +1528,7 @@ ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port, - u32 serdes; - int err; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_LINK_SPEED, &serdes); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_LINK_SPEED, &serdes); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read serdes info\n"); - return err; -@@ -1585,18 +1585,18 @@ ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port, - } - - /** -- * ice_phy_cfg_lane_e822 - Configure PHY quad for single/multi-lane timestamp -+ * ice_phy_cfg_lane_e82x - Configure PHY quad for single/multi-lane timestamp - * @hw: pointer to HW struct - * @port: to configure the quad for - */ --static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) -+static void ice_phy_cfg_lane_e82x(struct ice_hw *hw, u8 port) - { - enum ice_ptp_link_spd link_spd; - int err; - u32 val; - u8 quad; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, NULL); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, NULL); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to get PHY link speed, err %d\n", - err); -@@ -1605,7 +1605,7 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - - quad = port / ICE_PORTS_PER_QUAD; - -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val); -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_MEM_GLB_CFG, err %d\n", - err); -@@ -1617,7 +1617,7 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - else - val |= Q_REG_TX_MEM_GBL_CFG_LANE_TYPE_M; - -- err = ice_write_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, val); -+ err = ice_write_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write back TX_MEM_GBL_CFG, err %d\n", - err); -@@ -1626,7 +1626,7 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_phy_cfg_uix_e822 - Configure Serdes UI to TU conversion for E822 -+ * ice_phy_cfg_uix_e82x - Configure Serdes UI to TU conversion for E822 - * @hw: pointer to the HW structure - * @port: the port to configure - * -@@ -1671,12 +1671,12 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - * a divide by 390,625,000. This does lose some precision, but avoids - * miscalculation due to arithmetic overflow. - */ --static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) -+static int ice_phy_cfg_uix_e82x(struct ice_hw *hw, u8 port) - { - u64 cur_freq, clk_incval, tu_per_sec, uix; - int err; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second divided by 256 */ -@@ -1688,7 +1688,7 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - /* Program the 10Gb/40Gb conversion ratio */ - uix = div_u64(tu_per_sec * LINE_UI_10G_40G, 390625000); - -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_UIX66_10G_40G_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_UIX66_10G_40G_L, - uix); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write UIX66_10G_40G, err %d\n", -@@ -1699,7 +1699,7 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - /* Program the 25Gb/100Gb conversion ratio */ - uix = div_u64(tu_per_sec * LINE_UI_25G_100G, 390625000); - -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_UIX66_25G_100G_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_UIX66_25G_100G_L, - uix); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write UIX66_25G_100G, err %d\n", -@@ -1711,7 +1711,7 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_phy_cfg_parpcs_e822 - Configure TUs per PAR/PCS clock cycle -+ * ice_phy_cfg_parpcs_e82x - Configure TUs per PAR/PCS clock cycle - * @hw: pointer to the HW struct - * @port: port to configure - * -@@ -1753,18 +1753,18 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - * frequency is ~29 bits, so multiplying them together should fit within the - * 64 bit arithmetic. - */ --static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) -+static int ice_phy_cfg_parpcs_e82x(struct ice_hw *hw, u8 port) - { - u64 cur_freq, clk_incval, tu_per_sec, phy_tus; - enum ice_ptp_link_spd link_spd; - enum ice_ptp_fec_mode fec_mode; - int err; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, &fec_mode); - if (err) - return err; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per cycle of the PHC clock */ -@@ -1784,7 +1784,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PAR_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PAR_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1796,7 +1796,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PAR_RX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PAR_RX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1808,7 +1808,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PCS_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PCS_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1820,7 +1820,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PCS_RX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PCS_RX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1832,7 +1832,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PAR_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PAR_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1844,7 +1844,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PAR_RX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PAR_RX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1856,7 +1856,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PCS_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PCS_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1868,23 +1868,23 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- return ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PCS_RX_TUS_L, -+ return ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PCS_RX_TUS_L, - phy_tus); - } - - /** -- * ice_calc_fixed_tx_offset_e822 - Calculated Fixed Tx offset for a port -+ * ice_calc_fixed_tx_offset_e82x - Calculated Fixed Tx offset for a port - * @hw: pointer to the HW struct - * @link_spd: the Link speed to calculate for - * - * Calculate the fixed offset due to known static latency data. - */ - static u64 --ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) -+ice_calc_fixed_tx_offset_e82x(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - { - u64 cur_freq, clk_incval, tu_per_sec, fixed_offset; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second */ -@@ -1904,7 +1904,7 @@ ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - } - - /** -- * ice_phy_cfg_tx_offset_e822 - Configure total Tx timestamp offset -+ * ice_phy_cfg_tx_offset_e82x - Configure total Tx timestamp offset - * @hw: pointer to the HW struct - * @port: the PHY port to configure - * -@@ -1926,7 +1926,7 @@ ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - * Returns zero on success, -EBUSY if the hardware vernier offset - * calibration has not completed, or another error code on failure. - */ --int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) -+int ice_phy_cfg_tx_offset_e82x(struct ice_hw *hw, u8 port) - { - enum ice_ptp_link_spd link_spd; - enum ice_ptp_fec_mode fec_mode; -@@ -1935,7 +1935,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - u32 reg; - - /* Nothing to do if we've already programmed the offset */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_TX_OR, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_TX_OR, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_OR for port %u, err %d\n", - port, err); -@@ -1945,7 +1945,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - if (reg) - return 0; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_TX_OV_STATUS, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_TX_OV_STATUS, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_OV_STATUS for port %u, err %d\n", - port, err); -@@ -1955,11 +1955,11 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - if (!(reg & P_REG_TX_OV_STATUS_OV_M)) - return -EBUSY; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, &fec_mode); - if (err) - return err; - -- total_offset = ice_calc_fixed_tx_offset_e822(hw, link_spd); -+ total_offset = ice_calc_fixed_tx_offset_e82x(hw, link_spd); - - /* Read the first Vernier offset from the PHY register and add it to - * the total offset. -@@ -1970,7 +1970,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - link_spd == ICE_PTP_LNK_SPD_25G_RS || - link_spd == ICE_PTP_LNK_SPD_40G || - link_spd == ICE_PTP_LNK_SPD_50G) { -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_PCS_TX_OFFSET_L, - &val); - if (err) -@@ -1985,7 +1985,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - */ - if (link_spd == ICE_PTP_LNK_SPD_50G_RS || - link_spd == ICE_PTP_LNK_SPD_100G_RS) { -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_TX_TIME_L, - &val); - if (err) -@@ -1998,12 +1998,12 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - * PHY and indicate that the Tx offset is ready. After this, - * timestamps will be enabled. - */ -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_TOTAL_TX_OFFSET_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_TOTAL_TX_OFFSET_L, - total_offset); - if (err) - return err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_OR, 1); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 1); - if (err) - return err; - -@@ -2014,7 +2014,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_phy_calc_pmd_adj_e822 - Calculate PMD adjustment for Rx -+ * ice_phy_calc_pmd_adj_e82x - Calculate PMD adjustment for Rx - * @hw: pointer to the HW struct - * @port: the PHY port to adjust for - * @link_spd: the current link speed of the PHY -@@ -2026,7 +2026,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - * various delays caused when receiving a packet. - */ - static int --ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, -+ice_phy_calc_pmd_adj_e82x(struct ice_hw *hw, u8 port, - enum ice_ptp_link_spd link_spd, - enum ice_ptp_fec_mode fec_mode, u64 *pmd_adj) - { -@@ -2035,7 +2035,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - u32 val; - int err; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_PMD_ALIGNMENT, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_PMD_ALIGNMENT, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read PMD alignment, err %d\n", - err); -@@ -2044,7 +2044,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - - pmd_align = (u8)val; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second */ -@@ -2123,7 +2123,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - u64 cycle_adj; - u8 rx_cycle; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_40_TO_160_CNT, -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_40_TO_160_CNT, - &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read 25G-RS Rx cycle count, err %d\n", -@@ -2145,7 +2145,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - u64 cycle_adj; - u8 rx_cycle; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_80_TO_160_CNT, -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_80_TO_160_CNT, - &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read 50G-RS Rx cycle count, err %d\n", -@@ -2172,18 +2172,18 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - } - - /** -- * ice_calc_fixed_rx_offset_e822 - Calculated the fixed Rx offset for a port -+ * ice_calc_fixed_rx_offset_e82x - Calculated the fixed Rx offset for a port - * @hw: pointer to HW struct - * @link_spd: The Link speed to calculate for - * - * Determine the fixed Rx latency for a given link speed. - */ - static u64 --ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) -+ice_calc_fixed_rx_offset_e82x(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - { - u64 cur_freq, clk_incval, tu_per_sec, fixed_offset; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second */ -@@ -2203,7 +2203,7 @@ ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - } - - /** -- * ice_phy_cfg_rx_offset_e822 - Configure total Rx timestamp offset -+ * ice_phy_cfg_rx_offset_e82x - Configure total Rx timestamp offset - * @hw: pointer to the HW struct - * @port: the PHY port to configure - * -@@ -2229,7 +2229,7 @@ ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - * Returns zero on success, -EBUSY if the hardware vernier offset - * calibration has not completed, or another error code on failure. - */ --int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) -+int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 port) - { - enum ice_ptp_link_spd link_spd; - enum ice_ptp_fec_mode fec_mode; -@@ -2238,7 +2238,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - u32 reg; - - /* Nothing to do if we've already programmed the offset */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_OR, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_OR, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_OR for port %u, err %d\n", - port, err); -@@ -2248,7 +2248,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - if (reg) - return 0; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_OV_STATUS, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_OV_STATUS, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_OV_STATUS for port %u, err %d\n", - port, err); -@@ -2258,16 +2258,16 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - if (!(reg & P_REG_RX_OV_STATUS_OV_M)) - return -EBUSY; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, &fec_mode); - if (err) - return err; - -- total_offset = ice_calc_fixed_rx_offset_e822(hw, link_spd); -+ total_offset = ice_calc_fixed_rx_offset_e82x(hw, link_spd); - - /* Read the first Vernier offset from the PHY register and add it to - * the total offset. - */ -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_PCS_RX_OFFSET_L, - &val); - if (err) -@@ -2282,7 +2282,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - link_spd == ICE_PTP_LNK_SPD_50G || - link_spd == ICE_PTP_LNK_SPD_50G_RS || - link_spd == ICE_PTP_LNK_SPD_100G_RS) { -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_RX_TIME_L, - &val); - if (err) -@@ -2292,7 +2292,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - } - - /* In addition, Rx must account for the PMD alignment */ -- err = ice_phy_calc_pmd_adj_e822(hw, port, link_spd, fec_mode, &pmd); -+ err = ice_phy_calc_pmd_adj_e82x(hw, port, link_spd, fec_mode, &pmd); - if (err) - return err; - -@@ -2308,12 +2308,12 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - * PHY and indicate that the Rx offset is ready. After this, - * timestamps will be enabled. - */ -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_TOTAL_RX_OFFSET_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_TOTAL_RX_OFFSET_L, - total_offset); - if (err) - return err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_OR, 1); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 1); - if (err) - return err; - -@@ -2324,7 +2324,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_read_phy_and_phc_time_e822 - Simultaneously capture PHC and PHY time -+ * ice_read_phy_and_phc_time_e82x - Simultaneously capture PHC and PHY time - * @hw: pointer to the HW struct - * @port: the PHY port to read - * @phy_time: on return, the 64bit PHY timer value -@@ -2334,7 +2334,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - * timer values. - */ - static int --ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time, -+ice_read_phy_and_phc_time_e82x(struct ice_hw *hw, u8 port, u64 *phy_time, - u64 *phc_time) - { - u64 tx_time, rx_time; -@@ -2381,7 +2381,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time, - } - - /** -- * ice_sync_phy_timer_e822 - Synchronize the PHY timer with PHC timer -+ * ice_sync_phy_timer_e82x - Synchronize the PHY timer with PHC timer - * @hw: pointer to the HW struct - * @port: the PHY port to synchronize - * -@@ -2391,7 +2391,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time, - * calculate an appropriate 2s complement addition to add to the PHY timer in - * order to ensure it reads the same value as the primary PHC timer. - */ --static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) -+static int ice_sync_phy_timer_e82x(struct ice_hw *hw, u8 port) - { - u64 phc_time, phy_time, difference; - int err; -@@ -2401,7 +2401,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - return -EBUSY; - } - -- err = ice_read_phy_and_phc_time_e822(hw, port, &phy_time, &phc_time); -+ err = ice_read_phy_and_phc_time_e82x(hw, port, &phy_time, &phc_time); - if (err) - goto err_unlock; - -@@ -2415,7 +2415,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - */ - difference = phc_time - phy_time; - -- err = ice_ptp_prep_port_adj_e822(hw, port, (s64)difference); -+ err = ice_ptp_prep_port_adj_e82x(hw, port, (s64)difference); - if (err) - goto err_unlock; - -@@ -2432,7 +2432,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - /* Re-capture the timer values to flush the command registers and - * verify that the time was properly adjusted. - */ -- err = ice_read_phy_and_phc_time_e822(hw, port, &phy_time, &phc_time); -+ err = ice_read_phy_and_phc_time_e82x(hw, port, &phy_time, &phc_time); - if (err) - goto err_unlock; - -@@ -2451,7 +2451,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_stop_phy_timer_e822 - Stop the PHY clock timer -+ * ice_stop_phy_timer_e82x - Stop the PHY clock timer - * @hw: pointer to the HW struct - * @port: the PHY port to stop - * @soft_reset: if true, hold the SOFT_RESET bit of P_REG_PS -@@ -2461,36 +2461,36 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - * initialized or when link speed changes. - */ - int --ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) -+ice_stop_phy_timer_e82x(struct ice_hw *hw, u8 port, bool soft_reset) - { - int err; - u32 val; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_OR, 0); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 0); - if (err) - return err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_OR, 0); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 0); - if (err) - return err; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_PS, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_PS, &val); - if (err) - return err; - - val &= ~P_REG_PS_START_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val &= ~P_REG_PS_ENA_CLK_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - if (soft_reset) { - val |= P_REG_PS_SFT_RESET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - } -@@ -2501,7 +2501,7 @@ ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) - } - - /** -- * ice_start_phy_timer_e822 - Start the PHY clock timer -+ * ice_start_phy_timer_e82x - Start the PHY clock timer - * @hw: pointer to the HW struct - * @port: the PHY port to start - * -@@ -2511,7 +2511,7 @@ ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) - * - * Hardware will take Vernier measurements on Tx or Rx of packets. - */ --int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) -+int ice_start_phy_timer_e82x(struct ice_hw *hw, u8 port) - { - u32 lo, hi, val; - u64 incval; -@@ -2520,17 +2520,17 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - - tmr_idx = ice_get_ptp_src_clock_index(hw); - -- err = ice_stop_phy_timer_e822(hw, port, false); -+ err = ice_stop_phy_timer_e82x(hw, port, false); - if (err) - return err; - -- ice_phy_cfg_lane_e822(hw, port); -+ ice_phy_cfg_lane_e82x(hw, port); - -- err = ice_phy_cfg_uix_e822(hw, port); -+ err = ice_phy_cfg_uix_e82x(hw, port); - if (err) - return err; - -- err = ice_phy_cfg_parpcs_e822(hw, port); -+ err = ice_phy_cfg_parpcs_e82x(hw, port); - if (err) - return err; - -@@ -2538,7 +2538,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - hi = rd32(hw, GLTSYN_INCVAL_H(tmr_idx)); - incval = (u64)hi << 32 | lo; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_TIMETUS_L, incval); -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_TIMETUS_L, incval); - if (err) - return err; - -@@ -2551,22 +2551,22 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - - ice_ptp_exec_tmr_cmd(hw); - -- err = ice_read_phy_reg_e822(hw, port, P_REG_PS, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_PS, &val); - if (err) - return err; - - val |= P_REG_PS_SFT_RESET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val |= P_REG_PS_START_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val &= ~P_REG_PS_SFT_RESET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - -@@ -2577,18 +2577,18 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - ice_ptp_exec_tmr_cmd(hw); - - val |= P_REG_PS_ENA_CLK_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val |= P_REG_PS_LOAD_OFFSET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - ice_ptp_exec_tmr_cmd(hw); - -- err = ice_sync_phy_timer_e822(hw, port); -+ err = ice_sync_phy_timer_e82x(hw, port); - if (err) - return err; - -@@ -2598,7 +2598,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_get_phy_tx_tstamp_ready_e822 - Read Tx memory status register -+ * ice_get_phy_tx_tstamp_ready_e82x - Read Tx memory status register - * @hw: pointer to the HW struct - * @quad: the timestamp quad to read from - * @tstamp_ready: contents of the Tx memory status register -@@ -2608,19 +2608,19 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - * ready to be captured from the PHY timestamp block. - */ - static int --ice_get_phy_tx_tstamp_ready_e822(struct ice_hw *hw, u8 quad, u64 *tstamp_ready) -+ice_get_phy_tx_tstamp_ready_e82x(struct ice_hw *hw, u8 quad, u64 *tstamp_ready) - { - u32 hi, lo; - int err; - -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEMORY_STATUS_U, &hi); -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEMORY_STATUS_U, &hi); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_MEMORY_STATUS_U for quad %u, err %d\n", - quad, err); - return err; - } - -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEMORY_STATUS_L, &lo); -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEMORY_STATUS_L, &lo); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_MEMORY_STATUS_L for quad %u, err %d\n", - quad, err); -@@ -3306,7 +3306,7 @@ void ice_ptp_init_phy_model(struct ice_hw *hw) - if (ice_is_e810(hw)) - hw->phy_model = ICE_PHY_E810; - else -- hw->phy_model = ICE_PHY_E822; -+ hw->phy_model = ICE_PHY_E82X; - } - - /** -@@ -3331,8 +3331,8 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - case ICE_PHY_E810: - err = ice_ptp_port_cmd_e810(hw, cmd); - break; -- case ICE_PHY_E822: -- err = ice_ptp_port_cmd_e822(hw, cmd); -+ case ICE_PHY_E82X: -+ err = ice_ptp_port_cmd_e82x(hw, cmd); - break; - default: - err = -EOPNOTSUPP; -@@ -3383,8 +3383,8 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time) - case ICE_PHY_E810: - err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF); - break; -- case ICE_PHY_E822: -- err = ice_ptp_prep_phy_time_e822(hw, time & 0xFFFFFFFF); -+ case ICE_PHY_E82X: -+ err = ice_ptp_prep_phy_time_e82x(hw, time & 0xFFFFFFFF); - break; - default: - err = -EOPNOTSUPP; -@@ -3425,8 +3425,8 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval) - case ICE_PHY_E810: - err = ice_ptp_prep_phy_incval_e810(hw, incval); - break; -- case ICE_PHY_E822: -- err = ice_ptp_prep_phy_incval_e822(hw, incval); -+ case ICE_PHY_E82X: -+ err = ice_ptp_prep_phy_incval_e82x(hw, incval); - break; - default: - err = -EOPNOTSUPP; -@@ -3491,8 +3491,8 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - case ICE_PHY_E810: - err = ice_ptp_prep_phy_adj_e810(hw, adj); - break; -- case ICE_PHY_E822: -- err = ice_ptp_prep_phy_adj_e822(hw, adj); -+ case ICE_PHY_E82X: -+ err = ice_ptp_prep_phy_adj_e82x(hw, adj); - break; - default: - err = -EOPNOTSUPP; -@@ -3520,8 +3520,8 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_read_phy_tstamp_e810(hw, block, idx, tstamp); -- case ICE_PHY_E822: -- return ice_read_phy_tstamp_e822(hw, block, idx, tstamp); -+ case ICE_PHY_E82X: -+ return ice_read_phy_tstamp_e82x(hw, block, idx, tstamp); - default: - return -EOPNOTSUPP; - } -@@ -3548,8 +3548,8 @@ int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_clear_phy_tstamp_e810(hw, block, idx); -- case ICE_PHY_E822: -- return ice_clear_phy_tstamp_e822(hw, block, idx); -+ case ICE_PHY_E82X: -+ return ice_clear_phy_tstamp_e82x(hw, block, idx); - default: - return -EOPNOTSUPP; - } -@@ -3607,8 +3607,8 @@ int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) - void ice_ptp_reset_ts_memory(struct ice_hw *hw) - { - switch (hw->phy_model) { -- case ICE_PHY_E822: -- ice_ptp_reset_ts_memory_e822(hw); -+ case ICE_PHY_E82X: -+ ice_ptp_reset_ts_memory_e82x(hw); - break; - case ICE_PHY_E810: - default: -@@ -3635,8 +3635,8 @@ int ice_ptp_init_phc(struct ice_hw *hw) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_phc_e810(hw); -- case ICE_PHY_E822: -- return ice_ptp_init_phc_e822(hw); -+ case ICE_PHY_E82X: -+ return ice_ptp_init_phc_e82x(hw); - default: - return -EOPNOTSUPP; - } -@@ -3659,8 +3659,8 @@ int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - case ICE_PHY_E810: - return ice_get_phy_tx_tstamp_ready_e810(hw, block, - tstamp_ready); -- case ICE_PHY_E822: -- return ice_get_phy_tx_tstamp_ready_e822(hw, block, -+ case ICE_PHY_E82X: -+ return ice_get_phy_tx_tstamp_ready_e82x(hw, block, - tstamp_ready); - break; - default: -@@ -3941,7 +3941,7 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) - case ICE_DEV_ID_E823C_QSFP: - case ICE_DEV_ID_E823C_SFP: - case ICE_DEV_ID_E823C_SGMII: -- *pin_num = ICE_E822_RCLK_PINS_NUM; -+ *pin_num = ICE_E82X_RCLK_PINS_NUM; - ret = 0; - if (hw->cgu_part_number == - ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032) -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 9dc30918f044..0cc285614c72 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -42,7 +42,7 @@ enum ice_ptp_fec_mode { - }; - - /** -- * struct ice_time_ref_info_e822 -+ * struct ice_time_ref_info_e82x - * @pll_freq: Frequency of PLL that drives timer ticks in Hz - * @nominal_incval: increment to generate nanoseconds in GLTSYN_TIME_L - * @pps_delay: propagation delay of the PPS output signal -@@ -50,14 +50,14 @@ enum ice_ptp_fec_mode { - * Characteristic information for the various TIME_REF sources possible in the - * E822 devices - */ --struct ice_time_ref_info_e822 { -+struct ice_time_ref_info_e82x { - u64 pll_freq; - u64 nominal_incval; - u8 pps_delay; - }; - - /** -- * struct ice_vernier_info_e822 -+ * struct ice_vernier_info_e82x - * @tx_par_clk: Frequency used to calculate P_REG_PAR_TX_TUS - * @rx_par_clk: Frequency used to calculate P_REG_PAR_RX_TUS - * @tx_pcs_clk: Frequency used to calculate P_REG_PCS_TX_TUS -@@ -80,7 +80,7 @@ struct ice_time_ref_info_e822 { - * different link speeds, either the deskew marker for multi-lane link speeds - * or the Reed Solomon gearbox marker for RS-FEC. - */ --struct ice_vernier_info_e822 { -+struct ice_vernier_info_e82x { - u32 tx_par_clk; - u32 rx_par_clk; - u32 tx_pcs_clk; -@@ -95,7 +95,7 @@ struct ice_vernier_info_e822 { - }; - - /** -- * struct ice_cgu_pll_params_e822 -+ * struct ice_cgu_pll_params_e82x - * @refclk_pre_div: Reference clock pre-divisor - * @feedback_div: Feedback divisor - * @frac_n_div: Fractional divisor -@@ -104,7 +104,7 @@ struct ice_vernier_info_e822 { - * Clock Generation Unit parameters used to program the PLL based on the - * selected TIME_REF frequency. - */ --struct ice_cgu_pll_params_e822 { -+struct ice_cgu_pll_params_e82x { - u32 refclk_pre_div; - u32 feedback_div; - u32 frac_n_div; -@@ -124,7 +124,7 @@ enum ice_phy_rclk_pins { - }; - - #define ICE_E810_RCLK_PINS_NUM (ICE_RCLKB_PIN + 1) --#define ICE_E822_RCLK_PINS_NUM (ICE_RCLKA_PIN + 1) -+#define ICE_E82X_RCLK_PINS_NUM (ICE_RCLKA_PIN + 1) - #define E810T_CGU_INPUT_C827(_phy, _pin) ((_phy) * ICE_E810_RCLK_PINS_NUM + \ - (_pin) + ZL_REF1P) - -@@ -183,16 +183,16 @@ struct ice_cgu_pin_desc { - }; - - extern const struct --ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ]; -+ice_cgu_pll_params_e82x e822_cgu_params[NUM_ICE_TIME_REF_FREQ]; - - #define E810C_QSFP_C827_0_HANDLE 2 - #define E810C_QSFP_C827_1_HANDLE 3 - - /* Table of constants related to possible TIME_REF sources */ --extern const struct ice_time_ref_info_e822 e822_time_ref[NUM_ICE_TIME_REF_FREQ]; -+extern const struct ice_time_ref_info_e82x e822_time_ref[NUM_ICE_TIME_REF_FREQ]; - - /* Table of constants for Vernier calibration on E822 */ --extern const struct ice_vernier_info_e822 e822_vernier[NUM_ICE_PTP_LNK_SPD]; -+extern const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD]; - - /* Increment value to generate nanoseconds in the GLTSYN_TIME_L register for - * the E810 devices. Based off of a PLL with an 812.5 MHz frequency. -@@ -214,23 +214,23 @@ int ice_ptp_init_phc(struct ice_hw *hw); - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready); - - /* E822 family functions */ --int ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val); --int ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val); --void ice_ptp_reset_ts_memory_quad_e822(struct ice_hw *hw, u8 quad); -+int ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val); -+int ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val); -+void ice_ptp_reset_ts_memory_quad_e82x(struct ice_hw *hw, u8 quad); - - /** -- * ice_e822_time_ref - Get the current TIME_REF from capabilities -+ * ice_e82x_time_ref - Get the current TIME_REF from capabilities - * @hw: pointer to the HW structure - * - * Returns the current TIME_REF from the capabilities structure. - */ --static inline enum ice_time_ref_freq ice_e822_time_ref(struct ice_hw *hw) -+static inline enum ice_time_ref_freq ice_e82x_time_ref(struct ice_hw *hw) - { - return hw->func_caps.ts_func_info.time_ref; - } - - /** -- * ice_set_e822_time_ref - Set new TIME_REF -+ * ice_set_e82x_time_ref - Set new TIME_REF - * @hw: pointer to the HW structure - * @time_ref: new TIME_REF to set - * -@@ -238,31 +238,31 @@ static inline enum ice_time_ref_freq ice_e822_time_ref(struct ice_hw *hw) - * change, such as an update to the CGU registers. - */ - static inline void --ice_set_e822_time_ref(struct ice_hw *hw, enum ice_time_ref_freq time_ref) -+ice_set_e82x_time_ref(struct ice_hw *hw, enum ice_time_ref_freq time_ref) - { - hw->func_caps.ts_func_info.time_ref = time_ref; - } - --static inline u64 ice_e822_pll_freq(enum ice_time_ref_freq time_ref) -+static inline u64 ice_e82x_pll_freq(enum ice_time_ref_freq time_ref) - { - return e822_time_ref[time_ref].pll_freq; - } - --static inline u64 ice_e822_nominal_incval(enum ice_time_ref_freq time_ref) -+static inline u64 ice_e82x_nominal_incval(enum ice_time_ref_freq time_ref) - { - return e822_time_ref[time_ref].nominal_incval; - } - --static inline u64 ice_e822_pps_delay(enum ice_time_ref_freq time_ref) -+static inline u64 ice_e82x_pps_delay(enum ice_time_ref_freq time_ref) - { - return e822_time_ref[time_ref].pps_delay; - } - - /* E822 Vernier calibration functions */ --int ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset); --int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port); --int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port); --int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port); -+int ice_stop_phy_timer_e82x(struct ice_hw *hw, u8 port, bool soft_reset); -+int ice_start_phy_timer_e82x(struct ice_hw *hw, u8 port); -+int ice_phy_cfg_tx_offset_e82x(struct ice_hw *hw, u8 port); -+int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 port); - - /* E810 family functions */ - int ice_ptp_init_phy_e810(struct ice_hw *hw); -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index bb5d8b681bc2..f8b658386552 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -826,7 +826,7 @@ struct ice_mbx_data { - enum ice_phy_model { - ICE_PHY_UNSUP = -1, - ICE_PHY_E810 = 1, -- ICE_PHY_E822, -+ ICE_PHY_E82X, - }; - - /* Port hardware description */ -@@ -909,10 +909,9 @@ struct ice_hw { - /* INTRL granularity in 1 us */ - u8 intrl_gran; - --#define ICE_PHY_PER_NAC_E822 1 - #define ICE_MAX_QUAD 2 --#define ICE_QUADS_PER_PHY_E822 2 --#define ICE_PORTS_PER_PHY_E822 8 -+#define ICE_QUADS_PER_PHY_E82X 2 -+#define ICE_PORTS_PER_PHY_E82X 8 - #define ICE_PORTS_PER_QUAD 4 - #define ICE_PORTS_PER_PHY_E810 4 - #define ICE_NUM_EXTERNAL_PORTS (ICE_MAX_QUAD * ICE_PORTS_PER_QUAD) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch b/kernel-rt/debian/patches/ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch deleted file mode 100644 index 9b6a7417..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 3b37119a08ffe4be182ade746a6b1fe3bcf65921 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 29 Nov 2023 13:40:22 +0100 -Subject: [PATCH 12/36] ice: Schedule service task in IRQ top half - -Schedule service task and EXTTS in the top half to avoid bottom half -scheduling if possible, which significantly reduces timestamping delay. - -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Reviewed-by: Przemek Kitszel -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 00d50001444ef5c75c8ab476a6674708f3ff613b) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 - - drivers/net/ethernet/intel/ice/ice_main.c | 20 +++++++++++--------- - 2 files changed, 11 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 54a98c4032b7..efe78d5e4da1 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -517,7 +517,6 @@ enum ice_pf_flags { - }; - - enum ice_misc_thread_tasks { -- ICE_MISC_THREAD_EXTTS_EVENT, - ICE_MISC_THREAD_TX_TSTAMP, - ICE_MISC_THREAD_NBITS /* must be last */ - }; -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index d2f3b4374d14..2acaa17a12bf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3109,6 +3109,7 @@ static void ice_ena_misc_vector(struct ice_pf *pf) - static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - { - struct ice_pf *pf = (struct ice_pf *)data; -+ irqreturn_t ret = IRQ_HANDLED; - struct ice_hw *hw = &pf->hw; - struct device *dev; - u32 oicr, ena_mask; -@@ -3190,8 +3191,10 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (ice_ptp_pf_handles_tx_interrupt(pf)) -+ if (ice_ptp_pf_handles_tx_interrupt(pf)) { - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); -+ ret = IRQ_WAKE_THREAD; -+ } - } - - if (oicr & PFINT_OICR_TSYN_EVNT_M) { -@@ -3207,7 +3210,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - GLTSYN_STAT_EVENT1_M | - GLTSYN_STAT_EVENT2_M); - -- set_bit(ICE_MISC_THREAD_EXTTS_EVENT, pf->misc_thread); -+ ice_ptp_extts_event(pf); - } - } - -@@ -3230,8 +3233,11 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - set_bit(ICE_PFR_REQ, pf->state); - } - } -+ ice_service_task_schedule(pf); -+ if (ret == IRQ_HANDLED) -+ ice_irq_dynamic_ena(hw, NULL, NULL); - -- return IRQ_WAKE_THREAD; -+ return ret; - } - - /** -@@ -3247,12 +3253,7 @@ static irqreturn_t ice_misc_intr_thread_fn(int __always_unused irq, void *data) - hw = &pf->hw; - - if (ice_is_reset_in_progress(pf->state)) -- return IRQ_HANDLED; -- -- ice_service_task_schedule(pf); -- -- if (test_and_clear_bit(ICE_MISC_THREAD_EXTTS_EVENT, pf->misc_thread)) -- ice_ptp_extts_event(pf); -+ goto skip_irq; - - if (test_and_clear_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread)) { - /* Process outstanding Tx timestamps. If there is more work, -@@ -3264,6 +3265,7 @@ static irqreturn_t ice_misc_intr_thread_fn(int __always_unused irq, void *data) - } - } - -+skip_irq: - ice_irq_dynamic_ena(hw, NULL, NULL); - - return IRQ_HANDLED; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch b/kernel-rt/debian/patches/ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch deleted file mode 100644 index 639642f0..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch +++ /dev/null @@ -1,660 +0,0 @@ -From c4ab92eb3ee89178a012702f2a98477d683fad31 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 29 Nov 2023 13:40:23 +0100 -Subject: [PATCH 13/36] ice: Enable SW interrupt from FW for LL TS - -Introduce new capability - Low Latency Timestamping with Interrupt. -On supported devices, driver can request a single timestamp from FW -without polling the register afterwards. Instead, FW can issue -a dedicated interrupt when the timestamp was read from the PHY register -and its value is available to read from the register. -This eliminates the need of bottom half scheduling, which results in -minimal delay for timestamping. - -For this mode, allocate TS indices sequentially, so that timestamps are -always completed in FIFO manner. - -Co-developed-by: Yochai Hagvi -Signed-off-by: Yochai Hagvi -Reviewed-by: Przemek Kitszel -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 82e71b226e0ef770d7bc143701c8b4960b4eb3d5) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 + - drivers/net/ethernet/intel/ice/ice_common.c | 3 + - .../net/ethernet/intel/ice/ice_hw_autogen.h | 2 + - drivers/net/ethernet/intel/ice/ice_main.c | 120 +++++++++++-- - drivers/net/ethernet/intel/ice/ice_ptp.c | 163 ++++++++++++++++-- - drivers/net/ethernet/intel/ice/ice_ptp.h | 9 + - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 1 + - drivers/net/ethernet/intel/ice/ice_type.h | 2 + - 8 files changed, 274 insertions(+), 28 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index efe78d5e4da1..ee42a504c2f4 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -594,6 +594,7 @@ struct ice_pf { - u32 hw_csum_rx_error; - u32 oicr_err_reg; - struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ -+ struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ - u16 max_pf_txqs; /* Total Tx queues PF wide */ - u16 max_pf_rxqs; /* Total Rx queues PF wide */ - u16 num_lan_msix; /* Total MSIX vectors for base driver */ -@@ -618,6 +619,7 @@ struct ice_pf { - unsigned long tx_timeout_last_recovery; - u32 tx_timeout_recovery_level; - char int_name[ICE_INT_NAME_STR_LEN]; -+ char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; - struct auxiliary_device *adev; - int aux_idx; - u32 sw_int_count; -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 7674267a2d90..acf6ac00f804 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -2624,6 +2624,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, - info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0); - - info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0); -+ info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0); - - info->ena_ports = logical_id; - info->tmr_own_map = phys_id; -@@ -2644,6 +2645,8 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, - info->tmr1_ena); - ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_read = %u\n", - info->ts_ll_read); -+ ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n", -+ info->ts_ll_int_read); - ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n", - info->ena_ports); - ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n", -diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -index 6756f3d51d14..fa730bca7f15 100644 ---- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -@@ -200,6 +200,8 @@ - #define GLINT_VECT2FUNC_PF_NUM_M ICE_M(0x7, 12) - #define GLINT_VECT2FUNC_IS_PF_S 16 - #define GLINT_VECT2FUNC_IS_PF_M BIT(16) -+#define PFINT_ALLOC 0x001D2600 -+#define PFINT_ALLOC_FIRST ICE_M(0x7FF, 0) - #define PFINT_FW_CTL 0x0016C800 - #define PFINT_FW_CTL_MSIX_INDX_M ICE_M(0x7FF, 0) - #define PFINT_FW_CTL_ITR_INDX_S 11 -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 2acaa17a12bf..9163a72368b3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3071,6 +3071,7 @@ static int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp) - static void ice_ena_misc_vector(struct ice_pf *pf) - { - struct ice_hw *hw = &pf->hw; -+ u32 pf_intr_start_offset; - u32 val; - - /* Disable anti-spoof detection interrupt to prevent spurious event -@@ -3099,6 +3100,47 @@ static void ice_ena_misc_vector(struct ice_pf *pf) - /* SW_ITR_IDX = 0, but don't change INTENA */ - wr32(hw, GLINT_DYN_CTL(pf->oicr_irq.index), - GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M); -+ -+ if (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ return; -+ pf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST; -+ wr32(hw, GLINT_DYN_CTL(pf->ll_ts_irq.index + pf_intr_start_offset), -+ GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M); -+} -+ -+/** -+ * ice_ll_ts_intr - ll_ts interrupt handler -+ * @irq: interrupt number -+ * @data: pointer to a q_vector -+ */ -+static irqreturn_t ice_ll_ts_intr(int __always_unused irq, void *data) -+{ -+ struct ice_pf *pf = data; -+ u32 pf_intr_start_offset; -+ struct ice_ptp_tx *tx; -+ unsigned long flags; -+ struct ice_hw *hw; -+ u32 val; -+ u8 idx; -+ -+ hw = &pf->hw; -+ tx = &pf->ptp.port.tx; -+ spin_lock_irqsave(&tx->lock, flags); -+ ice_ptp_complete_tx_single_tstamp(tx); -+ -+ idx = find_next_bit_wrap(tx->in_use, tx->len, -+ tx->last_ll_ts_idx_read + 1); -+ if (idx != tx->len) -+ ice_ptp_req_tx_single_tstamp(tx, idx); -+ spin_unlock_irqrestore(&tx->lock, flags); -+ -+ val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | -+ (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); -+ pf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST; -+ wr32(hw, GLINT_DYN_CTL(pf->ll_ts_irq.index + pf_intr_start_offset), -+ val); -+ -+ return IRQ_HANDLED; - } - - /** -@@ -3191,7 +3233,19 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (ice_ptp_pf_handles_tx_interrupt(pf)) { -+ if (ice_pf_state_is_nominal(pf) && -+ pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) { -+ struct ice_ptp_tx *tx = &pf->ptp.port.tx; -+ unsigned long flags; -+ u8 idx; -+ -+ spin_lock_irqsave(&tx->lock, flags); -+ idx = find_next_bit_wrap(tx->in_use, tx->len, -+ tx->last_ll_ts_idx_read + 1); -+ if (idx != tx->len) -+ ice_ptp_req_tx_single_tstamp(tx, idx); -+ spin_unlock_irqrestore(&tx->lock, flags); -+ } else if (ice_ptp_pf_handles_tx_interrupt(pf)) { - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); - ret = IRQ_WAKE_THREAD; - } -@@ -3295,6 +3349,20 @@ static void ice_dis_ctrlq_interrupts(struct ice_hw *hw) - ice_flush(hw); - } - -+/** -+ * ice_free_irq_msix_ll_ts- Unroll ll_ts vector setup -+ * @pf: board private structure -+ */ -+static void ice_free_irq_msix_ll_ts(struct ice_pf *pf) -+{ -+ int irq_num = pf->ll_ts_irq.virq; -+ -+ synchronize_irq(irq_num); -+ devm_free_irq(ice_pf_to_dev(pf), irq_num, pf); -+ -+ ice_free_irq(pf, pf->ll_ts_irq); -+} -+ - /** - * ice_free_irq_msix_misc - Unroll misc vector setup - * @pf: board private structure -@@ -3314,6 +3382,8 @@ static void ice_free_irq_msix_misc(struct ice_pf *pf) - devm_free_irq(ice_pf_to_dev(pf), misc_irq_num, pf); - - ice_free_irq(pf, pf->oicr_irq); -+ if (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ ice_free_irq_msix_ll_ts(pf); - } - - /** -@@ -3339,10 +3409,12 @@ static void ice_ena_ctrlq_interrupts(struct ice_hw *hw, u16 reg_idx) - PFINT_MBX_CTL_CAUSE_ENA_M); - wr32(hw, PFINT_MBX_CTL, val); - -- /* This enables Sideband queue Interrupt causes */ -- val = ((reg_idx & PFINT_SB_CTL_MSIX_INDX_M) | -- PFINT_SB_CTL_CAUSE_ENA_M); -- wr32(hw, PFINT_SB_CTL, val); -+ if (!hw->dev_caps.ts_dev_info.ts_ll_int_read) { -+ /* enable Sideband queue Interrupt causes */ -+ val = ((reg_idx & PFINT_SB_CTL_MSIX_INDX_M) | -+ PFINT_SB_CTL_CAUSE_ENA_M); -+ wr32(hw, PFINT_SB_CTL, val); -+ } - - ice_flush(hw); - } -@@ -3359,13 +3431,17 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf) - { - struct device *dev = ice_pf_to_dev(pf); - struct ice_hw *hw = &pf->hw; -- struct msi_map oicr_irq; -+ u32 pf_intr_start_offset; -+ struct msi_map irq; - int err = 0; - - if (!pf->int_name[0]) - snprintf(pf->int_name, sizeof(pf->int_name) - 1, "%s-%s:misc", - dev_driver_string(dev), dev_name(dev)); - -+ if (!pf->int_name_ll_ts[0]) -+ snprintf(pf->int_name_ll_ts, sizeof(pf->int_name_ll_ts) - 1, -+ "%s-%s:ll_ts", dev_driver_string(dev), dev_name(dev)); - /* Do not request IRQ but do enable OICR interrupt since settings are - * lost during reset. Note that this function is called only during - * rebuild path and not while reset is in progress. -@@ -3374,11 +3450,11 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf) - goto skip_req_irq; - - /* reserve one vector in irq_tracker for misc interrupts */ -- oicr_irq = ice_alloc_irq(pf, false); -- if (oicr_irq.index < 0) -- return oicr_irq.index; -+ irq = ice_alloc_irq(pf, false); -+ if (irq.index < 0) -+ return irq.index; - -- pf->oicr_irq = oicr_irq; -+ pf->oicr_irq = irq; - err = devm_request_threaded_irq(dev, pf->oicr_irq.virq, ice_misc_intr, - ice_misc_intr_thread_fn, 0, - pf->int_name, pf); -@@ -3389,10 +3465,34 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf) - return err; - } - -+ /* reserve one vector in irq_tracker for ll_ts interrupt */ -+ if (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ goto skip_req_irq; -+ -+ irq = ice_alloc_irq(pf, false); -+ if (irq.index < 0) -+ return irq.index; -+ -+ pf->ll_ts_irq = irq; -+ err = devm_request_irq(dev, pf->ll_ts_irq.virq, ice_ll_ts_intr, 0, -+ pf->int_name_ll_ts, pf); -+ if (err) { -+ dev_err(dev, "devm_request_irq for %s failed: %d\n", -+ pf->int_name_ll_ts, err); -+ ice_free_irq(pf, pf->ll_ts_irq); -+ return err; -+ } -+ - skip_req_irq: - ice_ena_misc_vector(pf); - - ice_ena_ctrlq_interrupts(hw, pf->oicr_irq.index); -+ /* This enables LL TS interrupt */ -+ pf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST; -+ if (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ wr32(hw, PFINT_SB_CTL, -+ ((pf->ll_ts_irq.index + pf_intr_start_offset) & -+ PFINT_SB_CTL_MSIX_INDX_M) | PFINT_SB_CTL_CAUSE_ENA_M); - wr32(hw, GLINT_ITR(ICE_RX_ITR, pf->oicr_irq.index), - ITR_REG_ALIGN(ICE_ITR_8K) >> ICE_ITR_GRAN_S); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 2e6e1fc84d11..75038d826f71 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -634,6 +634,119 @@ ice_ptp_is_tx_tracker_up(struct ice_ptp_tx *tx) - return tx->init && !tx->calibrating; - } - -+/** -+ * ice_ptp_req_tx_single_tstamp - Request Tx timestamp for a port from FW -+ * @tx: the PTP Tx timestamp tracker -+ * @idx: index of the timestamp to request -+ */ -+void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) -+{ -+ struct ice_ptp_port *ptp_port; -+ struct sk_buff *skb; -+ struct ice_pf *pf; -+ -+ if (!tx->init) -+ return; -+ -+ ptp_port = container_of(tx, struct ice_ptp_port, tx); -+ pf = ptp_port_to_pf(ptp_port); -+ -+ /* Drop packets which have waited for more than 2 seconds */ -+ if (time_is_before_jiffies(tx->tstamps[idx].start + 2 * HZ)) { -+ /* Count the number of Tx timestamps that timed out */ -+ pf->ptp.tx_hwtstamp_timeouts++; -+ -+ skb = tx->tstamps[idx].skb; -+ tx->tstamps[idx].skb = NULL; -+ clear_bit(idx, tx->in_use); -+ -+ dev_kfree_skb_any(skb); -+ return; -+ } -+ -+ ice_trace(tx_tstamp_fw_req, tx->tstamps[idx].skb, idx); -+ -+ /* Write TS index to read to the PF register so the FW can read it */ -+ wr32(&pf->hw, PF_SB_ATQBAL, -+ TS_LL_READ_TS_INTR | FIELD_PREP(TS_LL_READ_TS_IDX, idx) | -+ TS_LL_READ_TS); -+ tx->last_ll_ts_idx_read = idx; -+} -+ -+/** -+ * ice_ptp_complete_tx_single_tstamp - Complete Tx timestamp for a port -+ * @tx: the PTP Tx timestamp tracker -+ */ -+void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) -+{ -+ struct skb_shared_hwtstamps shhwtstamps = {}; -+ u8 idx = tx->last_ll_ts_idx_read; -+ struct ice_ptp_port *ptp_port; -+ u64 raw_tstamp, tstamp; -+ bool drop_ts = false; -+ struct sk_buff *skb; -+ struct ice_pf *pf; -+ u32 val; -+ -+ if (!tx->init || tx->last_ll_ts_idx_read < 0) -+ return; -+ -+ ptp_port = container_of(tx, struct ice_ptp_port, tx); -+ pf = ptp_port_to_pf(ptp_port); -+ -+ ice_trace(tx_tstamp_fw_done, tx->tstamps[idx].skb, idx); -+ -+ val = rd32(&pf->hw, PF_SB_ATQBAL); -+ -+ /* When the bit is cleared, the TS is ready in the register */ -+ if (val & TS_LL_READ_TS) { -+ dev_err(ice_pf_to_dev(pf), "Failed to get the Tx tstamp - FW not ready"); -+ return; -+ } -+ -+ /* High 8 bit value of the TS is on the bits 16:23 */ -+ raw_tstamp = FIELD_GET(TS_LL_READ_TS_HIGH, val); -+ raw_tstamp <<= 32; -+ -+ /* Read the low 32 bit value */ -+ raw_tstamp |= (u64)rd32(&pf->hw, PF_SB_ATQBAH); -+ -+ /* For PHYs which don't implement a proper timestamp ready bitmap, -+ * verify that the timestamp value is different from the last cached -+ * timestamp. If it is not, skip this for now assuming it hasn't yet -+ * been captured by hardware. -+ */ -+ if (!drop_ts && tx->verify_cached && -+ raw_tstamp == tx->tstamps[idx].cached_tstamp) -+ return; -+ -+ if (tx->verify_cached && raw_tstamp) -+ tx->tstamps[idx].cached_tstamp = raw_tstamp; -+ clear_bit(idx, tx->in_use); -+ skb = tx->tstamps[idx].skb; -+ tx->tstamps[idx].skb = NULL; -+ if (test_and_clear_bit(idx, tx->stale)) -+ drop_ts = true; -+ -+ if (!skb) -+ return; -+ -+ if (drop_ts) { -+ dev_kfree_skb_any(skb); -+ return; -+ } -+ -+ /* Extend the timestamp using cached PHC time */ -+ tstamp = ice_ptp_extend_40b_ts(pf, raw_tstamp); -+ if (tstamp) { -+ shhwtstamps.hwtstamp = ns_to_ktime(tstamp); -+ ice_trace(tx_tstamp_complete, skb, idx); -+ } -+ -+ skb_tstamp_tx(skb, &shhwtstamps); -+ dev_kfree_skb_any(skb); -+} -+ - /** - * ice_ptp_process_tx_tstamp - Process Tx timestamps for a port - * @tx: the PTP Tx timestamp tracker -@@ -685,6 +798,7 @@ ice_ptp_is_tx_tracker_up(struct ice_ptp_tx *tx) - static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - { - struct ice_ptp_port *ptp_port; -+ unsigned long flags; - struct ice_pf *pf; - struct ice_hw *hw; - u64 tstamp_ready; -@@ -756,7 +870,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - drop_ts = true; - - skip_ts_read: -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - if (tx->verify_cached && raw_tstamp) - tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); -@@ -764,7 +878,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - tx->tstamps[idx].skb = NULL; - if (test_and_clear_bit(idx, tx->stale)) - drop_ts = true; -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* It is unlikely but possible that the SKB will have been - * flushed at this point due to link change or teardown. -@@ -834,6 +948,7 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) - static enum ice_tx_tstamp_work ice_ptp_tx_tstamp(struct ice_ptp_tx *tx) - { - bool more_timestamps; -+ unsigned long flags; - - if (!tx->init) - return ICE_TX_TSTAMP_WORK_DONE; -@@ -842,9 +957,9 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp(struct ice_ptp_tx *tx) - ice_ptp_process_tx_tstamp(tx); - - /* Check if there are outstanding Tx timestamps */ -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - more_timestamps = tx->init && !bitmap_empty(tx->in_use, tx->len); -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - if (more_timestamps) - return ICE_TX_TSTAMP_WORK_PENDING; -@@ -881,6 +996,7 @@ ice_ptp_alloc_tx_tracker(struct ice_ptp_tx *tx) - tx->in_use = in_use; - tx->stale = stale; - tx->init = 1; -+ tx->last_ll_ts_idx_read = -1; - - spin_lock_init(&tx->lock); - -@@ -898,6 +1014,7 @@ static void - ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - { - struct ice_hw *hw = &pf->hw; -+ unsigned long flags; - u64 tstamp_ready; - int err; - u8 idx; -@@ -921,12 +1038,12 @@ ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - if (!hw->reset_ongoing && (tstamp_ready & BIT_ULL(phy_idx))) - ice_clear_phy_tstamp(hw, tx->block, phy_idx); - -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - skb = tx->tstamps[idx].skb; - tx->tstamps[idx].skb = NULL; - clear_bit(idx, tx->in_use); - clear_bit(idx, tx->stale); -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* Count the number of Tx timestamps flushed */ - pf->ptp.tx_hwtstamp_flushed++; -@@ -950,9 +1067,11 @@ ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - static void - ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) - { -- spin_lock(&tx->lock); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&tx->lock, flags); - bitmap_or(tx->stale, tx->stale, tx->in_use, tx->len); -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - } - - /** -@@ -965,9 +1084,11 @@ ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) - static void - ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - { -- spin_lock(&tx->lock); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&tx->lock, flags); - tx->init = 0; -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* wait for potentially outstanding interrupt to complete */ - synchronize_irq(pf->oicr_irq.virq); -@@ -1367,6 +1488,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - struct ice_pf *pf = ptp_port_to_pf(ptp_port); - u8 port = ptp_port->port_num; - struct ice_hw *hw = &pf->hw; -+ unsigned long flags; - int err; - - if (ice_is_e810(hw)) -@@ -1380,9 +1502,9 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - kthread_cancel_delayed_work_sync(&ptp_port->ov_work); - - /* temporarily disable Tx timestamps while calibrating PHY offset */ -- spin_lock(&ptp_port->tx.lock); -+ spin_lock_irqsave(&ptp_port->tx.lock, flags); - ptp_port->tx.calibrating = true; -- spin_unlock(&ptp_port->tx.lock); -+ spin_unlock_irqrestore(&ptp_port->tx.lock, flags); - ptp_port->tx_fifo_busy_cnt = 0; - - /* Start the PHY timer in Vernier mode */ -@@ -1391,9 +1513,9 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - goto out_unlock; - - /* Enable Tx timestamps right away */ -- spin_lock(&ptp_port->tx.lock); -+ spin_lock_irqsave(&ptp_port->tx.lock, flags); - ptp_port->tx.calibrating = false; -- spin_unlock(&ptp_port->tx.lock); -+ spin_unlock_irqrestore(&ptp_port->tx.lock, flags); - - kthread_queue_delayed_work(pf->ptp.kworker, &ptp_port->ov_work, 0); - -@@ -2471,18 +2593,23 @@ static long ice_ptp_create_clock(struct ice_pf *pf) - */ - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - { -+ unsigned long flags; - u8 idx; - -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - - /* Check that this tracker is accepting new timestamp requests */ - if (!ice_ptp_is_tx_tracker_up(tx)) { -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - return -1; - } - - /* Find and set the first available index */ -- idx = find_first_zero_bit(tx->in_use, tx->len); -+ idx = find_next_zero_bit(tx->in_use, tx->len, -+ tx->last_ll_ts_idx_read + 1); -+ if (idx == tx->len) -+ idx = find_first_zero_bit(tx->in_use, tx->len); -+ - if (idx < tx->len) { - /* We got a valid index that no other thread could have set. Store - * a reference to the skb and the start time to allow discarding old -@@ -2496,7 +2623,7 @@ s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - ice_trace(tx_tstamp_request, skb, idx); - } - -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* return the appropriate PHY timestamp register index, -1 if no - * indexes were available. -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index a3ae008a3539..64679d3d2c49 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -131,6 +131,7 @@ enum ice_tx_tstamp_work { - * @calibrating: if true, the PHY is calibrating the Tx offset. During this - * window, timestamps are temporarily disabled. - * @verify_cached: if true, verify new timestamp differs from last read value -+ * @last_ll_ts_idx_read: index of the last LL TS read by the FW - */ - struct ice_ptp_tx { - spinlock_t lock; /* lock protecting in_use bitmap */ -@@ -143,6 +144,7 @@ struct ice_ptp_tx { - u8 init : 1; - u8 calibrating : 1; - u8 verify_cached : 1; -+ s8 last_ll_ts_idx_read; - }; - - /* Quad and port information for initializing timestamp blocks */ -@@ -296,6 +298,8 @@ int ice_get_ptp_clock_index(struct ice_pf *pf); - - void ice_ptp_extts_event(struct ice_pf *pf); - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); -+void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx); -+void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx); - enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); - - void -@@ -330,6 +334,11 @@ ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - return -1; - } - -+static inline void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) -+{ } -+ -+static inline void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) { } -+ - static inline bool ice_ptp_process_ts(struct ice_pf *pf) - { - return true; -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 0cc285614c72..7e8fd369ef7c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -509,6 +509,7 @@ int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, - #define TS_LL_READ_RETRIES 200 - #define TS_LL_READ_TS_HIGH GENMASK(23, 16) - #define TS_LL_READ_TS_IDX GENMASK(29, 24) -+#define TS_LL_READ_TS_INTR BIT(30) - #define TS_LL_READ_TS BIT(31) - - /* Internal PHY timestamp address */ -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index f8b658386552..b0f1f4db1d8b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -350,6 +350,7 @@ struct ice_ts_func_info { - #define ICE_TS_TMR0_ENA_M BIT(25) - #define ICE_TS_TMR1_ENA_M BIT(26) - #define ICE_TS_LL_TX_TS_READ_M BIT(28) -+#define ICE_TS_LL_TX_TS_INT_READ_M BIT(29) - - struct ice_ts_dev_info { - /* Device specific info */ -@@ -363,6 +364,7 @@ struct ice_ts_dev_info { - u8 tmr0_ena; - u8 tmr1_ena; - u8 ts_ll_read; -+ u8 ts_ll_int_read; - }; - - /* Function specific capabilities */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch b/kernel-rt/debian/patches/ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch deleted file mode 100644 index c8c26134..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch +++ /dev/null @@ -1,310 +0,0 @@ -From f267daca86600496d536f85c4d1945558b982427 Mon Sep 17 00:00:00 2001 -From: Michal Michalik -Date: Thu, 27 Jul 2023 15:50:36 +0200 -Subject: [PATCH 14/36] ice: PTP: add clock domain number to auxiliary - interface - -The PHC clock id used to be moved between PFs using FW admin queue -shared parameters - move the implementation to auxiliary bus. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Signed-off-by: Michal Michalik -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit fcd2c1e3139a27766ef263bd2011195dbc8a79f5) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 5 - - drivers/net/ethernet/intel/ice/ice_ethtool.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 163 +++--------------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 11 +- - 4 files changed, 34 insertions(+), 147 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 353ac55bdb9d..9bacb69ead8c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2360,11 +2360,6 @@ struct ice_aqc_driver_shared_params { - }; - - enum ice_aqc_driver_params { -- /* OS clock index for PTP timer Domain 0 */ -- ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0 = 0, -- /* OS clock index for PTP timer Domain 1 */ -- ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1, -- - /* Add new parameters above */ - ICE_AQC_DRIVER_PARAM_MAX = 16, - }; -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 456cf4785c74..057453d589d5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -3286,7 +3286,7 @@ ice_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) - SOF_TIMESTAMPING_RX_HARDWARE | - SOF_TIMESTAMPING_RAW_HARDWARE; - -- info->phc_index = ice_get_ptp_clock_index(pf); -+ info->phc_index = ice_ptp_clock_index(pf); - - info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 75038d826f71..a2d0da7dfe83 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -345,131 +345,6 @@ void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) - ice_set_rx_tstamp(pf, ena); - } - --/** -- * ice_get_ptp_clock_index - Get the PTP clock index -- * @pf: the PF pointer -- * -- * Determine the clock index of the PTP clock associated with this device. If -- * this is the PF controlling the clock, just use the local access to the -- * clock device pointer. -- * -- * Otherwise, read from the driver shared parameters to determine the clock -- * index value. -- * -- * Returns: the index of the PTP clock associated with this device, or -1 if -- * there is no associated clock. -- */ --int ice_get_ptp_clock_index(struct ice_pf *pf) --{ -- struct device *dev = ice_pf_to_dev(pf); -- enum ice_aqc_driver_params param_idx; -- struct ice_hw *hw = &pf->hw; -- u8 tmr_idx; -- u32 value; -- int err; -- -- /* Use the ptp_clock structure if we're the main PF */ -- if (pf->ptp.clock) -- return ptp_clock_index(pf->ptp.clock); -- -- tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -- if (!tmr_idx) -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0; -- else -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1; -- -- err = ice_aq_get_driver_param(hw, param_idx, &value, NULL); -- if (err) { -- dev_err(dev, "Failed to read PTP clock index parameter, err %d aq_err %s\n", -- err, ice_aq_str(hw->adminq.sq_last_status)); -- return -1; -- } -- -- /* The PTP clock index is an integer, and will be between 0 and -- * INT_MAX. The highest bit of the driver shared parameter is used to -- * indicate whether or not the currently stored clock index is valid. -- */ -- if (!(value & PTP_SHARED_CLK_IDX_VALID)) -- return -1; -- -- return value & ~PTP_SHARED_CLK_IDX_VALID; --} -- --/** -- * ice_set_ptp_clock_index - Set the PTP clock index -- * @pf: the PF pointer -- * -- * Set the PTP clock index for this device into the shared driver parameters, -- * so that other PFs associated with this device can read it. -- * -- * If the PF is unable to store the clock index, it will log an error, but -- * will continue operating PTP. -- */ --static void ice_set_ptp_clock_index(struct ice_pf *pf) --{ -- struct device *dev = ice_pf_to_dev(pf); -- enum ice_aqc_driver_params param_idx; -- struct ice_hw *hw = &pf->hw; -- u8 tmr_idx; -- u32 value; -- int err; -- -- if (!pf->ptp.clock) -- return; -- -- tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -- if (!tmr_idx) -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0; -- else -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1; -- -- value = (u32)ptp_clock_index(pf->ptp.clock); -- if (value > INT_MAX) { -- dev_err(dev, "PTP Clock index is too large to store\n"); -- return; -- } -- value |= PTP_SHARED_CLK_IDX_VALID; -- -- err = ice_aq_set_driver_param(hw, param_idx, value, NULL); -- if (err) { -- dev_err(dev, "Failed to set PTP clock index parameter, err %d aq_err %s\n", -- err, ice_aq_str(hw->adminq.sq_last_status)); -- } --} -- --/** -- * ice_clear_ptp_clock_index - Clear the PTP clock index -- * @pf: the PF pointer -- * -- * Clear the PTP clock index for this device. Must be called when -- * unregistering the PTP clock, in order to ensure other PFs stop reporting -- * a clock object that no longer exists. -- */ --static void ice_clear_ptp_clock_index(struct ice_pf *pf) --{ -- struct device *dev = ice_pf_to_dev(pf); -- enum ice_aqc_driver_params param_idx; -- struct ice_hw *hw = &pf->hw; -- u8 tmr_idx; -- int err; -- -- /* Do not clear the index if we don't own the timer */ -- if (!ice_pf_src_tmr_owned(pf)) -- return; -- -- tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -- if (!tmr_idx) -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0; -- else -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1; -- -- err = ice_aq_set_driver_param(hw, param_idx, 0, NULL); -- if (err) { -- dev_dbg(dev, "Failed to clear PTP clock index parameter, err %d aq_err %s\n", -- err, ice_aq_str(hw->adminq.sq_last_status)); -- } --} -- - /** - * ice_ptp_read_src_clk_reg - Read the source clock register - * @pf: Board private structure -@@ -2564,7 +2439,6 @@ static void ice_ptp_set_caps(struct ice_pf *pf) - static long ice_ptp_create_clock(struct ice_pf *pf) - { - struct ptp_clock_info *info; -- struct ptp_clock *clock; - struct device *dev; - - /* No need to create a clock device if we already have one */ -@@ -2577,11 +2451,11 @@ static long ice_ptp_create_clock(struct ice_pf *pf) - dev = ice_pf_to_dev(pf); - - /* Attempt to register the clock before enabling the hardware. */ -- clock = ptp_clock_register(info, dev); -- if (IS_ERR(clock)) -- return PTR_ERR(clock); -- -- pf->ptp.clock = clock; -+ pf->ptp.clock = ptp_clock_register(info, dev); -+ if (IS_ERR(pf->ptp.clock)) { -+ dev_err(ice_pf_to_dev(pf), "Failed to register PTP clock device"); -+ return PTR_ERR(pf->ptp.clock); -+ } - - return 0; - } -@@ -2996,6 +2870,28 @@ static void ice_ptp_unregister_auxbus_driver(struct ice_pf *pf) - mutex_destroy(&pf->ptp.ports_owner.lock); - } - -+/** -+ * ice_ptp_clock_index - Get the PTP clock index for this device -+ * @pf: Board private structure -+ * -+ * Returns: the PTP clock index associated with this PF, or -1 if no PTP clock -+ * is associated. -+ */ -+int ice_ptp_clock_index(struct ice_pf *pf) -+{ -+ struct auxiliary_device *aux_dev; -+ struct ice_pf *owner_pf; -+ struct ptp_clock *clock; -+ -+ aux_dev = &pf->ptp.port.aux_dev; -+ owner_pf = ice_ptp_aux_dev_to_owner_pf(aux_dev); -+ if (!owner_pf) -+ return -1; -+ clock = owner_pf->ptp.clock; -+ -+ return clock ? ptp_clock_index(clock) : -1; -+} -+ - /** - * ice_ptp_prepare_for_reset - Prepare PTP for reset - * @pf: Board private structure -@@ -3086,9 +2982,6 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - if (err) - goto err_clk; - -- /* Store the PTP clock index for other PFs */ -- ice_set_ptp_clock_index(pf); -- - err = ice_ptp_register_auxbus_driver(pf); - if (err) { - dev_err(ice_pf_to_dev(pf), "Failed to register PTP auxbus driver"); -@@ -3097,7 +2990,6 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - - return 0; - err_aux: -- ice_clear_ptp_clock_index(pf); - ptp_clock_unregister(pf->ptp.clock); - err_clk: - pf->ptp.clock = NULL; -@@ -3353,7 +3245,6 @@ void ice_ptp_release(struct ice_pf *pf) - /* Disable periodic outputs */ - ice_ptp_disable_all_clkout(pf); - -- ice_clear_ptp_clock_index(pf); - ptp_clock_unregister(pf->ptp.clock); - pf->ptp.clock = NULL; - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 64679d3d2c49..95ebd7a048ec 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -290,11 +290,11 @@ struct ice_ptp { - #define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4)) - - #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) -+int ice_ptp_clock_index(struct ice_pf *pf); - struct ice_pf; - int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); - int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); - void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena); --int ice_get_ptp_clock_index(struct ice_pf *pf); - - void ice_ptp_extts_event(struct ice_pf *pf); - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); -@@ -322,10 +322,6 @@ static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) - } - - static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { } --static inline int ice_get_ptp_clock_index(struct ice_pf *pf) --{ -- return -1; --} - - static inline void ice_ptp_extts_event(struct ice_pf *pf) { } - static inline s8 -@@ -353,5 +349,10 @@ static inline void ice_ptp_release(struct ice_pf *pf) { } - static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - { - } -+ -+static inline int ice_ptp_clock_index(struct ice_pf *pf) -+{ -+ return -1; -+} - #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ - #endif /* _ICE_PTP_H_ */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch b/kernel-rt/debian/patches/ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch deleted file mode 100644 index ed75abed..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch +++ /dev/null @@ -1,266 +0,0 @@ -From eb63973adae478fdcc324f5490d6803646f0cc76 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 21 Nov 2023 13:12:57 -0800 -Subject: [PATCH 15/36] ice: restore timestamp configuration after device reset - -The driver calls ice_ptp_cfg_timestamp() during ice_ptp_prepare_for_reset() -to disable timestamping while the device is resetting. This operation -destroys the user requested configuration. While the driver does call -ice_ptp_cfg_timestamp in ice_rebuild() to restore some hardware settings -after a reset, it unconditionally passes true or false, resulting in -failure to restore previous user space configuration. - -This results in a device reset forcibly disabling timestamp configuration -regardless of current user settings. - -This was not detected previously due to a quirk of the LinuxPTP ptp4l -application. If ptp4l detects a missing timestamp, it enters a fault state -and performs recovery logic which includes executing SIOCSHWTSTAMP again, -restoring the now accidentally cleared configuration. - -Not every application does this, and for these applications, timestamps -will mysteriously stop after a PF reset, without being restored until an -application restart. - -Fix this by replacing ice_ptp_cfg_timestamp() with two new functions: - -1) ice_ptp_disable_timestamp_mode() which unconditionally disables the - timestamping logic in ice_ptp_prepare_for_reset() and ice_ptp_release() - -2) ice_ptp_restore_timestamp_mode() which calls - ice_ptp_restore_tx_interrupt() to restore Tx timestamping configuration, - calls ice_set_rx_tstamp() to restore Rx timestamping configuration, and - issues an immediate TSYN_TX interrupt to ensure that timestamps which - may have occurred during the device reset get processed. - -Modify the ice_ptp_set_timestamp_mode to directly save the user -configuration and then call ice_ptp_restore_timestamp_mode. This way, reset -no longer destroys the saved user configuration. - -This obsoletes the ice_set_tx_tstamp() function which can now be safely -removed. - -With this change, all devices should now restore Tx and Rx timestamping -functionality correctly after a PF reset without application intervention. - -Fixes: 77a781155a65 ("ice: enable receive hardware timestamping") -Fixes: ea9b847cda64 ("ice: enable transmit timestamps for E810 devices") -Signed-off-by: Jacob Keller -Reviewed-by: Jesse Brandeburg -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 7758017911a4f2578d54c318e8fe77bcb5899054) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 12 +--- - drivers/net/ethernet/intel/ice/ice_ptp.c | 74 ++++++++++++++--------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 5 +- - 3 files changed, 51 insertions(+), 40 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 9163a72368b3..8cfb923198e9 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -7545,15 +7545,6 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - goto err_vsi_rebuild; - } - -- /* configure PTP timestamping after VSI rebuild */ -- if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) { -- if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -- ice_ptp_cfg_timestamp(pf, false); -- else if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) -- /* for E82x PHC owner always need to have interrupts */ -- ice_ptp_cfg_timestamp(pf, true); -- } -- - err = ice_vsi_rebuild_by_type(pf, ICE_VSI_SWITCHDEV_CTRL); - if (err) { - dev_err(dev, "Switchdev CTRL VSI rebuild failed: %d\n", err); -@@ -7605,6 +7596,9 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - ice_plug_aux_dev(pf); - if (ice_is_feature_supported(pf, ICE_F_SRIOV_LAG)) - ice_lag_rebuild(pf); -+ -+ /* Restore timestamp mode settings after VSI rebuild */ -+ ice_ptp_restore_timestamp_mode(pf); - return; - - err_vsi_rebuild: -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index a2d0da7dfe83..8fc6905b0f79 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -294,18 +294,6 @@ static void ice_ptp_cfg_tx_interrupt(struct ice_pf *pf) - wr32(hw, PFINT_OICR_ENA, val); - } - --/** -- * ice_set_tx_tstamp - Enable or disable Tx timestamping -- * @pf: The PF pointer to search in -- * @on: bool value for whether timestamps are enabled or disabled -- */ --static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) --{ -- pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; -- -- ice_ptp_cfg_tx_interrupt(pf); --} -- - /** - * ice_set_rx_tstamp - Enable or disable Rx timestamping - * @pf: The PF pointer to search in -@@ -317,7 +305,7 @@ static void ice_set_rx_tstamp(struct ice_pf *pf, bool on) - u16 i; - - vsi = ice_get_main_vsi(pf); -- if (!vsi) -+ if (!vsi || !vsi->rx_rings) - return; - - /* Set the timestamp flag for all the Rx rings */ -@@ -326,23 +314,50 @@ static void ice_set_rx_tstamp(struct ice_pf *pf, bool on) - continue; - vsi->rx_rings[i]->ptp_rx = on; - } -+} -+ -+/** -+ * ice_ptp_disable_timestamp_mode - Disable current timestamp mode -+ * @pf: Board private structure -+ * -+ * Called during preparation for reset to temporarily disable timestamping on -+ * the device. Called during remove to disable timestamping while cleaning up -+ * driver resources. -+ */ -+static void ice_ptp_disable_timestamp_mode(struct ice_pf *pf) -+{ -+ struct ice_hw *hw = &pf->hw; -+ u32 val; -+ -+ val = rd32(hw, PFINT_OICR_ENA); -+ val &= ~PFINT_OICR_TSYN_TX_M; -+ wr32(hw, PFINT_OICR_ENA, val); - -- pf->ptp.tstamp_config.rx_filter = on ? HWTSTAMP_FILTER_ALL : -- HWTSTAMP_FILTER_NONE; -+ ice_set_rx_tstamp(pf, false); - } - - /** -- * ice_ptp_cfg_timestamp - Configure timestamp for init/deinit -+ * ice_ptp_restore_timestamp_mode - Restore timestamp configuration - * @pf: Board private structure -- * @ena: bool value to enable or disable time stamp - * -- * This function will configure timestamping during PTP initialization -- * and deinitialization -+ * Called at the end of rebuild to restore timestamp configuration after -+ * a device reset. - */ --void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) -+void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) - { -- ice_set_tx_tstamp(pf, ena); -- ice_set_rx_tstamp(pf, ena); -+ struct ice_hw *hw = &pf->hw; -+ bool enable_rx; -+ -+ ice_ptp_cfg_tx_interrupt(pf); -+ -+ enable_rx = pf->ptp.tstamp_config.rx_filter == HWTSTAMP_FILTER_ALL; -+ ice_set_rx_tstamp(pf, enable_rx); -+ -+ /* Trigger an immediate software interrupt to ensure that timestamps -+ * which occurred during reset are handled now. -+ */ -+ wr32(hw, PFINT_OICR, PFINT_OICR_TSYN_TX_M); -+ ice_flush(hw); - } - - /** -@@ -2152,10 +2167,10 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) - { - switch (config->tx_type) { - case HWTSTAMP_TX_OFF: -- ice_set_tx_tstamp(pf, false); -+ pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_OFF; - break; - case HWTSTAMP_TX_ON: -- ice_set_tx_tstamp(pf, true); -+ pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_ON; - break; - default: - return -ERANGE; -@@ -2163,7 +2178,7 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) - - switch (config->rx_filter) { - case HWTSTAMP_FILTER_NONE: -- ice_set_rx_tstamp(pf, false); -+ pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; - break; - case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: - case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: -@@ -2179,12 +2194,15 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) - case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: - case HWTSTAMP_FILTER_NTP_ALL: - case HWTSTAMP_FILTER_ALL: -- ice_set_rx_tstamp(pf, true); -+ pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_ALL; - break; - default: - return -ERANGE; - } - -+ /* Immediately update the device timestamping mode */ -+ ice_ptp_restore_timestamp_mode(pf); -+ - return 0; - } - -@@ -2904,7 +2922,7 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) - clear_bit(ICE_FLAG_PTP, pf->flags); - - /* Disable timestamping for both Tx and Rx */ -- ice_ptp_cfg_timestamp(pf, false); -+ ice_ptp_disable_timestamp_mode(pf); - - kthread_cancel_delayed_work_sync(&ptp->work); - -@@ -3222,7 +3240,7 @@ void ice_ptp_release(struct ice_pf *pf) - return; - - /* Disable timestamping for both Tx and Rx */ -- ice_ptp_cfg_timestamp(pf, false); -+ ice_ptp_disable_timestamp_mode(pf); - - ice_ptp_remove_auxbus_device(pf); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 95ebd7a048ec..130e6d2ae9a5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -294,7 +294,7 @@ int ice_ptp_clock_index(struct ice_pf *pf); - struct ice_pf; - int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); - int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); --void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena); -+void ice_ptp_restore_timestamp_mode(struct ice_pf *pf); - - void ice_ptp_extts_event(struct ice_pf *pf); - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); -@@ -321,8 +321,7 @@ static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) - return -EOPNOTSUPP; - } - --static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { } -- -+static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { } - static inline void ice_ptp_extts_event(struct ice_pf *pf) { } - static inline s8 - ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0016-ice-introduce-PTP-state-machine.patch b/kernel-rt/debian/patches/ice-VDF/0016-ice-introduce-PTP-state-machine.patch deleted file mode 100644 index 851c986e..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0016-ice-introduce-PTP-state-machine.patch +++ /dev/null @@ -1,316 +0,0 @@ -From 5c6115d27a377927d6392b3bfbe9739188c8153c Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:49 -0800 -Subject: [PATCH 16/36] ice: introduce PTP state machine - -Add PTP state machine so that the driver can correctly identify PTP -state around resets. -When the driver got information about ungraceful reset, PTP was not -prepared for reset and it returned error. When this situation occurs, -prepare PTP before rebuilding its structures. - -Signed-off-by: Jacob Keller -Co-developed-by: Karol Kolacinski -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 8293e4cb2ff54b1ec4f7206dcb74c908f62a3fb8) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 - - drivers/net/ethernet/intel/ice/ice_ethtool.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 110 +++++++++++-------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 10 ++ - 4 files changed, 74 insertions(+), 49 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index ee42a504c2f4..3278d032a2bd 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -492,7 +492,6 @@ enum ice_pf_flags { - ICE_FLAG_DCB_ENA, - ICE_FLAG_FD_ENA, - ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ -- ICE_FLAG_PTP, /* PTP is enabled by software */ - ICE_FLAG_ADV_FEATURES, - ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ - ICE_FLAG_CLS_FLOWER, -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 057453d589d5..9e949c493c38 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -3276,7 +3276,7 @@ ice_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) - struct ice_pf *pf = ice_netdev_to_pf(dev); - - /* only report timestamping if PTP is enabled */ -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return ethtool_op_get_ts_info(dev, info); - - info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 8fc6905b0f79..36c81c5ee83b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1430,7 +1430,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - struct ice_ptp_port *ptp_port; - struct ice_hw *hw = &pf->hw; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return; - - if (WARN_ON_ONCE(port >= ICE_NUM_EXTERNAL_PORTS)) -@@ -2148,7 +2148,7 @@ int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) - { - struct hwtstamp_config *config; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return -EIO; - - config = &pf->ptp.tstamp_config; -@@ -2218,7 +2218,7 @@ int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) - struct hwtstamp_config config; - int err; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return -EAGAIN; - - if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) -@@ -2606,7 +2606,7 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - struct ice_pf *pf = container_of(ptp, struct ice_pf, ptp); - int err; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return; - - err = ice_ptp_update_cached_phctime(pf); -@@ -2618,6 +2618,42 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - msecs_to_jiffies(err ? 10 : 500)); - } - -+/** -+ * ice_ptp_prepare_for_reset - Prepare PTP for reset -+ * @pf: Board private structure -+ */ -+void ice_ptp_prepare_for_reset(struct ice_pf *pf) -+{ -+ struct ice_ptp *ptp = &pf->ptp; -+ u8 src_tmr; -+ -+ if (ptp->state != ICE_PTP_READY) -+ return; -+ -+ ptp->state = ICE_PTP_RESETTING; -+ -+ /* Disable timestamping for both Tx and Rx */ -+ ice_ptp_disable_timestamp_mode(pf); -+ -+ kthread_cancel_delayed_work_sync(&ptp->work); -+ -+ if (test_bit(ICE_PFR_REQ, pf->state)) -+ return; -+ -+ ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); -+ -+ /* Disable periodic outputs */ -+ ice_ptp_disable_all_clkout(pf); -+ -+ src_tmr = ice_get_ptp_src_clock_index(&pf->hw); -+ -+ /* Disable source clock */ -+ wr32(&pf->hw, GLTSYN_ENA(src_tmr), (u32)~GLTSYN_ENA_TSYN_ENA_M); -+ -+ /* Acquire PHC and system timer to restore after reset */ -+ ptp->reset_time = ktime_get_real_ns(); -+} -+ - /** - * ice_ptp_reset - Initialize PTP hardware clock support after reset - * @pf: Board private structure -@@ -2630,6 +2666,14 @@ void ice_ptp_reset(struct ice_pf *pf) - int err, itr = 1; - u64 time_diff; - -+ if (ptp->state == ICE_PTP_READY) { -+ ice_ptp_prepare_for_reset(pf); -+ } else if (ptp->state != ICE_PTP_RESETTING) { -+ err = -EINVAL; -+ dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); -+ goto err; -+ } -+ - if (test_bit(ICE_PFR_REQ, pf->state) || - !ice_pf_src_tmr_owned(pf)) - goto pfr; -@@ -2690,7 +2734,7 @@ void ice_ptp_reset(struct ice_pf *pf) - if (err) - goto err; - -- set_bit(ICE_FLAG_PTP, pf->flags); -+ ptp->state = ICE_PTP_READY; - - /* Restart the PHY timestamping block */ - if (!test_bit(ICE_PFR_REQ, pf->state) && -@@ -2704,6 +2748,7 @@ void ice_ptp_reset(struct ice_pf *pf) - return; - - err: -+ ptp->state = ICE_PTP_ERROR; - dev_err(ice_pf_to_dev(pf), "PTP reset failed %d\n", err); - } - -@@ -2910,39 +2955,6 @@ int ice_ptp_clock_index(struct ice_pf *pf) - return clock ? ptp_clock_index(clock) : -1; - } - --/** -- * ice_ptp_prepare_for_reset - Prepare PTP for reset -- * @pf: Board private structure -- */ --void ice_ptp_prepare_for_reset(struct ice_pf *pf) --{ -- struct ice_ptp *ptp = &pf->ptp; -- u8 src_tmr; -- -- clear_bit(ICE_FLAG_PTP, pf->flags); -- -- /* Disable timestamping for both Tx and Rx */ -- ice_ptp_disable_timestamp_mode(pf); -- -- kthread_cancel_delayed_work_sync(&ptp->work); -- -- if (test_bit(ICE_PFR_REQ, pf->state)) -- return; -- -- ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); -- -- /* Disable periodic outputs */ -- ice_ptp_disable_all_clkout(pf); -- -- src_tmr = ice_get_ptp_src_clock_index(&pf->hw); -- -- /* Disable source clock */ -- wr32(&pf->hw, GLTSYN_ENA(src_tmr), (u32)~GLTSYN_ENA_TSYN_ENA_M); -- -- /* Acquire PHC and system timer to restore after reset */ -- ptp->reset_time = ktime_get_real_ns(); --} -- - /** - * ice_ptp_init_owner - Initialize PTP_1588_CLOCK device - * @pf: Board private structure -@@ -3181,6 +3193,8 @@ void ice_ptp_init(struct ice_pf *pf) - struct ice_hw *hw = &pf->hw; - int err; - -+ ptp->state = ICE_PTP_INITIALIZING; -+ - ice_ptp_init_phy_model(hw); - - ice_ptp_init_tx_interrupt_mode(pf); -@@ -3205,12 +3219,13 @@ void ice_ptp_init(struct ice_pf *pf) - /* Configure initial Tx interrupt settings */ - ice_ptp_cfg_tx_interrupt(pf); - -- set_bit(ICE_FLAG_PTP, pf->flags); -- err = ice_ptp_init_work(pf, ptp); -+ err = ice_ptp_create_auxbus_device(pf); - if (err) - goto err; - -- err = ice_ptp_create_auxbus_device(pf); -+ ptp->state = ICE_PTP_READY; -+ -+ err = ice_ptp_init_work(pf, ptp); - if (err) - goto err; - -@@ -3223,7 +3238,7 @@ void ice_ptp_init(struct ice_pf *pf) - ptp_clock_unregister(ptp->clock); - pf->ptp.clock = NULL; - } -- clear_bit(ICE_FLAG_PTP, pf->flags); -+ ptp->state = ICE_PTP_ERROR; - dev_err(ice_pf_to_dev(pf), "PTP failed %d\n", err); - } - -@@ -3236,9 +3251,11 @@ void ice_ptp_init(struct ice_pf *pf) - */ - void ice_ptp_release(struct ice_pf *pf) - { -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return; - -+ pf->ptp.state = ICE_PTP_UNINIT; -+ - /* Disable timestamping for both Tx and Rx */ - ice_ptp_disable_timestamp_mode(pf); - -@@ -3246,8 +3263,6 @@ void ice_ptp_release(struct ice_pf *pf) - - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); - -- clear_bit(ICE_FLAG_PTP, pf->flags); -- - kthread_cancel_delayed_work_sync(&pf->ptp.work); - - ice_ptp_port_phy_stop(&pf->ptp.port); -@@ -3257,6 +3272,9 @@ void ice_ptp_release(struct ice_pf *pf) - pf->ptp.kworker = NULL; - } - -+ if (ice_pf_src_tmr_owned(pf)) -+ ice_ptp_unregister_auxbus_driver(pf); -+ - if (!pf->ptp.clock) - return; - -@@ -3266,7 +3284,5 @@ void ice_ptp_release(struct ice_pf *pf) - ptp_clock_unregister(pf->ptp.clock); - pf->ptp.clock = NULL; - -- ice_ptp_unregister_auxbus_driver(pf); -- - dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 130e6d2ae9a5..e3cc69692405 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -203,8 +203,17 @@ struct ice_ptp_port_owner { - - #define GLTSYN_TGT_H_IDX_MAX 4 - -+enum ice_ptp_state { -+ ICE_PTP_UNINIT = 0, -+ ICE_PTP_INITIALIZING, -+ ICE_PTP_READY, -+ ICE_PTP_RESETTING, -+ ICE_PTP_ERROR, -+}; -+ - /** - * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK -+ * @state: current state of PTP state machine - * @tx_interrupt_mode: the TX interrupt mode for the PTP clock - * @port: data for the PHY port initialization procedure - * @ports_owner: data for the auxiliary driver owner -@@ -227,6 +236,7 @@ struct ice_ptp_port_owner { - * @late_cached_phc_updates: number of times cached PHC update is late - */ - struct ice_ptp { -+ enum ice_ptp_state state; - enum ice_ptp_tx_interrupt tx_interrupt_mode; - struct ice_ptp_port port; - struct ice_ptp_port_owner ports_owner; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch b/kernel-rt/debian/patches/ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch deleted file mode 100644 index c72ff132..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 68d481b41ee5c177a1376fb82a98c09c148d982a Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:50 -0800 -Subject: [PATCH 17/36] ice: pass reset type to PTP reset functions - -The ice_ptp_prepare_for_reset() and ice_ptp_reset() functions currently -check the pf->flags ICE_FLAG_PFR_REQ bit to determine if the current -reset is a PF reset or not. - -This is problematic, because it is possible that a PF reset and a higher -level reset (CORE reset, GLOBAL reset, EMP reset) are requested -simultaneously. In that case, the driver performs the highest level -reset requested. However, the ICE_FLAG_PFR_REQ flag will still be set. - -The main driver reset functions take an enum ice_reset_req indicating -which reset is actually being performed. Pass this data into the PTP -functions and rely on this instead of relying on the driver flags. - -This ensures that the PTP code performs the proper level of reset that -the driver is actually undergoing. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit c75d5e675a8542274fa0f7e52f3c4db1d4859a0c) -[Adjust the ice_ptp.h with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 4 ++-- - drivers/net/ethernet/intel/ice/ice_ptp.c | 13 +++++++------ - drivers/net/ethernet/intel/ice/ice_ptp.h | 17 +++++++++++++---- - 3 files changed, 22 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 8cfb923198e9..d5321410f2d7 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -615,7 +615,7 @@ ice_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - ice_pf_dis_all_vsi(pf, false); - - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_prepare_for_reset(pf); -+ ice_ptp_prepare_for_reset(pf, reset_type); - - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_exit(pf); -@@ -7533,7 +7533,7 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - * fail. - */ - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_reset(pf); -+ ice_ptp_reset(pf, reset_type); - - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_init(pf); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 36c81c5ee83b..20d1d22235d3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -2621,8 +2621,9 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - /** - * ice_ptp_prepare_for_reset - Prepare PTP for reset - * @pf: Board private structure -+ * @reset_type: the reset type being performed - */ --void ice_ptp_prepare_for_reset(struct ice_pf *pf) -+void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - { - struct ice_ptp *ptp = &pf->ptp; - u8 src_tmr; -@@ -2637,7 +2638,7 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) - - kthread_cancel_delayed_work_sync(&ptp->work); - -- if (test_bit(ICE_PFR_REQ, pf->state)) -+ if (reset_type == ICE_RESET_PFR) - return; - - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); -@@ -2657,8 +2658,9 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) - /** - * ice_ptp_reset - Initialize PTP hardware clock support after reset - * @pf: Board private structure -+ * @reset_type: the reset type being performed - */ --void ice_ptp_reset(struct ice_pf *pf) -+void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - { - struct ice_ptp *ptp = &pf->ptp; - struct ice_hw *hw = &pf->hw; -@@ -2667,15 +2669,14 @@ void ice_ptp_reset(struct ice_pf *pf) - u64 time_diff; - - if (ptp->state == ICE_PTP_READY) { -- ice_ptp_prepare_for_reset(pf); -+ ice_ptp_prepare_for_reset(pf, reset_type); - } else if (ptp->state != ICE_PTP_RESETTING) { - err = -EINVAL; - dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); - goto err; - } - -- if (test_bit(ICE_PFR_REQ, pf->state) || -- !ice_pf_src_tmr_owned(pf)) -+ if (reset_type == ICE_RESET_PFR || !ice_pf_src_tmr_owned(pf)) - goto pfr; - - err = ice_ptp_init_phc(hw); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index e3cc69692405..cd74712a17a1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -315,8 +315,9 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); - void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb); --void ice_ptp_reset(struct ice_pf *pf); --void ice_ptp_prepare_for_reset(struct ice_pf *pf); -+void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type); -+void ice_ptp_prepare_for_reset(struct ice_pf *pf, -+ enum ice_reset_req reset_type); - void ice_ptp_init(struct ice_pf *pf); - void ice_ptp_release(struct ice_pf *pf); - void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup); -@@ -351,8 +352,16 @@ static inline bool ice_ptp_process_ts(struct ice_pf *pf) - static inline void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { } --static inline void ice_ptp_reset(struct ice_pf *pf) { } --static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { } -+ -+static inline void ice_ptp_reset(struct ice_pf *pf, -+ enum ice_reset_req reset_type) -+{ -+} -+ -+static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf, -+ enum ice_reset_req reset_type) -+{ -+} - static inline void ice_ptp_init(struct ice_pf *pf) { } - static inline void ice_ptp_release(struct ice_pf *pf) { } - static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch b/kernel-rt/debian/patches/ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch deleted file mode 100644 index a17f0f89..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 084497314e63f3d92178bc44500a27a277abc378 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:51 -0800 -Subject: [PATCH 18/36] ice: rename verify_cached to has_ready_bitmap - -The tx->verify_cached flag is used to inform the Tx timestamp tracking -code whether it needs to verify the cached Tx timestamp value against -a previous captured value. This is necessary on E810 hardware which does -not have a Tx timestamp ready bitmap. - -In addition, we currently rely on the fact that the -ice_get_phy_tx_tstamp_ready() function returns all 1s for E810 hardware. -Instead of introducing a brand new flag, rename and verify_cached to -has_ready_bitmap, inverting the relevant checks. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 3f2216e8dbce04da5376ea7df410541f7b687cb0) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ - drivers/net/ethernet/intel/ice/ice_ptp.h | 8 +++++--- - 2 files changed, 11 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 20d1d22235d3..a8c6b83579e6 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -606,11 +606,11 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) - * timestamp. If it is not, skip this for now assuming it hasn't yet - * been captured by hardware. - */ -- if (!drop_ts && tx->verify_cached && -+ if (!drop_ts && !tx->has_ready_bitmap && - raw_tstamp == tx->tstamps[idx].cached_tstamp) - return; - -- if (tx->verify_cached && raw_tstamp) -+ if (!tx->has_ready_bitmap && raw_tstamp) - tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); - skb = tx->tstamps[idx].skb; -@@ -751,7 +751,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - * from the last cached timestamp. If it is not, skip this for - * now assuming it hasn't yet been captured by hardware. - */ -- if (!drop_ts && tx->verify_cached && -+ if (!drop_ts && !tx->has_ready_bitmap && - raw_tstamp == tx->tstamps[idx].cached_tstamp) - continue; - -@@ -761,7 +761,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - - skip_ts_read: - spin_lock_irqsave(&tx->lock, flags); -- if (tx->verify_cached && raw_tstamp) -+ if (!tx->has_ready_bitmap && raw_tstamp) - tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); - skb = tx->tstamps[idx].skb; -@@ -1014,7 +1014,7 @@ ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) - tx->block = port / ICE_PORTS_PER_QUAD; - tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; - tx->len = INDEX_PER_PORT_E82X; -- tx->verify_cached = 0; -+ tx->has_ready_bitmap = 1; - - return ice_ptp_alloc_tx_tracker(tx); - } -@@ -1037,7 +1037,7 @@ ice_ptp_init_tx_e810(struct ice_pf *pf, struct ice_ptp_tx *tx) - * verify new timestamps against cached copy of the last read - * timestamp. - */ -- tx->verify_cached = 1; -+ tx->has_ready_bitmap = 0; - - return ice_ptp_alloc_tx_tracker(tx); - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index cd74712a17a1..1486a0b3b016 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -100,7 +100,7 @@ struct ice_perout_channel { - * the last timestamp we read for a given index. If the current timestamp - * value is the same as the cached value, we assume a new timestamp hasn't - * been captured. This avoids reporting stale timestamps to the stack. This is -- * only done if the verify_cached flag is set in ice_ptp_tx structure. -+ * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure. - */ - struct ice_tx_tstamp { - struct sk_buff *skb; -@@ -130,7 +130,9 @@ enum ice_tx_tstamp_work { - * @init: if true, the tracker is initialized; - * @calibrating: if true, the PHY is calibrating the Tx offset. During this - * window, timestamps are temporarily disabled. -- * @verify_cached: if true, verify new timestamp differs from last read value -+ * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready -+ * bitmap register. If false, fall back to verifying new -+ * timestamp values against previously cached copy. - * @last_ll_ts_idx_read: index of the last LL TS read by the FW - */ - struct ice_ptp_tx { -@@ -143,7 +145,7 @@ struct ice_ptp_tx { - u8 len; - u8 init : 1; - u8 calibrating : 1; -- u8 verify_cached : 1; -+ u8 has_ready_bitmap : 1; - s8 last_ll_ts_idx_read; - }; - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch b/kernel-rt/debian/patches/ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch deleted file mode 100644 index d1701f9e..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 375bced6b51243a8c8708204dd32960d076d5b83 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:52 -0800 -Subject: [PATCH 19/36] ice: don't check has_ready_bitmap in E810 functions - -E810 hardware does not have a Tx timestamp ready bitmap. Don't check -has_ready_bitmap in E810-specific functions. -Add has_ready_bitmap check in ice_ptp_process_tx_tstamp() to stop -relying on the fact that ice_get_phy_tx_tstamp_ready() returns all 1s. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit fea82915fca626eaa83f36d8a23194e8593ef4b4) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 23 +++++++++++------------ - 1 file changed, 11 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index a8c6b83579e6..ddc2dd0b2a28 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -601,17 +601,13 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) - /* Read the low 32 bit value */ - raw_tstamp |= (u64)rd32(&pf->hw, PF_SB_ATQBAH); - -- /* For PHYs which don't implement a proper timestamp ready bitmap, -- * verify that the timestamp value is different from the last cached -- * timestamp. If it is not, skip this for now assuming it hasn't yet -- * been captured by hardware. -+ /* Devices using this interface always verify the timestamp differs -+ * relative to the last cached timestamp value. - */ -- if (!drop_ts && !tx->has_ready_bitmap && -- raw_tstamp == tx->tstamps[idx].cached_tstamp) -+ if (raw_tstamp == tx->tstamps[idx].cached_tstamp) - return; - -- if (!tx->has_ready_bitmap && raw_tstamp) -- tx->tstamps[idx].cached_tstamp = raw_tstamp; -+ tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); - skb = tx->tstamps[idx].skb; - tx->tstamps[idx].skb = NULL; -@@ -701,9 +697,11 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - hw = &pf->hw; - - /* Read the Tx ready status first */ -- err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); -- if (err) -- return; -+ if (tx->has_ready_bitmap) { -+ err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); -+ if (err) -+ return; -+ } - - /* Drop packets if the link went down */ - link_up = ptp_port->link_up; -@@ -731,7 +729,8 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - * If we do not, the hardware logic for generating a new - * interrupt can get stuck on some devices. - */ -- if (!(tstamp_ready & BIT_ULL(phy_idx))) { -+ if (tx->has_ready_bitmap && -+ !(tstamp_ready & BIT_ULL(phy_idx))) { - if (drop_ts) - goto skip_ts_read; - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch b/kernel-rt/debian/patches/ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch deleted file mode 100644 index 30d0631e..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch +++ /dev/null @@ -1,88 +0,0 @@ -From a5318a3a04ed9535ab18ef0f0537b3d33862bee9 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:53 -0800 -Subject: [PATCH 20/36] ice: rename ice_ptp_tx_cfg_intr - -The ice_ptp_tx_cfg_intr() function sends a control queue message to -configure the PHY timestamp interrupt block. This is a very similar name -to a function which is used to configure the MAC Other Interrupt Cause -Enable register. - -Rename this function to ice_ptp_cfg_phy_interrupt in order to make it -more obvious to the reader what action it performs, and distinguish it -from other similarly named functions. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 1abefdca85e8664374f53c7bc80d5f5f827ce711) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index ddc2dd0b2a28..c6e9d77fc59b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1455,14 +1455,14 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - } - - /** -- * ice_ptp_tx_ena_intr - Enable or disable the Tx timestamp interrupt -+ * ice_ptp_cfg_phy_interrupt - Configure PHY interrupt settings - * @pf: PF private structure - * @ena: bool value to enable or disable interrupt - * @threshold: Minimum number of packets at which intr is triggered - * - * Utility function to enable or disable Tx timestamp interrupt and threshold - */ --static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) -+static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold) - { - struct ice_hw *hw = &pf->hw; - int err = 0; -@@ -2664,8 +2664,8 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - struct ice_ptp *ptp = &pf->ptp; - struct ice_hw *hw = &pf->hw; - struct timespec64 ts; -- int err, itr = 1; - u64 time_diff; -+ int err; - - if (ptp->state == ICE_PTP_READY) { - ice_ptp_prepare_for_reset(pf, reset_type); -@@ -2716,7 +2716,7 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ -- err = ice_ptp_tx_ena_intr(pf, true, itr); -+ err = ice_ptp_cfg_phy_interrupt(pf, true, 1); - if (err) - goto err; - } -@@ -2967,7 +2967,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - { - struct ice_hw *hw = &pf->hw; - struct timespec64 ts; -- int err, itr = 1; -+ int err; - - err = ice_ptp_init_phc(hw); - if (err) { -@@ -3002,7 +3002,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ -- err = ice_ptp_tx_ena_intr(pf, true, itr); -+ err = ice_ptp_cfg_phy_interrupt(pf, true, 1); - if (err) - goto err_exit; - } --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch b/kernel-rt/debian/patches/ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch deleted file mode 100644 index 075359c8..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch +++ /dev/null @@ -1,191 +0,0 @@ -From 9411c5b82a7196b9712488631fd14e67e2d919fa Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:54 -0800 -Subject: [PATCH 21/36] ice: factor out ice_ptp_rebuild_owner() - -The ice_ptp_reset() function uses a goto to skip past clock owner -operations if performing a PF reset or if the device is not the clock -owner. This is a bit confusing. Factor this out into -ice_ptp_rebuild_owner() instead. - -The ice_ptp_reset() function is called by ice_rebuild() to restore PTP -functionality after a device reset. Follow the convention set by the -ice_main.c file and rename this function to ice_ptp_rebuild(), in the -same way that we have ice_prepare_for_reset() and -ice_ptp_prepare_for_reset(). - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 803bef817807d2d36c930dada20c96fffae0dd19) -[Adjust ice_ptp.h with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 62 ++++++++++++++--------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 6 +-- - 3 files changed, 42 insertions(+), 28 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index d5321410f2d7..a04dcc89c35d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -7533,7 +7533,7 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - * fail. - */ - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_reset(pf, reset_type); -+ ice_ptp_rebuild(pf, reset_type); - - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_init(pf); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index c6e9d77fc59b..780aa242c86b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -2655,11 +2655,13 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - } - - /** -- * ice_ptp_reset - Initialize PTP hardware clock support after reset -+ * ice_ptp_rebuild_owner - Initialize PTP clock owner after reset - * @pf: Board private structure -- * @reset_type: the reset type being performed -+ * -+ * Companion function for ice_ptp_rebuild() which handles tasks that only the -+ * PTP clock owner instance should perform. - */ --void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) -+static int ice_ptp_rebuild_owner(struct ice_pf *pf) - { - struct ice_ptp *ptp = &pf->ptp; - struct ice_hw *hw = &pf->hw; -@@ -2667,32 +2669,21 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - u64 time_diff; - int err; - -- if (ptp->state == ICE_PTP_READY) { -- ice_ptp_prepare_for_reset(pf, reset_type); -- } else if (ptp->state != ICE_PTP_RESETTING) { -- err = -EINVAL; -- dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); -- goto err; -- } -- -- if (reset_type == ICE_RESET_PFR || !ice_pf_src_tmr_owned(pf)) -- goto pfr; -- - err = ice_ptp_init_phc(hw); - if (err) -- goto err; -+ return err; - - /* Acquire the global hardware lock */ - if (!ice_ptp_lock(hw)) { - err = -EBUSY; -- goto err; -+ return err; - } - - /* Write the increment time value to PHY and LAN */ - err = ice_ptp_write_incval(hw, ice_base_incval(pf)); - if (err) { - ice_ptp_unlock(hw); -- goto err; -+ return err; - } - - /* Write the initial Time value to PHY and LAN using the cached PHC -@@ -2708,7 +2699,7 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - err = ice_ptp_write_init(pf, &ts); - if (err) { - ice_ptp_unlock(hw); -- goto err; -+ return err; - } - - /* Release the global hardware lock */ -@@ -2717,11 +2708,39 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ - err = ice_ptp_cfg_phy_interrupt(pf, true, 1); -+ if (err) -+ return err; -+ -+ ice_ptp_restart_all_phy(pf); -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_ptp_rebuild - Initialize PTP hardware clock support after reset -+ * @pf: Board private structure -+ * @reset_type: the reset type being performed -+ */ -+void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) -+{ -+ struct ice_ptp *ptp = &pf->ptp; -+ int err; -+ -+ if (ptp->state == ICE_PTP_READY) { -+ ice_ptp_prepare_for_reset(pf, reset_type); -+ } else if (ptp->state != ICE_PTP_RESETTING) { -+ err = -EINVAL; -+ dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); -+ goto err; -+ } -+ -+ if (ice_pf_src_tmr_owned(pf) && reset_type != ICE_RESET_PFR) { -+ err = ice_ptp_rebuild_owner(pf); - if (err) - goto err; - } - --pfr: - /* Init Tx structures */ - if (ice_is_e810(&pf->hw)) { - err = ice_ptp_init_tx_e810(pf, &ptp->port.tx); -@@ -2736,11 +2755,6 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - - ptp->state = ICE_PTP_READY; - -- /* Restart the PHY timestamping block */ -- if (!test_bit(ICE_PFR_REQ, pf->state) && -- ice_pf_src_tmr_owned(pf)) -- ice_ptp_restart_all_phy(pf); -- - /* Start periodic work going */ - kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 1486a0b3b016..352405a2daf2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -317,7 +317,7 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); - void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb); --void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type); -+void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type); - void ice_ptp_prepare_for_reset(struct ice_pf *pf, - enum ice_reset_req reset_type); - void ice_ptp_init(struct ice_pf *pf); -@@ -355,8 +355,8 @@ static inline void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { } - --static inline void ice_ptp_reset(struct ice_pf *pf, -- enum ice_reset_req reset_type) -+static inline void ice_ptp_rebuild(struct ice_pf *pf, -+ enum ice_reset_req reset_type) - { - } - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch b/kernel-rt/debian/patches/ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch deleted file mode 100644 index 8e2133b5..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 1c89a9e26f669bead5ebcac38fa98c20c517769c Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:55 -0800 -Subject: [PATCH 22/36] ice: stop destroying and reinitalizing Tx tracker - during reset - -The ice driver currently attempts to destroy and re-initialize the Tx -timestamp tracker during the reset flow. The release of the Tx tracker -only happened during CORE reset or GLOBAL reset. The ice_ptp_rebuild() -function always calls the ice_ptp_init_tx function which will allocate -a new tracker data structure, resulting in memory leaks during PF reset. - -Certainly the driver should not be allocating a new tracker without -removing the old tracker data, as this results in a memory leak. -Additionally, there's no reason to remove the tracker memory during a -reset. Remove this logic from the reset and rebuild flow. Instead of -releasing the Tx tracker, flush outstanding timestamps just before we -reset the PHY timestamp block in ice_ptp_cfg_phy_interrupt(). - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 7a25fe5cd5fb2265065ac6765c53c0a1f1e874d3) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 33 +++++++++++++++--------- - 1 file changed, 21 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 780aa242c86b..48ec59fc5d87 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -963,6 +963,22 @@ ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) - spin_unlock_irqrestore(&tx->lock, flags); - } - -+/** -+ * ice_ptp_flush_all_tx_tracker - Flush all timestamp trackers on this clock -+ * @pf: Board private structure -+ * -+ * Called by the clock owner to flush all the Tx timestamp trackers associated -+ * with the clock. -+ */ -+static void -+ice_ptp_flush_all_tx_tracker(struct ice_pf *pf) -+{ -+ struct ice_ptp_port *port; -+ -+ list_for_each_entry(port, &pf->ptp.ports_owner.ports, list_member) -+ ice_ptp_flush_tx_tracker(ptp_port_to_pf(port), &port->tx); -+} -+ - /** - * ice_ptp_release_tx_tracker - Release allocated memory for Tx tracker - * @pf: Board private structure -@@ -2705,6 +2721,11 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) - /* Release the global hardware lock */ - ice_ptp_unlock(hw); - -+ /* Flush software tracking of any outstanding timestamps since we're -+ * about to flush the PHY timestamp block. -+ */ -+ ice_ptp_flush_all_tx_tracker(pf); -+ - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ - err = ice_ptp_cfg_phy_interrupt(pf, true, 1); -@@ -2741,18 +2762,6 @@ void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - goto err; - } - -- /* Init Tx structures */ -- if (ice_is_e810(&pf->hw)) { -- err = ice_ptp_init_tx_e810(pf, &ptp->port.tx); -- } else { -- kthread_init_delayed_work(&ptp->port.ov_work, -- ice_ptp_wait_for_offsets); -- err = ice_ptp_init_tx_e82x(pf, &ptp->port.tx, -- ptp->port.port_num); -- } -- if (err) -- goto err; -- - ptp->state = ICE_PTP_READY; - - /* Start periodic work going */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch b/kernel-rt/debian/patches/ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch deleted file mode 100644 index 3a902574..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch +++ /dev/null @@ -1,457 +0,0 @@ -From 6f1d1fa58f58ff3f6ce61ab502bd29227ca1bb3f Mon Sep 17 00:00:00 2001 -From: Wojciech Drewek -Date: Mon, 5 Feb 2024 14:03:56 +0100 -Subject: [PATCH 23/36] ice: Remove and readd netdev during devlink reload - -Recent changes to the devlink reload (commit 9b2348e2d6c9 -("devlink: warn about existing entities during reload-reinit")) -force the drivers to destroy devlink ports during reinit. -Adjust ice driver to this requirement, unregister netdvice, destroy -devlink port. ice_init_eth() was removed and all the common code -between probe and reload was moved to ice_load(). - -During devlink reload we can't take devl_lock (it's already taken) -and in ice_probe() we have to lock it. Use devl_* variant of the API -which does not acquire and release devl_lock. Guard ice_load() -with devl_lock only in case of probe. - -Suggested-by: Jiri Pirko -Reviewed-by: Przemek Kitszel -Reviewed-by: Vadim Fedorenko -Reviewed-by: Simon Horman -Reviewed-by: Brett Creeley -Signed-off-by: Wojciech Drewek -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 41cc4e53934c30f1cf7745c257154e538c78a1f5) -[Adjust ice.h with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 + - drivers/net/ethernet/intel/ice/ice_devlink.c | 68 ++++++- - drivers/net/ethernet/intel/ice/ice_main.c | 186 ++++++------------- - 3 files changed, 125 insertions(+), 131 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 3278d032a2bd..d3f72f9fbcd7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -978,6 +978,8 @@ int ice_stop(struct net_device *netdev); - void ice_service_task_schedule(struct ice_pf *pf); - int ice_load(struct ice_pf *pf); - void ice_unload(struct ice_pf *pf); -+int ice_init_dev(struct ice_pf *pf); -+void ice_deinit_dev(struct ice_pf *pf); - - /** - * ice_set_rdma_cap - enable RDMA support -diff --git a/drivers/net/ethernet/intel/ice/ice_devlink.c b/drivers/net/ethernet/intel/ice/ice_devlink.c -index 3a2261823d93..43007e3674c4 100644 ---- a/drivers/net/ethernet/intel/ice/ice_devlink.c -+++ b/drivers/net/ethernet/intel/ice/ice_devlink.c -@@ -444,6 +444,20 @@ ice_devlink_reload_empr_start(struct ice_pf *pf, - return 0; - } - -+/** -+ * ice_devlink_reinit_down - unload given PF -+ * @pf: pointer to the PF struct -+ */ -+static void ice_devlink_reinit_down(struct ice_pf *pf) -+{ -+ /* No need to take devl_lock, it's already taken by devlink API */ -+ ice_unload(pf); -+ rtnl_lock(); -+ ice_vsi_decfg(ice_get_main_vsi(pf)); -+ rtnl_unlock(); -+ ice_deinit_dev(pf); -+} -+ - /** - * ice_devlink_reload_down - prepare for reload - * @devlink: pointer to the devlink instance to reload -@@ -477,7 +491,7 @@ ice_devlink_reload_down(struct devlink *devlink, bool netns_change, - "Remove all VFs before doing reinit\n"); - return -EOPNOTSUPP; - } -- ice_unload(pf); -+ ice_devlink_reinit_down(pf); - return 0; - case DEVLINK_RELOAD_ACTION_FW_ACTIVATE: - return ice_devlink_reload_empr_start(pf, extack); -@@ -1240,6 +1254,45 @@ static int ice_devlink_set_parent(struct devlink_rate *devlink_rate, - return status; - } - -+/** -+ * ice_devlink_reinit_up - do reinit of the given PF -+ * @pf: pointer to the PF struct -+ */ -+static int ice_devlink_reinit_up(struct ice_pf *pf) -+{ -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ struct ice_vsi_cfg_params params; -+ int err; -+ -+ err = ice_init_dev(pf); -+ if (err) -+ return err; -+ -+ params = ice_vsi_to_params(vsi); -+ params.flags = ICE_VSI_FLAG_INIT; -+ -+ rtnl_lock(); -+ err = ice_vsi_cfg(vsi, ¶ms); -+ rtnl_unlock(); -+ if (err) -+ goto err_vsi_cfg; -+ -+ /* No need to take devl_lock, it's already taken by devlink API */ -+ err = ice_load(pf); -+ if (err) -+ goto err_load; -+ -+ return 0; -+ -+err_load: -+ rtnl_lock(); -+ ice_vsi_decfg(vsi); -+ rtnl_unlock(); -+err_vsi_cfg: -+ ice_deinit_dev(pf); -+ return err; -+} -+ - /** - * ice_devlink_reload_up - do reload up after reinit - * @devlink: pointer to the devlink instance reloading -@@ -1260,7 +1313,7 @@ ice_devlink_reload_up(struct devlink *devlink, - switch (action) { - case DEVLINK_RELOAD_ACTION_DRIVER_REINIT: - *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT); -- return ice_load(pf); -+ return ice_devlink_reinit_up(pf); - case DEVLINK_RELOAD_ACTION_FW_ACTIVATE: - *actions_performed = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE); - return ice_devlink_reload_empr_finish(pf, extack); -@@ -1540,6 +1593,7 @@ static const struct devlink_port_ops ice_devlink_port_ops = { - * @pf: the PF to create a devlink port for - * - * Create and register a devlink_port for this PF. -+ * This function has to be called under devl_lock. - * - * Return: zero on success or an error code on failure. - */ -@@ -1552,6 +1606,8 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) - struct device *dev; - int err; - -+ devlink = priv_to_devlink(pf); -+ - dev = ice_pf_to_dev(pf); - - devlink_port = &pf->devlink_port; -@@ -1572,10 +1628,9 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) - ice_devlink_set_switch_id(pf, &attrs.switch_id); - - devlink_port_attrs_set(devlink_port, &attrs); -- devlink = priv_to_devlink(pf); - -- err = devlink_port_register_with_ops(devlink, devlink_port, vsi->idx, -- &ice_devlink_port_ops); -+ err = devl_port_register_with_ops(devlink, devlink_port, vsi->idx, -+ &ice_devlink_port_ops); - if (err) { - dev_err(dev, "Failed to create devlink port for PF %d, error %d\n", - pf->hw.pf_id, err); -@@ -1590,10 +1645,11 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) - * @pf: the PF to cleanup - * - * Unregisters the devlink_port structure associated with this PF. -+ * This function has to be called under devl_lock. - */ - void ice_devlink_destroy_pf_port(struct ice_pf *pf) - { -- devlink_port_unregister(&pf->devlink_port); -+ devl_port_unregister(&pf->devlink_port); - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index a04dcc89c35d..d3340114297a 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -4588,90 +4588,6 @@ static void ice_decfg_netdev(struct ice_vsi *vsi) - vsi->netdev = NULL; - } - --static int ice_start_eth(struct ice_vsi *vsi) --{ -- int err; -- -- err = ice_init_mac_fltr(vsi->back); -- if (err) -- return err; -- -- err = ice_vsi_open(vsi); -- if (err) -- ice_fltr_remove_all(vsi); -- -- return err; --} -- --static void ice_stop_eth(struct ice_vsi *vsi) --{ -- ice_fltr_remove_all(vsi); -- ice_vsi_close(vsi); --} -- --static int ice_init_eth(struct ice_pf *pf) --{ -- struct ice_vsi *vsi = ice_get_main_vsi(pf); -- int err; -- -- if (!vsi) -- return -EINVAL; -- -- /* init channel list */ -- INIT_LIST_HEAD(&vsi->ch_list); -- -- err = ice_cfg_netdev(vsi); -- if (err) -- return err; -- /* Setup DCB netlink interface */ -- ice_dcbnl_setup(vsi); -- -- err = ice_init_mac_fltr(pf); -- if (err) -- goto err_init_mac_fltr; -- -- err = ice_devlink_create_pf_port(pf); -- if (err) -- goto err_devlink_create_pf_port; -- -- SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port); -- -- err = ice_register_netdev(vsi); -- if (err) -- goto err_register_netdev; -- -- err = ice_tc_indir_block_register(vsi); -- if (err) -- goto err_tc_indir_block_register; -- -- ice_napi_add(vsi); -- -- return 0; -- --err_tc_indir_block_register: -- ice_unregister_netdev(vsi); --err_register_netdev: -- ice_devlink_destroy_pf_port(pf); --err_devlink_create_pf_port: --err_init_mac_fltr: -- ice_decfg_netdev(vsi); -- return err; --} -- --static void ice_deinit_eth(struct ice_pf *pf) --{ -- struct ice_vsi *vsi = ice_get_main_vsi(pf); -- -- if (!vsi) -- return; -- -- ice_vsi_close(vsi); -- ice_unregister_netdev(vsi); -- ice_devlink_destroy_pf_port(pf); -- ice_tc_indir_block_unregister(vsi); -- ice_decfg_netdev(vsi); --} -- - /** - * ice_wait_for_fw - wait for full FW readiness - * @hw: pointer to the hardware structure -@@ -4697,7 +4613,7 @@ static int ice_wait_for_fw(struct ice_hw *hw, u32 timeout) - return -ETIMEDOUT; - } - --static int ice_init_dev(struct ice_pf *pf) -+int ice_init_dev(struct ice_pf *pf) - { - struct device *dev = ice_pf_to_dev(pf); - struct ice_hw *hw = &pf->hw; -@@ -4790,7 +4706,7 @@ static int ice_init_dev(struct ice_pf *pf) - return err; - } - --static void ice_deinit_dev(struct ice_pf *pf) -+void ice_deinit_dev(struct ice_pf *pf) - { - ice_free_irq_msix_misc(pf); - ice_deinit_pf(pf); -@@ -5091,31 +5007,47 @@ static void ice_deinit(struct ice_pf *pf) - /** - * ice_load - load pf by init hw and starting VSI - * @pf: pointer to the pf instance -+ * -+ * This function has to be called under devl_lock. - */ - int ice_load(struct ice_pf *pf) - { -- struct ice_vsi_cfg_params params = {}; - struct ice_vsi *vsi; - int err; - -- err = ice_init_dev(pf); -+ devl_assert_locked(priv_to_devlink(pf)); -+ -+ vsi = ice_get_main_vsi(pf); -+ -+ /* init channel list */ -+ INIT_LIST_HEAD(&vsi->ch_list); -+ -+ err = ice_cfg_netdev(vsi); - if (err) - return err; - -- vsi = ice_get_main_vsi(pf); -+ /* Setup DCB netlink interface */ -+ ice_dcbnl_setup(vsi); - -- params = ice_vsi_to_params(vsi); -- params.flags = ICE_VSI_FLAG_INIT; -+ err = ice_init_mac_fltr(pf); -+ if (err) -+ goto err_init_mac_fltr; - -- rtnl_lock(); -- err = ice_vsi_cfg(vsi, ¶ms); -+ err = ice_devlink_create_pf_port(pf); - if (err) -- goto err_vsi_cfg; -+ goto err_devlink_create_pf_port; - -- err = ice_start_eth(ice_get_main_vsi(pf)); -+ SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port); -+ -+ err = ice_register_netdev(vsi); -+ if (err) -+ goto err_register_netdev; -+ -+ err = ice_tc_indir_block_register(vsi); - if (err) -- goto err_start_eth; -- rtnl_unlock(); -+ goto err_tc_indir_block_register; -+ -+ ice_napi_add(vsi); - - err = ice_init_rdma(pf); - if (err) -@@ -5129,29 +5061,35 @@ int ice_load(struct ice_pf *pf) - return 0; - - err_init_rdma: -- ice_vsi_close(ice_get_main_vsi(pf)); -- rtnl_lock(); --err_start_eth: -- ice_vsi_decfg(ice_get_main_vsi(pf)); --err_vsi_cfg: -- rtnl_unlock(); -- ice_deinit_dev(pf); -+ ice_tc_indir_block_unregister(vsi); -+err_tc_indir_block_register: -+ ice_unregister_netdev(vsi); -+err_register_netdev: -+ ice_devlink_destroy_pf_port(pf); -+err_devlink_create_pf_port: -+err_init_mac_fltr: -+ ice_decfg_netdev(vsi); - return err; - } - - /** - * ice_unload - unload pf by stopping VSI and deinit hw - * @pf: pointer to the pf instance -+ * -+ * This function has to be called under devl_lock. - */ - void ice_unload(struct ice_pf *pf) - { -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ -+ devl_assert_locked(priv_to_devlink(pf)); -+ - ice_deinit_features(pf); - ice_deinit_rdma(pf); -- rtnl_lock(); -- ice_stop_eth(ice_get_main_vsi(pf)); -- ice_vsi_decfg(ice_get_main_vsi(pf)); -- rtnl_unlock(); -- ice_deinit_dev(pf); -+ ice_tc_indir_block_unregister(vsi); -+ ice_unregister_netdev(vsi); -+ ice_devlink_destroy_pf_port(pf); -+ ice_decfg_netdev(vsi); - } - - /** -@@ -5249,27 +5187,23 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - if (err) - goto err_init; - -- err = ice_init_eth(pf); -+ devl_lock(priv_to_devlink(pf)); -+ err = ice_load(pf); -+ devl_unlock(priv_to_devlink(pf)); - if (err) -- goto err_init_eth; -- -- err = ice_init_rdma(pf); -- if (err) -- goto err_init_rdma; -+ goto err_load; - - err = ice_init_devlink(pf); - if (err) - goto err_init_devlink; - -- ice_init_features(pf); -- - return 0; - - err_init_devlink: -- ice_deinit_rdma(pf); --err_init_rdma: -- ice_deinit_eth(pf); --err_init_eth: -+ devl_lock(priv_to_devlink(pf)); -+ ice_unload(pf); -+ devl_unlock(priv_to_devlink(pf)); -+err_load: - ice_deinit(pf); - err_init: - pci_disable_device(pdev); -@@ -5363,12 +5297,14 @@ static void ice_remove(struct pci_dev *pdev) - - if (!ice_is_safe_mode(pf)) - ice_remove_arfs(pf); -- ice_deinit_features(pf); -+ - ice_deinit_devlink(pf); -- ice_deinit_rdma(pf); -- ice_deinit_eth(pf); -- ice_deinit(pf); - -+ devl_lock(priv_to_devlink(pf)); -+ ice_unload(pf); -+ devl_unlock(priv_to_devlink(pf)); -+ -+ ice_deinit(pf); - ice_vsi_release_all(pf); - - ice_setup_mc_magic_wake(pf); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0024-ice-remove-FW-logging-code.patch b/kernel-rt/debian/patches/ice-VDF/0024-ice-remove-FW-logging-code.patch deleted file mode 100644 index 23bb1f17..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0024-ice-remove-FW-logging-code.patch +++ /dev/null @@ -1,434 +0,0 @@ -From e110839c4d9bfa4c885877a69573f48c008d3edd Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:11 -0800 -Subject: [PATCH 24/36] ice: remove FW logging code - -The FW logging code doesn't work because there is no way to set -cq_ena or uart_ena so remove the code. This code is the original -(v1) way of FW logging so it should be replaced with the v2 way. - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 1953fc720e603721764f31daae216a2851664167) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 78 ------- - drivers/net/ethernet/intel/ice/ice_common.c | 217 ------------------ - drivers/net/ethernet/intel/ice/ice_common.h | 1 - - drivers/net/ethernet/intel/ice/ice_main.c | 3 - - drivers/net/ethernet/intel/ice/ice_type.h | 20 -- - 5 files changed, 319 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 9bacb69ead8c..3b289e6a225b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2032,78 +2032,6 @@ struct ice_aqc_add_rdma_qset_data { - struct ice_aqc_add_tx_rdma_qset_entry rdma_qsets[]; - }; - --/* Configure Firmware Logging Command (indirect 0xFF09) -- * Logging Information Read Response (indirect 0xFF10) -- * Note: The 0xFF10 command has no input parameters. -- */ --struct ice_aqc_fw_logging { -- u8 log_ctrl; --#define ICE_AQC_FW_LOG_AQ_EN BIT(0) --#define ICE_AQC_FW_LOG_UART_EN BIT(1) -- u8 rsvd0; -- u8 log_ctrl_valid; /* Not used by 0xFF10 Response */ --#define ICE_AQC_FW_LOG_AQ_VALID BIT(0) --#define ICE_AQC_FW_LOG_UART_VALID BIT(1) -- u8 rsvd1[5]; -- __le32 addr_high; -- __le32 addr_low; --}; -- --enum ice_aqc_fw_logging_mod { -- ICE_AQC_FW_LOG_ID_GENERAL = 0, -- ICE_AQC_FW_LOG_ID_CTRL, -- ICE_AQC_FW_LOG_ID_LINK, -- ICE_AQC_FW_LOG_ID_LINK_TOPO, -- ICE_AQC_FW_LOG_ID_DNL, -- ICE_AQC_FW_LOG_ID_I2C, -- ICE_AQC_FW_LOG_ID_SDP, -- ICE_AQC_FW_LOG_ID_MDIO, -- ICE_AQC_FW_LOG_ID_ADMINQ, -- ICE_AQC_FW_LOG_ID_HDMA, -- ICE_AQC_FW_LOG_ID_LLDP, -- ICE_AQC_FW_LOG_ID_DCBX, -- ICE_AQC_FW_LOG_ID_DCB, -- ICE_AQC_FW_LOG_ID_NETPROXY, -- ICE_AQC_FW_LOG_ID_NVM, -- ICE_AQC_FW_LOG_ID_AUTH, -- ICE_AQC_FW_LOG_ID_VPD, -- ICE_AQC_FW_LOG_ID_IOSF, -- ICE_AQC_FW_LOG_ID_PARSER, -- ICE_AQC_FW_LOG_ID_SW, -- ICE_AQC_FW_LOG_ID_SCHEDULER, -- ICE_AQC_FW_LOG_ID_TXQ, -- ICE_AQC_FW_LOG_ID_RSVD, -- ICE_AQC_FW_LOG_ID_POST, -- ICE_AQC_FW_LOG_ID_WATCHDOG, -- ICE_AQC_FW_LOG_ID_TASK_DISPATCH, -- ICE_AQC_FW_LOG_ID_MNG, -- ICE_AQC_FW_LOG_ID_MAX, --}; -- --/* Defines for both above FW logging command/response buffers */ --#define ICE_AQC_FW_LOG_ID_S 0 --#define ICE_AQC_FW_LOG_ID_M (0xFFF << ICE_AQC_FW_LOG_ID_S) -- --#define ICE_AQC_FW_LOG_CONF_SUCCESS 0 /* Used by response */ --#define ICE_AQC_FW_LOG_CONF_BAD_INDX BIT(12) /* Used by response */ -- --#define ICE_AQC_FW_LOG_EN_S 12 --#define ICE_AQC_FW_LOG_EN_M (0xF << ICE_AQC_FW_LOG_EN_S) --#define ICE_AQC_FW_LOG_INFO_EN BIT(12) /* Used by command */ --#define ICE_AQC_FW_LOG_INIT_EN BIT(13) /* Used by command */ --#define ICE_AQC_FW_LOG_FLOW_EN BIT(14) /* Used by command */ --#define ICE_AQC_FW_LOG_ERR_EN BIT(15) /* Used by command */ -- --/* Get/Clear FW Log (indirect 0xFF11) */ --struct ice_aqc_get_clear_fw_log { -- u8 flags; --#define ICE_AQC_FW_LOG_CLEAR BIT(0) --#define ICE_AQC_FW_LOG_MORE_DATA_AVAIL BIT(1) -- u8 rsvd1[7]; -- __le32 addr_high; -- __le32 addr_low; --}; -- - /* Download Package (indirect 0x0C40) */ - /* Also used for Update Package (indirect 0x0C41 and 0x0C42) */ - struct ice_aqc_download_pkg { -@@ -2448,8 +2376,6 @@ struct ice_aq_desc { - struct ice_aqc_add_rdma_qset add_rdma_qset; - struct ice_aqc_add_get_update_free_vsi vsi_cmd; - struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res; -- struct ice_aqc_fw_logging fw_logging; -- struct ice_aqc_get_clear_fw_log get_clear_fw_log; - struct ice_aqc_download_pkg download_pkg; - struct ice_aqc_set_cgu_input_config set_cgu_input_config; - struct ice_aqc_get_cgu_input_config get_cgu_input_config; -@@ -2657,10 +2583,6 @@ enum ice_adminq_opc { - - /* Standalone Commands/Events */ - ice_aqc_opc_event_lan_overflow = 0x1001, -- -- /* debug commands */ -- ice_aqc_opc_fw_logging = 0xFF09, -- ice_aqc_opc_fw_logging_info = 0xFF10, - }; - - #endif /* _ICE_ADMINQ_CMD_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index acf6ac00f804..a5c4b7ad6a20 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -897,216 +897,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) - devm_kfree(ice_hw_to_dev(hw), sw); - } - --/** -- * ice_get_fw_log_cfg - get FW logging configuration -- * @hw: pointer to the HW struct -- */ --static int ice_get_fw_log_cfg(struct ice_hw *hw) --{ -- struct ice_aq_desc desc; -- __le16 *config; -- int status; -- u16 size; -- -- size = sizeof(*config) * ICE_AQC_FW_LOG_ID_MAX; -- config = kzalloc(size, GFP_KERNEL); -- if (!config) -- return -ENOMEM; -- -- ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging_info); -- -- status = ice_aq_send_cmd(hw, &desc, config, size, NULL); -- if (!status) { -- u16 i; -- -- /* Save FW logging information into the HW structure */ -- for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { -- u16 v, m, flgs; -- -- v = le16_to_cpu(config[i]); -- m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; -- flgs = (v & ICE_AQC_FW_LOG_EN_M) >> ICE_AQC_FW_LOG_EN_S; -- -- if (m < ICE_AQC_FW_LOG_ID_MAX) -- hw->fw_log.evnts[m].cur = flgs; -- } -- } -- -- kfree(config); -- -- return status; --} -- --/** -- * ice_cfg_fw_log - configure FW logging -- * @hw: pointer to the HW struct -- * @enable: enable certain FW logging events if true, disable all if false -- * -- * This function enables/disables the FW logging via Rx CQ events and a UART -- * port based on predetermined configurations. FW logging via the Rx CQ can be -- * enabled/disabled for individual PF's. However, FW logging via the UART can -- * only be enabled/disabled for all PFs on the same device. -- * -- * To enable overall FW logging, the "cq_en" and "uart_en" enable bits in -- * hw->fw_log need to be set accordingly, e.g. based on user-provided input, -- * before initializing the device. -- * -- * When re/configuring FW logging, callers need to update the "cfg" elements of -- * the hw->fw_log.evnts array with the desired logging event configurations for -- * modules of interest. When disabling FW logging completely, the callers can -- * just pass false in the "enable" parameter. On completion, the function will -- * update the "cur" element of the hw->fw_log.evnts array with the resulting -- * logging event configurations of the modules that are being re/configured. FW -- * logging modules that are not part of a reconfiguration operation retain their -- * previous states. -- * -- * Before resetting the device, it is recommended that the driver disables FW -- * logging before shutting down the control queue. When disabling FW logging -- * ("enable" = false), the latest configurations of FW logging events stored in -- * hw->fw_log.evnts[] are not overridden to allow them to be reconfigured after -- * a device reset. -- * -- * When enabling FW logging to emit log messages via the Rx CQ during the -- * device's initialization phase, a mechanism alternative to interrupt handlers -- * needs to be used to extract FW log messages from the Rx CQ periodically and -- * to prevent the Rx CQ from being full and stalling other types of control -- * messages from FW to SW. Interrupts are typically disabled during the device's -- * initialization phase. -- */ --static int ice_cfg_fw_log(struct ice_hw *hw, bool enable) --{ -- struct ice_aqc_fw_logging *cmd; -- u16 i, chgs = 0, len = 0; -- struct ice_aq_desc desc; -- __le16 *data = NULL; -- u8 actv_evnts = 0; -- void *buf = NULL; -- int status = 0; -- -- if (!hw->fw_log.cq_en && !hw->fw_log.uart_en) -- return 0; -- -- /* Disable FW logging only when the control queue is still responsive */ -- if (!enable && -- (!hw->fw_log.actv_evnts || !ice_check_sq_alive(hw, &hw->adminq))) -- return 0; -- -- /* Get current FW log settings */ -- status = ice_get_fw_log_cfg(hw); -- if (status) -- return status; -- -- ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging); -- cmd = &desc.params.fw_logging; -- -- /* Indicate which controls are valid */ -- if (hw->fw_log.cq_en) -- cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_AQ_VALID; -- -- if (hw->fw_log.uart_en) -- cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_UART_VALID; -- -- if (enable) { -- /* Fill in an array of entries with FW logging modules and -- * logging events being reconfigured. -- */ -- for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { -- u16 val; -- -- /* Keep track of enabled event types */ -- actv_evnts |= hw->fw_log.evnts[i].cfg; -- -- if (hw->fw_log.evnts[i].cfg == hw->fw_log.evnts[i].cur) -- continue; -- -- if (!data) { -- data = devm_kcalloc(ice_hw_to_dev(hw), -- ICE_AQC_FW_LOG_ID_MAX, -- sizeof(*data), -- GFP_KERNEL); -- if (!data) -- return -ENOMEM; -- } -- -- val = i << ICE_AQC_FW_LOG_ID_S; -- val |= hw->fw_log.evnts[i].cfg << ICE_AQC_FW_LOG_EN_S; -- data[chgs++] = cpu_to_le16(val); -- } -- -- /* Only enable FW logging if at least one module is specified. -- * If FW logging is currently enabled but all modules are not -- * enabled to emit log messages, disable FW logging altogether. -- */ -- if (actv_evnts) { -- /* Leave if there is effectively no change */ -- if (!chgs) -- goto out; -- -- if (hw->fw_log.cq_en) -- cmd->log_ctrl |= ICE_AQC_FW_LOG_AQ_EN; -- -- if (hw->fw_log.uart_en) -- cmd->log_ctrl |= ICE_AQC_FW_LOG_UART_EN; -- -- buf = data; -- len = sizeof(*data) * chgs; -- desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); -- } -- } -- -- status = ice_aq_send_cmd(hw, &desc, buf, len, NULL); -- if (!status) { -- /* Update the current configuration to reflect events enabled. -- * hw->fw_log.cq_en and hw->fw_log.uart_en indicate if the FW -- * logging mode is enabled for the device. They do not reflect -- * actual modules being enabled to emit log messages. So, their -- * values remain unchanged even when all modules are disabled. -- */ -- u16 cnt = enable ? chgs : (u16)ICE_AQC_FW_LOG_ID_MAX; -- -- hw->fw_log.actv_evnts = actv_evnts; -- for (i = 0; i < cnt; i++) { -- u16 v, m; -- -- if (!enable) { -- /* When disabling all FW logging events as part -- * of device's de-initialization, the original -- * configurations are retained, and can be used -- * to reconfigure FW logging later if the device -- * is re-initialized. -- */ -- hw->fw_log.evnts[i].cur = 0; -- continue; -- } -- -- v = le16_to_cpu(data[i]); -- m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; -- hw->fw_log.evnts[m].cur = hw->fw_log.evnts[m].cfg; -- } -- } -- --out: -- devm_kfree(ice_hw_to_dev(hw), data); -- -- return status; --} -- --/** -- * ice_output_fw_log -- * @hw: pointer to the HW struct -- * @desc: pointer to the AQ message descriptor -- * @buf: pointer to the buffer accompanying the AQ message -- * -- * Formats a FW Log message and outputs it via the standard driver logs. -- */ --void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf) --{ -- ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg Start ]\n"); -- ice_debug_array(hw, ICE_DBG_FW_LOG, 16, 1, (u8 *)buf, -- le16_to_cpu(desc->datalen)); -- ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg End ]\n"); --} -- - /** - * ice_get_itr_intrl_gran - * @hw: pointer to the HW struct -@@ -1164,11 +954,6 @@ int ice_init_hw(struct ice_hw *hw) - if (status) - goto err_unroll_cqinit; - -- /* Enable FW logging. Not fatal if this fails. */ -- status = ice_cfg_fw_log(hw, true); -- if (status) -- ice_debug(hw, ICE_DBG_INIT, "Failed to enable FW logging.\n"); -- - status = ice_clear_pf_cfg(hw); - if (status) - goto err_unroll_cqinit; -@@ -1318,8 +1103,6 @@ void ice_deinit_hw(struct ice_hw *hw) - ice_free_hw_tbls(hw); - mutex_destroy(&hw->tnl_lock); - -- /* Attempt to disable FW logging before shutting down control queues */ -- ice_cfg_fw_log(hw, false); - ice_destroy_all_ctrlq(hw); - - /* Clear VSI contexts if not already cleared */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 7a966a0c224f..d47e5400351f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -199,7 +199,6 @@ ice_aq_cfg_lan_txq(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *buf, - struct ice_sq_cd *cd); - int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle); - void ice_replay_post(struct ice_hw *hw); --void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf); - struct ice_q_ctx * - ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); - int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in); -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index d3340114297a..e5cc9790969c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -1535,9 +1535,6 @@ static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type) - - ice_vc_process_vf_msg(pf, &event, &data); - break; -- case ice_aqc_opc_fw_logging: -- ice_output_fw_log(hw, &event.desc, event.msg_buf); -- break; - case ice_aqc_opc_lldp_set_mib_change: - ice_dcb_process_lldp_set_mib_change(pf, &event); - break; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index b0f1f4db1d8b..6e1fed0d7384 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -731,24 +731,6 @@ struct ice_switch_info { - DECLARE_BITMAP(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS); - }; - --/* FW logging configuration */ --struct ice_fw_log_evnt { -- u8 cfg : 4; /* New event enables to configure */ -- u8 cur : 4; /* Current/active event enables */ --}; -- --struct ice_fw_log_cfg { -- u8 cq_en : 1; /* FW logging is enabled via the control queue */ -- u8 uart_en : 1; /* FW logging is enabled via UART for all PFs */ -- u8 actv_evnts; /* Cumulation of currently enabled log events */ -- --#define ICE_FW_LOG_EVNT_INFO (ICE_AQC_FW_LOG_INFO_EN >> ICE_AQC_FW_LOG_EN_S) --#define ICE_FW_LOG_EVNT_INIT (ICE_AQC_FW_LOG_INIT_EN >> ICE_AQC_FW_LOG_EN_S) --#define ICE_FW_LOG_EVNT_FLOW (ICE_AQC_FW_LOG_FLOW_EN >> ICE_AQC_FW_LOG_EN_S) --#define ICE_FW_LOG_EVNT_ERR (ICE_AQC_FW_LOG_ERR_EN >> ICE_AQC_FW_LOG_EN_S) -- struct ice_fw_log_evnt evnts[ICE_AQC_FW_LOG_ID_MAX]; --}; -- - /* Enum defining the different states of the mailbox snapshot in the - * PF-VF mailbox overflow detection algorithm. The snapshot can be in - * states: -@@ -890,8 +872,6 @@ struct ice_hw { - u8 fw_patch; /* firmware patch version */ - u32 fw_build; /* firmware build number */ - -- struct ice_fw_log_cfg fw_log; -- - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the ITR/INTRL granularity during - * initialization. --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0025-ice-configure-FW-logging.patch b/kernel-rt/debian/patches/ice-VDF/0025-ice-configure-FW-logging.patch deleted file mode 100644 index 203cc8e8..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0025-ice-configure-FW-logging.patch +++ /dev/null @@ -1,1083 +0,0 @@ -From 752f352c0d7da9c6c07e4c8364082e201d20fdc2 Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:12 -0800 -Subject: [PATCH 25/36] ice: configure FW logging - -Users want the ability to debug FW issues by retrieving the -FW logs from the E8xx devices. Use debugfs to allow the user to -configure the log level and number of messages for FW logging. - -If FW logging is supported on the E8xx then the file 'fwlog' will be -created under the PCI device ID for the ice driver. If the file does not -exist then either the E8xx doesn't support FW logging or debugfs is not -enabled on the system. - -One thing users want to do is control which events are reported. The -user can read and write the 'fwlog/modules/' to get/set -the log levels. Each module in the FW that supports logging ht as a file -under 'fwlog/modules' that supports reading (to see what the current log -level is) and writing (to change the log level). - -The format to set the log levels for a module are: - - # echo > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/ - -The supported log levels are: - - * none - * error - * warning - * normal - * verbose - -Each level includes the messages from the previous/lower level - -The modules that are supported are: - - * general - * ctrl - * link - * link_topo - * dnl - * i2c - * sdp - * mdio - * adminq - * hdma - * lldp - * dcbx - * dcb - * xlr - * nvm - * auth - * vpd - * iosf - * parser - * sw - * scheduler - * txq - * rsvd - * post - * watchdog - * task_dispatch - * mng - * synce - * health - * tsdrv - * pfreg - * mdlver - * all - -The module 'all' is a special module which allows the user to read or -write to all of the modules. - -The following example command would set the DCB module to the 'normal' -log level: - - # echo normal > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/dcb - -If the user wants to set the DCB, Link, and the AdminQ modules to -'verbose' then the commands are: - - # echo verbose > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/dcb - # echo verbose > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/link - # echo verbose > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/adminq - -If the user wants to set all modules to the 'warning' level then the -command is: - - # echo warning > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/all - -If the user wants to disable logging for a module then they can set the -level to 'none'. An example setting the 'watchdog' module is: - - # echo none > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/watchdog - -If the user wants to see what the log level is for a specific module -then the command is: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/dcb - -This will return the log level for the DCB module. If the user wants to -see the log level for all the modules then the command is: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/all - -Writing to the module file will update the configuration, but NOT enable the -configuration (that is a separate command). - -In addition to configuring the modules, the user can also configure the -number of log messages (nr_messages) to include in a single Admin Receive -Queue (ARQ) event.The range is 1-128 (1 means push every log message, 128 -means push only when the max AQ command buffer is full). The suggested -value is 10. - -To see/change the resolution the user can read/write the -'fwlog/nr_messages' file. An example changing the value to 50 is - - # echo 50 > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/nr_messages - -To see the current value of 'nr_messages' then the command is: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/nr_messages - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 96a9a9341cdaea0c3bce4c134e04a2a42ae899ac) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/Makefile | 4 +- - drivers/net/ethernet/intel/ice/ice.h | 9 + - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 80 ++++ - drivers/net/ethernet/intel/ice/ice_common.c | 6 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 359 ++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 261 +++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.h | 56 +++ - drivers/net/ethernet/intel/ice/ice_main.c | 18 + - drivers/net/ethernet/intel/ice/ice_type.h | 4 + - 9 files changed, 796 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/intel/ice/ice_debugfs.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_fwlog.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_fwlog.h - -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 0679907980f7..8757bec23fb3 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -34,7 +34,9 @@ ice-y := ice_main.o \ - ice_lag.o \ - ice_ethtool.o \ - ice_repr.o \ -- ice_tc_lib.o -+ ice_tc_lib.o \ -+ ice_fwlog.o \ -+ ice_debugfs.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index d3f72f9fbcd7..7966ac61154c 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -559,6 +559,10 @@ struct ice_pf { - struct ice_vsi_stats **vsi_stats; - struct ice_sw *first_sw; /* first switch created by firmware */ - u16 eswitch_mode; /* current mode of eswitch */ -+ struct dentry *ice_debugfs_pf; -+ struct dentry *ice_debugfs_pf_fwlog; -+ /* keep track of all the dentrys for FW log modules */ -+ struct dentry **ice_debugfs_pf_fwlog_modules; - struct ice_vfs vfs; - DECLARE_BITMAP(features, ICE_F_MAX); - DECLARE_BITMAP(state, ICE_STATE_NBITS); -@@ -890,6 +894,11 @@ static inline bool ice_is_adq_active(struct ice_pf *pf) - return false; - } - -+void ice_debugfs_fwlog_init(struct ice_pf *pf); -+void ice_debugfs_init(void); -+void ice_debugfs_exit(void); -+void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); -+ - bool netif_is_ice(const struct net_device *dev); - int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); - int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 3b289e6a225b..347e4fed5e0d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2299,6 +2299,81 @@ struct ice_aqc_event_lan_overflow { - u8 reserved[8]; - }; - -+enum ice_aqc_fw_logging_mod { -+ ICE_AQC_FW_LOG_ID_GENERAL = 0, -+ ICE_AQC_FW_LOG_ID_CTRL, -+ ICE_AQC_FW_LOG_ID_LINK, -+ ICE_AQC_FW_LOG_ID_LINK_TOPO, -+ ICE_AQC_FW_LOG_ID_DNL, -+ ICE_AQC_FW_LOG_ID_I2C, -+ ICE_AQC_FW_LOG_ID_SDP, -+ ICE_AQC_FW_LOG_ID_MDIO, -+ ICE_AQC_FW_LOG_ID_ADMINQ, -+ ICE_AQC_FW_LOG_ID_HDMA, -+ ICE_AQC_FW_LOG_ID_LLDP, -+ ICE_AQC_FW_LOG_ID_DCBX, -+ ICE_AQC_FW_LOG_ID_DCB, -+ ICE_AQC_FW_LOG_ID_XLR, -+ ICE_AQC_FW_LOG_ID_NVM, -+ ICE_AQC_FW_LOG_ID_AUTH, -+ ICE_AQC_FW_LOG_ID_VPD, -+ ICE_AQC_FW_LOG_ID_IOSF, -+ ICE_AQC_FW_LOG_ID_PARSER, -+ ICE_AQC_FW_LOG_ID_SW, -+ ICE_AQC_FW_LOG_ID_SCHEDULER, -+ ICE_AQC_FW_LOG_ID_TXQ, -+ ICE_AQC_FW_LOG_ID_RSVD, -+ ICE_AQC_FW_LOG_ID_POST, -+ ICE_AQC_FW_LOG_ID_WATCHDOG, -+ ICE_AQC_FW_LOG_ID_TASK_DISPATCH, -+ ICE_AQC_FW_LOG_ID_MNG, -+ ICE_AQC_FW_LOG_ID_SYNCE, -+ ICE_AQC_FW_LOG_ID_HEALTH, -+ ICE_AQC_FW_LOG_ID_TSDRV, -+ ICE_AQC_FW_LOG_ID_PFREG, -+ ICE_AQC_FW_LOG_ID_MDLVER, -+ ICE_AQC_FW_LOG_ID_MAX, -+}; -+ -+/* Set FW Logging configuration (indirect 0xFF30) -+ * Query FW Logging (indirect 0xFF32) -+ */ -+struct ice_aqc_fw_log { -+ u8 cmd_flags; -+#define ICE_AQC_FW_LOG_CONF_UART_EN BIT(0) -+#define ICE_AQC_FW_LOG_CONF_AQ_EN BIT(1) -+#define ICE_AQC_FW_LOG_QUERY_REGISTERED BIT(2) -+#define ICE_AQC_FW_LOG_CONF_SET_VALID BIT(3) -+#define ICE_AQC_FW_LOG_AQ_QUERY BIT(2) -+ -+ u8 rsp_flag; -+ __le16 fw_rt_msb; -+ union { -+ struct { -+ __le32 fw_rt_lsb; -+ } sync; -+ struct { -+ __le16 log_resolution; -+#define ICE_AQC_FW_LOG_MIN_RESOLUTION (1) -+#define ICE_AQC_FW_LOG_MAX_RESOLUTION (128) -+ -+ __le16 mdl_cnt; -+ } cfg; -+ } ops; -+ __le32 addr_high; -+ __le32 addr_low; -+}; -+ -+/* Response Buffer for: -+ * Set Firmware Logging Configuration (0xFF30) -+ * Query FW Logging (0xFF32) -+ */ -+struct ice_aqc_fw_log_cfg_resp { -+ __le16 module_identifier; -+ u8 log_level; -+ u8 rsvd0; -+}; -+ - /** - * struct ice_aq_desc - Admin Queue (AQ) descriptor - * @flags: ICE_AQ_FLAG_* flags -@@ -2387,6 +2462,7 @@ struct ice_aq_desc { - struct ice_aqc_get_cgu_ref_prio get_cgu_ref_prio; - struct ice_aqc_get_cgu_info get_cgu_info; - struct ice_aqc_driver_shared_params drv_shared_params; -+ struct ice_aqc_fw_log fw_log; - struct ice_aqc_set_mac_lb set_mac_lb; - struct ice_aqc_alloc_free_res_cmd sw_res_ctrl; - struct ice_aqc_set_mac_cfg set_mac_cfg; -@@ -2583,6 +2659,10 @@ enum ice_adminq_opc { - - /* Standalone Commands/Events */ - ice_aqc_opc_event_lan_overflow = 0x1001, -+ -+ /* FW Logging Commands */ -+ ice_aqc_opc_fw_logs_config = 0xFF30, -+ ice_aqc_opc_fw_logs_query = 0xFF32, - }; - - #endif /* _ICE_ADMINQ_CMD_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index a5c4b7ad6a20..6dcba0577633 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -954,6 +954,11 @@ int ice_init_hw(struct ice_hw *hw) - if (status) - goto err_unroll_cqinit; - -+ status = ice_fwlog_init(hw); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "Error initializing FW logging: %d\n", -+ status); -+ - status = ice_clear_pf_cfg(hw); - if (status) - goto err_unroll_cqinit; -@@ -1103,6 +1108,7 @@ void ice_deinit_hw(struct ice_hw *hw) - ice_free_hw_tbls(hw); - mutex_destroy(&hw->tnl_lock); - -+ ice_fwlog_deinit(hw); - ice_destroy_all_ctrlq(hw); - - /* Clear VSI contexts if not already cleared */ -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -new file mode 100644 -index 000000000000..3b0d9b214fd1 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -0,0 +1,359 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (c) 2022, Intel Corporation. */ -+ -+#include -+#include -+#include -+#include -+#include "ice.h" -+ -+static struct dentry *ice_debugfs_root; -+ -+/* create a define that has an extra module that doesn't really exist. this -+ * is so we can add a module 'all' to easily enable/disable all the modules -+ */ -+#define ICE_NR_FW_LOG_MODULES (ICE_AQC_FW_LOG_ID_MAX + 1) -+ -+/* the ordering in this array is important. it matches the ordering of the -+ * values in the FW so the index is the same value as in ice_aqc_fw_logging_mod -+ */ -+static const char * const ice_fwlog_module_string[] = { -+ "general", -+ "ctrl", -+ "link", -+ "link_topo", -+ "dnl", -+ "i2c", -+ "sdp", -+ "mdio", -+ "adminq", -+ "hdma", -+ "lldp", -+ "dcbx", -+ "dcb", -+ "xlr", -+ "nvm", -+ "auth", -+ "vpd", -+ "iosf", -+ "parser", -+ "sw", -+ "scheduler", -+ "txq", -+ "rsvd", -+ "post", -+ "watchdog", -+ "task_dispatch", -+ "mng", -+ "synce", -+ "health", -+ "tsdrv", -+ "pfreg", -+ "mdlver", -+ "all", -+}; -+ -+/* the ordering in this array is important. it matches the ordering of the -+ * values in the FW so the index is the same value as in ice_fwlog_level -+ */ -+static const char * const ice_fwlog_level_string[] = { -+ "none", -+ "error", -+ "warning", -+ "normal", -+ "verbose", -+}; -+ -+/** -+ * ice_fwlog_print_module_cfg - print current FW logging module configuration -+ * @hw: pointer to the HW structure -+ * @module: module to print -+ * @s: the seq file to put data into -+ */ -+static void -+ice_fwlog_print_module_cfg(struct ice_hw *hw, int module, struct seq_file *s) -+{ -+ struct ice_fwlog_cfg *cfg = &hw->fwlog_cfg; -+ struct ice_fwlog_module_entry *entry; -+ -+ if (module != ICE_AQC_FW_LOG_ID_MAX) { -+ entry = &cfg->module_entries[module]; -+ -+ seq_printf(s, "\tModule: %s, Log Level: %s\n", -+ ice_fwlog_module_string[entry->module_id], -+ ice_fwlog_level_string[entry->log_level]); -+ } else { -+ int i; -+ -+ for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { -+ entry = &cfg->module_entries[i]; -+ -+ seq_printf(s, "\tModule: %s, Log Level: %s\n", -+ ice_fwlog_module_string[entry->module_id], -+ ice_fwlog_level_string[entry->log_level]); -+ } -+ } -+} -+ -+static int ice_find_module_by_dentry(struct ice_pf *pf, struct dentry *d) -+{ -+ int i, module; -+ -+ module = -1; -+ /* find the module based on the dentry */ -+ for (i = 0; i < ICE_NR_FW_LOG_MODULES; i++) { -+ if (d == pf->ice_debugfs_pf_fwlog_modules[i]) { -+ module = i; -+ break; -+ } -+ } -+ -+ return module; -+} -+ -+/** -+ * ice_debugfs_module_show - read from 'module' file -+ * @s: the opened file -+ * @v: pointer to the offset -+ */ -+static int ice_debugfs_module_show(struct seq_file *s, void *v) -+{ -+ const struct file *filp = s->file; -+ struct dentry *dentry; -+ struct ice_pf *pf; -+ int module; -+ -+ dentry = file_dentry(filp); -+ pf = s->private; -+ -+ module = ice_find_module_by_dentry(pf, dentry); -+ if (module < 0) { -+ dev_info(ice_pf_to_dev(pf), "unknown module\n"); -+ return -EINVAL; -+ } -+ -+ ice_fwlog_print_module_cfg(&pf->hw, module, s); -+ -+ return 0; -+} -+ -+static int ice_debugfs_module_open(struct inode *inode, struct file *filp) -+{ -+ return single_open(filp, ice_debugfs_module_show, inode->i_private); -+} -+ -+/** -+ * ice_debugfs_module_write - write into 'module' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_module_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = file_inode(filp)->i_private; -+ struct dentry *dentry = file_dentry(filp); -+ struct device *dev = ice_pf_to_dev(pf); -+ char user_val[16], *cmd_buf; -+ int module, log_level, cnt; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 8) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ module = ice_find_module_by_dentry(pf, dentry); -+ if (module < 0) { -+ dev_info(dev, "unknown module\n"); -+ return -EINVAL; -+ } -+ -+ cnt = sscanf(cmd_buf, "%s", user_val); -+ if (cnt != 1) -+ return -EINVAL; -+ -+ log_level = sysfs_match_string(ice_fwlog_level_string, user_val); -+ if (log_level < 0) { -+ dev_info(dev, "unknown log level '%s'\n", user_val); -+ return -EINVAL; -+ } -+ -+ if (module != ICE_AQC_FW_LOG_ID_MAX) { -+ ice_pf_fwlog_update_module(pf, log_level, module); -+ } else { -+ /* the module 'all' is a shortcut so that we can set -+ * all of the modules to the same level quickly -+ */ -+ int i; -+ -+ for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) -+ ice_pf_fwlog_update_module(pf, log_level, i); -+ } -+ -+ return count; -+} -+ -+static const struct file_operations ice_debugfs_module_fops = { -+ .owner = THIS_MODULE, -+ .open = ice_debugfs_module_open, -+ .read = seq_read, -+ .release = single_release, -+ .write = ice_debugfs_module_write, -+}; -+ -+/** -+ * ice_debugfs_nr_messages_read - read from 'nr_messages' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_nr_messages_read(struct file *filp, -+ char __user *buffer, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char buff[32] = {}; -+ -+ snprintf(buff, sizeof(buff), "%d\n", -+ hw->fwlog_cfg.log_resolution); -+ -+ return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff)); -+} -+ -+/** -+ * ice_debugfs_nr_messages_write - write into 'nr_messages' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_nr_messages_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ char user_val[8], *cmd_buf; -+ s16 nr_messages; -+ ssize_t ret; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 4) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ ret = sscanf(cmd_buf, "%s", user_val); -+ if (ret != 1) -+ return -EINVAL; -+ -+ ret = kstrtos16(user_val, 0, &nr_messages); -+ if (ret) -+ return ret; -+ -+ if (nr_messages < ICE_AQC_FW_LOG_MIN_RESOLUTION || -+ nr_messages > ICE_AQC_FW_LOG_MAX_RESOLUTION) { -+ dev_err(dev, "Invalid FW log number of messages %d, value must be between %d - %d\n", -+ nr_messages, ICE_AQC_FW_LOG_MIN_RESOLUTION, -+ ICE_AQC_FW_LOG_MAX_RESOLUTION); -+ return -EINVAL; -+ } -+ -+ hw->fwlog_cfg.log_resolution = nr_messages; -+ -+ return count; -+} -+ -+static const struct file_operations ice_debugfs_nr_messages_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_nr_messages_read, -+ .write = ice_debugfs_nr_messages_write, -+}; -+ -+/** -+ * ice_debugfs_fwlog_init - setup the debugfs directory -+ * @pf: the ice that is starting up -+ */ -+void ice_debugfs_fwlog_init(struct ice_pf *pf) -+{ -+ const char *name = pci_name(pf->pdev); -+ struct dentry *fw_modules_dir; -+ struct dentry **fw_modules; -+ int i; -+ -+ /* only support fw log commands on PF 0 */ -+ if (pf->hw.bus.func) -+ return; -+ -+ /* allocate space for this first because if it fails then we don't -+ * need to unwind -+ */ -+ fw_modules = kcalloc(ICE_NR_FW_LOG_MODULES, sizeof(*fw_modules), -+ GFP_KERNEL); -+ if (!fw_modules) -+ return; -+ -+ pf->ice_debugfs_pf = debugfs_create_dir(name, ice_debugfs_root); -+ if (IS_ERR(pf->ice_debugfs_pf)) -+ goto err_create_module_files; -+ -+ pf->ice_debugfs_pf_fwlog = debugfs_create_dir("fwlog", -+ pf->ice_debugfs_pf); -+ if (IS_ERR(pf->ice_debugfs_pf)) -+ goto err_create_module_files; -+ -+ fw_modules_dir = debugfs_create_dir("modules", -+ pf->ice_debugfs_pf_fwlog); -+ if (IS_ERR(fw_modules_dir)) -+ goto err_create_module_files; -+ -+ for (i = 0; i < ICE_NR_FW_LOG_MODULES; i++) { -+ fw_modules[i] = debugfs_create_file(ice_fwlog_module_string[i], -+ 0600, fw_modules_dir, pf, -+ &ice_debugfs_module_fops); -+ if (IS_ERR(fw_modules[i])) -+ goto err_create_module_files; -+ } -+ -+ debugfs_create_file("nr_messages", 0600, -+ pf->ice_debugfs_pf_fwlog, pf, -+ &ice_debugfs_nr_messages_fops); -+ -+ pf->ice_debugfs_pf_fwlog_modules = fw_modules; -+ -+ return; -+ -+err_create_module_files: -+ debugfs_remove_recursive(pf->ice_debugfs_pf_fwlog); -+ kfree(fw_modules); -+} -+ -+/** -+ * ice_debugfs_init - create root directory for debugfs entries -+ */ -+void ice_debugfs_init(void) -+{ -+ ice_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); -+ if (IS_ERR(ice_debugfs_root)) -+ pr_info("init of debugfs failed\n"); -+} -+ -+/** -+ * ice_debugfs_exit - remove debugfs entries -+ */ -+void ice_debugfs_exit(void) -+{ -+ debugfs_remove_recursive(ice_debugfs_root); -+ ice_debugfs_root = NULL; -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -new file mode 100644 -index 000000000000..307e0d04f3fe ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -0,0 +1,261 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (c) 2022, Intel Corporation. */ -+ -+#include "ice.h" -+#include "ice_common.h" -+#include "ice_fwlog.h" -+ -+/** -+ * ice_fwlog_init - Initialize FW logging configuration -+ * @hw: pointer to the HW structure -+ * -+ * This function should be called on driver initialization during -+ * ice_init_hw(). -+ */ -+int ice_fwlog_init(struct ice_hw *hw) -+{ -+ /* only support fw log commands on PF 0 */ -+ if (hw->bus.func) -+ return -EINVAL; -+ -+ ice_fwlog_set_supported(hw); -+ -+ if (ice_fwlog_supported(hw)) { -+ int status; -+ -+ /* read the current config from the FW and store it */ -+ status = ice_fwlog_get(hw, &hw->fwlog_cfg); -+ if (status) -+ return status; -+ -+ ice_debugfs_fwlog_init(hw->back); -+ } else { -+ dev_warn(ice_hw_to_dev(hw), "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n"); -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_fwlog_deinit - unroll FW logging configuration -+ * @hw: pointer to the HW structure -+ * -+ * This function should be called in ice_deinit_hw(). -+ */ -+void ice_fwlog_deinit(struct ice_hw *hw) -+{ -+ struct ice_pf *pf = hw->back; -+ int status; -+ -+ /* only support fw log commands on PF 0 */ -+ if (hw->bus.func) -+ return; -+ -+ /* make sure FW logging is disabled to not put the FW in a weird state -+ * for the next driver load -+ */ -+ hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_ARQ_ENA; -+ status = ice_fwlog_set(hw, &hw->fwlog_cfg); -+ if (status) -+ dev_warn(ice_hw_to_dev(hw), "Unable to turn off FW logging, status: %d\n", -+ status); -+ -+ kfree(pf->ice_debugfs_pf_fwlog_modules); -+ -+ pf->ice_debugfs_pf_fwlog_modules = NULL; -+} -+ -+/** -+ * ice_fwlog_supported - Cached for whether FW supports FW logging or not -+ * @hw: pointer to the HW structure -+ * -+ * This will always return false if called before ice_init_hw(), so it must be -+ * called after ice_init_hw(). -+ */ -+bool ice_fwlog_supported(struct ice_hw *hw) -+{ -+ return hw->fwlog_supported; -+} -+ -+/** -+ * ice_aq_fwlog_set - Set FW logging configuration AQ command (0xFF30) -+ * @hw: pointer to the HW structure -+ * @entries: entries to configure -+ * @num_entries: number of @entries -+ * @options: options from ice_fwlog_cfg->options structure -+ * @log_resolution: logging resolution -+ */ -+static int -+ice_aq_fwlog_set(struct ice_hw *hw, struct ice_fwlog_module_entry *entries, -+ u16 num_entries, u16 options, u16 log_resolution) -+{ -+ struct ice_aqc_fw_log_cfg_resp *fw_modules; -+ struct ice_aqc_fw_log *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ int i; -+ -+ fw_modules = kcalloc(num_entries, sizeof(*fw_modules), GFP_KERNEL); -+ if (!fw_modules) -+ return -ENOMEM; -+ -+ for (i = 0; i < num_entries; i++) { -+ fw_modules[i].module_identifier = -+ cpu_to_le16(entries[i].module_id); -+ fw_modules[i].log_level = entries[i].log_level; -+ } -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logs_config); -+ desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); -+ -+ cmd = &desc.params.fw_log; -+ -+ cmd->cmd_flags = ICE_AQC_FW_LOG_CONF_SET_VALID; -+ cmd->ops.cfg.log_resolution = cpu_to_le16(log_resolution); -+ cmd->ops.cfg.mdl_cnt = cpu_to_le16(num_entries); -+ -+ if (options & ICE_FWLOG_OPTION_ARQ_ENA) -+ cmd->cmd_flags |= ICE_AQC_FW_LOG_CONF_AQ_EN; -+ if (options & ICE_FWLOG_OPTION_UART_ENA) -+ cmd->cmd_flags |= ICE_AQC_FW_LOG_CONF_UART_EN; -+ -+ status = ice_aq_send_cmd(hw, &desc, fw_modules, -+ sizeof(*fw_modules) * num_entries, -+ NULL); -+ -+ kfree(fw_modules); -+ -+ return status; -+} -+ -+/** -+ * ice_fwlog_set - Set the firmware logging settings -+ * @hw: pointer to the HW structure -+ * @cfg: config used to set firmware logging -+ * -+ * This function should be called whenever the driver needs to set the firmware -+ * logging configuration. It can be called on initialization, reset, or during -+ * runtime. -+ * -+ * If the PF wishes to receive FW logging then it must register via -+ * ice_fwlog_register. Note, that ice_fwlog_register does not need to be called -+ * for init. -+ */ -+int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) -+{ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ return ice_aq_fwlog_set(hw, cfg->module_entries, -+ ICE_AQC_FW_LOG_ID_MAX, cfg->options, -+ cfg->log_resolution); -+} -+ -+/** -+ * ice_aq_fwlog_get - Get the current firmware logging configuration (0xFF32) -+ * @hw: pointer to the HW structure -+ * @cfg: firmware logging configuration to populate -+ */ -+static int ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) -+{ -+ struct ice_aqc_fw_log_cfg_resp *fw_modules; -+ struct ice_aqc_fw_log *cmd; -+ struct ice_aq_desc desc; -+ u16 module_id_cnt; -+ int status; -+ void *buf; -+ int i; -+ -+ memset(cfg, 0, sizeof(*cfg)); -+ -+ buf = kzalloc(ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logs_query); -+ cmd = &desc.params.fw_log; -+ -+ cmd->cmd_flags = ICE_AQC_FW_LOG_AQ_QUERY; -+ -+ status = ice_aq_send_cmd(hw, &desc, buf, ICE_AQ_MAX_BUF_LEN, NULL); -+ if (status) { -+ ice_debug(hw, ICE_DBG_FW_LOG, "Failed to get FW log configuration\n"); -+ goto status_out; -+ } -+ -+ module_id_cnt = le16_to_cpu(cmd->ops.cfg.mdl_cnt); -+ if (module_id_cnt < ICE_AQC_FW_LOG_ID_MAX) { -+ ice_debug(hw, ICE_DBG_FW_LOG, "FW returned less than the expected number of FW log module IDs\n"); -+ } else if (module_id_cnt > ICE_AQC_FW_LOG_ID_MAX) { -+ ice_debug(hw, ICE_DBG_FW_LOG, "FW returned more than expected number of FW log module IDs, setting module_id_cnt to software expected max %u\n", -+ ICE_AQC_FW_LOG_ID_MAX); -+ module_id_cnt = ICE_AQC_FW_LOG_ID_MAX; -+ } -+ -+ cfg->log_resolution = le16_to_cpu(cmd->ops.cfg.log_resolution); -+ if (cmd->cmd_flags & ICE_AQC_FW_LOG_CONF_AQ_EN) -+ cfg->options |= ICE_FWLOG_OPTION_ARQ_ENA; -+ if (cmd->cmd_flags & ICE_AQC_FW_LOG_CONF_UART_EN) -+ cfg->options |= ICE_FWLOG_OPTION_UART_ENA; -+ -+ fw_modules = (struct ice_aqc_fw_log_cfg_resp *)buf; -+ -+ for (i = 0; i < module_id_cnt; i++) { -+ struct ice_aqc_fw_log_cfg_resp *fw_module = &fw_modules[i]; -+ -+ cfg->module_entries[i].module_id = -+ le16_to_cpu(fw_module->module_identifier); -+ cfg->module_entries[i].log_level = fw_module->log_level; -+ } -+ -+status_out: -+ kfree(buf); -+ return status; -+} -+ -+/** -+ * ice_fwlog_get - Get the firmware logging settings -+ * @hw: pointer to the HW structure -+ * @cfg: config to populate based on current firmware logging settings -+ */ -+int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) -+{ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ return ice_aq_fwlog_get(hw, cfg); -+} -+ -+/** -+ * ice_fwlog_set_supported - Set if FW logging is supported by FW -+ * @hw: pointer to the HW struct -+ * -+ * If FW returns success to the ice_aq_fwlog_get call then it supports FW -+ * logging, else it doesn't. Set the fwlog_supported flag accordingly. -+ * -+ * This function is only meant to be called during driver init to determine if -+ * the FW support FW logging. -+ */ -+void ice_fwlog_set_supported(struct ice_hw *hw) -+{ -+ struct ice_fwlog_cfg *cfg; -+ int status; -+ -+ hw->fwlog_supported = false; -+ -+ cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); -+ if (!cfg) -+ return; -+ -+ /* don't call ice_fwlog_get() because that would check to see if FW -+ * logging is supported which is what the driver is determining now -+ */ -+ status = ice_aq_fwlog_get(hw, cfg); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "ice_aq_fwlog_get failed, FW logging is not supported on this version of FW, status %d\n", -+ status); -+ else -+ hw->fwlog_supported = true; -+ -+ kfree(cfg); -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h -new file mode 100644 -index 000000000000..8e68ee02713b ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.h -@@ -0,0 +1,56 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* Copyright (C) 2022, Intel Corporation. */ -+ -+#ifndef _ICE_FWLOG_H_ -+#define _ICE_FWLOG_H_ -+#include "ice_adminq_cmd.h" -+ -+struct ice_hw; -+ -+/* Only a single log level should be set and all log levels under the set value -+ * are enabled, e.g. if log level is set to ICE_FW_LOG_LEVEL_VERBOSE, then all -+ * other log levels are included (except ICE_FW_LOG_LEVEL_NONE) -+ */ -+enum ice_fwlog_level { -+ ICE_FWLOG_LEVEL_NONE = 0, -+ ICE_FWLOG_LEVEL_ERROR = 1, -+ ICE_FWLOG_LEVEL_WARNING = 2, -+ ICE_FWLOG_LEVEL_NORMAL = 3, -+ ICE_FWLOG_LEVEL_VERBOSE = 4, -+ ICE_FWLOG_LEVEL_INVALID, /* all values >= this entry are invalid */ -+}; -+ -+struct ice_fwlog_module_entry { -+ /* module ID for the corresponding firmware logging event */ -+ u16 module_id; -+ /* verbosity level for the module_id */ -+ u8 log_level; -+}; -+ -+struct ice_fwlog_cfg { -+ /* list of modules for configuring log level */ -+ struct ice_fwlog_module_entry module_entries[ICE_AQC_FW_LOG_ID_MAX]; -+ /* options used to configure firmware logging */ -+ u16 options; -+#define ICE_FWLOG_OPTION_ARQ_ENA BIT(0) -+#define ICE_FWLOG_OPTION_UART_ENA BIT(1) -+ /* set before calling ice_fwlog_init() so the PF registers for firmware -+ * logging on initialization -+ */ -+#define ICE_FWLOG_OPTION_REGISTER_ON_INIT BIT(2) -+ /* set in the ice_fwlog_get() response if the PF is registered for FW -+ * logging events over ARQ -+ */ -+#define ICE_FWLOG_OPTION_IS_REGISTERED BIT(3) -+ -+ /* minimum number of log events sent per Admin Receive Queue event */ -+ u16 log_resolution; -+}; -+ -+void ice_fwlog_set_supported(struct ice_hw *hw); -+bool ice_fwlog_supported(struct ice_hw *hw); -+int ice_fwlog_init(struct ice_hw *hw); -+void ice_fwlog_deinit(struct ice_hw *hw); -+int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); -+int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); -+#endif /* _ICE_FWLOG_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index e5cc9790969c..614e10ab4159 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -4506,6 +4506,19 @@ static void ice_print_wake_reason(struct ice_pf *pf) - dev_info(ice_pf_to_dev(pf), "Wake reason: %s", wake_str); - } - -+/** -+ * ice_pf_fwlog_update_module - update 1 module -+ * @pf: pointer to the PF struct -+ * @log_level: log_level to use for the @module -+ * @module: module to update -+ */ -+void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module) -+{ -+ struct ice_hw *hw = &pf->hw; -+ -+ hw->fwlog_cfg.module_entries[module].log_level = log_level; -+} -+ - /** - * ice_register_netdev - register netdev - * @vsi: pointer to the VSI struct -@@ -5283,6 +5296,8 @@ static void ice_remove(struct pci_dev *pdev) - msleep(100); - } - -+ ice_debugfs_exit(); -+ - if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) { - set_bit(ICE_VF_RESETS_DISABLED, pf->state); - ice_free_vfs(pf); -@@ -5751,6 +5766,8 @@ static int __init ice_module_init(void) - goto err_dest_wq; - } - -+ ice_debugfs_init(); -+ - status = pci_register_driver(&ice_driver); - if (status) { - pr_err("failed to register PCI driver, err %d\n", status); -@@ -5761,6 +5778,7 @@ static int __init ice_module_init(void) - - err_dest_lag_wq: - destroy_workqueue(ice_lag_wq); -+ ice_debugfs_exit(); - err_dest_wq: - destroy_workqueue(ice_wq); - return status; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 6e1fed0d7384..84bb61aa7409 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -17,6 +17,7 @@ - #include "ice_protocol_type.h" - #include "ice_sbq_cmd.h" - #include "ice_vlan_mode.h" -+#include "ice_fwlog.h" - - static inline bool ice_is_tc_ena(unsigned long bitmap, u8 tc) - { -@@ -872,6 +873,9 @@ struct ice_hw { - u8 fw_patch; /* firmware patch version */ - u32 fw_build; /* firmware build number */ - -+ struct ice_fwlog_cfg fwlog_cfg; -+ bool fwlog_supported; /* does hardware support FW logging? */ -+ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the ITR/INTRL granularity during - * initialization. --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0026-ice-enable-FW-logging.patch b/kernel-rt/debian/patches/ice-VDF/0026-ice-enable-FW-logging.patch deleted file mode 100644 index f61122fb..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0026-ice-enable-FW-logging.patch +++ /dev/null @@ -1,281 +0,0 @@ -From 189d58473481cf01b493fca4e9dd2ab8380d0ce5 Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:13 -0800 -Subject: [PATCH 26/36] ice: enable FW logging - -Once users have configured the FW logging then allow them to enable it -by writing to the 'fwlog/enable' file. The file accepts a boolean value -(0 or 1) where 1 means enable FW logging and 0 means disable FW logging. - - # echo > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/enable - -Where is 0 or 1. - -The user can read the 'fwlog/enable' file to see whether logging is -enabled or not. Reading the actual data is a separate patch. To see the -current value then: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/enable - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 73671c3162c83a689342fd57f00b5f261682e49b) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 3 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 98 +++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 67 +++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.h | 2 + - 4 files changed, 170 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 347e4fed5e0d..11391be4efc2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2336,6 +2336,7 @@ enum ice_aqc_fw_logging_mod { - }; - - /* Set FW Logging configuration (indirect 0xFF30) -+ * Register for FW Logging (indirect 0xFF31) - * Query FW Logging (indirect 0xFF32) - */ - struct ice_aqc_fw_log { -@@ -2344,6 +2345,7 @@ struct ice_aqc_fw_log { - #define ICE_AQC_FW_LOG_CONF_AQ_EN BIT(1) - #define ICE_AQC_FW_LOG_QUERY_REGISTERED BIT(2) - #define ICE_AQC_FW_LOG_CONF_SET_VALID BIT(3) -+#define ICE_AQC_FW_LOG_AQ_REGISTER BIT(0) - #define ICE_AQC_FW_LOG_AQ_QUERY BIT(2) - - u8 rsp_flag; -@@ -2662,6 +2664,7 @@ enum ice_adminq_opc { - - /* FW Logging Commands */ - ice_aqc_opc_fw_logs_config = 0xFF30, -+ ice_aqc_opc_fw_logs_register = 0xFF31, - ice_aqc_opc_fw_logs_query = 0xFF32, - }; - -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -index 3b0d9b214fd1..3dde99969132 100644 ---- a/drivers/net/ethernet/intel/ice/ice_debugfs.c -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -281,6 +281,101 @@ static const struct file_operations ice_debugfs_nr_messages_fops = { - .write = ice_debugfs_nr_messages_write, - }; - -+/** -+ * ice_debugfs_enable_read - read from 'enable' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_enable_read(struct file *filp, -+ char __user *buffer, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char buff[32] = {}; -+ -+ snprintf(buff, sizeof(buff), "%u\n", -+ (u16)(hw->fwlog_cfg.options & -+ ICE_FWLOG_OPTION_IS_REGISTERED) >> 3); -+ -+ return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff)); -+} -+ -+/** -+ * ice_debugfs_enable_write - write into 'enable' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_enable_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char user_val[8], *cmd_buf; -+ bool enable; -+ ssize_t ret; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 2) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ ret = sscanf(cmd_buf, "%s", user_val); -+ if (ret != 1) -+ return -EINVAL; -+ -+ ret = kstrtobool(user_val, &enable); -+ if (ret) -+ goto enable_write_error; -+ -+ if (enable) -+ hw->fwlog_cfg.options |= ICE_FWLOG_OPTION_ARQ_ENA; -+ else -+ hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_ARQ_ENA; -+ -+ ret = ice_fwlog_set(hw, &hw->fwlog_cfg); -+ if (ret) -+ goto enable_write_error; -+ -+ if (enable) -+ ret = ice_fwlog_register(hw); -+ else -+ ret = ice_fwlog_unregister(hw); -+ -+ if (ret) -+ goto enable_write_error; -+ -+ /* if we get here, nothing went wrong; return count since we didn't -+ * really write anything -+ */ -+ ret = (ssize_t)count; -+ -+enable_write_error: -+ /* This function always consumes all of the written input, or produces -+ * an error. Check and enforce this. Otherwise, the write operation -+ * won't complete properly. -+ */ -+ if (WARN_ON(ret != (ssize_t)count && ret >= 0)) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static const struct file_operations ice_debugfs_enable_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_enable_read, -+ .write = ice_debugfs_enable_write, -+}; -+ - /** - * ice_debugfs_fwlog_init - setup the debugfs directory - * @pf: the ice that is starting up -@@ -332,6 +427,9 @@ void ice_debugfs_fwlog_init(struct ice_pf *pf) - - pf->ice_debugfs_pf_fwlog_modules = fw_modules; - -+ debugfs_create_file("enable", 0600, pf->ice_debugfs_pf_fwlog, -+ pf, &ice_debugfs_enable_fops); -+ - return; - - err_create_module_files: -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -index 307e0d04f3fe..25a17cbc1d34 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.c -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -63,6 +63,11 @@ void ice_fwlog_deinit(struct ice_hw *hw) - kfree(pf->ice_debugfs_pf_fwlog_modules); - - pf->ice_debugfs_pf_fwlog_modules = NULL; -+ -+ status = ice_fwlog_unregister(hw); -+ if (status) -+ dev_warn(ice_hw_to_dev(hw), "Unable to unregister FW logging, status: %d\n", -+ status); - } - - /** -@@ -197,6 +202,8 @@ static int ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) - cfg->options |= ICE_FWLOG_OPTION_ARQ_ENA; - if (cmd->cmd_flags & ICE_AQC_FW_LOG_CONF_UART_EN) - cfg->options |= ICE_FWLOG_OPTION_UART_ENA; -+ if (cmd->cmd_flags & ICE_AQC_FW_LOG_QUERY_REGISTERED) -+ cfg->options |= ICE_FWLOG_OPTION_IS_REGISTERED; - - fw_modules = (struct ice_aqc_fw_log_cfg_resp *)buf; - -@@ -226,6 +233,66 @@ int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) - return ice_aq_fwlog_get(hw, cfg); - } - -+/** -+ * ice_aq_fwlog_register - Register PF for firmware logging events (0xFF31) -+ * @hw: pointer to the HW structure -+ * @reg: true to register and false to unregister -+ */ -+static int ice_aq_fwlog_register(struct ice_hw *hw, bool reg) -+{ -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logs_register); -+ -+ if (reg) -+ desc.params.fw_log.cmd_flags = ICE_AQC_FW_LOG_AQ_REGISTER; -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_fwlog_register - Register the PF for firmware logging -+ * @hw: pointer to the HW structure -+ * -+ * After this call the PF will start to receive firmware logging based on the -+ * configuration set in ice_fwlog_set. -+ */ -+int ice_fwlog_register(struct ice_hw *hw) -+{ -+ int status; -+ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ status = ice_aq_fwlog_register(hw, true); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "Failed to register for firmware logging events over ARQ\n"); -+ else -+ hw->fwlog_cfg.options |= ICE_FWLOG_OPTION_IS_REGISTERED; -+ -+ return status; -+} -+ -+/** -+ * ice_fwlog_unregister - Unregister the PF from firmware logging -+ * @hw: pointer to the HW structure -+ */ -+int ice_fwlog_unregister(struct ice_hw *hw) -+{ -+ int status; -+ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ status = ice_aq_fwlog_register(hw, false); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "Failed to unregister from firmware logging events over ARQ\n"); -+ else -+ hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_IS_REGISTERED; -+ -+ return status; -+} -+ - /** - * ice_fwlog_set_supported - Set if FW logging is supported by FW - * @hw: pointer to the HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h -index 8e68ee02713b..45865558425d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.h -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.h -@@ -53,4 +53,6 @@ int ice_fwlog_init(struct ice_hw *hw); - void ice_fwlog_deinit(struct ice_hw *hw); - int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); - int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); -+int ice_fwlog_register(struct ice_hw *hw); -+int ice_fwlog_unregister(struct ice_hw *hw); - #endif /* _ICE_FWLOG_H_ */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch b/kernel-rt/debian/patches/ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch deleted file mode 100644 index 0bca4413..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch +++ /dev/null @@ -1,572 +0,0 @@ -From a584ea88cfdc8ac3f782be1d5d67fa92c3423290 Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:14 -0800 -Subject: [PATCH 27/36] ice: add ability to read and configure FW log data - -Once logging is enabled the user should read the data from the 'data' -file. The data is in the form of a binary blob that can be sent to Intel -for decoding. To read the data use a command like: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/data > log_data.bin - -If the user wants to clear the FW log data that has been stored in the -driver then they can write any value to the 'data' file and that will clear -the data. An example is: - - # echo 34 > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/data - -In addition to being able to read the data the user can configure how -much memory is used to store FW log data. This allows the user to -increase/decrease the amount of memory based on the users situation. -The data is stored such that if the memory fills up then the oldest data -will get overwritten in a circular manner. To change the amount of -memory the user can write to the 'log_size' file like this: - - # echo > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/log_size - -Where is one of 128K, 256K, 512K, 1M, and 2M. The default value -is 1M. - -The user can see the current value of 'log_size' by reading the file: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/log_size - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 9d3535e71985beb738c4ad2b772c6f0efdce0202) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 2 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 210 ++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 142 ++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.h | 21 ++ - drivers/net/ethernet/intel/ice/ice_main.c | 29 +++ - drivers/net/ethernet/intel/ice/ice_type.h | 1 + - 6 files changed, 405 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 11391be4efc2..f63b57ff2a3d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2338,6 +2338,7 @@ enum ice_aqc_fw_logging_mod { - /* Set FW Logging configuration (indirect 0xFF30) - * Register for FW Logging (indirect 0xFF31) - * Query FW Logging (indirect 0xFF32) -+ * FW Log Event (indirect 0xFF33) - */ - struct ice_aqc_fw_log { - u8 cmd_flags; -@@ -2666,6 +2667,7 @@ enum ice_adminq_opc { - ice_aqc_opc_fw_logs_config = 0xFF30, - ice_aqc_opc_fw_logs_register = 0xFF31, - ice_aqc_opc_fw_logs_query = 0xFF32, -+ ice_aqc_opc_fw_logs_event = 0xFF33, - }; - - #endif /* _ICE_ADMINQ_CMD_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -index 3dde99969132..c2bfba6b9ead 100644 ---- a/drivers/net/ethernet/intel/ice/ice_debugfs.c -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -64,6 +64,17 @@ static const char * const ice_fwlog_level_string[] = { - "verbose", - }; - -+/* the order in this array is important. it matches the ordering of the -+ * values in the FW so the index is the same value as in ice_fwlog_level -+ */ -+static const char * const ice_fwlog_log_size[] = { -+ "128K", -+ "256K", -+ "512K", -+ "1M", -+ "2M", -+}; -+ - /** - * ice_fwlog_print_module_cfg - print current FW logging module configuration - * @hw: pointer to the HW structure -@@ -376,6 +387,199 @@ static const struct file_operations ice_debugfs_enable_fops = { - .write = ice_debugfs_enable_write, - }; - -+/** -+ * ice_debugfs_log_size_read - read from 'log_size' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_log_size_read(struct file *filp, -+ char __user *buffer, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char buff[32] = {}; -+ int index; -+ -+ index = hw->fwlog_ring.index; -+ snprintf(buff, sizeof(buff), "%s\n", ice_fwlog_log_size[index]); -+ -+ return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff)); -+} -+ -+/** -+ * ice_debugfs_log_size_write - write into 'log_size' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_log_size_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ char user_val[8], *cmd_buf; -+ ssize_t ret; -+ int index; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 5) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ ret = sscanf(cmd_buf, "%s", user_val); -+ if (ret != 1) -+ return -EINVAL; -+ -+ index = sysfs_match_string(ice_fwlog_log_size, user_val); -+ if (index < 0) { -+ dev_info(dev, "Invalid log size '%s'. The value must be one of 128K, 256K, 512K, 1M, 2M\n", -+ user_val); -+ ret = -EINVAL; -+ goto log_size_write_error; -+ } else if (hw->fwlog_cfg.options & ICE_FWLOG_OPTION_IS_REGISTERED) { -+ dev_info(dev, "FW logging is currently running. Please disable FW logging to change log_size\n"); -+ ret = -EINVAL; -+ goto log_size_write_error; -+ } -+ -+ /* free all the buffers and the tracking info and resize */ -+ ice_fwlog_realloc_rings(hw, index); -+ -+ /* if we get here, nothing went wrong; return count since we didn't -+ * really write anything -+ */ -+ ret = (ssize_t)count; -+ -+log_size_write_error: -+ /* This function always consumes all of the written input, or produces -+ * an error. Check and enforce this. Otherwise, the write operation -+ * won't complete properly. -+ */ -+ if (WARN_ON(ret != (ssize_t)count && ret >= 0)) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static const struct file_operations ice_debugfs_log_size_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_log_size_read, -+ .write = ice_debugfs_log_size_write, -+}; -+ -+/** -+ * ice_debugfs_data_read - read from 'data' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_data_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ int data_copied = 0; -+ bool done = false; -+ -+ if (ice_fwlog_ring_empty(&hw->fwlog_ring)) -+ return 0; -+ -+ while (!ice_fwlog_ring_empty(&hw->fwlog_ring) && !done) { -+ struct ice_fwlog_data *log; -+ u16 cur_buf_len; -+ -+ log = &hw->fwlog_ring.rings[hw->fwlog_ring.head]; -+ cur_buf_len = log->data_size; -+ if (cur_buf_len >= count) { -+ done = true; -+ continue; -+ } -+ -+ if (copy_to_user(buffer, log->data, cur_buf_len)) { -+ /* if there is an error then bail and return whatever -+ * the driver has copied so far -+ */ -+ done = true; -+ continue; -+ } -+ -+ data_copied += cur_buf_len; -+ buffer += cur_buf_len; -+ count -= cur_buf_len; -+ *ppos += cur_buf_len; -+ ice_fwlog_ring_increment(&hw->fwlog_ring.head, -+ hw->fwlog_ring.size); -+ } -+ -+ return data_copied; -+} -+ -+/** -+ * ice_debugfs_data_write - write into 'data' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_data_write(struct file *filp, const char __user *buf, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ ssize_t ret; -+ -+ /* don't allow partial writes */ -+ if (*ppos != 0) -+ return 0; -+ -+ /* any value is allowed to clear the buffer so no need to even look at -+ * what the value is -+ */ -+ if (!(hw->fwlog_cfg.options & ICE_FWLOG_OPTION_IS_REGISTERED)) { -+ hw->fwlog_ring.head = 0; -+ hw->fwlog_ring.tail = 0; -+ } else { -+ dev_info(dev, "Can't clear FW log data while FW log running\n"); -+ ret = -EINVAL; -+ goto nr_buffs_write_error; -+ } -+ -+ /* if we get here, nothing went wrong; return count since we didn't -+ * really write anything -+ */ -+ ret = (ssize_t)count; -+ -+nr_buffs_write_error: -+ /* This function always consumes all of the written input, or produces -+ * an error. Check and enforce this. Otherwise, the write operation -+ * won't complete properly. -+ */ -+ if (WARN_ON(ret != (ssize_t)count && ret >= 0)) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static const struct file_operations ice_debugfs_data_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_data_read, -+ .write = ice_debugfs_data_write, -+}; -+ - /** - * ice_debugfs_fwlog_init - setup the debugfs directory - * @pf: the ice that is starting up -@@ -430,6 +634,12 @@ void ice_debugfs_fwlog_init(struct ice_pf *pf) - debugfs_create_file("enable", 0600, pf->ice_debugfs_pf_fwlog, - pf, &ice_debugfs_enable_fops); - -+ debugfs_create_file("log_size", 0600, pf->ice_debugfs_pf_fwlog, -+ pf, &ice_debugfs_log_size_fops); -+ -+ debugfs_create_file("data", 0600, pf->ice_debugfs_pf_fwlog, -+ pf, &ice_debugfs_data_fops); -+ - return; - - err_create_module_files: -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -index 25a17cbc1d34..92b5dac481cd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.c -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -1,10 +1,128 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright (c) 2022, Intel Corporation. */ - -+#include - #include "ice.h" - #include "ice_common.h" - #include "ice_fwlog.h" - -+bool ice_fwlog_ring_full(struct ice_fwlog_ring *rings) -+{ -+ u16 head, tail; -+ -+ head = rings->head; -+ tail = rings->tail; -+ -+ if (head < tail && (tail - head == (rings->size - 1))) -+ return true; -+ else if (head > tail && (tail == (head - 1))) -+ return true; -+ -+ return false; -+} -+ -+bool ice_fwlog_ring_empty(struct ice_fwlog_ring *rings) -+{ -+ return rings->head == rings->tail; -+} -+ -+void ice_fwlog_ring_increment(u16 *item, u16 size) -+{ -+ *item = (*item + 1) & (size - 1); -+} -+ -+static int ice_fwlog_alloc_ring_buffs(struct ice_fwlog_ring *rings) -+{ -+ int i, nr_bytes; -+ u8 *mem; -+ -+ nr_bytes = rings->size * ICE_AQ_MAX_BUF_LEN; -+ mem = vzalloc(nr_bytes); -+ if (!mem) -+ return -ENOMEM; -+ -+ for (i = 0; i < rings->size; i++) { -+ struct ice_fwlog_data *ring = &rings->rings[i]; -+ -+ ring->data_size = ICE_AQ_MAX_BUF_LEN; -+ ring->data = mem; -+ mem += ICE_AQ_MAX_BUF_LEN; -+ } -+ -+ return 0; -+} -+ -+static void ice_fwlog_free_ring_buffs(struct ice_fwlog_ring *rings) -+{ -+ int i; -+ -+ for (i = 0; i < rings->size; i++) { -+ struct ice_fwlog_data *ring = &rings->rings[i]; -+ -+ /* the first ring is the base memory for the whole range so -+ * free it -+ */ -+ if (!i) -+ vfree(ring->data); -+ -+ ring->data = NULL; -+ ring->data_size = 0; -+ } -+} -+ -+#define ICE_FWLOG_INDEX_TO_BYTES(n) ((128 * 1024) << (n)) -+/** -+ * ice_fwlog_realloc_rings - reallocate the FW log rings -+ * @hw: pointer to the HW structure -+ * @index: the new index to use to allocate memory for the log data -+ * -+ */ -+void ice_fwlog_realloc_rings(struct ice_hw *hw, int index) -+{ -+ struct ice_fwlog_ring ring; -+ int status, ring_size; -+ -+ /* convert the number of bytes into a number of 4K buffers. externally -+ * the driver presents the interface to the FW log data as a number of -+ * bytes because that's easy for users to understand. internally the -+ * driver uses a ring of buffers because the driver doesn't know where -+ * the beginning and end of any line of log data is so the driver has -+ * to overwrite data as complete blocks. when the data is returned to -+ * the user the driver knows that the data is correct and the FW log -+ * can be correctly parsed by the tools -+ */ -+ ring_size = ICE_FWLOG_INDEX_TO_BYTES(index) / ICE_AQ_MAX_BUF_LEN; -+ if (ring_size == hw->fwlog_ring.size) -+ return; -+ -+ /* allocate space for the new rings and buffers then release the -+ * old rings and buffers. that way if we don't have enough -+ * memory then we at least have what we had before -+ */ -+ ring.rings = kcalloc(ring_size, sizeof(*ring.rings), GFP_KERNEL); -+ if (!ring.rings) -+ return; -+ -+ ring.size = ring_size; -+ -+ status = ice_fwlog_alloc_ring_buffs(&ring); -+ if (status) { -+ dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log ring data buffers\n"); -+ ice_fwlog_free_ring_buffs(&ring); -+ kfree(ring.rings); -+ return; -+ } -+ -+ ice_fwlog_free_ring_buffs(&hw->fwlog_ring); -+ kfree(hw->fwlog_ring.rings); -+ -+ hw->fwlog_ring.rings = ring.rings; -+ hw->fwlog_ring.size = ring.size; -+ hw->fwlog_ring.index = index; -+ hw->fwlog_ring.head = 0; -+ hw->fwlog_ring.tail = 0; -+} -+ - /** - * ice_fwlog_init - Initialize FW logging configuration - * @hw: pointer to the HW structure -@@ -28,6 +146,25 @@ int ice_fwlog_init(struct ice_hw *hw) - if (status) - return status; - -+ hw->fwlog_ring.rings = kcalloc(ICE_FWLOG_RING_SIZE_DFLT, -+ sizeof(*hw->fwlog_ring.rings), -+ GFP_KERNEL); -+ if (!hw->fwlog_ring.rings) { -+ dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log rings\n"); -+ return -ENOMEM; -+ } -+ -+ hw->fwlog_ring.size = ICE_FWLOG_RING_SIZE_DFLT; -+ hw->fwlog_ring.index = ICE_FWLOG_RING_SIZE_INDEX_DFLT; -+ -+ status = ice_fwlog_alloc_ring_buffs(&hw->fwlog_ring); -+ if (status) { -+ dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log ring data buffers\n"); -+ ice_fwlog_free_ring_buffs(&hw->fwlog_ring); -+ kfree(hw->fwlog_ring.rings); -+ return status; -+ } -+ - ice_debugfs_fwlog_init(hw->back); - } else { - dev_warn(ice_hw_to_dev(hw), "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n"); -@@ -68,6 +205,11 @@ void ice_fwlog_deinit(struct ice_hw *hw) - if (status) - dev_warn(ice_hw_to_dev(hw), "Unable to unregister FW logging, status: %d\n", - status); -+ -+ if (hw->fwlog_ring.rings) { -+ ice_fwlog_free_ring_buffs(&hw->fwlog_ring); -+ kfree(hw->fwlog_ring.rings); -+ } - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h -index 45865558425d..287e71fa4b86 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.h -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.h -@@ -47,6 +47,26 @@ struct ice_fwlog_cfg { - u16 log_resolution; - }; - -+struct ice_fwlog_data { -+ u16 data_size; -+ u8 *data; -+}; -+ -+struct ice_fwlog_ring { -+ struct ice_fwlog_data *rings; -+ u16 index; -+ u16 size; -+ u16 head; -+ u16 tail; -+}; -+ -+#define ICE_FWLOG_RING_SIZE_INDEX_DFLT 3 -+#define ICE_FWLOG_RING_SIZE_DFLT 256 -+#define ICE_FWLOG_RING_SIZE_MAX 512 -+ -+bool ice_fwlog_ring_full(struct ice_fwlog_ring *rings); -+bool ice_fwlog_ring_empty(struct ice_fwlog_ring *rings); -+void ice_fwlog_ring_increment(u16 *item, u16 size); - void ice_fwlog_set_supported(struct ice_hw *hw); - bool ice_fwlog_supported(struct ice_hw *hw); - int ice_fwlog_init(struct ice_hw *hw); -@@ -55,4 +75,5 @@ int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); - int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); - int ice_fwlog_register(struct ice_hw *hw); - int ice_fwlog_unregister(struct ice_hw *hw); -+void ice_fwlog_realloc_rings(struct ice_hw *hw, int index); - #endif /* _ICE_FWLOG_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 614e10ab4159..6c6ca5353f28 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -1254,6 +1254,32 @@ ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event) - return status; - } - -+/** -+ * ice_get_fwlog_data - copy the FW log data from ARQ event -+ * @pf: PF that the FW log event is associated with -+ * @event: event structure containing FW log data -+ */ -+static void -+ice_get_fwlog_data(struct ice_pf *pf, struct ice_rq_event_info *event) -+{ -+ struct ice_fwlog_data *fwlog; -+ struct ice_hw *hw = &pf->hw; -+ -+ fwlog = &hw->fwlog_ring.rings[hw->fwlog_ring.tail]; -+ -+ memset(fwlog->data, 0, PAGE_SIZE); -+ fwlog->data_size = le16_to_cpu(event->desc.datalen); -+ -+ memcpy(fwlog->data, event->msg_buf, fwlog->data_size); -+ ice_fwlog_ring_increment(&hw->fwlog_ring.tail, hw->fwlog_ring.size); -+ -+ if (ice_fwlog_ring_full(&hw->fwlog_ring)) { -+ /* the rings are full so bump the head to create room */ -+ ice_fwlog_ring_increment(&hw->fwlog_ring.head, -+ hw->fwlog_ring.size); -+ } -+} -+ - /** - * ice_aq_prep_for_event - Prepare to wait for an AdminQ event from firmware - * @pf: pointer to the PF private structure -@@ -1535,6 +1561,9 @@ static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type) - - ice_vc_process_vf_msg(pf, &event, &data); - break; -+ case ice_aqc_opc_fw_logs_event: -+ ice_get_fwlog_data(pf, &event); -+ break; - case ice_aqc_opc_lldp_set_mib_change: - ice_dcb_process_lldp_set_mib_change(pf, &event); - break; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 84bb61aa7409..28e47bb78eaf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -875,6 +875,7 @@ struct ice_hw { - - struct ice_fwlog_cfg fwlog_cfg; - bool fwlog_supported; /* does hardware support FW logging? */ -+ struct ice_fwlog_ring fwlog_ring; - - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the ITR/INTRL granularity during --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch b/kernel-rt/debian/patches/ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch deleted file mode 100644 index 4bfe7051..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch +++ /dev/null @@ -1,98 +0,0 @@ -From 8a7f6d8b2105c39f236c51c558e21b787c223861 Mon Sep 17 00:00:00 2001 -From: Wojciech Drewek -Date: Mon, 5 Feb 2024 14:03:57 +0100 -Subject: [PATCH 28/36] ice: Fix debugfs with devlink reload - -During devlink reload it is needed to remove debugfs entries -correlated with only one PF. ice_debugfs_exit() removes all -entries created by ice driver so we can't use it. - -Introduce ice_debugfs_pf_deinit() in order to release PF's -debugfs entries. Move ice_debugfs_exit() call to ice_module_exit(), -it makes more sense since ice_debugfs_init() is called in -ice_module_init() and not in ice_probe(). - -Signed-off-by: Wojciech Drewek -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Reviewed-by: Brett Creeley -Reviewed-by: Simon Horman -Signed-off-by: Tony Nguyen -(cherry picked from commit 500d0df5b4b2394a06b949bab05f7ed0242b9858) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 10 ++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 2 ++ - drivers/net/ethernet/intel/ice/ice_main.c | 3 +-- - 4 files changed, 14 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 7966ac61154c..ed1c6cdedeff 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -895,6 +895,7 @@ static inline bool ice_is_adq_active(struct ice_pf *pf) - } - - void ice_debugfs_fwlog_init(struct ice_pf *pf); -+void ice_debugfs_pf_deinit(struct ice_pf *pf); - void ice_debugfs_init(void); - void ice_debugfs_exit(void); - void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -index c2bfba6b9ead..ba396b22bb7d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_debugfs.c -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -647,6 +647,16 @@ void ice_debugfs_fwlog_init(struct ice_pf *pf) - kfree(fw_modules); - } - -+/** -+ * ice_debugfs_pf_deinit - cleanup PF's debugfs -+ * @pf: pointer to the PF struct -+ */ -+void ice_debugfs_pf_deinit(struct ice_pf *pf) -+{ -+ debugfs_remove_recursive(pf->ice_debugfs_pf); -+ pf->ice_debugfs_pf = NULL; -+} -+ - /** - * ice_debugfs_init - create root directory for debugfs entries - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -index 92b5dac481cd..4fd15387a7e5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.c -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -188,6 +188,8 @@ void ice_fwlog_deinit(struct ice_hw *hw) - if (hw->bus.func) - return; - -+ ice_debugfs_pf_deinit(hw->back); -+ - /* make sure FW logging is disabled to not put the FW in a weird state - * for the next driver load - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 6c6ca5353f28..c882c218281a 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -5325,8 +5325,6 @@ static void ice_remove(struct pci_dev *pdev) - msleep(100); - } - -- ice_debugfs_exit(); -- - if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) { - set_bit(ICE_VF_RESETS_DISABLED, pf->state); - ice_free_vfs(pf); -@@ -5823,6 +5821,7 @@ module_init(ice_module_init); - static void __exit ice_module_exit(void) - { - pci_unregister_driver(&ice_driver); -+ ice_debugfs_exit(); - destroy_workqueue(ice_wq); - destroy_workqueue(ice_lag_wq); - pr_info("module unloaded\n"); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch b/kernel-rt/debian/patches/ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch deleted file mode 100644 index 2411e9c5..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 861015cbb4cf4cb258a1da9e80550fe991be7808 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Fri, 16 Feb 2024 14:06:38 -0800 -Subject: [PATCH 29/36] ice: remove vf->lan_vsi_num field - -The lan_vsi_num field of the VF structure is no longer used for any -purpose. Remove it. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Tested-by: Rafal Romanowski -Signed-off-by: Tony Nguyen -(cherry picked from commit 1cf94cbfc61bac89cddeb075fbc100ebd3aea81b) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_sriov.c | 1 - - drivers/net/ethernet/intel/ice/ice_vf_lib.c | 4 +--- - drivers/net/ethernet/intel/ice/ice_vf_lib.h | 5 ----- - 3 files changed, 1 insertion(+), 9 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.c b/drivers/net/ethernet/intel/ice/ice_sriov.c -index 442162be23ea..3366ac976c44 100644 ---- a/drivers/net/ethernet/intel/ice/ice_sriov.c -+++ b/drivers/net/ethernet/intel/ice/ice_sriov.c -@@ -239,7 +239,6 @@ static struct ice_vsi *ice_vf_vsi_setup(struct ice_vf *vf) - } - - vf->lan_vsi_idx = vsi->idx; -- vf->lan_vsi_num = vsi->vsi_num; - - return vsi; - } -diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.c b/drivers/net/ethernet/intel/ice/ice_vf_lib.c -index 03b9d7d74851..303fdf8555cf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_vf_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_vf_lib.c -@@ -298,7 +298,6 @@ static int ice_vf_rebuild_vsi(struct ice_vf *vf) - * vf->lan_vsi_idx - */ - vsi->vsi_num = ice_get_hw_vsi_num(&pf->hw, vsi->idx); -- vf->lan_vsi_num = vsi->vsi_num; - - return 0; - } -@@ -1299,13 +1298,12 @@ int ice_vf_init_host_cfg(struct ice_vf *vf, struct ice_vsi *vsi) - } - - /** -- * ice_vf_invalidate_vsi - invalidate vsi_idx/vsi_num to remove VSI access -+ * ice_vf_invalidate_vsi - invalidate vsi_idx to remove VSI access - * @vf: VF to remove access to VSI for - */ - void ice_vf_invalidate_vsi(struct ice_vf *vf) - { - vf->lan_vsi_idx = ICE_NO_VSI; -- vf->lan_vsi_num = ICE_NO_VSI; - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.h b/drivers/net/ethernet/intel/ice/ice_vf_lib.h -index 48fea6fa0362..1de07accbc5c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_vf_lib.h -+++ b/drivers/net/ethernet/intel/ice/ice_vf_lib.h -@@ -110,11 +110,6 @@ struct ice_vf { - u8 spoofchk:1; - u8 link_forced:1; - u8 link_up:1; /* only valid if VF link is forced */ -- /* VSI indices - actual VSI pointers are maintained in the PF structure -- * When assigned, these will be non-zero, because VSI 0 is always -- * the main LAN VSI for the PF. -- */ -- u16 lan_vsi_num; /* ID as used by firmware */ - unsigned int min_tx_rate; /* Minimum Tx bandwidth limit in Mbps */ - unsigned int max_tx_rate; /* Maximum Tx bandwidth limit in Mbps */ - DECLARE_BITMAP(vf_states, ICE_VF_STATES_NBITS); /* VF runtime states */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch b/kernel-rt/debian/patches/ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch deleted file mode 100644 index 7f02562d..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 6b7fae8669a04943af9f83ef89d39a922ed179fd Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 26 Feb 2024 16:14:54 -0800 -Subject: [PATCH 30/36] ice: rename ice_write_* functions to ice_pack_ctx_* - -In ice_common.c there are 4 functions used for converting the unpacked -software Tx and Rx context structure data into the packed format used by -hardware. These functions have extremely generic names: - - * ice_write_byte - * ice_write_word - * ice_write_dword - * ice_write_qword - -When I saw these function names my first thought was "write what? to -where?". Understanding what these functions do requires looking at the -implementation details. The functions take bits from an unpacked structure -and copy them into the packed layout used by hardware. - -As part of live migration, we will want functions which perform the inverse -operation of reading bits from the packed layout and copying them into the -unpacked format. Naming these as "ice_read_byte", etc would be very -confusing since they appear to write data. - -In preparation for adding this new inverse operation, rename the existing -functions to use the prefix "ice_pack_ctx_". This makes it clear that they -perform the bit packing while copying from the unpacked software context -structure to the packed hardware context. - -The inverse operations can then neatly be named ice_unpack_ctx_*, clearly -indicating they perform the bit unpacking while copying from the packed -hardware context to the unpacked software context structure. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Tony Nguyen -(cherry picked from commit 1260b45dbe2dbc415f3bc1e841c6c098083bcfb8) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 56 ++++++++++----------- - 1 file changed, 28 insertions(+), 28 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 6dcba0577633..17f60a98c8ed 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -4267,13 +4267,13 @@ ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps, - /* End of FW Admin Queue command wrappers */ - - /** -- * ice_write_byte - write a byte to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_byte - write a byte to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_byte(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u8 src_byte, dest_byte, mask; - u8 *from, *dest; -@@ -4306,13 +4306,13 @@ ice_write_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) - } - - /** -- * ice_write_word - write a word to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_word - write a word to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_word(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u16 src_word, mask; - __le16 dest_word; -@@ -4349,13 +4349,13 @@ ice_write_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) - } - - /** -- * ice_write_dword - write a dword to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_dword - write a dword to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_dword(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u32 src_dword, mask; - __le32 dest_dword; -@@ -4400,13 +4400,13 @@ ice_write_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) - } - - /** -- * ice_write_qword - write a qword to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_qword - write a qword to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u64 src_qword, mask; - __le64 dest_qword; -@@ -4475,16 +4475,16 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, - } - switch (ce_info[f].size_of) { - case sizeof(u8): -- ice_write_byte(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_byte(src_ctx, dest_ctx, &ce_info[f]); - break; - case sizeof(u16): -- ice_write_word(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_word(src_ctx, dest_ctx, &ce_info[f]); - break; - case sizeof(u32): -- ice_write_dword(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_dword(src_ctx, dest_ctx, &ce_info[f]); - break; - case sizeof(u64): -- ice_write_qword(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_qword(src_ctx, dest_ctx, &ce_info[f]); - break; - default: - return -EINVAL; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch b/kernel-rt/debian/patches/ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch deleted file mode 100644 index 1c8f1877..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 619e0e61b39cf051137613459d36c4fe8f435e57 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 26 Feb 2024 16:14:55 -0800 -Subject: [PATCH 31/36] ice: use GENMASK instead of BIT(n) - 1 in pack - functions - -The functions used to pack the Tx and Rx context into the hardware format -rely on using BIT() and then subtracting 1 to get a bitmask. These -functions even have a comment about how x86 machines can't use this method -for certain widths because the SHL instructions will not work properly. - -The Linux kernel already provides the GENMASK macro for generating a -suitable bitmask. Further, GENMASK is capable of generating the mask -including the shift_width. Since width is the total field width, take care -to subtract one to get the final bit position. - -Since we now include the shifted bits as part of the mask, shift the source -value first before applying the mask. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit a45d1bf516c097bb7ae4983d3128ebf139be952c) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 44 ++++----------------- - 1 file changed, 8 insertions(+), 36 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 17f60a98c8ed..55a2e264dd69 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -4284,14 +4284,11 @@ static void ice_pack_ctx_byte(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- mask = (u8)(BIT(ce_info->width) - 1); -+ mask = GENMASK(ce_info->width - 1 + shift_width, shift_width); - - src_byte = *from; -- src_byte &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_byte <<= shift_width; -+ src_byte &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); -@@ -4324,17 +4321,14 @@ static void ice_pack_ctx_word(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- mask = BIT(ce_info->width) - 1; -+ mask = GENMASK(ce_info->width - 1 + shift_width, shift_width); - - /* don't swizzle the bits until after the mask because the mask bits - * will be in a different bit position on big endian machines - */ - src_word = *(u16 *)from; -- src_word &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_word <<= shift_width; -+ src_word &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); -@@ -4367,25 +4361,14 @@ static void ice_pack_ctx_dword(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- -- /* if the field width is exactly 32 on an x86 machine, then the shift -- * operation will not work because the SHL instructions count is masked -- * to 5 bits so the shift will do nothing -- */ -- if (ce_info->width < 32) -- mask = BIT(ce_info->width) - 1; -- else -- mask = (u32)~0; -+ mask = GENMASK(ce_info->width - 1 + shift_width, shift_width); - - /* don't swizzle the bits until after the mask because the mask bits - * will be in a different bit position on big endian machines - */ - src_dword = *(u32 *)from; -- src_dword &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_dword <<= shift_width; -+ src_dword &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); -@@ -4418,25 +4401,14 @@ static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- -- /* if the field width is exactly 64 on an x86 machine, then the shift -- * operation will not work because the SHL instructions count is masked -- * to 6 bits so the shift will do nothing -- */ -- if (ce_info->width < 64) -- mask = BIT_ULL(ce_info->width) - 1; -- else -- mask = (u64)~0; -+ mask = GENMASK_ULL(ce_info->width - 1 + shift_width, shift_width); - - /* don't swizzle the bits until after the mask because the mask bits - * will be in a different bit position on big endian machines - */ - src_qword = *(u64 *)from; -- src_qword &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_qword <<= shift_width; -+ src_qword &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch b/kernel-rt/debian/patches/ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch deleted file mode 100644 index 4ab4b491..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 6502dd63a7bd436c72d2ee8b328985b93fa7e2a5 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 26 Feb 2024 16:14:56 -0800 -Subject: [PATCH 32/36] ice: cleanup line splitting for context set functions - -The indentation for ice_set_ctx and ice_write_rxq_ctx breaks the function -name after the return type. This style of breaking is used a lot throughout -the ice driver, even in cases where its not actually helpful for -readability. We no longer prefer this style of line splitting in the -driver, and new code is avoiding it. - -Normally, I would leave this alone unless the actual function contents or -description needed updating. However, a future change is going to add -inverse functions for converting packed context to unpacked context -structures. To keep this code uniform with the existing set functions, fix -up the style to the modern format of keeping the type on the same line. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Tony Nguyen -(cherry picked from commit 979c2c049fbea107ce9f8d31f3ba9dba83ddb0a2) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 12 +++++------- - drivers/net/ethernet/intel/ice/ice_common.h | 10 ++++------ - 2 files changed, 9 insertions(+), 13 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 55a2e264dd69..59ede77a1473 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -1329,9 +1329,8 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = { - * it to HW register space and enables the hardware to prefetch descriptors - * instead of only fetching them on demand - */ --int --ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -- u32 rxq_index) -+int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -+ u32 rxq_index) - { - u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 }; - -@@ -4427,11 +4426,10 @@ static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx, - * @hw: pointer to the hardware structure - * @src_ctx: pointer to a generic non-packed context structure - * @dest_ctx: pointer to memory for the packed structure -- * @ce_info: a description of the structure to be transformed -+ * @ce_info: List of Rx context elements - */ --int --ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -- const struct ice_ctx_ele *ce_info) -+int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - int f; - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index d47e5400351f..1c3c29d30815 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -52,9 +52,8 @@ int ice_get_caps(struct ice_hw *hw); - - void ice_set_safe_mode_caps(struct ice_hw *hw); - --int --ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -- u32 rxq_index); -+int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -+ u32 rxq_index); - - int - ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params); -@@ -71,9 +70,8 @@ bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq); - int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading); - void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode); - extern const struct ice_ctx_ele ice_tlan_ctx_info[]; --int --ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -- const struct ice_ctx_ele *ce_info); -+int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info); - - extern struct mutex ice_global_cfg_lock_sw; - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch b/kernel-rt/debian/patches/ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch deleted file mode 100644 index a740f1ff..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 675a8843a0de1411666389eeabeea452161f8cc5 Mon Sep 17 00:00:00 2001 -From: Maciej Fijalkowski -Date: Fri, 23 Feb 2024 17:06:27 +0100 -Subject: [PATCH 33/36] ice: do not disable Tx queues twice in ice_down() - -ice_down() clears QINT_TQCTL_CAUSE_ENA_M bit twice, which is not -necessary. First clearing happens in ice_vsi_dis_irq() and second in -ice_vsi_stop_tx_ring() - remove the first one. - -While at it, make ice_vsi_dis_irq() static as ice_down() is the only -current caller of it. - -Signed-off-by: Maciej Fijalkowski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit d5926e01e3739542bb047b77f850d7f641eaa7bc) -[Adjust ice_lib.c with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_lib.c | 55 ----------------------- - drivers/net/ethernet/intel/ice/ice_lib.h | 2 - - drivers/net/ethernet/intel/ice/ice_main.c | 44 ++++++++++++++++++ - 3 files changed, 44 insertions(+), 57 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 106ef843f4b5..f23cb9c8e3dd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -2877,61 +2877,6 @@ void ice_dis_vsi(struct ice_vsi *vsi, bool locked) - } - } - --/** -- * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI -- * @vsi: the VSI being un-configured -- */ --void ice_vsi_dis_irq(struct ice_vsi *vsi) --{ -- struct ice_pf *pf = vsi->back; -- struct ice_hw *hw = &pf->hw; -- u32 val; -- int i; -- -- /* disable interrupt causation from each queue */ -- if (vsi->tx_rings) { -- ice_for_each_txq(vsi, i) { -- if (vsi->tx_rings[i]) { -- u16 reg; -- -- reg = vsi->tx_rings[i]->reg_idx; -- val = rd32(hw, QINT_TQCTL(reg)); -- val &= ~QINT_TQCTL_CAUSE_ENA_M; -- wr32(hw, QINT_TQCTL(reg), val); -- } -- } -- } -- -- if (vsi->rx_rings) { -- ice_for_each_rxq(vsi, i) { -- if (vsi->rx_rings[i]) { -- u16 reg; -- -- reg = vsi->rx_rings[i]->reg_idx; -- val = rd32(hw, QINT_RQCTL(reg)); -- val &= ~QINT_RQCTL_CAUSE_ENA_M; -- wr32(hw, QINT_RQCTL(reg), val); -- } -- } -- } -- -- /* disable each interrupt */ -- ice_for_each_q_vector(vsi, i) { -- if (!vsi->q_vectors[i]) -- continue; -- wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0); -- } -- -- ice_flush(hw); -- -- /* don't call synchronize_irq() for VF's from the host */ -- if (vsi->type == ICE_VSI_VF) -- return; -- -- ice_for_each_q_vector(vsi, i) -- synchronize_irq(vsi->q_vectors[i]->irq.virq); --} -- - /** - * ice_vsi_release - Delete a VSI and free its resources - * @vsi: the VSI being removed -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.h b/drivers/net/ethernet/intel/ice/ice_lib.h -index f24f5d1e6f9c..dbd0f3409323 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.h -+++ b/drivers/net/ethernet/intel/ice/ice_lib.h -@@ -110,8 +110,6 @@ void - ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, - bool ena_ts); - --void ice_vsi_dis_irq(struct ice_vsi *vsi); -- - void ice_vsi_free_irq(struct ice_vsi *vsi); - - void ice_vsi_free_rx_rings(struct ice_vsi *vsi); -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index c882c218281a..685635a22616 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -7023,6 +7023,50 @@ static void ice_napi_disable_all(struct ice_vsi *vsi) - } - } - -+/** -+ * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI -+ * @vsi: the VSI being un-configured -+ */ -+static void ice_vsi_dis_irq(struct ice_vsi *vsi) -+{ -+ struct ice_pf *pf = vsi->back; -+ struct ice_hw *hw = &pf->hw; -+ u32 val; -+ int i; -+ -+ /* disable interrupt causation from each Rx queue; Tx queues are -+ * handled in ice_vsi_stop_tx_ring() -+ */ -+ if (vsi->rx_rings) { -+ ice_for_each_rxq(vsi, i) { -+ if (vsi->rx_rings[i]) { -+ u16 reg; -+ -+ reg = vsi->rx_rings[i]->reg_idx; -+ val = rd32(hw, QINT_RQCTL(reg)); -+ val &= ~QINT_RQCTL_CAUSE_ENA_M; -+ wr32(hw, QINT_RQCTL(reg), val); -+ } -+ } -+ } -+ -+ /* disable each interrupt */ -+ ice_for_each_q_vector(vsi, i) { -+ if (!vsi->q_vectors[i]) -+ continue; -+ wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0); -+ } -+ -+ ice_flush(hw); -+ -+ /* don't call synchronize_irq() for VF's from the host */ -+ if (vsi->type == ICE_VSI_VF) -+ return; -+ -+ ice_for_each_q_vector(vsi, i) -+ synchronize_irq(vsi->q_vectors[i]->irq.virq); -+} -+ - /** - * ice_down - Shutdown the connection - * @vsi: The VSI being stopped --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0034-ice-Fix-improper-extts-handling.patch b/kernel-rt/debian/patches/ice-VDF/0034-ice-Fix-improper-extts-handling.patch deleted file mode 100644 index 928b20bf..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0034-ice-Fix-improper-extts-handling.patch +++ /dev/null @@ -1,274 +0,0 @@ -From e53280c20bbe58015a91178268244d5e831276f4 Mon Sep 17 00:00:00 2001 -From: Milena Olech -Date: Tue, 2 Jul 2024 10:14:54 -0700 -Subject: [PATCH 34/36] ice: Fix improper extts handling - -Extts events are disabled and enabled by the application ts2phc. -However, in case where the driver is removed when the application is -running, a specific extts event remains enabled and can cause a kernel -crash. -As a side effect, when the driver is reloaded and application is started -again, remaining extts event for the channel from a previous run will -keep firing and the message "extts on unexpected channel" might be -printed to the user. - -To avoid that, extts events shall be disabled when PTP is released. - -Fixes: 172db5f91d5f ("ice: add support for auxiliary input/output pins") -Reviewed-by: Przemek Kitszel -Co-developed-by: Jacob Keller -Signed-off-by: Jacob Keller -Signed-off-by: Milena Olech -Signed-off-by: Karol Kolacinski -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Link: https://patch.msgid.link/20240702171459.2606611-2-anthony.l.nguyen@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 00d3b4f54582d4e4a02cda5886bb336eeab268cc) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 105 ++++++++++++++++++----- - drivers/net/ethernet/intel/ice/ice_ptp.h | 8 ++ - 2 files changed, 91 insertions(+), 22 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 48ec59fc5d87..6e06c5d596b9 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1603,27 +1603,24 @@ void ice_ptp_extts_event(struct ice_pf *pf) - /** - * ice_ptp_cfg_extts - Configure EXTTS pin and channel - * @pf: Board private structure -- * @ena: true to enable; false to disable - * @chan: GPIO channel (0-3) -- * @gpio_pin: GPIO pin -- * @extts_flags: request flags from the ptp_extts_request.flags -+ * @config: desired EXTTS configuration. -+ * @store: If set to true, the values will be stored -+ * -+ * Configure an external timestamp event on the requested channel. - */ --static int --ice_ptp_cfg_extts(struct ice_pf *pf, bool ena, unsigned int chan, u32 gpio_pin, -- unsigned int extts_flags) -+static void ice_ptp_cfg_extts(struct ice_pf *pf, unsigned int chan, -+ struct ice_extts_channel *config, bool store) - { - u32 func, aux_reg, gpio_reg, irq_reg; - struct ice_hw *hw = &pf->hw; - u8 tmr_idx; - -- if (chan > (unsigned int)pf->ptp.info.n_ext_ts) -- return -EINVAL; -- - tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; - - irq_reg = rd32(hw, PFINT_OICR_ENA); - -- if (ena) { -+ if (config->ena) { - /* Enable the interrupt */ - irq_reg |= PFINT_OICR_TSYN_EVNT_M; - aux_reg = GLTSYN_AUX_IN_0_INT_ENA_M; -@@ -1632,9 +1629,9 @@ ice_ptp_cfg_extts(struct ice_pf *pf, bool ena, unsigned int chan, u32 gpio_pin, - #define GLTSYN_AUX_IN_0_EVNTLVL_FALLING_EDGE BIT(1) - - /* set event level to requested edge */ -- if (extts_flags & PTP_FALLING_EDGE) -+ if (config->flags & PTP_FALLING_EDGE) - aux_reg |= GLTSYN_AUX_IN_0_EVNTLVL_FALLING_EDGE; -- if (extts_flags & PTP_RISING_EDGE) -+ if (config->flags & PTP_RISING_EDGE) - aux_reg |= GLTSYN_AUX_IN_0_EVNTLVL_RISING_EDGE; - - /* Write GPIO CTL reg. -@@ -1656,9 +1653,47 @@ ice_ptp_cfg_extts(struct ice_pf *pf, bool ena, unsigned int chan, u32 gpio_pin, - - wr32(hw, PFINT_OICR_ENA, irq_reg); - wr32(hw, GLTSYN_AUX_IN(chan, tmr_idx), aux_reg); -- wr32(hw, GLGEN_GPIO_CTL(gpio_pin), gpio_reg); -+ wr32(hw, GLGEN_GPIO_CTL(config->gpio_pin), gpio_reg); - -- return 0; -+ if (store) -+ memcpy(&pf->ptp.extts_channels[chan], config, sizeof(*config)); -+} -+ -+/** -+ * ice_ptp_disable_all_extts - Disable all EXTTS channels -+ * @pf: Board private structure -+ */ -+static void ice_ptp_disable_all_extts(struct ice_pf *pf) -+{ -+ struct ice_extts_channel extts_cfg = {}; -+ int i; -+ -+ for (i = 0; i < pf->ptp.info.n_ext_ts; i++) { -+ if (pf->ptp.extts_channels[i].ena) { -+ extts_cfg.gpio_pin = pf->ptp.extts_channels[i].gpio_pin; -+ extts_cfg.ena = false; -+ ice_ptp_cfg_extts(pf, i, &extts_cfg, false); -+ } -+ } -+ -+ synchronize_irq(pf->oicr_irq.virq); -+} -+ -+/** -+ * ice_ptp_enable_all_extts - Enable all EXTTS channels -+ * @pf: Board private structure -+ * -+ * Called during reset to restore user configuration. -+ */ -+static void ice_ptp_enable_all_extts(struct ice_pf *pf) -+{ -+ int i; -+ -+ for (i = 0; i < pf->ptp.info.n_ext_ts; i++) { -+ if (pf->ptp.extts_channels[i].ena) -+ ice_ptp_cfg_extts(pf, i, &pf->ptp.extts_channels[i], -+ false); -+ } - } - - /** -@@ -1815,7 +1850,6 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - struct ptp_clock_request *rq, int on) - { - struct ice_pf *pf = ptp_info_to_pf(info); -- struct ice_perout_channel clk_cfg = {0}; - bool sma_pres = false; - unsigned int chan; - u32 gpio_pin; -@@ -1826,6 +1860,9 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - - switch (rq->type) { - case PTP_CLK_REQ_PEROUT: -+ { -+ struct ice_perout_channel clk_cfg = {}; -+ - chan = rq->perout.index; - if (sma_pres) { - if (chan == ice_pin_desc_e810t[SMA1].chan) -@@ -1853,7 +1890,11 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - - err = ice_ptp_cfg_clkout(pf, chan, &clk_cfg, true); - break; -+ } - case PTP_CLK_REQ_EXTTS: -+ { -+ struct ice_extts_channel extts_cfg = {}; -+ - chan = rq->extts.index; - if (sma_pres) { - if (chan < ice_pin_desc_e810t[SMA2].chan) -@@ -1869,9 +1910,13 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - gpio_pin = chan; - } - -- err = ice_ptp_cfg_extts(pf, !!on, chan, gpio_pin, -- rq->extts.flags); -- break; -+ extts_cfg.flags = rq->extts.flags; -+ extts_cfg.gpio_pin = gpio_pin; -+ extts_cfg.ena = !!on; -+ -+ ice_ptp_cfg_extts(pf, chan, &extts_cfg, true); -+ return 0; -+ } - default: - return -EOPNOTSUPP; - } -@@ -1889,21 +1934,31 @@ static int ice_ptp_gpio_enable_e823(struct ptp_clock_info *info, - struct ptp_clock_request *rq, int on) - { - struct ice_pf *pf = ptp_info_to_pf(info); -- struct ice_perout_channel clk_cfg = {0}; - int err; - - switch (rq->type) { - case PTP_CLK_REQ_PPS: -+ { -+ struct ice_perout_channel clk_cfg = {}; -+ - clk_cfg.gpio_pin = PPS_PIN_INDEX; - clk_cfg.period = NSEC_PER_SEC; - clk_cfg.ena = !!on; - - err = ice_ptp_cfg_clkout(pf, PPS_CLK_GEN_CHAN, &clk_cfg, true); - break; -+ } - case PTP_CLK_REQ_EXTTS: -- err = ice_ptp_cfg_extts(pf, !!on, rq->extts.index, -- TIME_SYNC_PIN_INDEX, rq->extts.flags); -- break; -+ { -+ struct ice_extts_channel extts_cfg = {}; -+ -+ extts_cfg.flags = rq->extts.flags; -+ extts_cfg.gpio_pin = TIME_SYNC_PIN_INDEX; -+ extts_cfg.ena = !!on; -+ -+ ice_ptp_cfg_extts(pf, rq->extts.index, &extts_cfg, true); -+ return 0; -+ } - default: - return -EOPNOTSUPP; - } -@@ -2735,6 +2790,10 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) - ice_ptp_restart_all_phy(pf); - } - -+ /* Re-enable all periodic outputs and external timestamp events */ -+ ice_ptp_enable_all_clkout(pf); -+ ice_ptp_enable_all_extts(pf); -+ - return 0; - } - -@@ -3286,6 +3345,8 @@ void ice_ptp_release(struct ice_pf *pf) - - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); - -+ ice_ptp_disable_all_extts(pf); -+ - kthread_cancel_delayed_work_sync(&pf->ptp.work); - - ice_ptp_port_phy_stop(&pf->ptp.port); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 352405a2daf2..c6469a5a7afb 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -33,6 +33,12 @@ struct ice_perout_channel { - u64 start_time; - }; - -+struct ice_extts_channel { -+ bool ena; -+ u32 gpio_pin; -+ u32 flags; -+}; -+ - /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp - * is stored in a buffer of registers. Depending on the specific hardware, - * this buffer might be shared across multiple PHY ports. -@@ -226,6 +232,7 @@ enum ice_ptp_state { - * @ext_ts_irq: the external timestamp IRQ in use - * @kworker: kwork thread for handling periodic work - * @perout_channels: periodic output data -+ * @extts_channels: channels for external timestamps - * @info: structure defining PTP hardware capabilities - * @clock: pointer to registered PTP clock device - * @tstamp_config: hardware timestamping configuration -@@ -249,6 +256,7 @@ struct ice_ptp { - u8 ext_ts_irq; - struct kthread_worker *kworker; - struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX]; -+ struct ice_extts_channel extts_channels[GLTSYN_TGT_H_IDX_MAX]; - struct ptp_clock_info info; - struct ptp_clock *clock; - struct hwtstamp_config tstamp_config; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch b/kernel-rt/debian/patches/ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch deleted file mode 100644 index feef0a9f..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 6c24a32820031f9713d0c0cf7ac6f4ead6b58052 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 2 Jul 2024 10:14:55 -0700 -Subject: [PATCH 35/36] ice: Don't process extts if PTP is disabled - -The ice_ptp_extts_event() function can race with ice_ptp_release() and -result in a NULL pointer dereference which leads to a kernel panic. - -Panic occurs because the ice_ptp_extts_event() function calls -ptp_clock_event() with a NULL pointer. The ice driver has already -released the PTP clock by the time the interrupt for the next external -timestamp event occurs. - -To fix this, modify the ice_ptp_extts_event() function to check the -PTP state and bail early if PTP is not ready. - -Fixes: 172db5f91d5f ("ice: add support for auxiliary input/output pins") -Reviewed-by: Przemek Kitszel -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Link: https://patch.msgid.link/20240702171459.2606611-3-anthony.l.nguyen@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 996422e3230e41468f652d754fefd1bdbcd4604e) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 6e06c5d596b9..ceb4ba19c511 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1578,6 +1578,10 @@ void ice_ptp_extts_event(struct ice_pf *pf) - u8 chan, tmr_idx; - u32 hi, lo; - -+ /* Don't process timestamp events if PTP is not ready */ -+ if (pf->ptp.state != ICE_PTP_READY) -+ return; -+ - tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; - /* Event time is captured by one of the two matched registers - * GLTSYN_EVNT_L: 32 LSB of sampled time event --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch b/kernel-rt/debian/patches/ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch deleted file mode 100644 index 6d5456da..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch +++ /dev/null @@ -1,628 +0,0 @@ -From 1ce01cb7cdb0bf4c18a546a62f224c8032d75ebd Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Tue, 28 May 2024 16:03:51 -0700 -Subject: [PATCH 36/36] ice: Introduce ice_ptp_hw struct - -Create new ice_ptp_hw struct and use it for all HW and PTP-related -fields from struct ice_hw. -Replace definitions with struct fields, which values are set accordingly -to a specific device. - -Reviewed-by: Przemek Kitszel -Reviewed-by: Arkadiusz Kubalewski -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy -Signed-off-by: Jacob Keller -Link: https://lore.kernel.org/r/20240528-next-2024-05-28-ptp-refactors-v1-1-c082739bb6f6@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit d551d075b043821880b8afc0010ef70d050716d0) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 24 ++++ - drivers/net/ethernet/intel/ice/ice_common.h | 1 + - drivers/net/ethernet/intel/ice/ice_ptp.c | 22 ++-- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 134 ++++++++++++-------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 4 +- - drivers/net/ethernet/intel/ice/ice_type.h | 17 ++- - 6 files changed, 126 insertions(+), 76 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 59ede77a1473..147004e0170b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -209,6 +209,30 @@ bool ice_is_e810t(struct ice_hw *hw) - return false; - } - -+/** -+ * ice_is_e822 - Check if a device is E822 family device -+ * @hw: pointer to the hardware structure -+ * -+ * Return: true if the device is E822 based, false if not. -+ */ -+bool ice_is_e822(struct ice_hw *hw) -+{ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E822C_BACKPLANE: -+ case ICE_DEV_ID_E822C_QSFP: -+ case ICE_DEV_ID_E822C_SFP: -+ case ICE_DEV_ID_E822C_10G_BASE_T: -+ case ICE_DEV_ID_E822C_SGMII: -+ case ICE_DEV_ID_E822L_BACKPLANE: -+ case ICE_DEV_ID_E822L_SFP: -+ case ICE_DEV_ID_E822L_10G_BASE_T: -+ case ICE_DEV_ID_E822L_SGMII: -+ return true; -+ default: -+ return false; -+ } -+} -+ - /** - * ice_is_e823 - * @hw: pointer to the hardware structure -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 1c3c29d30815..9d38777310e5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -245,6 +245,7 @@ void - ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, - u64 *prev_stat, u64 *cur_stat); - bool ice_is_e810t(struct ice_hw *hw); -+bool ice_is_e822(struct ice_hw *hw); - bool ice_is_e823(struct ice_hw *hw); - int - ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index ceb4ba19c511..bb1572a353d0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -812,7 +812,7 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) - } - mutex_unlock(&pf->ptp.ports_owner.lock); - -- for (i = 0; i < ICE_MAX_QUAD; i++) { -+ for (i = 0; i < ICE_GET_QUAD_NUM(pf->hw.ptp.num_lports); i++) { - u64 tstamp_ready; - int err; - -@@ -1026,7 +1026,7 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - static int - ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) - { -- tx->block = port / ICE_PORTS_PER_QUAD; -+ tx->block = ICE_GET_QUAD_NUM(port); - tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; - tx->len = INDEX_PER_PORT_E82X; - tx->has_ready_bitmap = 1; -@@ -1248,8 +1248,8 @@ static u64 ice_base_incval(struct ice_pf *pf) - */ - static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port) - { -- int quad = port->port_num / ICE_PORTS_PER_QUAD; - int offs = port->port_num % ICE_PORTS_PER_QUAD; -+ int quad = ICE_GET_QUAD_NUM(port->port_num); - struct ice_pf *pf; - struct ice_hw *hw; - u32 val, phy_sts; -@@ -1448,7 +1448,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - if (pf->ptp.state != ICE_PTP_READY) - return; - -- if (WARN_ON_ONCE(port >= ICE_NUM_EXTERNAL_PORTS)) -+ if (WARN_ON_ONCE(port >= hw->ptp.num_lports)) - return; - - ptp_port = &pf->ptp.port; -@@ -1458,7 +1458,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - /* Update cached link status for this port immediately */ - ptp_port->link_up = linkup; - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - /* Do not reconfigure E810 PHY */ - return; -@@ -1487,7 +1487,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold) - - ice_ptp_reset_ts_memory(hw); - -- for (quad = 0; quad < ICE_MAX_QUAD; quad++) { -+ for (quad = 0; quad < ICE_GET_QUAD_NUM(hw->ptp.num_lports); quad++) { - err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, - &val); - if (err) -@@ -2038,7 +2038,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts) - ice_ptp_enable_all_clkout(pf); - - /* Recalibrate and re-enable timestamp blocks for E822/E823 */ -- if (hw->phy_model == ICE_PHY_E82X) -+ if (hw->ptp.phy_model == ICE_PHY_E82X) - ice_ptp_restart_all_phy(pf); - exit: - if (err) { -@@ -2652,7 +2652,7 @@ static void ice_ptp_maybe_trigger_tx_interrupt(struct ice_pf *pf) - if (!ice_pf_src_tmr_owned(pf)) - return; - -- for (i = 0; i < ICE_MAX_QUAD; i++) { -+ for (i = 0; i < ICE_GET_QUAD_NUM(hw->ptp.num_lports); i++) { - u64 tstamp_ready; - int err; - -@@ -3152,7 +3152,7 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - - mutex_init(&ptp_port->ps_lock); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); - case ICE_PHY_E82X: -@@ -3245,7 +3245,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf) - */ - static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf) - { -- switch (pf->hw.phy_model) { -+ switch (pf->hw.ptp.phy_model) { - case ICE_PHY_E82X: - /* E822 based PHY has the clock owner process the interrupt - * for all ports. -@@ -3281,7 +3281,7 @@ void ice_ptp_init(struct ice_pf *pf) - - ptp->state = ICE_PTP_INITIALIZING; - -- ice_ptp_init_phy_model(hw); -+ ice_ptp_init_hw(hw); - - ice_ptp_init_tx_interrupt_mode(pf); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 7337e7e710ed..313a72dad813 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -285,18 +285,21 @@ static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw) - - /** - * ice_fill_phy_msg_e82x - Fill message data for a PHY register access -+ * @hw: pointer to the HW struct - * @msg: the PHY message buffer to fill in - * @port: the port to access - * @offset: the register offset - */ --static void --ice_fill_phy_msg_e82x(struct ice_sbq_msg_input *msg, u8 port, u16 offset) -+static void ice_fill_phy_msg_e82x(struct ice_hw *hw, -+ struct ice_sbq_msg_input *msg, u8 port, -+ u16 offset) - { - int phy_port, phy, quadtype; - -- phy_port = port % ICE_PORTS_PER_PHY_E82X; -- phy = port / ICE_PORTS_PER_PHY_E82X; -- quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E82X; -+ phy_port = port % hw->ptp.ports_per_phy; -+ phy = port / hw->ptp.ports_per_phy; -+ quadtype = ICE_GET_QUAD_NUM(port) % -+ ICE_GET_QUAD_NUM(hw->ptp.ports_per_phy); - - if (quadtype == 0) { - msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port); -@@ -427,7 +430,7 @@ ice_read_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e82x(&msg, port, offset); -+ ice_fill_phy_msg_e82x(hw, &msg, port, offset); - msg.opcode = ice_sbq_msg_rd; - - err = ice_sbq_rw_reg(hw, &msg); -@@ -504,7 +507,7 @@ ice_write_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e82x(&msg, port, offset); -+ ice_fill_phy_msg_e82x(hw, &msg, port, offset); - msg.opcode = ice_sbq_msg_wr; - msg.data = val; - -@@ -614,24 +617,30 @@ ice_write_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - - /** - * ice_fill_quad_msg_e82x - Fill message data for quad register access -+ * @hw: pointer to the HW struct - * @msg: the PHY message buffer to fill in - * @quad: the quad to access - * @offset: the register offset - * - * Fill a message buffer for accessing a register in a quad shared between - * multiple PHYs. -+ * -+ * Return: -+ * * %0 - OK -+ * * %-EINVAL - invalid quad number - */ --static int --ice_fill_quad_msg_e82x(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) -+static int ice_fill_quad_msg_e82x(struct ice_hw *hw, -+ struct ice_sbq_msg_input *msg, u8 quad, -+ u16 offset) - { - u32 addr; - -- if (quad >= ICE_MAX_QUAD) -+ if (quad >= ICE_GET_QUAD_NUM(hw->ptp.num_lports)) - return -EINVAL; - - msg->dest_dev = rmn_0; - -- if ((quad % ICE_QUADS_PER_PHY_E82X) == 0) -+ if (!(quad % ICE_GET_QUAD_NUM(hw->ptp.ports_per_phy))) - addr = Q_0_BASE + offset; - else - addr = Q_1_BASE + offset; -@@ -658,7 +667,7 @@ ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e82x(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(hw, &msg, quad, offset); - if (err) - return err; - -@@ -692,7 +701,7 @@ ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e82x(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(hw, &msg, quad, offset); - if (err) - return err; - -@@ -813,7 +822,7 @@ static void ice_ptp_reset_ts_memory_e82x(struct ice_hw *hw) - { - unsigned int quad; - -- for (quad = 0; quad < ICE_MAX_QUAD; quad++) -+ for (quad = 0; quad < ICE_GET_QUAD_NUM(hw->ptp.num_lports); quad++) - ice_ptp_reset_ts_memory_quad_e82x(hw, quad); - } - -@@ -1110,7 +1119,7 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) - { - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - int err; - - err = ice_write_phy_reg_e82x(hw, port, P_REG_WL, -@@ -1175,7 +1184,7 @@ ice_ptp_prep_phy_time_e82x(struct ice_hw *hw, u32 time) - */ - phy_time = (u64)time << 32; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - /* Tx case */ - err = ice_write_64b_phy_reg_e82x(hw, port, - P_REG_TX_TIMER_INC_PRE_L, -@@ -1278,7 +1287,7 @@ ice_ptp_prep_phy_adj_e82x(struct ice_hw *hw, s32 adj) - else - cycles = -(((s64)-adj) << 32); - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - int err; - - err = ice_ptp_prep_port_adj_e82x(hw, port, cycles); -@@ -1304,7 +1313,7 @@ ice_ptp_prep_phy_incval_e82x(struct ice_hw *hw, u64 incval) - int err; - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_TIMETUS_L, - incval); - if (err) -@@ -1460,7 +1469,7 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - { - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - enum ice_ptp_tmr_cmd cmd; - int err; - -@@ -1490,7 +1499,7 @@ ice_ptp_port_cmd_e82x(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - { - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - int err; - - err = ice_ptp_write_port_cmd_e82x(hw, port, cmd); -@@ -1603,7 +1612,7 @@ static void ice_phy_cfg_lane_e82x(struct ice_hw *hw, u8 port) - return; - } - -- quad = port / ICE_PORTS_PER_QUAD; -+ quad = ICE_GET_QUAD_NUM(port); - - err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val); - if (err) { -@@ -2632,6 +2641,17 @@ ice_get_phy_tx_tstamp_ready_e82x(struct ice_hw *hw, u8 quad, u64 *tstamp_ready) - return 0; - } - -+/** -+ * ice_ptp_init_phy_e82x - initialize PHY parameters -+ * @ptp: pointer to the PTP HW struct -+ */ -+static void ice_ptp_init_phy_e82x(struct ice_ptp_hw *ptp) -+{ -+ ptp->phy_model = ICE_PHY_E82X; -+ ptp->num_lports = 8; -+ ptp->ports_per_phy = 8; -+} -+ - /* E810 functions - * - * The following functions operate on the E810 series devices which use -@@ -2859,17 +2879,21 @@ static int ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) - } - - /** -- * ice_ptp_init_phy_e810 - Enable PTP function on the external PHY -+ * ice_ptp_init_phc_e810 - Perform E810 specific PHC initialization - * @hw: pointer to HW struct - * -- * Enable the timesync PTP functionality for the external PHY connected to -- * this function. -+ * Perform E810-specific PTP hardware clock initialization steps. -+ * -+ * Return: 0 on success, other error codes when failed to initialize TimeSync - */ --int ice_ptp_init_phy_e810(struct ice_hw *hw) -+static int ice_ptp_init_phc_e810(struct ice_hw *hw) - { - u8 tmr_idx; - int err; - -+ /* Ensure synchronization delay is zero */ -+ wr32(hw, GLTSYN_SYNC_DLAY, 0); -+ - tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; - err = ice_write_phy_reg_e810(hw, ETH_GLTSYN_ENA(tmr_idx), - GLTSYN_ENA_TSYN_ENA_M); -@@ -2880,21 +2904,6 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw) - return err; - } - --/** -- * ice_ptp_init_phc_e810 - Perform E810 specific PHC initialization -- * @hw: pointer to HW struct -- * -- * Perform E810-specific PTP hardware clock initialization steps. -- */ --static int ice_ptp_init_phc_e810(struct ice_hw *hw) --{ -- /* Ensure synchronization delay is zero */ -- wr32(hw, GLTSYN_SYNC_DLAY, 0); -- -- /* Initialize the PHY */ -- return ice_ptp_init_phy_e810(hw); --} -- - /** - * ice_ptp_prep_phy_time_e810 - Prepare PHY port with initial time - * @hw: Board private structure -@@ -3238,6 +3247,17 @@ int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data) - return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL); - } - -+/** -+ * ice_ptp_init_phy_e810 - initialize PHY parameters -+ * @ptp: pointer to the PTP HW struct -+ */ -+static void ice_ptp_init_phy_e810(struct ice_ptp_hw *ptp) -+{ -+ ptp->phy_model = ICE_PHY_E810; -+ ptp->num_lports = 8; -+ ptp->ports_per_phy = 4; -+} -+ - /* Device agnostic functions - * - * The following functions implement shared behavior common to both E822 and -@@ -3295,18 +3315,22 @@ void ice_ptp_unlock(struct ice_hw *hw) - } - - /** -- * ice_ptp_init_phy_model - Initialize hw->phy_model based on device type -+ * ice_ptp_init_hw - Initialize hw based on device type - * @hw: pointer to the HW structure - * -- * Determine the PHY model for the device, and initialize hw->phy_model -+ * Determine the PHY model for the device, and initialize hw - * for use by other functions. - */ --void ice_ptp_init_phy_model(struct ice_hw *hw) -+void ice_ptp_init_hw(struct ice_hw *hw) - { -- if (ice_is_e810(hw)) -- hw->phy_model = ICE_PHY_E810; -+ struct ice_ptp_hw *ptp = &hw->ptp; -+ -+ if (ice_is_e822(hw) || ice_is_e823(hw)) -+ ice_ptp_init_phy_e82x(ptp); -+ else if (ice_is_e810(hw)) -+ ice_ptp_init_phy_e810(ptp); - else -- hw->phy_model = ICE_PHY_E82X; -+ ptp->phy_model = ICE_PHY_UNSUP; - } - - /** -@@ -3327,7 +3351,7 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - ice_ptp_src_cmd(hw, cmd); - - /* Next, prepare the ports */ -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_port_cmd_e810(hw, cmd); - break; -@@ -3379,7 +3403,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time) - - /* PHY timers */ - /* Fill Rx and Tx ports and send msg to PHY */ -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF); - break; -@@ -3421,7 +3445,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval)); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval)); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_prep_phy_incval_e810(hw, incval); - break; -@@ -3487,7 +3511,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_prep_phy_adj_e810(hw, adj); - break; -@@ -3517,7 +3541,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - */ - int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_read_phy_tstamp_e810(hw, block, idx, tstamp); - case ICE_PHY_E82X: -@@ -3545,7 +3569,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - */ - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_clear_phy_tstamp_e810(hw, block, idx); - case ICE_PHY_E82X: -@@ -3606,7 +3630,7 @@ int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) - */ - void ice_ptp_reset_ts_memory(struct ice_hw *hw) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E82X: - ice_ptp_reset_ts_memory_e82x(hw); - break; -@@ -3632,7 +3656,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) - /* Clear event err indications for auxiliary pins */ - (void)rd32(hw, GLTSYN_STAT(src_idx)); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_phc_e810(hw); - case ICE_PHY_E82X: -@@ -3655,7 +3679,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) - */ - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_get_phy_tx_tstamp_ready_e810(hw, block, - tstamp_ready); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 7e8fd369ef7c..d788221eba57 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -211,6 +211,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp); - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx); - void ice_ptp_reset_ts_memory(struct ice_hw *hw); - int ice_ptp_init_phc(struct ice_hw *hw); -+void ice_ptp_init_hw(struct ice_hw *hw); - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready); - - /* E822 family functions */ -@@ -265,7 +266,6 @@ int ice_phy_cfg_tx_offset_e82x(struct ice_hw *hw, u8 port); - int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 port); - - /* E810 family functions */ --int ice_ptp_init_phy_e810(struct ice_hw *hw); - int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); - int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); - int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data); -@@ -280,8 +280,6 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, - u8 *ref_state, u8 *eec_mode, s64 *phase_offset, - enum dpll_lock_status *dpll_state); - int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); -- --void ice_ptp_init_phy_model(struct ice_hw *hw); - int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, - unsigned long *caps); - -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 28e47bb78eaf..6fc4cd1030d0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -807,6 +807,9 @@ struct ice_mbx_data { - u16 async_watermark_val; - }; - -+#define ICE_PORTS_PER_QUAD 4 -+#define ICE_GET_QUAD_NUM(port) ((port) / ICE_PORTS_PER_QUAD) -+ - /* PHY model */ - enum ice_phy_model { - ICE_PHY_UNSUP = -1, -@@ -814,6 +817,12 @@ enum ice_phy_model { - ICE_PHY_E82X, - }; - -+struct ice_ptp_hw { -+ enum ice_phy_model phy_model; -+ u8 num_lports; -+ u8 ports_per_phy; -+}; -+ - /* Port hardware description */ - struct ice_hw { - u8 __iomem *hw_addr; -@@ -835,7 +844,6 @@ struct ice_hw { - u8 revision_id; - - u8 pf_id; /* device profile info */ -- enum ice_phy_model phy_model; - - u16 max_burst_size; /* driver sets this value */ - -@@ -896,12 +904,7 @@ struct ice_hw { - /* INTRL granularity in 1 us */ - u8 intrl_gran; - --#define ICE_MAX_QUAD 2 --#define ICE_QUADS_PER_PHY_E82X 2 --#define ICE_PORTS_PER_PHY_E82X 8 --#define ICE_PORTS_PER_QUAD 4 --#define ICE_PORTS_PER_PHY_E810 4 --#define ICE_NUM_EXTERNAL_PORTS (ICE_MAX_QUAD * ICE_PORTS_PER_QUAD) -+ struct ice_ptp_hw ptp; - - /* Active package version (currently active) */ - struct ice_pkg_ver active_pkg_ver; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch b/kernel-rt/debian/patches/ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch deleted file mode 100644 index f7e38700..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch +++ /dev/null @@ -1,80 +0,0 @@ -From cd12b5c8239993e395436ff9a01b524103aa0641 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 28 May 2024 16:03:56 -0700 -Subject: [PATCH] ice: Introduce ice_get_base_incval() helper - -Add a new helper for getting base clock increment value for specific HW. - -Reviewed-by: Przemek Kitszel -Reviewed-by: Arkadiusz Kubalewski -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy -Signed-off-by: Jacob Keller -Link: https://lore.kernel.org/r/20240528-next-2024-05-28-ptp-refactors-v1-6-c082739bb6f6@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 1f374d57c39386520586539641cafc999d0f3ef5) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 9 +-------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 18 ++++++++++++++++++ - 2 files changed, 19 insertions(+), 8 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index bb1572a353d0..44b8fc8021cd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -7,8 +7,6 @@ - - #define E810_OUT_PROP_DELAY_NS 1 - --#define UNKNOWN_INCVAL_E82X 0x100000000ULL -- - static const struct ptp_pin_desc ice_pin_desc_e810t[] = { - /* name idx func chan */ - { "GNSS", GNSS, PTP_PF_EXTTS, 0, { 0, } }, -@@ -1229,12 +1227,7 @@ static u64 ice_base_incval(struct ice_pf *pf) - struct ice_hw *hw = &pf->hw; - u64 incval; - -- if (ice_is_e810(hw)) -- incval = ICE_PTP_NOMINAL_INCVAL_E810; -- else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) -- incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); -- else -- incval = UNKNOWN_INCVAL_E82X; -+ incval = ice_get_base_incval(hw); - - dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", - incval); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index d788221eba57..749a3f2d8293 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -283,6 +283,24 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, - unsigned long *caps); - -+/** -+ * ice_get_base_incval - Get base clock increment value -+ * @hw: pointer to the HW struct -+ * -+ * Return: base clock increment value for supported PHYs, 0 otherwise -+ */ -+static inline u64 ice_get_base_incval(struct ice_hw *hw) -+{ -+ switch (hw->ptp.phy_model) { -+ case ICE_PHY_E810: -+ return ICE_PTP_NOMINAL_INCVAL_E810; -+ case ICE_PHY_E82X: -+ return ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); -+ default: -+ return 0; -+ } -+} -+ - #define PFTSYN_SEM_BYTES 4 - - #define ICE_PTP_CLOCK_INDEX_0 0x00 --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch b/kernel-rt/debian/patches/ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch deleted file mode 100644 index ee86b103..00000000 --- a/kernel-rt/debian/patches/ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 437206483113743a4ef40c2f7e14f09705049672 Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Mon, 2 Sep 2024 03:18:08 +0000 -Subject: [PATCH] ice:modify the ice driver version to stx.4 - -Change the ice driver min version to stx.4 because we back ported -the upstream 36 commits to our code base to support the customer's -requirement. - -The ice driver version should be ice-6.6.40-stx.4. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 5807b310bdca..7163d25405f8 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.3" -+ICE_STX = "-stx.4" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch b/kernel-rt/debian/patches/ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch deleted file mode 100644 index c599a7df..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch +++ /dev/null @@ -1,541 +0,0 @@ -From cff205e9f2d09efb61ca647dfd01b5a229952e22 Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:35 +0100 -Subject: [PATCH 01/46] dpll: documentation on DPLL subsystem interface - -Add documentation explaining common netlink interface to configure DPLL -devices and monitoring events. Common way to implement DPLL device in -a driver is also covered. - -Co-developed-by: Bagas Sanjaya -Signed-off-by: Bagas Sanjaya -Signed-off-by: Vadim Fedorenko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit dbb291f19393b628a1d15b94a78d471b9d94e532) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 497 +++++++++++++++++++++++++++++ - Documentation/driver-api/index.rst | 1 + - 2 files changed, 498 insertions(+) - create mode 100644 Documentation/driver-api/dpll.rst - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -new file mode 100644 -index 000000000000..bb52f1b8c0be ---- /dev/null -+++ b/Documentation/driver-api/dpll.rst -@@ -0,0 +1,497 @@ -+.. SPDX-License-Identifier: GPL-2.0 -+ -+=============================== -+The Linux kernel dpll subsystem -+=============================== -+ -+DPLL -+==== -+ -+PLL - Phase Locked Loop is an electronic circuit which syntonizes clock -+signal of a device with an external clock signal. Effectively enabling -+device to run on the same clock signal beat as provided on a PLL input. -+ -+DPLL - Digital Phase Locked Loop is an integrated circuit which in -+addition to plain PLL behavior incorporates a digital phase detector -+and may have digital divider in the loop. As a result, the frequency on -+DPLL's input and output may be configurable. -+ -+Subsystem -+========= -+ -+The main purpose of dpll subsystem is to provide general interface -+to configure devices that use any kind of Digital PLL and could use -+different sources of input signal to synchronize to, as well as -+different types of outputs. -+The main interface is NETLINK_GENERIC based protocol with an event -+monitoring multicast group defined. -+ -+Device object -+============= -+ -+Single dpll device object means single Digital PLL circuit and bunch of -+connected pins. -+It reports the supported modes of operation and current status to the -+user in response to the `do` request of netlink command -+``DPLL_CMD_DEVICE_GET`` and list of dplls registered in the subsystem -+with `dump` netlink request of the same command. -+Changing the configuration of dpll device is done with `do` request of -+netlink ``DPLL_CMD_DEVICE_SET`` command. -+A device handle is ``DPLL_A_ID``, it shall be provided to get or set -+configuration of particular device in the system. It can be obtained -+with a ``DPLL_CMD_DEVICE_GET`` `dump` request or -+a ``DPLL_CMD_DEVICE_ID_GET`` `do` request, where the one must provide -+attributes that result in single device match. -+ -+Pin object -+========== -+ -+A pin is amorphic object which represents either input or output, it -+could be internal component of the device, as well as externally -+connected. -+The number of pins per dpll vary, but usually multiple pins shall be -+provided for a single dpll device. -+Pin's properties, capabilities and status is provided to the user in -+response to `do` request of netlink ``DPLL_CMD_PIN_GET`` command. -+It is also possible to list all the pins that were registered in the -+system with `dump` request of ``DPLL_CMD_PIN_GET`` command. -+Configuration of a pin can be changed by `do` request of netlink -+``DPLL_CMD_PIN_SET`` command. -+Pin handle is a ``DPLL_A_PIN_ID``, it shall be provided to get or set -+configuration of particular pin in the system. It can be obtained with -+``DPLL_CMD_PIN_GET`` `dump` request or ``DPLL_CMD_PIN_ID_GET`` `do` -+request, where user provides attributes that result in single pin match. -+ -+Pin selection -+============= -+ -+In general, selected pin (the one which signal is driving the dpll -+device) can be obtained from ``DPLL_A_PIN_STATE`` attribute, and only -+one pin shall be in ``DPLL_PIN_STATE_CONNECTED`` state for any dpll -+device. -+ -+Pin selection can be done either manually or automatically, depending -+on hardware capabilities and active dpll device work mode -+(``DPLL_A_MODE`` attribute). The consequence is that there are -+differences for each mode in terms of available pin states, as well as -+for the states the user can request for a dpll device. -+ -+In manual mode (``DPLL_MODE_MANUAL``) the user can request or receive -+one of following pin states: -+ -+- ``DPLL_PIN_STATE_CONNECTED`` - the pin is used to drive dpll device -+- ``DPLL_PIN_STATE_DISCONNECTED`` - the pin is not used to drive dpll -+ device -+ -+In automatic mode (``DPLL_MODE_AUTOMATIC``) the user can request or -+receive one of following pin states: -+ -+- ``DPLL_PIN_STATE_SELECTABLE`` - the pin shall be considered as valid -+ input for automatic selection algorithm -+- ``DPLL_PIN_STATE_DISCONNECTED`` - the pin shall be not considered as -+ a valid input for automatic selection algorithm -+ -+In automatic mode (``DPLL_MODE_AUTOMATIC``) the user can only receive -+pin state ``DPLL_PIN_STATE_CONNECTED`` once automatic selection -+algorithm locks a dpll device with one of the inputs. -+ -+Shared pins -+=========== -+ -+A single pin object can be attached to multiple dpll devices. -+Then there are two groups of configuration knobs: -+ -+1) Set on a pin - the configuration affects all dpll devices pin is -+ registered to (i.e., ``DPLL_A_PIN_FREQUENCY``), -+2) Set on a pin-dpll tuple - the configuration affects only selected -+ dpll device (i.e., ``DPLL_A_PIN_PRIO``, ``DPLL_A_PIN_STATE``, -+ ``DPLL_A_PIN_DIRECTION``). -+ -+MUX-type pins -+============= -+ -+A pin can be MUX-type, it aggregates child pins and serves as a pin -+multiplexer. One or more pins are registered with MUX-type instead of -+being directly registered to a dpll device. -+Pins registered with a MUX-type pin provide user with additional nested -+attribute ``DPLL_A_PIN_PARENT_PIN`` for each parent they were registered -+with. -+If a pin was registered with multiple parent pins, they behave like a -+multiple output multiplexer. In this case output of a -+``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested -+attributes with current state related to each parent, like: -+ -+'pin': [{{ -+ 'clock-id': 282574471561216, -+ 'module-name': 'ice', -+ 'capabilities': 4, -+ 'id': 13, -+ 'parent-pin': [ -+ {'parent-id': 2, 'state': 'connected'}, -+ {'parent-id': 3, 'state': 'disconnected'} -+ ], -+ 'type': 'synce-eth-port' -+ }}] -+ -+Only one child pin can provide its signal to the parent MUX-type pin at -+a time, the selection is done by requesting change of a child pin state -+on desired parent, with the use of ``DPLL_A_PIN_PARENT`` nested -+attribute. Example of netlink `set state on parent pin` message format: -+ -+ ========================== ============================================= -+ ``DPLL_A_PIN_ID`` child pin id -+ ``DPLL_A_PIN_PARENT_PIN`` nested attribute for requesting configuration -+ related to parent pin -+ ``DPLL_A_PIN_PARENT_ID`` parent pin id -+ ``DPLL_A_PIN_STATE`` requested pin state on parent -+ ========================== ============================================= -+ -+Pin priority -+============ -+ -+Some devices might offer a capability of automatic pin selection mode -+(enum value ``DPLL_MODE_AUTOMATIC`` of ``DPLL_A_MODE`` attribute). -+Usually, automatic selection is performed on the hardware level, which -+means only pins directly connected to the dpll can be used for automatic -+input pin selection. -+In automatic selection mode, the user cannot manually select a input -+pin for the device, instead the user shall provide all directly -+connected pins with a priority ``DPLL_A_PIN_PRIO``, the device would -+pick a highest priority valid signal and use it to control the DPLL -+device. Example of netlink `set priority on parent pin` message format: -+ -+ ============================ ============================================= -+ ``DPLL_A_PIN_ID`` configured pin id -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attribute for requesting configuration -+ related to parent dpll device -+ ``DPLL_A_PIN_PARENT_ID`` parent dpll device id -+ ``DPLL_A_PIN_PRIO`` requested pin prio on parent dpll -+ ============================ ============================================= -+ -+Child pin of MUX-type pin is not capable of automatic input pin selection, -+in order to configure active input of a MUX-type pin, the user needs to -+request desired pin state of the child pin on the parent pin, -+as described in the ``MUX-type pins`` chapter. -+ -+Configuration commands group -+============================ -+ -+Configuration commands are used to get information about registered -+dpll devices (and pins), as well as set configuration of device or pins. -+As dpll devices must be abstracted and reflect real hardware, -+there is no way to add new dpll device via netlink from user space and -+each device should be registered by its driver. -+ -+All netlink commands require ``GENL_ADMIN_PERM``. This is to prevent -+any spamming/DoS from unauthorized userspace applications. -+ -+List of netlink commands with possible attributes -+================================================= -+ -+Constants identifying command types for dpll device uses a -+``DPLL_CMD_`` prefix and suffix according to command purpose. -+The dpll device related attributes use a ``DPLL_A_`` prefix and -+suffix according to attribute purpose. -+ -+ ==================================== ================================= -+ ``DPLL_CMD_DEVICE_ID_GET`` command to get device ID -+ ``DPLL_A_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_TYPE`` attr type of dpll device -+ ==================================== ================================= -+ -+ ==================================== ================================= -+ ``DPLL_CMD_DEVICE_GET`` command to get device info or -+ dump list of available devices -+ ``DPLL_A_ID`` attr unique dpll device ID -+ ``DPLL_A_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_MODE`` attr selection mode -+ ``DPLL_A_MODE_SUPPORTED`` attr available selection modes -+ ``DPLL_A_LOCK_STATUS`` attr dpll device lock status -+ ``DPLL_A_TEMP`` attr device temperature info -+ ``DPLL_A_TYPE`` attr type of dpll device -+ ==================================== ================================= -+ -+ ==================================== ================================= -+ ``DPLL_CMD_DEVICE_SET`` command to set dpll device config -+ ``DPLL_A_ID`` attr internal dpll device index -+ ``DPLL_A_MODE`` attr selection mode to configure -+ ==================================== ================================= -+ -+Constants identifying command types for pins uses a -+``DPLL_CMD_PIN_`` prefix and suffix according to command purpose. -+The pin related attributes use a ``DPLL_A_PIN_`` prefix and suffix -+according to attribute purpose. -+ -+ ==================================== ================================= -+ ``DPLL_CMD_PIN_ID_GET`` command to get pin ID -+ ``DPLL_A_PIN_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_PIN_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided -+ by registerer -+ ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided -+ by registerer -+ ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided -+ by registerer -+ ``DPLL_A_PIN_TYPE`` attr type of a pin -+ ==================================== ================================= -+ -+ ==================================== ================================== -+ ``DPLL_CMD_PIN_GET`` command to get pin info or dump -+ list of available pins -+ ``DPLL_A_PIN_ID`` attr unique a pin ID -+ ``DPLL_A_PIN_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_PIN_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided -+ by registerer -+ ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided -+ by registerer -+ ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided -+ by registerer -+ ``DPLL_A_PIN_TYPE`` attr type of a pin -+ ``DPLL_A_PIN_FREQUENCY`` attr current frequency of a pin -+ ``DPLL_A_PIN_FREQUENCY_SUPPORTED`` nested attr provides supported -+ frequencies -+ ``DPLL_A_PIN_ANY_FREQUENCY_MIN`` attr minimum value of frequency -+ ``DPLL_A_PIN_ANY_FREQUENCY_MAX`` attr maximum value of frequency -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent device -+ the pin is connected with -+ ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id -+ ``DPLL_A_PIN_PRIO`` attr priority of pin on the -+ dpll device -+ ``DPLL_A_PIN_STATE`` attr state of pin on the parent -+ dpll device -+ ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the -+ parent dpll device -+ ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin -+ the pin is connected with -+ ``DPLL_A_PIN_PARENT_ID`` attr parent pin id -+ ``DPLL_A_PIN_STATE`` attr state of pin on the parent -+ pin -+ ``DPLL_A_PIN_CAPABILITIES`` attr bitmask of pin capabilities -+ ==================================== ================================== -+ -+ ==================================== ================================= -+ ``DPLL_CMD_PIN_SET`` command to set pins configuration -+ ``DPLL_A_PIN_ID`` attr unique a pin ID -+ ``DPLL_A_PIN_FREQUENCY`` attr requested frequency of a pin -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent dpll -+ device configuration request -+ ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id -+ ``DPLL_A_PIN_DIRECTION`` attr requested direction of a pin -+ ``DPLL_A_PIN_PRIO`` attr requested priority of pin on -+ the dpll device -+ ``DPLL_A_PIN_STATE`` attr requested state of pin on -+ the dpll device -+ ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin -+ configuration request -+ ``DPLL_A_PIN_PARENT_ID`` attr parent pin id -+ ``DPLL_A_PIN_STATE`` attr requested state of pin on -+ parent pin -+ ==================================== ================================= -+ -+Netlink dump requests -+===================== -+ -+The ``DPLL_CMD_DEVICE_GET`` and ``DPLL_CMD_PIN_GET`` commands are -+capable of dump type netlink requests, in which case the response is in -+the same format as for their ``do`` request, but every device or pin -+registered in the system is returned. -+ -+SET commands format -+=================== -+ -+``DPLL_CMD_DEVICE_SET`` - to target a dpll device, the user provides -+``DPLL_A_ID``, which is unique identifier of dpll device in the system, -+as well as parameter being configured (``DPLL_A_MODE``). -+ -+``DPLL_CMD_PIN_SET`` - to target a pin user must provide a -+``DPLL_A_PIN_ID``, which is unique identifier of a pin in the system. -+Also configured pin parameters must be added. -+If ``DPLL_A_PIN_FREQUENCY`` is configured, this affects all the dpll -+devices that are connected with the pin, that is why frequency attribute -+shall not be enclosed in ``DPLL_A_PIN_PARENT_DEVICE``. -+Other attributes: ``DPLL_A_PIN_PRIO``, ``DPLL_A_PIN_STATE`` or -+``DPLL_A_PIN_DIRECTION`` must be enclosed in -+``DPLL_A_PIN_PARENT_DEVICE`` as their configuration relates to only one -+of parent dplls, targeted by ``DPLL_A_PIN_PARENT_ID`` attribute which is -+also required inside that nest. -+For MUX-type pins the ``DPLL_A_PIN_STATE`` attribute is configured in -+similar way, by enclosing required state in ``DPLL_A_PIN_PARENT_PIN`` -+nested attribute and targeted parent pin id in ``DPLL_A_PIN_PARENT_ID``. -+ -+In general, it is possible to configure multiple parameters at once, but -+internally each parameter change will be invoked separately, where order -+of configuration is not guaranteed by any means. -+ -+Configuration pre-defined enums -+=============================== -+ -+.. kernel-doc:: include/uapi/linux/dpll.h -+ -+Notifications -+============= -+ -+dpll device can provide notifications regarding status changes of the -+device, i.e. lock status changes, input/output changes or other alarms. -+There is one multicast group that is used to notify user-space apps via -+netlink socket: ``DPLL_MCGRP_MONITOR`` -+ -+Notifications messages: -+ -+ ============================== ===================================== -+ ``DPLL_CMD_DEVICE_CREATE_NTF`` dpll device was created -+ ``DPLL_CMD_DEVICE_DELETE_NTF`` dpll device was deleted -+ ``DPLL_CMD_DEVICE_CHANGE_NTF`` dpll device has changed -+ ``DPLL_CMD_PIN_CREATE_NTF`` dpll pin was created -+ ``DPLL_CMD_PIN_DELETE_NTF`` dpll pin was deleted -+ ``DPLL_CMD_PIN_CHANGE_NTF`` dpll pin has changed -+ ============================== ===================================== -+ -+Events format is the same as for the corresponding get command. -+Format of ``DPLL_CMD_DEVICE_`` events is the same as response of -+``DPLL_CMD_DEVICE_GET``. -+Format of ``DPLL_CMD_PIN_`` events is same as response of -+``DPLL_CMD_PIN_GET``. -+ -+Device driver implementation -+============================ -+ -+Device is allocated by dpll_device_get() call. Second call with the -+same arguments will not create new object but provides pointer to -+previously created device for given arguments, it also increases -+refcount of that object. -+Device is deallocated by dpll_device_put() call, which first -+decreases the refcount, once refcount is cleared the object is -+destroyed. -+ -+Device should implement set of operations and register device via -+dpll_device_register() at which point it becomes available to the -+users. Multiple driver instances can obtain reference to it with -+dpll_device_get(), as well as register dpll device with their own -+ops and priv. -+ -+The pins are allocated separately with dpll_pin_get(), it works -+similarly to dpll_device_get(). Function first creates object and then -+for each call with the same arguments only the object refcount -+increases. Also dpll_pin_put() works similarly to dpll_device_put(). -+ -+A pin can be registered with parent dpll device or parent pin, depending -+on hardware needs. Each registration requires registerer to provide set -+of pin callbacks, and private data pointer for calling them: -+ -+- dpll_pin_register() - register pin with a dpll device, -+- dpll_pin_on_pin_register() - register pin with another MUX type pin. -+ -+Notifications of adding or removing dpll devices are created within -+subsystem itself. -+Notifications about registering/deregistering pins are also invoked by -+the subsystem. -+Notifications about status changes either of dpll device or a pin are -+invoked in two ways: -+ -+- after successful change was requested on dpll subsystem, the subsystem -+ calls corresponding notification, -+- requested by device driver with dpll_device_change_ntf() or -+ dpll_pin_change_ntf() when driver informs about the status change. -+ -+The device driver using dpll interface is not required to implement all -+the callback operation. Nevertheless, there are few required to be -+implemented. -+Required dpll device level callback operations: -+ -+- ``.mode_get``, -+- ``.lock_status_get``. -+ -+Required pin level callback operations: -+ -+- ``.state_on_dpll_get`` (pins registered with dpll device), -+- ``.state_on_pin_get`` (pins registered with parent pin), -+- ``.direction_get``. -+ -+Every other operation handler is checked for existence and -+``-EOPNOTSUPP`` is returned in case of absence of specific handler. -+ -+The simplest implementation is in the OCP TimeCard driver. The ops -+structures are defined like this: -+ -+.. code-block:: c -+ static const struct dpll_device_ops dpll_ops = { -+ .lock_status_get = ptp_ocp_dpll_lock_status_get, -+ .mode_get = ptp_ocp_dpll_mode_get, -+ .mode_supported = ptp_ocp_dpll_mode_supported, -+ }; -+ -+ static const struct dpll_pin_ops dpll_pins_ops = { -+ .frequency_get = ptp_ocp_dpll_frequency_get, -+ .frequency_set = ptp_ocp_dpll_frequency_set, -+ .direction_get = ptp_ocp_dpll_direction_get, -+ .direction_set = ptp_ocp_dpll_direction_set, -+ .state_on_dpll_get = ptp_ocp_dpll_state_get, -+ }; -+ -+The registration part is then looks like this part: -+ -+.. code-block:: c -+ clkid = pci_get_dsn(pdev); -+ bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); -+ if (IS_ERR(bp->dpll)) { -+ err = PTR_ERR(bp->dpll); -+ dev_err(&pdev->dev, "dpll_device_alloc failed\n"); -+ goto out; -+ } -+ -+ err = dpll_device_register(bp->dpll, DPLL_TYPE_PPS, &dpll_ops, bp); -+ if (err) -+ goto out; -+ -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE, &bp->sma[i].dpll_prop); -+ if (IS_ERR(bp->sma[i].dpll_pin)) { -+ err = PTR_ERR(bp->dpll); -+ goto out_dpll; -+ } -+ -+ err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, -+ &bp->sma[i]); -+ if (err) { -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ goto out_dpll; -+ } -+ } -+ -+In the error path we have to rewind every allocation in the reverse order: -+ -+.. code-block:: c -+ while (i) { -+ --i; -+ dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ } -+ dpll_device_put(bp->dpll); -+ -+More complex example can be found in Intel's ICE driver or nVidia's mlx5 driver. -+ -+SyncE enablement -+================ -+For SyncE enablement it is required to allow control over dpll device -+for a software application which monitors and configures the inputs of -+dpll device in response to current state of a dpll device and its -+inputs. -+In such scenario, dpll device input signal shall be also configurable -+to drive dpll with signal recovered from the PHY netdevice. -+This is done by exposing a pin to the netdevice - attaching pin to the -+netdevice itself with -+``netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin)``. -+Exposed pin id handle ``DPLL_A_PIN_ID`` is then identifiable by the user -+as it is attached to rtnetlink respond to get ``RTM_NEWLINK`` command in -+nested attribute ``IFLA_DPLL_PIN``. -diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst -index 1e16a40da3ba..f549a68951d7 100644 ---- a/Documentation/driver-api/index.rst -+++ b/Documentation/driver-api/index.rst -@@ -114,6 +114,7 @@ available subsections can be seen below. - zorro - hte/index - wmi -+ dpll - - .. only:: subproject and html - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch b/kernel-rt/debian/patches/ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch deleted file mode 100644 index 637de31c..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch +++ /dev/null @@ -1,956 +0,0 @@ -From 90b97a5ba43cb28a6b64e8f7e8dc469edca3ad5e Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:36 +0100 -Subject: [PATCH 02/46] dpll: spec: Add Netlink spec in YAML - -Add a protocol spec for DPLL. -Add code generated from the spec. - -Signed-off-by: Jakub Kicinski -Signed-off-by: Michal Michalik -Signed-off-by: Vadim Fedorenko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 3badff3a25d815e915d89565a0c82dec608a8d2b) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/dpll.yaml | 488 ++++++++++++++++++++++++++ - drivers/dpll/dpll_nl.c | 162 +++++++++ - drivers/dpll/dpll_nl.h | 51 +++ - include/uapi/linux/dpll.h | 201 +++++++++++ - 4 files changed, 902 insertions(+) - create mode 100644 Documentation/netlink/specs/dpll.yaml - create mode 100644 drivers/dpll/dpll_nl.c - create mode 100644 drivers/dpll/dpll_nl.h - create mode 100644 include/uapi/linux/dpll.h - -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -new file mode 100644 -index 000000000000..8b86b28b47a6 ---- /dev/null -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -0,0 +1,488 @@ -+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) -+ -+name: dpll -+ -+doc: DPLL subsystem. -+ -+definitions: -+ - -+ type: enum -+ name: mode -+ doc: | -+ working modes a dpll can support, differentiates if and how dpll selects -+ one of its inputs to syntonize with it, valid values for DPLL_A_MODE -+ attribute -+ entries: -+ - -+ name: manual -+ doc: input can be only selected by sending a request to dpll -+ value: 1 -+ - -+ name: automatic -+ doc: highest prio input pin auto selected by dpll -+ render-max: true -+ - -+ type: enum -+ name: lock-status -+ doc: | -+ provides information of dpll device lock status, valid values for -+ DPLL_A_LOCK_STATUS attribute -+ entries: -+ - -+ name: unlocked -+ doc: | -+ dpll was not yet locked to any valid input (or forced by setting -+ DPLL_A_MODE to DPLL_MODE_DETACHED) -+ value: 1 -+ - -+ name: locked -+ doc: | -+ dpll is locked to a valid signal, but no holdover available -+ - -+ name: locked-ho-acq -+ doc: | -+ dpll is locked and holdover acquired -+ - -+ name: holdover -+ doc: | -+ dpll is in holdover state - lost a valid lock or was forced -+ by disconnecting all the pins (latter possible only -+ when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ, -+ if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the -+ dpll's lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED) -+ render-max: true -+ - -+ type: const -+ name: temp-divider -+ value: 1000 -+ doc: | -+ temperature divider allowing userspace to calculate the -+ temperature as float with three digit decimal precision. -+ Value of (DPLL_A_TEMP / DPLL_TEMP_DIVIDER) is integer part of -+ temperature value. -+ Value of (DPLL_A_TEMP % DPLL_TEMP_DIVIDER) is fractional part of -+ temperature value. -+ - -+ type: enum -+ name: type -+ doc: type of dpll, valid values for DPLL_A_TYPE attribute -+ entries: -+ - -+ name: pps -+ doc: dpll produces Pulse-Per-Second signal -+ value: 1 -+ - -+ name: eec -+ doc: dpll drives the Ethernet Equipment Clock -+ render-max: true -+ - -+ type: enum -+ name: pin-type -+ doc: | -+ defines possible types of a pin, valid values for DPLL_A_PIN_TYPE -+ attribute -+ entries: -+ - -+ name: mux -+ doc: aggregates another layer of selectable pins -+ value: 1 -+ - -+ name: ext -+ doc: external input -+ - -+ name: synce-eth-port -+ doc: ethernet port PHY's recovered clock -+ - -+ name: int-oscillator -+ doc: device internal oscillator -+ - -+ name: gnss -+ doc: GNSS recovered clock -+ render-max: true -+ - -+ type: enum -+ name: pin-direction -+ doc: | -+ defines possible direction of a pin, valid values for -+ DPLL_A_PIN_DIRECTION attribute -+ entries: -+ - -+ name: input -+ doc: pin used as a input of a signal -+ value: 1 -+ - -+ name: output -+ doc: pin used to output the signal -+ render-max: true -+ - -+ type: const -+ name: pin-frequency-1-hz -+ value: 1 -+ - -+ type: const -+ name: pin-frequency-10-khz -+ value: 10000 -+ - -+ type: const -+ name: pin-frequency-77_5-khz -+ value: 77500 -+ - -+ type: const -+ name: pin-frequency-10-mhz -+ value: 10000000 -+ - -+ type: enum -+ name: pin-state -+ doc: | -+ defines possible states of a pin, valid values for -+ DPLL_A_PIN_STATE attribute -+ entries: -+ - -+ name: connected -+ doc: pin connected, active input of phase locked loop -+ value: 1 -+ - -+ name: disconnected -+ doc: pin disconnected, not considered as a valid input -+ - -+ name: selectable -+ doc: pin enabled for automatic input selection -+ render-max: true -+ - -+ type: flags -+ name: pin-capabilities -+ doc: | -+ defines possible capabilities of a pin, valid flags on -+ DPLL_A_PIN_CAPABILITIES attribute -+ entries: -+ - -+ name: direction-can-change -+ doc: pin direction can be changed -+ - -+ name: priority-can-change -+ doc: pin priority can be changed -+ - -+ name: state-can-change -+ doc: pin state can be changed -+ -+attribute-sets: -+ - -+ name: dpll -+ enum-name: dpll_a -+ attributes: -+ - -+ name: id -+ type: u32 -+ - -+ name: module-name -+ type: string -+ - -+ name: pad -+ type: pad -+ - -+ name: clock-id -+ type: u64 -+ - -+ name: mode -+ type: u32 -+ enum: mode -+ - -+ name: mode-supported -+ type: u32 -+ enum: mode -+ multi-attr: true -+ - -+ name: lock-status -+ type: u32 -+ enum: lock-status -+ - -+ name: temp -+ type: s32 -+ - -+ name: type -+ type: u32 -+ enum: type -+ - -+ name: pin -+ enum-name: dpll_a_pin -+ attributes: -+ - -+ name: id -+ type: u32 -+ - -+ name: parent-id -+ type: u32 -+ - -+ name: module-name -+ type: string -+ - -+ name: pad -+ type: pad -+ - -+ name: clock-id -+ type: u64 -+ - -+ name: board-label -+ type: string -+ - -+ name: panel-label -+ type: string -+ - -+ name: package-label -+ type: string -+ - -+ name: type -+ type: u32 -+ enum: pin-type -+ - -+ name: direction -+ type: u32 -+ enum: pin-direction -+ - -+ name: frequency -+ type: u64 -+ - -+ name: frequency-supported -+ type: nest -+ multi-attr: true -+ nested-attributes: frequency-range -+ - -+ name: frequency-min -+ type: u64 -+ - -+ name: frequency-max -+ type: u64 -+ - -+ name: prio -+ type: u32 -+ - -+ name: state -+ type: u32 -+ enum: pin-state -+ - -+ name: capabilities -+ type: u32 -+ - -+ name: parent-device -+ type: nest -+ multi-attr: true -+ nested-attributes: pin-parent-device -+ - -+ name: parent-pin -+ type: nest -+ multi-attr: true -+ nested-attributes: pin-parent-pin -+ - -+ name: pin-parent-device -+ subset-of: pin -+ attributes: -+ - -+ name: parent-id -+ type: u32 -+ - -+ name: direction -+ type: u32 -+ - -+ name: prio -+ type: u32 -+ - -+ name: state -+ type: u32 -+ - -+ name: pin-parent-pin -+ subset-of: pin -+ attributes: -+ - -+ name: parent-id -+ type: u32 -+ - -+ name: state -+ type: u32 -+ - -+ name: frequency-range -+ subset-of: pin -+ attributes: -+ - -+ name: frequency-min -+ type: u64 -+ - -+ name: frequency-max -+ type: u64 -+ -+operations: -+ enum-name: dpll_cmd -+ list: -+ - -+ name: device-id-get -+ doc: | -+ Get id of dpll device that matches given attributes -+ attribute-set: dpll -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-lock-doit -+ post: dpll-unlock-doit -+ request: -+ attributes: -+ - module-name -+ - clock-id -+ - type -+ reply: -+ attributes: -+ - id -+ -+ - -+ name: device-get -+ doc: | -+ Get list of DPLL devices (dump) or attributes of a single dpll device -+ attribute-set: dpll -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pre-doit -+ post: dpll-post-doit -+ request: -+ attributes: -+ - id -+ reply: &dev-attrs -+ attributes: -+ - id -+ - module-name -+ - mode -+ - mode-supported -+ - lock-status -+ - temp -+ - clock-id -+ - type -+ -+ dump: -+ pre: dpll-lock-dumpit -+ post: dpll-unlock-dumpit -+ reply: *dev-attrs -+ -+ - -+ name: device-set -+ doc: Set attributes for a DPLL device -+ attribute-set: dpll -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pre-doit -+ post: dpll-post-doit -+ request: -+ attributes: -+ - id -+ - -+ name: device-create-ntf -+ doc: Notification about device appearing -+ notify: device-get -+ mcgrp: monitor -+ - -+ name: device-delete-ntf -+ doc: Notification about device disappearing -+ notify: device-get -+ mcgrp: monitor -+ - -+ name: device-change-ntf -+ doc: Notification about device configuration being changed -+ notify: device-get -+ mcgrp: monitor -+ - -+ name: pin-id-get -+ doc: | -+ Get id of a pin that matches given attributes -+ attribute-set: pin -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-lock-doit -+ post: dpll-unlock-doit -+ request: -+ attributes: -+ - module-name -+ - clock-id -+ - board-label -+ - panel-label -+ - package-label -+ - type -+ reply: -+ attributes: -+ - id -+ -+ - -+ name: pin-get -+ doc: | -+ Get list of pins and its attributes. -+ - dump request without any attributes given - list all the pins in the -+ system -+ - dump request with target dpll - list all the pins registered with -+ a given dpll device -+ - do request with target dpll and target pin - single pin attributes -+ attribute-set: pin -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pin-pre-doit -+ post: dpll-pin-post-doit -+ request: -+ attributes: -+ - id -+ reply: &pin-attrs -+ attributes: -+ - id -+ - board-label -+ - panel-label -+ - package-label -+ - type -+ - frequency -+ - frequency-supported -+ - capabilities -+ - parent-device -+ - parent-pin -+ -+ dump: -+ pre: dpll-lock-dumpit -+ post: dpll-unlock-dumpit -+ request: -+ attributes: -+ - id -+ reply: *pin-attrs -+ -+ - -+ name: pin-set -+ doc: Set attributes of a target pin -+ attribute-set: pin -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pin-pre-doit -+ post: dpll-pin-post-doit -+ request: -+ attributes: -+ - id -+ - frequency -+ - direction -+ - prio -+ - state -+ - parent-device -+ - parent-pin -+ - -+ name: pin-create-ntf -+ doc: Notification about pin appearing -+ notify: pin-get -+ mcgrp: monitor -+ - -+ name: pin-delete-ntf -+ doc: Notification about pin disappearing -+ notify: pin-get -+ mcgrp: monitor -+ - -+ name: pin-change-ntf -+ doc: Notification about pin configuration being changed -+ notify: pin-get -+ mcgrp: monitor -+ -+mcast-groups: -+ list: -+ - -+ name: monitor -diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c -new file mode 100644 -index 000000000000..14064c8c783b ---- /dev/null -+++ b/drivers/dpll/dpll_nl.c -@@ -0,0 +1,162 @@ -+// SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) -+/* Do not edit directly, auto-generated from: */ -+/* Documentation/netlink/specs/dpll.yaml */ -+/* YNL-GEN kernel source */ -+ -+#include -+#include -+ -+#include "dpll_nl.h" -+ -+#include -+ -+/* Common nested types */ -+const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1] = { -+ [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -+ [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+}; -+ -+const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = { -+ [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+}; -+ -+/* DPLL_CMD_DEVICE_ID_GET - do */ -+static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = { -+ [DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_CLOCK_ID] = { .type = NLA_U64, }, -+ [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -+}; -+ -+/* DPLL_CMD_DEVICE_GET - do */ -+static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = { -+ [DPLL_A_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_DEVICE_SET - do */ -+static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_ID + 1] = { -+ [DPLL_A_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_PIN_ID_GET - do */ -+static const struct nla_policy dpll_pin_id_get_nl_policy[DPLL_A_PIN_TYPE + 1] = { -+ [DPLL_A_PIN_MODULE_NAME] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_CLOCK_ID] = { .type = NLA_U64, }, -+ [DPLL_A_PIN_BOARD_LABEL] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_PANEL_LABEL] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_PACKAGE_LABEL] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 5), -+}; -+ -+/* DPLL_CMD_PIN_GET - do */ -+static const struct nla_policy dpll_pin_get_do_nl_policy[DPLL_A_PIN_ID + 1] = { -+ [DPLL_A_PIN_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_PIN_GET - dump */ -+static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = { -+ [DPLL_A_PIN_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_PIN_SET - do */ -+static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] = { -+ [DPLL_A_PIN_ID] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, }, -+ [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -+ [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+ [DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy), -+ [DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy), -+}; -+ -+/* Ops table for dpll */ -+static const struct genl_split_ops dpll_nl_ops[] = { -+ { -+ .cmd = DPLL_CMD_DEVICE_ID_GET, -+ .pre_doit = dpll_lock_doit, -+ .doit = dpll_nl_device_id_get_doit, -+ .post_doit = dpll_unlock_doit, -+ .policy = dpll_device_id_get_nl_policy, -+ .maxattr = DPLL_A_TYPE, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_DEVICE_GET, -+ .pre_doit = dpll_pre_doit, -+ .doit = dpll_nl_device_get_doit, -+ .post_doit = dpll_post_doit, -+ .policy = dpll_device_get_nl_policy, -+ .maxattr = DPLL_A_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_DEVICE_GET, -+ .start = dpll_lock_dumpit, -+ .dumpit = dpll_nl_device_get_dumpit, -+ .done = dpll_unlock_dumpit, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, -+ }, -+ { -+ .cmd = DPLL_CMD_DEVICE_SET, -+ .pre_doit = dpll_pre_doit, -+ .doit = dpll_nl_device_set_doit, -+ .post_doit = dpll_post_doit, -+ .policy = dpll_device_set_nl_policy, -+ .maxattr = DPLL_A_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_ID_GET, -+ .pre_doit = dpll_lock_doit, -+ .doit = dpll_nl_pin_id_get_doit, -+ .post_doit = dpll_unlock_doit, -+ .policy = dpll_pin_id_get_nl_policy, -+ .maxattr = DPLL_A_PIN_TYPE, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_GET, -+ .pre_doit = dpll_pin_pre_doit, -+ .doit = dpll_nl_pin_get_doit, -+ .post_doit = dpll_pin_post_doit, -+ .policy = dpll_pin_get_do_nl_policy, -+ .maxattr = DPLL_A_PIN_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_GET, -+ .start = dpll_lock_dumpit, -+ .dumpit = dpll_nl_pin_get_dumpit, -+ .done = dpll_unlock_dumpit, -+ .policy = dpll_pin_get_dump_nl_policy, -+ .maxattr = DPLL_A_PIN_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_SET, -+ .pre_doit = dpll_pin_pre_doit, -+ .doit = dpll_nl_pin_set_doit, -+ .post_doit = dpll_pin_post_doit, -+ .policy = dpll_pin_set_nl_policy, -+ .maxattr = DPLL_A_PIN_PARENT_PIN, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+}; -+ -+static const struct genl_multicast_group dpll_nl_mcgrps[] = { -+ [DPLL_NLGRP_MONITOR] = { "monitor", }, -+}; -+ -+struct genl_family dpll_nl_family __ro_after_init = { -+ .name = DPLL_FAMILY_NAME, -+ .version = DPLL_FAMILY_VERSION, -+ .netnsok = true, -+ .parallel_ops = true, -+ .module = THIS_MODULE, -+ .split_ops = dpll_nl_ops, -+ .n_split_ops = ARRAY_SIZE(dpll_nl_ops), -+ .mcgrps = dpll_nl_mcgrps, -+ .n_mcgrps = ARRAY_SIZE(dpll_nl_mcgrps), -+}; -diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h -new file mode 100644 -index 000000000000..1f67aaed4742 ---- /dev/null -+++ b/drivers/dpll/dpll_nl.h -@@ -0,0 +1,51 @@ -+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ -+/* Do not edit directly, auto-generated from: */ -+/* Documentation/netlink/specs/dpll.yaml */ -+/* YNL-GEN kernel header */ -+ -+#ifndef _LINUX_DPLL_GEN_H -+#define _LINUX_DPLL_GEN_H -+ -+#include -+#include -+ -+#include -+ -+/* Common nested types */ -+extern const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1]; -+extern const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1]; -+ -+int dpll_lock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+int dpll_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+void -+dpll_unlock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+void -+dpll_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+void -+dpll_pin_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+int dpll_lock_dumpit(struct netlink_callback *cb); -+int dpll_unlock_dumpit(struct netlink_callback *cb); -+ -+int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb); -+int dpll_nl_device_set_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb); -+int dpll_nl_pin_set_doit(struct sk_buff *skb, struct genl_info *info); -+ -+enum { -+ DPLL_NLGRP_MONITOR, -+}; -+ -+extern struct genl_family dpll_nl_family; -+ -+#endif /* _LINUX_DPLL_GEN_H */ -diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h -new file mode 100644 -index 000000000000..20ef0718f8dc ---- /dev/null -+++ b/include/uapi/linux/dpll.h -@@ -0,0 +1,201 @@ -+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ -+/* Do not edit directly, auto-generated from: */ -+/* Documentation/netlink/specs/dpll.yaml */ -+/* YNL-GEN uapi header */ -+ -+#ifndef _UAPI_LINUX_DPLL_H -+#define _UAPI_LINUX_DPLL_H -+ -+#define DPLL_FAMILY_NAME "dpll" -+#define DPLL_FAMILY_VERSION 1 -+ -+/** -+ * enum dpll_mode - working modes a dpll can support, differentiates if and how -+ * dpll selects one of its inputs to syntonize with it, valid values for -+ * DPLL_A_MODE attribute -+ * @DPLL_MODE_MANUAL: input can be only selected by sending a request to dpll -+ * @DPLL_MODE_AUTOMATIC: highest prio input pin auto selected by dpll -+ */ -+enum dpll_mode { -+ DPLL_MODE_MANUAL = 1, -+ DPLL_MODE_AUTOMATIC, -+ -+ /* private: */ -+ __DPLL_MODE_MAX, -+ DPLL_MODE_MAX = (__DPLL_MODE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_lock_status - provides information of dpll device lock status, -+ * valid values for DPLL_A_LOCK_STATUS attribute -+ * @DPLL_LOCK_STATUS_UNLOCKED: dpll was not yet locked to any valid input (or -+ * forced by setting DPLL_A_MODE to DPLL_MODE_DETACHED) -+ * @DPLL_LOCK_STATUS_LOCKED: dpll is locked to a valid signal, but no holdover -+ * available -+ * @DPLL_LOCK_STATUS_LOCKED_HO_ACQ: dpll is locked and holdover acquired -+ * @DPLL_LOCK_STATUS_HOLDOVER: dpll is in holdover state - lost a valid lock or -+ * was forced by disconnecting all the pins (latter possible only when dpll -+ * lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ, if dpll lock-state -+ * was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the dpll's lock-state shall remain -+ * DPLL_LOCK_STATUS_UNLOCKED) -+ */ -+enum dpll_lock_status { -+ DPLL_LOCK_STATUS_UNLOCKED = 1, -+ DPLL_LOCK_STATUS_LOCKED, -+ DPLL_LOCK_STATUS_LOCKED_HO_ACQ, -+ DPLL_LOCK_STATUS_HOLDOVER, -+ -+ /* private: */ -+ __DPLL_LOCK_STATUS_MAX, -+ DPLL_LOCK_STATUS_MAX = (__DPLL_LOCK_STATUS_MAX - 1) -+}; -+ -+#define DPLL_TEMP_DIVIDER 1000 -+ -+/** -+ * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute -+ * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal -+ * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock -+ */ -+enum dpll_type { -+ DPLL_TYPE_PPS = 1, -+ DPLL_TYPE_EEC, -+ -+ /* private: */ -+ __DPLL_TYPE_MAX, -+ DPLL_TYPE_MAX = (__DPLL_TYPE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_pin_type - defines possible types of a pin, valid values for -+ * DPLL_A_PIN_TYPE attribute -+ * @DPLL_PIN_TYPE_MUX: aggregates another layer of selectable pins -+ * @DPLL_PIN_TYPE_EXT: external input -+ * @DPLL_PIN_TYPE_SYNCE_ETH_PORT: ethernet port PHY's recovered clock -+ * @DPLL_PIN_TYPE_INT_OSCILLATOR: device internal oscillator -+ * @DPLL_PIN_TYPE_GNSS: GNSS recovered clock -+ */ -+enum dpll_pin_type { -+ DPLL_PIN_TYPE_MUX = 1, -+ DPLL_PIN_TYPE_EXT, -+ DPLL_PIN_TYPE_SYNCE_ETH_PORT, -+ DPLL_PIN_TYPE_INT_OSCILLATOR, -+ DPLL_PIN_TYPE_GNSS, -+ -+ /* private: */ -+ __DPLL_PIN_TYPE_MAX, -+ DPLL_PIN_TYPE_MAX = (__DPLL_PIN_TYPE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_pin_direction - defines possible direction of a pin, valid values -+ * for DPLL_A_PIN_DIRECTION attribute -+ * @DPLL_PIN_DIRECTION_INPUT: pin used as a input of a signal -+ * @DPLL_PIN_DIRECTION_OUTPUT: pin used to output the signal -+ */ -+enum dpll_pin_direction { -+ DPLL_PIN_DIRECTION_INPUT = 1, -+ DPLL_PIN_DIRECTION_OUTPUT, -+ -+ /* private: */ -+ __DPLL_PIN_DIRECTION_MAX, -+ DPLL_PIN_DIRECTION_MAX = (__DPLL_PIN_DIRECTION_MAX - 1) -+}; -+ -+#define DPLL_PIN_FREQUENCY_1_HZ 1 -+#define DPLL_PIN_FREQUENCY_10_KHZ 10000 -+#define DPLL_PIN_FREQUENCY_77_5_KHZ 77500 -+#define DPLL_PIN_FREQUENCY_10_MHZ 10000000 -+ -+/** -+ * enum dpll_pin_state - defines possible states of a pin, valid values for -+ * DPLL_A_PIN_STATE attribute -+ * @DPLL_PIN_STATE_CONNECTED: pin connected, active input of phase locked loop -+ * @DPLL_PIN_STATE_DISCONNECTED: pin disconnected, not considered as a valid -+ * input -+ * @DPLL_PIN_STATE_SELECTABLE: pin enabled for automatic input selection -+ */ -+enum dpll_pin_state { -+ DPLL_PIN_STATE_CONNECTED = 1, -+ DPLL_PIN_STATE_DISCONNECTED, -+ DPLL_PIN_STATE_SELECTABLE, -+ -+ /* private: */ -+ __DPLL_PIN_STATE_MAX, -+ DPLL_PIN_STATE_MAX = (__DPLL_PIN_STATE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_pin_capabilities - defines possible capabilities of a pin, valid -+ * flags on DPLL_A_PIN_CAPABILITIES attribute -+ * @DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE: pin direction can be changed -+ * @DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE: pin priority can be changed -+ * @DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE: pin state can be changed -+ */ -+enum dpll_pin_capabilities { -+ DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE = 1, -+ DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE = 2, -+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE = 4, -+}; -+ -+enum dpll_a { -+ DPLL_A_ID = 1, -+ DPLL_A_MODULE_NAME, -+ DPLL_A_PAD, -+ DPLL_A_CLOCK_ID, -+ DPLL_A_MODE, -+ DPLL_A_MODE_SUPPORTED, -+ DPLL_A_LOCK_STATUS, -+ DPLL_A_TEMP, -+ DPLL_A_TYPE, -+ -+ __DPLL_A_MAX, -+ DPLL_A_MAX = (__DPLL_A_MAX - 1) -+}; -+ -+enum dpll_a_pin { -+ DPLL_A_PIN_ID = 1, -+ DPLL_A_PIN_PARENT_ID, -+ DPLL_A_PIN_MODULE_NAME, -+ DPLL_A_PIN_PAD, -+ DPLL_A_PIN_CLOCK_ID, -+ DPLL_A_PIN_BOARD_LABEL, -+ DPLL_A_PIN_PANEL_LABEL, -+ DPLL_A_PIN_PACKAGE_LABEL, -+ DPLL_A_PIN_TYPE, -+ DPLL_A_PIN_DIRECTION, -+ DPLL_A_PIN_FREQUENCY, -+ DPLL_A_PIN_FREQUENCY_SUPPORTED, -+ DPLL_A_PIN_FREQUENCY_MIN, -+ DPLL_A_PIN_FREQUENCY_MAX, -+ DPLL_A_PIN_PRIO, -+ DPLL_A_PIN_STATE, -+ DPLL_A_PIN_CAPABILITIES, -+ DPLL_A_PIN_PARENT_DEVICE, -+ DPLL_A_PIN_PARENT_PIN, -+ -+ __DPLL_A_PIN_MAX, -+ DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1) -+}; -+ -+enum dpll_cmd { -+ DPLL_CMD_DEVICE_ID_GET = 1, -+ DPLL_CMD_DEVICE_GET, -+ DPLL_CMD_DEVICE_SET, -+ DPLL_CMD_DEVICE_CREATE_NTF, -+ DPLL_CMD_DEVICE_DELETE_NTF, -+ DPLL_CMD_DEVICE_CHANGE_NTF, -+ DPLL_CMD_PIN_ID_GET, -+ DPLL_CMD_PIN_GET, -+ DPLL_CMD_PIN_SET, -+ DPLL_CMD_PIN_CREATE_NTF, -+ DPLL_CMD_PIN_DELETE_NTF, -+ DPLL_CMD_PIN_CHANGE_NTF, -+ -+ __DPLL_CMD_MAX, -+ DPLL_CMD_MAX = (__DPLL_CMD_MAX - 1) -+}; -+ -+#define DPLL_MCGRP_MONITOR "monitor" -+ -+#endif /* _UAPI_LINUX_DPLL_H */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch b/kernel-rt/debian/patches/ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch deleted file mode 100644 index 925079da..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch +++ /dev/null @@ -1,1145 +0,0 @@ -From 42459316b61c38862e2046d4bd3071e559c668eb Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:37 +0100 -Subject: [PATCH 03/46] dpll: core: Add DPLL framework base functions - -DPLL framework is used to represent and configure DPLL devices -in systems. Each device that has DPLL and can configure inputs -and outputs can use this framework. - -Implement core framework functions for further interactions -with device drivers implementing dpll subsystem, as well as for -interactions of DPLL netlink framework part with the subsystem -itself. - -Co-developed-by: Milena Olech -Signed-off-by: Milena Olech -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Signed-off-by: Vadim Fedorenko -Co-developed-by: Arkadiusz Kubalewski -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 9431063ad323ac864750aeba4d304389bc42ca4e) -Signed-off-by: Jiping Ma ---- - MAINTAINERS | 11 + - drivers/Kconfig | 2 + - drivers/Makefile | 1 + - drivers/dpll/Kconfig | 7 + - drivers/dpll/Makefile | 9 + - drivers/dpll/dpll_core.c | 789 +++++++++++++++++++++++++++++++++++++++ - drivers/dpll/dpll_core.h | 89 +++++ - include/linux/dpll.h | 133 +++++++ - 8 files changed, 1041 insertions(+) - create mode 100644 drivers/dpll/Kconfig - create mode 100644 drivers/dpll/Makefile - create mode 100644 drivers/dpll/dpll_core.c - create mode 100644 drivers/dpll/dpll_core.h - create mode 100644 include/linux/dpll.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index c030e0ba1fc7..531d44ed1e7b 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -6365,6 +6365,17 @@ F: Documentation/networking/device_drivers/ethernet/freescale/dpaa2/switch-drive - F: drivers/net/ethernet/freescale/dpaa2/dpaa2-switch* - F: drivers/net/ethernet/freescale/dpaa2/dpsw* - -+DPLL SUBSYSTEM -+M: Vadim Fedorenko -+M: Arkadiusz Kubalewski -+M: Jiri Pirko -+L: netdev@vger.kernel.org -+S: Supported -+F: Documentation/driver-api/dpll.rst -+F: drivers/dpll/* -+F: include/net/dpll.h -+F: include/uapi/linux/dpll.h -+ - DRBD DRIVER - M: Philipp Reisner - M: Lars Ellenberg -diff --git a/drivers/Kconfig b/drivers/Kconfig -index efb66e25fa2d..8ba3e8b9ad72 100644 ---- a/drivers/Kconfig -+++ b/drivers/Kconfig -@@ -243,4 +243,6 @@ source "drivers/hte/Kconfig" - - source "drivers/cdx/Kconfig" - -+source "drivers/dpll/Kconfig" -+ - endmenu -diff --git a/drivers/Makefile b/drivers/Makefile -index 1bec7819a837..722d15be0eb7 100644 ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -197,5 +197,6 @@ obj-$(CONFIG_PECI) += peci/ - obj-$(CONFIG_HTE) += hte/ - obj-$(CONFIG_DRM_ACCEL) += accel/ - obj-$(CONFIG_CDX_BUS) += cdx/ -+obj-$(CONFIG_DPLL) += dpll/ - - obj-$(CONFIG_S390) += s390/ -diff --git a/drivers/dpll/Kconfig b/drivers/dpll/Kconfig -new file mode 100644 -index 000000000000..a4cae73f20d3 ---- /dev/null -+++ b/drivers/dpll/Kconfig -@@ -0,0 +1,7 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+# -+# Generic DPLL drivers configuration -+# -+ -+config DPLL -+ bool -diff --git a/drivers/dpll/Makefile b/drivers/dpll/Makefile -new file mode 100644 -index 000000000000..2e5b27850110 ---- /dev/null -+++ b/drivers/dpll/Makefile -@@ -0,0 +1,9 @@ -+# SPDX-License-Identifier: GPL-2.0 -+# -+# Makefile for DPLL drivers. -+# -+ -+obj-$(CONFIG_DPLL) += dpll.o -+dpll-y += dpll_core.o -+dpll-y += dpll_netlink.o -+dpll-y += dpll_nl.o -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -new file mode 100644 -index 000000000000..6449ba6a383b ---- /dev/null -+++ b/drivers/dpll/dpll_core.c -@@ -0,0 +1,789 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * dpll_core.c - DPLL subsystem kernel-space interface implementation. -+ * -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel Corporation. -+ */ -+ -+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -+ -+#include -+#include -+#include -+#include -+ -+#include "dpll_core.h" -+ -+/* Mutex lock to protect DPLL subsystem devices and pins */ -+DEFINE_MUTEX(dpll_lock); -+ -+DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC); -+DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC); -+ -+static u32 dpll_xa_id; -+ -+#define ASSERT_DPLL_REGISTERED(d) \ -+ WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -+#define ASSERT_DPLL_NOT_REGISTERED(d) \ -+ WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -+#define ASSERT_PIN_REGISTERED(p) \ -+ WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED)) -+ -+struct dpll_device_registration { -+ struct list_head list; -+ const struct dpll_device_ops *ops; -+ void *priv; -+}; -+ -+struct dpll_pin_registration { -+ struct list_head list; -+ const struct dpll_pin_ops *ops; -+ void *priv; -+}; -+ -+struct dpll_device *dpll_device_get_by_id(int id) -+{ -+ if (xa_get_mark(&dpll_device_xa, id, DPLL_REGISTERED)) -+ return xa_load(&dpll_device_xa, id); -+ -+ return NULL; -+} -+ -+static struct dpll_pin_registration * -+dpll_pin_registration_find(struct dpll_pin_ref *ref, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ -+ list_for_each_entry(reg, &ref->registration_list, list) { -+ if (reg->ops == ops && reg->priv == priv) -+ return reg; -+ } -+ return NULL; -+} -+ -+static int -+dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ bool ref_exists = false; -+ unsigned long i; -+ int ret; -+ -+ xa_for_each(xa_pins, i, ref) { -+ if (ref->pin != pin) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (reg) { -+ refcount_inc(&ref->refcount); -+ return 0; -+ } -+ ref_exists = true; -+ break; -+ } -+ -+ if (!ref_exists) { -+ ref = kzalloc(sizeof(*ref), GFP_KERNEL); -+ if (!ref) -+ return -ENOMEM; -+ ref->pin = pin; -+ INIT_LIST_HEAD(&ref->registration_list); -+ ret = xa_insert(xa_pins, pin->pin_idx, ref, GFP_KERNEL); -+ if (ret) { -+ kfree(ref); -+ return ret; -+ } -+ refcount_set(&ref->refcount, 1); -+ } -+ -+ reg = kzalloc(sizeof(*reg), GFP_KERNEL); -+ if (!reg) { -+ if (!ref_exists) { -+ xa_erase(xa_pins, pin->pin_idx); -+ kfree(ref); -+ } -+ return -ENOMEM; -+ } -+ reg->ops = ops; -+ reg->priv = priv; -+ if (ref_exists) -+ refcount_inc(&ref->refcount); -+ list_add_tail(®->list, &ref->registration_list); -+ -+ return 0; -+} -+ -+static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ -+ xa_for_each(xa_pins, i, ref) { -+ if (ref->pin != pin) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (WARN_ON(!reg)) -+ return -EINVAL; -+ if (refcount_dec_and_test(&ref->refcount)) { -+ list_del(®->list); -+ kfree(reg); -+ xa_erase(xa_pins, i); -+ WARN_ON(!list_empty(&ref->registration_list)); -+ kfree(ref); -+ } -+ return 0; -+ } -+ -+ return -EINVAL; -+} -+ -+static int -+dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ bool ref_exists = false; -+ unsigned long i; -+ int ret; -+ -+ xa_for_each(xa_dplls, i, ref) { -+ if (ref->dpll != dpll) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (reg) { -+ refcount_inc(&ref->refcount); -+ return 0; -+ } -+ ref_exists = true; -+ break; -+ } -+ -+ if (!ref_exists) { -+ ref = kzalloc(sizeof(*ref), GFP_KERNEL); -+ if (!ref) -+ return -ENOMEM; -+ ref->dpll = dpll; -+ INIT_LIST_HEAD(&ref->registration_list); -+ ret = xa_insert(xa_dplls, dpll->id, ref, GFP_KERNEL); -+ if (ret) { -+ kfree(ref); -+ return ret; -+ } -+ refcount_set(&ref->refcount, 1); -+ } -+ -+ reg = kzalloc(sizeof(*reg), GFP_KERNEL); -+ if (!reg) { -+ if (!ref_exists) { -+ xa_erase(xa_dplls, dpll->id); -+ kfree(ref); -+ } -+ return -ENOMEM; -+ } -+ reg->ops = ops; -+ reg->priv = priv; -+ if (ref_exists) -+ refcount_inc(&ref->refcount); -+ list_add_tail(®->list, &ref->registration_list); -+ -+ return 0; -+} -+ -+static void -+dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ -+ xa_for_each(xa_dplls, i, ref) { -+ if (ref->dpll != dpll) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (WARN_ON(!reg)) -+ return; -+ if (refcount_dec_and_test(&ref->refcount)) { -+ list_del(®->list); -+ kfree(reg); -+ xa_erase(xa_dplls, i); -+ WARN_ON(!list_empty(&ref->registration_list)); -+ kfree(ref); -+ } -+ return; -+ } -+} -+ -+struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs) -+{ -+ struct dpll_pin_ref *ref; -+ unsigned long i = 0; -+ -+ ref = xa_find(xa_refs, &i, ULONG_MAX, XA_PRESENT); -+ WARN_ON(!ref); -+ return ref; -+} -+ -+static struct dpll_device * -+dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module) -+{ -+ struct dpll_device *dpll; -+ int ret; -+ -+ dpll = kzalloc(sizeof(*dpll), GFP_KERNEL); -+ if (!dpll) -+ return ERR_PTR(-ENOMEM); -+ refcount_set(&dpll->refcount, 1); -+ INIT_LIST_HEAD(&dpll->registration_list); -+ dpll->device_idx = device_idx; -+ dpll->clock_id = clock_id; -+ dpll->module = module; -+ ret = xa_alloc_cyclic(&dpll_device_xa, &dpll->id, dpll, xa_limit_32b, -+ &dpll_xa_id, GFP_KERNEL); -+ if (ret < 0) { -+ kfree(dpll); -+ return ERR_PTR(ret); -+ } -+ xa_init_flags(&dpll->pin_refs, XA_FLAGS_ALLOC); -+ -+ return dpll; -+} -+ -+/** -+ * dpll_device_get - find existing or create new dpll device -+ * @clock_id: clock_id of creator -+ * @device_idx: idx given by device driver -+ * @module: reference to registering module -+ * -+ * Get existing object of a dpll device, unique for given arguments. -+ * Create new if doesn't exist yet. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * valid dpll_device struct pointer if succeeded -+ * * ERR_PTR(X) - error -+ */ -+struct dpll_device * -+dpll_device_get(u64 clock_id, u32 device_idx, struct module *module) -+{ -+ struct dpll_device *dpll, *ret = NULL; -+ unsigned long index; -+ -+ mutex_lock(&dpll_lock); -+ xa_for_each(&dpll_device_xa, index, dpll) { -+ if (dpll->clock_id == clock_id && -+ dpll->device_idx == device_idx && -+ dpll->module == module) { -+ ret = dpll; -+ refcount_inc(&ret->refcount); -+ break; -+ } -+ } -+ if (!ret) -+ ret = dpll_device_alloc(clock_id, device_idx, module); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_device_get); -+ -+/** -+ * dpll_device_put - decrease the refcount and free memory if possible -+ * @dpll: dpll_device struct pointer -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Drop reference for a dpll device, if all references are gone, delete -+ * dpll device object. -+ */ -+void dpll_device_put(struct dpll_device *dpll) -+{ -+ mutex_lock(&dpll_lock); -+ if (refcount_dec_and_test(&dpll->refcount)) { -+ ASSERT_DPLL_NOT_REGISTERED(dpll); -+ WARN_ON_ONCE(!xa_empty(&dpll->pin_refs)); -+ xa_destroy(&dpll->pin_refs); -+ xa_erase(&dpll_device_xa, dpll->id); -+ WARN_ON(!list_empty(&dpll->registration_list)); -+ kfree(dpll); -+ } -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_device_put); -+ -+static struct dpll_device_registration * -+dpll_device_registration_find(struct dpll_device *dpll, -+ const struct dpll_device_ops *ops, void *priv) -+{ -+ struct dpll_device_registration *reg; -+ -+ list_for_each_entry(reg, &dpll->registration_list, list) { -+ if (reg->ops == ops && reg->priv == priv) -+ return reg; -+ } -+ return NULL; -+} -+ -+/** -+ * dpll_device_register - register the dpll device in the subsystem -+ * @dpll: pointer to a dpll -+ * @type: type of a dpll -+ * @ops: ops for a dpll device -+ * @priv: pointer to private information of owner -+ * -+ * Make dpll device available for user space. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * 0 on success -+ * * negative - error value -+ */ -+int dpll_device_register(struct dpll_device *dpll, enum dpll_type type, -+ const struct dpll_device_ops *ops, void *priv) -+{ -+ struct dpll_device_registration *reg; -+ bool first_registration = false; -+ -+ if (WARN_ON(!ops)) -+ return -EINVAL; -+ if (WARN_ON(!ops->mode_get)) -+ return -EINVAL; -+ if (WARN_ON(!ops->lock_status_get)) -+ return -EINVAL; -+ if (WARN_ON(type < DPLL_TYPE_PPS || type > DPLL_TYPE_MAX)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ reg = dpll_device_registration_find(dpll, ops, priv); -+ if (reg) { -+ mutex_unlock(&dpll_lock); -+ return -EEXIST; -+ } -+ -+ reg = kzalloc(sizeof(*reg), GFP_KERNEL); -+ if (!reg) { -+ mutex_unlock(&dpll_lock); -+ return -ENOMEM; -+ } -+ reg->ops = ops; -+ reg->priv = priv; -+ dpll->type = type; -+ first_registration = list_empty(&dpll->registration_list); -+ list_add_tail(®->list, &dpll->registration_list); -+ if (!first_registration) { -+ mutex_unlock(&dpll_lock); -+ return 0; -+ } -+ -+ xa_set_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED); -+ mutex_unlock(&dpll_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(dpll_device_register); -+ -+/** -+ * dpll_device_unregister - unregister dpll device -+ * @dpll: registered dpll pointer -+ * @ops: ops for a dpll device -+ * @priv: pointer to private information of owner -+ * -+ * Unregister device, make it unavailable for userspace. -+ * Note: It does not free the memory -+ * Context: Acquires a lock (dpll_lock) -+ */ -+void dpll_device_unregister(struct dpll_device *dpll, -+ const struct dpll_device_ops *ops, void *priv) -+{ -+ struct dpll_device_registration *reg; -+ -+ mutex_lock(&dpll_lock); -+ ASSERT_DPLL_REGISTERED(dpll); -+ reg = dpll_device_registration_find(dpll, ops, priv); -+ if (WARN_ON(!reg)) { -+ mutex_unlock(&dpll_lock); -+ return; -+ } -+ list_del(®->list); -+ kfree(reg); -+ -+ if (!list_empty(&dpll->registration_list)) { -+ mutex_unlock(&dpll_lock); -+ return; -+ } -+ xa_clear_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED); -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_device_unregister); -+ -+static struct dpll_pin * -+dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, -+ const struct dpll_pin_properties *prop) -+{ -+ struct dpll_pin *pin; -+ int ret; -+ -+ pin = kzalloc(sizeof(*pin), GFP_KERNEL); -+ if (!pin) -+ return ERR_PTR(-ENOMEM); -+ pin->pin_idx = pin_idx; -+ pin->clock_id = clock_id; -+ pin->module = module; -+ if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX || -+ prop->type > DPLL_PIN_TYPE_MAX)) { -+ ret = -EINVAL; -+ goto err; -+ } -+ pin->prop = prop; -+ refcount_set(&pin->refcount, 1); -+ xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); -+ xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); -+ ret = xa_alloc(&dpll_pin_xa, &pin->id, pin, xa_limit_16b, GFP_KERNEL); -+ if (ret) -+ goto err; -+ return pin; -+err: -+ xa_destroy(&pin->dpll_refs); -+ xa_destroy(&pin->parent_refs); -+ kfree(pin); -+ return ERR_PTR(ret); -+} -+ -+/** -+ * dpll_pin_get - find existing or create new dpll pin -+ * @clock_id: clock_id of creator -+ * @pin_idx: idx given by dev driver -+ * @module: reference to registering module -+ * @prop: dpll pin properties -+ * -+ * Get existing object of a pin (unique for given arguments) or create new -+ * if doesn't exist yet. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * valid allocated dpll_pin struct pointer if succeeded -+ * * ERR_PTR(X) - error -+ */ -+struct dpll_pin * -+dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module, -+ const struct dpll_pin_properties *prop) -+{ -+ struct dpll_pin *pos, *ret = NULL; -+ unsigned long i; -+ -+ mutex_lock(&dpll_lock); -+ xa_for_each(&dpll_pin_xa, i, pos) { -+ if (pos->clock_id == clock_id && -+ pos->pin_idx == pin_idx && -+ pos->module == module) { -+ ret = pos; -+ refcount_inc(&ret->refcount); -+ break; -+ } -+ } -+ if (!ret) -+ ret = dpll_pin_alloc(clock_id, pin_idx, module, prop); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_get); -+ -+/** -+ * dpll_pin_put - decrease the refcount and free memory if possible -+ * @pin: pointer to a pin to be put -+ * -+ * Drop reference for a pin, if all references are gone, delete pin object. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ */ -+void dpll_pin_put(struct dpll_pin *pin) -+{ -+ mutex_lock(&dpll_lock); -+ if (refcount_dec_and_test(&pin->refcount)) { -+ xa_destroy(&pin->dpll_refs); -+ xa_destroy(&pin->parent_refs); -+ xa_erase(&dpll_pin_xa, pin->id); -+ kfree(pin); -+ } -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_pin_put); -+ -+static int -+__dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ int ret; -+ -+ ret = dpll_xa_ref_pin_add(&dpll->pin_refs, pin, ops, priv); -+ if (ret) -+ return ret; -+ ret = dpll_xa_ref_dpll_add(&pin->dpll_refs, dpll, ops, priv); -+ if (ret) -+ goto ref_pin_del; -+ xa_set_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); -+ -+ return ret; -+ -+ref_pin_del: -+ dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv); -+ return ret; -+} -+ -+/** -+ * dpll_pin_register - register the dpll pin in the subsystem -+ * @dpll: pointer to a dpll -+ * @pin: pointer to a dpll pin -+ * @ops: ops for a dpll pin ops -+ * @priv: pointer to private information of owner -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * 0 on success -+ * * negative - error value -+ */ -+int -+dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ int ret; -+ -+ if (WARN_ON(!ops) || -+ WARN_ON(!ops->state_on_dpll_get) || -+ WARN_ON(!ops->direction_get)) -+ return -EINVAL; -+ if (ASSERT_DPLL_REGISTERED(dpll)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ if (WARN_ON(!(dpll->module == pin->module && -+ dpll->clock_id == pin->clock_id))) -+ ret = -EINVAL; -+ else -+ ret = __dpll_pin_register(dpll, pin, ops, priv); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_register); -+ -+static void -+__dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv); -+ dpll_xa_ref_dpll_del(&pin->dpll_refs, dpll, ops, priv); -+ if (xa_empty(&pin->dpll_refs)) -+ xa_clear_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); -+} -+ -+/** -+ * dpll_pin_unregister - unregister dpll pin from dpll device -+ * @dpll: registered dpll pointer -+ * @pin: pointer to a pin -+ * @ops: ops for a dpll pin -+ * @priv: pointer to private information of owner -+ * -+ * Note: It does not free the memory -+ * Context: Acquires a lock (dpll_lock) -+ */ -+void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ if (WARN_ON(xa_empty(&dpll->pin_refs))) -+ return; -+ if (WARN_ON(!xa_empty(&pin->parent_refs))) -+ return; -+ -+ mutex_lock(&dpll_lock); -+ __dpll_pin_unregister(dpll, pin, ops, priv); -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_pin_unregister); -+ -+/** -+ * dpll_pin_on_pin_register - register a pin with a parent pin -+ * @parent: pointer to a parent pin -+ * @pin: pointer to a pin -+ * @ops: ops for a dpll pin -+ * @priv: pointer to private information of owner -+ * -+ * Register a pin with a parent pin, create references between them and -+ * between newly registered pin and dplls connected with a parent pin. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * 0 on success -+ * * negative - error value -+ */ -+int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_ref *ref; -+ unsigned long i, stop; -+ int ret; -+ -+ if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX)) -+ return -EINVAL; -+ -+ if (WARN_ON(!ops) || -+ WARN_ON(!ops->state_on_pin_get) || -+ WARN_ON(!ops->direction_get)) -+ return -EINVAL; -+ if (ASSERT_PIN_REGISTERED(parent)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv); -+ if (ret) -+ goto unlock; -+ refcount_inc(&pin->refcount); -+ xa_for_each(&parent->dpll_refs, i, ref) { -+ ret = __dpll_pin_register(ref->dpll, pin, ops, priv); -+ if (ret) { -+ stop = i; -+ goto dpll_unregister; -+ } -+ } -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+ -+dpll_unregister: -+ xa_for_each(&parent->dpll_refs, i, ref) -+ if (i < stop) -+ __dpll_pin_unregister(ref->dpll, pin, ops, priv); -+ refcount_dec(&pin->refcount); -+ dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); -+unlock: -+ mutex_unlock(&dpll_lock); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_on_pin_register); -+ -+/** -+ * dpll_pin_on_pin_unregister - unregister dpll pin from a parent pin -+ * @parent: pointer to a parent pin -+ * @pin: pointer to a pin -+ * @ops: ops for a dpll pin -+ * @priv: pointer to private information of owner -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Note: It does not free the memory -+ */ -+void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ -+ mutex_lock(&dpll_lock); -+ dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); -+ refcount_dec(&pin->refcount); -+ xa_for_each(&pin->dpll_refs, i, ref) -+ __dpll_pin_unregister(ref->dpll, pin, ops, priv); -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_pin_on_pin_unregister); -+ -+static struct dpll_device_registration * -+dpll_device_registration_first(struct dpll_device *dpll) -+{ -+ struct dpll_device_registration *reg; -+ -+ reg = list_first_entry_or_null((struct list_head *)&dpll->registration_list, -+ struct dpll_device_registration, list); -+ WARN_ON(!reg); -+ return reg; -+} -+ -+void *dpll_priv(struct dpll_device *dpll) -+{ -+ struct dpll_device_registration *reg; -+ -+ reg = dpll_device_registration_first(dpll); -+ return reg->priv; -+} -+ -+const struct dpll_device_ops *dpll_device_ops(struct dpll_device *dpll) -+{ -+ struct dpll_device_registration *reg; -+ -+ reg = dpll_device_registration_first(dpll); -+ return reg->ops; -+} -+ -+static struct dpll_pin_registration * -+dpll_pin_registration_first(struct dpll_pin_ref *ref) -+{ -+ struct dpll_pin_registration *reg; -+ -+ reg = list_first_entry_or_null(&ref->registration_list, -+ struct dpll_pin_registration, list); -+ WARN_ON(!reg); -+ return reg; -+} -+ -+void *dpll_pin_on_dpll_priv(struct dpll_device *dpll, -+ struct dpll_pin *pin) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ -+ ref = xa_load(&dpll->pin_refs, pin->pin_idx); -+ if (!ref) -+ return NULL; -+ reg = dpll_pin_registration_first(ref); -+ return reg->priv; -+} -+ -+void *dpll_pin_on_pin_priv(struct dpll_pin *parent, -+ struct dpll_pin *pin) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ -+ ref = xa_load(&pin->parent_refs, parent->pin_idx); -+ if (!ref) -+ return NULL; -+ reg = dpll_pin_registration_first(ref); -+ return reg->priv; -+} -+ -+const struct dpll_pin_ops *dpll_pin_ops(struct dpll_pin_ref *ref) -+{ -+ struct dpll_pin_registration *reg; -+ -+ reg = dpll_pin_registration_first(ref); -+ return reg->ops; -+} -+ -+static int __init dpll_init(void) -+{ -+ int ret; -+ -+ ret = genl_register_family(&dpll_nl_family); -+ if (ret) -+ goto error; -+ -+ return 0; -+ -+error: -+ mutex_destroy(&dpll_lock); -+ return ret; -+} -+ -+static void __exit dpll_exit(void) -+{ -+ genl_unregister_family(&dpll_nl_family); -+ mutex_destroy(&dpll_lock); -+} -+ -+subsys_initcall(dpll_init); -+module_exit(dpll_exit); -diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h -new file mode 100644 -index 000000000000..5585873c5c1b ---- /dev/null -+++ b/drivers/dpll/dpll_core.h -@@ -0,0 +1,89 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ */ -+ -+#ifndef __DPLL_CORE_H__ -+#define __DPLL_CORE_H__ -+ -+#include -+#include -+#include -+#include "dpll_nl.h" -+ -+#define DPLL_REGISTERED XA_MARK_1 -+ -+/** -+ * struct dpll_device - stores DPLL device internal data -+ * @id: unique id number for device given by dpll subsystem -+ * @device_idx: id given by dev driver -+ * @clock_id: unique identifier (clock_id) of a dpll -+ * @module: module of creator -+ * @type: type of a dpll -+ * @pin_refs: stores pins registered within a dpll -+ * @refcount: refcount -+ * @registration_list: list of registered ops and priv data of dpll owners -+ **/ -+struct dpll_device { -+ u32 id; -+ u32 device_idx; -+ u64 clock_id; -+ struct module *module; -+ enum dpll_type type; -+ struct xarray pin_refs; -+ refcount_t refcount; -+ struct list_head registration_list; -+}; -+ -+/** -+ * struct dpll_pin - structure for a dpll pin -+ * @id: unique id number for pin given by dpll subsystem -+ * @pin_idx: index of a pin given by dev driver -+ * @clock_id: clock_id of creator -+ * @module: module of creator -+ * @dpll_refs: hold referencees to dplls pin was registered with -+ * @parent_refs: hold references to parent pins pin was registered with -+ * @prop: pointer to pin properties given by registerer -+ * @rclk_dev_name: holds name of device when pin can recover clock from it -+ * @refcount: refcount -+ **/ -+struct dpll_pin { -+ u32 id; -+ u32 pin_idx; -+ u64 clock_id; -+ struct module *module; -+ struct xarray dpll_refs; -+ struct xarray parent_refs; -+ const struct dpll_pin_properties *prop; -+ refcount_t refcount; -+}; -+ -+/** -+ * struct dpll_pin_ref - structure for referencing either dpll or pins -+ * @dpll: pointer to a dpll -+ * @pin: pointer to a pin -+ * @registration_list: list of ops and priv data registered with the ref -+ * @refcount: refcount -+ **/ -+struct dpll_pin_ref { -+ union { -+ struct dpll_device *dpll; -+ struct dpll_pin *pin; -+ }; -+ struct list_head registration_list; -+ refcount_t refcount; -+}; -+ -+void *dpll_priv(struct dpll_device *dpll); -+void *dpll_pin_on_dpll_priv(struct dpll_device *dpll, struct dpll_pin *pin); -+void *dpll_pin_on_pin_priv(struct dpll_pin *parent, struct dpll_pin *pin); -+ -+const struct dpll_device_ops *dpll_device_ops(struct dpll_device *dpll); -+struct dpll_device *dpll_device_get_by_id(int id); -+const struct dpll_pin_ops *dpll_pin_ops(struct dpll_pin_ref *ref); -+struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs); -+extern struct xarray dpll_device_xa; -+extern struct xarray dpll_pin_xa; -+extern struct mutex dpll_lock; -+#endif -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -new file mode 100644 -index 000000000000..b47c3560b937 ---- /dev/null -+++ b/include/linux/dpll.h -@@ -0,0 +1,133 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ */ -+ -+#ifndef __DPLL_H__ -+#define __DPLL_H__ -+ -+#include -+#include -+#include -+ -+struct dpll_device; -+struct dpll_pin; -+ -+struct dpll_device_ops { -+ int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_mode *mode, struct netlink_ext_ack *extack); -+ bool (*mode_supported)(const struct dpll_device *dpll, void *dpll_priv, -+ const enum dpll_mode mode, -+ struct netlink_ext_ack *extack); -+ int (*lock_status_get)(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack); -+ int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv, -+ s32 *temp, struct netlink_ext_ack *extack); -+}; -+ -+struct dpll_pin_ops { -+ int (*frequency_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const u64 frequency, -+ struct netlink_ext_ack *extack); -+ int (*frequency_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack); -+ int (*direction_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const enum dpll_pin_direction direction, -+ struct netlink_ext_ack *extack); -+ int (*direction_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack); -+ int (*state_on_pin_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack); -+ int (*state_on_dpll_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack); -+ int (*state_on_pin_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ const enum dpll_pin_state state, -+ struct netlink_ext_ack *extack); -+ int (*state_on_dpll_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ const enum dpll_pin_state state, -+ struct netlink_ext_ack *extack); -+ int (*prio_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u32 *prio, struct netlink_ext_ack *extack); -+ int (*prio_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const u32 prio, struct netlink_ext_ack *extack); -+}; -+ -+struct dpll_pin_frequency { -+ u64 min; -+ u64 max; -+}; -+ -+#define DPLL_PIN_FREQUENCY_RANGE(_min, _max) \ -+ { \ -+ .min = _min, \ -+ .max = _max, \ -+ } -+ -+#define DPLL_PIN_FREQUENCY(_val) DPLL_PIN_FREQUENCY_RANGE(_val, _val) -+#define DPLL_PIN_FREQUENCY_1PPS \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_1_HZ) -+#define DPLL_PIN_FREQUENCY_10MHZ \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_MHZ) -+#define DPLL_PIN_FREQUENCY_IRIG_B \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_KHZ) -+#define DPLL_PIN_FREQUENCY_DCF77 \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ) -+ -+struct dpll_pin_properties { -+ const char *board_label; -+ const char *panel_label; -+ const char *package_label; -+ enum dpll_pin_type type; -+ unsigned long capabilities; -+ u32 freq_supported_num; -+ struct dpll_pin_frequency *freq_supported; -+}; -+ -+struct dpll_device * -+dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module); -+ -+void dpll_device_put(struct dpll_device *dpll); -+ -+int dpll_device_register(struct dpll_device *dpll, enum dpll_type type, -+ const struct dpll_device_ops *ops, void *priv); -+ -+void dpll_device_unregister(struct dpll_device *dpll, -+ const struct dpll_device_ops *ops, void *priv); -+ -+struct dpll_pin * -+dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module, -+ const struct dpll_pin_properties *prop); -+ -+int dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+void dpll_pin_put(struct dpll_pin *pin); -+ -+int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+#endif --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch b/kernel-rt/debian/patches/ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch deleted file mode 100644 index 79676a08..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch +++ /dev/null @@ -1,1386 +0,0 @@ -From 692ed446afde68c556c94710aa10cd2ee4395f0d Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:38 +0100 -Subject: [PATCH 04/46] dpll: netlink: Add DPLL framework base functions - -DPLL framework is used to represent and configure DPLL devices -in systems. Each device that has DPLL and can configure inputs -and outputs can use this framework. - -Implement dpll netlink framework functions for enablement of dpll -subsystem netlink family. - -Co-developed-by: Milena Olech -Signed-off-by: Milena Olech -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Signed-off-by: Vadim Fedorenko -Co-developed-by: Arkadiusz Kubalewski -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 9d71b54b65b1fb6c0d3a6c5c88ba9b915c783fbc) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 11 +- - drivers/dpll/dpll_netlink.c | 1241 +++++++++++++++++++++++++++++++++++ - drivers/dpll/dpll_netlink.h | 13 + - include/linux/dpll.h | 4 + - 4 files changed, 1268 insertions(+), 1 deletion(-) - create mode 100644 drivers/dpll/dpll_netlink.c - create mode 100644 drivers/dpll/dpll_netlink.h - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 6449ba6a383b..3568149b9562 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -14,6 +14,7 @@ - #include - - #include "dpll_core.h" -+#include "dpll_netlink.h" - - /* Mutex lock to protect DPLL subsystem devices and pins */ - DEFINE_MUTEX(dpll_lock); -@@ -381,6 +382,7 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type, - } - - xa_set_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED); -+ dpll_device_create_ntf(dpll); - mutex_unlock(&dpll_lock); - - return 0; -@@ -404,6 +406,7 @@ void dpll_device_unregister(struct dpll_device *dpll, - - mutex_lock(&dpll_lock); - ASSERT_DPLL_REGISTERED(dpll); -+ dpll_device_delete_ntf(dpll); - reg = dpll_device_registration_find(dpll, ops, priv); - if (WARN_ON(!reg)) { - mutex_unlock(&dpll_lock); -@@ -528,6 +531,7 @@ __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, - if (ret) - goto ref_pin_del; - xa_set_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); -+ dpll_pin_create_ntf(pin); - - return ret; - -@@ -602,6 +606,7 @@ void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, - return; - - mutex_lock(&dpll_lock); -+ dpll_pin_delete_ntf(pin); - __dpll_pin_unregister(dpll, pin, ops, priv); - mutex_unlock(&dpll_lock); - } -@@ -650,6 +655,7 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - stop = i; - goto dpll_unregister; - } -+ dpll_pin_create_ntf(pin); - } - mutex_unlock(&dpll_lock); - -@@ -657,8 +663,10 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - - dpll_unregister: - xa_for_each(&parent->dpll_refs, i, ref) -- if (i < stop) -+ if (i < stop) { - __dpll_pin_unregister(ref->dpll, pin, ops, priv); -+ dpll_pin_delete_ntf(pin); -+ } - refcount_dec(&pin->refcount); - dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); - unlock: -@@ -684,6 +692,7 @@ void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, - unsigned long i; - - mutex_lock(&dpll_lock); -+ dpll_pin_delete_ntf(pin); - dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); - refcount_dec(&pin->refcount); - xa_for_each(&pin->dpll_refs, i, ref) -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -new file mode 100644 -index 000000000000..9464a6865977 ---- /dev/null -+++ b/drivers/dpll/dpll_netlink.c -@@ -0,0 +1,1241 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Generic netlink for DPLL management framework -+ * -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ * -+ */ -+#include -+#include -+#include -+#include "dpll_core.h" -+#include "dpll_netlink.h" -+#include "dpll_nl.h" -+#include -+ -+#define ASSERT_NOT_NULL(ptr) (WARN_ON(!ptr)) -+ -+#define xa_for_each_marked_start(xa, index, entry, filter, start) \ -+ for (index = start, entry = xa_find(xa, &index, ULONG_MAX, filter); \ -+ entry; entry = xa_find_after(xa, &index, ULONG_MAX, filter)) -+ -+struct dpll_dump_ctx { -+ unsigned long idx; -+}; -+ -+static struct dpll_dump_ctx *dpll_dump_context(struct netlink_callback *cb) -+{ -+ return (struct dpll_dump_ctx *)cb->ctx; -+} -+ -+static int -+dpll_msg_add_dev_handle(struct sk_buff *msg, struct dpll_device *dpll) -+{ -+ if (nla_put_u32(msg, DPLL_A_ID, dpll->id)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id) -+{ -+ if (nla_put_u32(msg, DPLL_A_PIN_PARENT_ID, id)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+/** -+ * dpll_msg_add_pin_handle - attach pin handle attribute to a given message -+ * @msg: pointer to sk_buff message to attach a pin handle -+ * @pin: pin pointer -+ * -+ * Return: -+ * * 0 - success -+ * * -EMSGSIZE - no space in message to attach pin handle -+ */ -+static int -+dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) -+{ -+ if (!pin) -+ return 0; -+ if (nla_put_u32(msg, DPLL_A_PIN_ID, pin->id)) -+ return -EMSGSIZE; -+ return 0; -+} -+ -+static int -+dpll_msg_add_mode(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ enum dpll_mode mode; -+ int ret; -+ -+ ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_MODE, mode)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_mode_supported(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ enum dpll_mode mode; -+ -+ if (!ops->mode_supported) -+ return 0; -+ for (mode = DPLL_MODE_MANUAL; mode <= DPLL_MODE_MAX; mode++) -+ if (ops->mode_supported(dpll, dpll_priv(dpll), mode, extack)) -+ if (nla_put_u32(msg, DPLL_A_MODE_SUPPORTED, mode)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_lock_status(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ enum dpll_lock_status status; -+ int ret; -+ -+ ret = ops->lock_status_get(dpll, dpll_priv(dpll), &status, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_LOCK_STATUS, status)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_temp(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ s32 temp; -+ int ret; -+ -+ if (!ops->temp_get) -+ return 0; -+ ret = ops->temp_get(dpll, dpll_priv(dpll), &temp, extack); -+ if (ret) -+ return ret; -+ if (nla_put_s32(msg, DPLL_A_TEMP, temp)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_prio(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ u32 prio; -+ int ret; -+ -+ if (!ops->prio_get) -+ return 0; -+ ret = ops->prio_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &prio, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_PIN_PRIO, prio)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_on_dpll_state(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ enum dpll_pin_state state; -+ int ret; -+ -+ if (!ops->state_on_dpll_get) -+ return 0; -+ ret = ops->state_on_dpll_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), &state, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_PIN_STATE, state)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_direction(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ enum dpll_pin_direction direction; -+ int ret; -+ -+ ret = ops->direction_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &direction, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_PIN_DIRECTION, direction)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ struct nlattr *nest; -+ int fs, ret; -+ u64 freq; -+ -+ if (!ops->frequency_get) -+ return 0; -+ ret = ops->frequency_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &freq, extack); -+ if (ret) -+ return ret; -+ if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY, sizeof(freq), &freq, -+ DPLL_A_PIN_PAD)) -+ return -EMSGSIZE; -+ for (fs = 0; fs < pin->prop->freq_supported_num; fs++) { -+ nest = nla_nest_start(msg, DPLL_A_PIN_FREQUENCY_SUPPORTED); -+ if (!nest) -+ return -EMSGSIZE; -+ freq = pin->prop->freq_supported[fs].min; -+ if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, sizeof(freq), -+ &freq, DPLL_A_PIN_PAD)) { -+ nla_nest_cancel(msg, nest); -+ return -EMSGSIZE; -+ } -+ freq = pin->prop->freq_supported[fs].max; -+ if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, sizeof(freq), -+ &freq, DPLL_A_PIN_PAD)) { -+ nla_nest_cancel(msg, nest); -+ return -EMSGSIZE; -+ } -+ nla_nest_end(msg, nest); -+ } -+ -+ return 0; -+} -+ -+static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) -+{ -+ int fs; -+ -+ for (fs = 0; fs < pin->prop->freq_supported_num; fs++) -+ if (freq >= pin->prop->freq_supported[fs].min && -+ freq <= pin->prop->freq_supported[fs].max) -+ return true; -+ return false; -+} -+ -+static int -+dpll_msg_add_pin_parents(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *dpll_ref, -+ struct netlink_ext_ack *extack) -+{ -+ enum dpll_pin_state state; -+ struct dpll_pin_ref *ref; -+ struct dpll_pin *ppin; -+ struct nlattr *nest; -+ unsigned long index; -+ int ret; -+ -+ xa_for_each(&pin->parent_refs, index, ref) { -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ void *parent_priv; -+ -+ ppin = ref->pin; -+ parent_priv = dpll_pin_on_dpll_priv(dpll_ref->dpll, ppin); -+ ret = ops->state_on_pin_get(pin, -+ dpll_pin_on_pin_priv(ppin, pin), -+ ppin, parent_priv, &state, extack); -+ if (ret) -+ return ret; -+ nest = nla_nest_start(msg, DPLL_A_PIN_PARENT_PIN); -+ if (!nest) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_dev_parent_handle(msg, ppin->id); -+ if (ret) -+ goto nest_cancel; -+ if (nla_put_u32(msg, DPLL_A_PIN_STATE, state)) { -+ ret = -EMSGSIZE; -+ goto nest_cancel; -+ } -+ nla_nest_end(msg, nest); -+ } -+ -+ return 0; -+ -+nest_cancel: -+ nla_nest_cancel(msg, nest); -+ return ret; -+} -+ -+static int -+dpll_msg_add_pin_dplls(struct sk_buff *msg, struct dpll_pin *pin, -+ struct netlink_ext_ack *extack) -+{ -+ struct dpll_pin_ref *ref; -+ struct nlattr *attr; -+ unsigned long index; -+ int ret; -+ -+ xa_for_each(&pin->dpll_refs, index, ref) { -+ attr = nla_nest_start(msg, DPLL_A_PIN_PARENT_DEVICE); -+ if (!attr) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_dev_parent_handle(msg, ref->dpll->id); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_pin_on_dpll_state(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_pin_prio(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_pin_direction(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ nla_nest_end(msg, attr); -+ } -+ -+ return 0; -+ -+nest_cancel: -+ nla_nest_end(msg, attr); -+ return ret; -+} -+ -+static int -+dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_properties *prop = pin->prop; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); -+ ASSERT_NOT_NULL(ref); -+ -+ ret = dpll_msg_add_pin_handle(msg, pin); -+ if (ret) -+ return ret; -+ if (nla_put_string(msg, DPLL_A_PIN_MODULE_NAME, -+ module_name(pin->module))) -+ return -EMSGSIZE; -+ if (nla_put_64bit(msg, DPLL_A_PIN_CLOCK_ID, sizeof(pin->clock_id), -+ &pin->clock_id, DPLL_A_PIN_PAD)) -+ return -EMSGSIZE; -+ if (prop->board_label && -+ nla_put_string(msg, DPLL_A_PIN_BOARD_LABEL, prop->board_label)) -+ return -EMSGSIZE; -+ if (prop->panel_label && -+ nla_put_string(msg, DPLL_A_PIN_PANEL_LABEL, prop->panel_label)) -+ return -EMSGSIZE; -+ if (prop->package_label && -+ nla_put_string(msg, DPLL_A_PIN_PACKAGE_LABEL, -+ prop->package_label)) -+ return -EMSGSIZE; -+ if (nla_put_u32(msg, DPLL_A_PIN_TYPE, prop->type)) -+ return -EMSGSIZE; -+ if (nla_put_u32(msg, DPLL_A_PIN_CAPABILITIES, prop->capabilities)) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_pin_freq(msg, pin, ref, extack); -+ if (ret) -+ return ret; -+ if (xa_empty(&pin->parent_refs)) -+ ret = dpll_msg_add_pin_dplls(msg, pin, extack); -+ else -+ ret = dpll_msg_add_pin_parents(msg, pin, ref, extack); -+ -+ return ret; -+} -+ -+static int -+dpll_device_get_one(struct dpll_device *dpll, struct sk_buff *msg, -+ struct netlink_ext_ack *extack) -+{ -+ int ret; -+ -+ ret = dpll_msg_add_dev_handle(msg, dpll); -+ if (ret) -+ return ret; -+ if (nla_put_string(msg, DPLL_A_MODULE_NAME, module_name(dpll->module))) -+ return -EMSGSIZE; -+ if (nla_put_64bit(msg, DPLL_A_CLOCK_ID, sizeof(dpll->clock_id), -+ &dpll->clock_id, DPLL_A_PAD)) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_temp(msg, dpll, extack); -+ if (ret) -+ return ret; -+ ret = dpll_msg_add_lock_status(msg, dpll, extack); -+ if (ret) -+ return ret; -+ ret = dpll_msg_add_mode(msg, dpll, extack); -+ if (ret) -+ return ret; -+ ret = dpll_msg_add_mode_supported(msg, dpll, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_TYPE, dpll->type)) -+ return -EMSGSIZE; -+ -+ return ret; -+} -+ -+static int -+dpll_device_event_send(enum dpll_cmd event, struct dpll_device *dpll) -+{ -+ struct sk_buff *msg; -+ int ret = -ENOMEM; -+ void *hdr; -+ -+ if (WARN_ON(!xa_get_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED))) -+ return -ENODEV; -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put(msg, 0, 0, &dpll_nl_family, 0, event); -+ if (!hdr) -+ goto err_free_msg; -+ ret = dpll_device_get_one(dpll, msg, NULL); -+ if (ret) -+ goto err_cancel_msg; -+ genlmsg_end(msg, hdr); -+ genlmsg_multicast(&dpll_nl_family, msg, 0, 0, GFP_KERNEL); -+ -+ return 0; -+ -+err_cancel_msg: -+ genlmsg_cancel(msg, hdr); -+err_free_msg: -+ nlmsg_free(msg); -+ -+ return ret; -+} -+ -+int dpll_device_create_ntf(struct dpll_device *dpll) -+{ -+ return dpll_device_event_send(DPLL_CMD_DEVICE_CREATE_NTF, dpll); -+} -+ -+int dpll_device_delete_ntf(struct dpll_device *dpll) -+{ -+ return dpll_device_event_send(DPLL_CMD_DEVICE_DELETE_NTF, dpll); -+} -+ -+static int -+__dpll_device_change_ntf(struct dpll_device *dpll) -+{ -+ return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll); -+} -+ -+/** -+ * dpll_device_change_ntf - notify that the dpll device has been changed -+ * @dpll: registered dpll pointer -+ * -+ * Context: acquires and holds a dpll_lock. -+ * Return: 0 if succeeds, error code otherwise. -+ */ -+int dpll_device_change_ntf(struct dpll_device *dpll) -+{ -+ int ret; -+ -+ mutex_lock(&dpll_lock); -+ ret = __dpll_device_change_ntf(dpll); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_device_change_ntf); -+ -+static int -+dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) -+{ -+ struct sk_buff *msg; -+ int ret = -ENOMEM; -+ void *hdr; -+ -+ if (WARN_ON(!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))) -+ return -ENODEV; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ -+ hdr = genlmsg_put(msg, 0, 0, &dpll_nl_family, 0, event); -+ if (!hdr) -+ goto err_free_msg; -+ ret = dpll_cmd_pin_get_one(msg, pin, NULL); -+ if (ret) -+ goto err_cancel_msg; -+ genlmsg_end(msg, hdr); -+ genlmsg_multicast(&dpll_nl_family, msg, 0, 0, GFP_KERNEL); -+ -+ return 0; -+ -+err_cancel_msg: -+ genlmsg_cancel(msg, hdr); -+err_free_msg: -+ nlmsg_free(msg); -+ -+ return ret; -+} -+ -+int dpll_pin_create_ntf(struct dpll_pin *pin) -+{ -+ return dpll_pin_event_send(DPLL_CMD_PIN_CREATE_NTF, pin); -+} -+ -+int dpll_pin_delete_ntf(struct dpll_pin *pin) -+{ -+ return dpll_pin_event_send(DPLL_CMD_PIN_DELETE_NTF, pin); -+} -+ -+static int __dpll_pin_change_ntf(struct dpll_pin *pin) -+{ -+ return dpll_pin_event_send(DPLL_CMD_PIN_CHANGE_NTF, pin); -+} -+ -+/** -+ * dpll_pin_change_ntf - notify that the pin has been changed -+ * @pin: registered pin pointer -+ * -+ * Context: acquires and holds a dpll_lock. -+ * Return: 0 if succeeds, error code otherwise. -+ */ -+int dpll_pin_change_ntf(struct dpll_pin *pin) -+{ -+ int ret; -+ -+ mutex_lock(&dpll_lock); -+ ret = __dpll_pin_change_ntf(pin); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_change_ntf); -+ -+static int -+dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, -+ struct netlink_ext_ack *extack) -+{ -+ u64 freq = nla_get_u64(a); -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ int ret; -+ -+ if (!dpll_pin_is_freq_supported(pin, freq)) { -+ NL_SET_ERR_MSG_ATTR(extack, a, "frequency is not supported by the device"); -+ return -EINVAL; -+ } -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ -+ if (!ops->frequency_set) -+ return -EOPNOTSUPP; -+ ret = ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), freq, extack); -+ if (ret) -+ return ret; -+ } -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ struct dpll_pin_ref *parent_ref; -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *dpll_ref; -+ void *pin_priv, *parent_priv; -+ struct dpll_pin *parent; -+ unsigned long i; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "state changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ parent = xa_load(&dpll_pin_xa, parent_idx); -+ if (!parent) -+ return -EINVAL; -+ parent_ref = xa_load(&pin->parent_refs, parent->pin_idx); -+ if (!parent_ref) -+ return -EINVAL; -+ xa_for_each(&parent->dpll_refs, i, dpll_ref) { -+ ops = dpll_pin_ops(parent_ref); -+ if (!ops->state_on_pin_set) -+ return -EOPNOTSUPP; -+ pin_priv = dpll_pin_on_pin_priv(parent, pin); -+ parent_priv = dpll_pin_on_dpll_priv(dpll_ref->dpll, parent); -+ ret = ops->state_on_pin_set(pin, pin_priv, parent, parent_priv, -+ state, extack); -+ if (ret) -+ return ret; -+ } -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "state changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ ASSERT_NOT_NULL(ref); -+ ops = dpll_pin_ops(ref); -+ if (!ops->state_on_dpll_set) -+ return -EOPNOTSUPP; -+ ret = ops->state_on_dpll_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), state, extack); -+ if (ret) -+ return ret; -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, -+ u32 prio, struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "prio changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ ASSERT_NOT_NULL(ref); -+ ops = dpll_pin_ops(ref); -+ if (!ops->prio_set) -+ return -EOPNOTSUPP; -+ ret = ops->prio_set(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), prio, extack); -+ if (ret) -+ return ret; -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, -+ enum dpll_pin_direction direction, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "direction changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ ASSERT_NOT_NULL(ref); -+ ops = dpll_pin_ops(ref); -+ if (!ops->direction_set) -+ return -EOPNOTSUPP; -+ ret = ops->direction_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), direction, extack); -+ if (ret) -+ return ret; -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_parent_device_set(struct dpll_pin *pin, struct nlattr *parent_nest, -+ struct netlink_ext_ack *extack) -+{ -+ struct nlattr *tb[DPLL_A_PIN_MAX + 1]; -+ enum dpll_pin_direction direction; -+ enum dpll_pin_state state; -+ struct dpll_pin_ref *ref; -+ struct dpll_device *dpll; -+ u32 pdpll_idx, prio; -+ int ret; -+ -+ nla_parse_nested(tb, DPLL_A_PIN_MAX, parent_nest, -+ dpll_pin_parent_device_nl_policy, extack); -+ if (!tb[DPLL_A_PIN_PARENT_ID]) { -+ NL_SET_ERR_MSG(extack, "device parent id expected"); -+ return -EINVAL; -+ } -+ pdpll_idx = nla_get_u32(tb[DPLL_A_PIN_PARENT_ID]); -+ dpll = xa_load(&dpll_device_xa, pdpll_idx); -+ if (!dpll) { -+ NL_SET_ERR_MSG(extack, "parent device not found"); -+ return -EINVAL; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ if (!ref) { -+ NL_SET_ERR_MSG(extack, "pin not connected to given parent device"); -+ return -EINVAL; -+ } -+ if (tb[DPLL_A_PIN_STATE]) { -+ state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -+ ret = dpll_pin_state_set(dpll, pin, state, extack); -+ if (ret) -+ return ret; -+ } -+ if (tb[DPLL_A_PIN_PRIO]) { -+ prio = nla_get_u32(tb[DPLL_A_PIN_PRIO]); -+ ret = dpll_pin_prio_set(dpll, pin, prio, extack); -+ if (ret) -+ return ret; -+ } -+ if (tb[DPLL_A_PIN_DIRECTION]) { -+ direction = nla_get_u32(tb[DPLL_A_PIN_DIRECTION]); -+ ret = dpll_pin_direction_set(pin, dpll, direction, extack); -+ if (ret) -+ return ret; -+ } -+ return 0; -+} -+ -+static int -+dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, -+ struct netlink_ext_ack *extack) -+{ -+ struct nlattr *tb[DPLL_A_PIN_MAX + 1]; -+ enum dpll_pin_state state; -+ u32 ppin_idx; -+ int ret; -+ -+ nla_parse_nested(tb, DPLL_A_PIN_MAX, parent_nest, -+ dpll_pin_parent_pin_nl_policy, extack); -+ if (!tb[DPLL_A_PIN_PARENT_ID]) { -+ NL_SET_ERR_MSG(extack, "device parent id expected"); -+ return -EINVAL; -+ } -+ ppin_idx = nla_get_u32(tb[DPLL_A_PIN_PARENT_ID]); -+ state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -+ ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int -+dpll_pin_set_from_nlattr(struct dpll_pin *pin, struct genl_info *info) -+{ -+ struct nlattr *a; -+ int rem, ret; -+ -+ nla_for_each_attr(a, genlmsg_data(info->genlhdr), -+ genlmsg_len(info->genlhdr), rem) { -+ switch (nla_type(a)) { -+ case DPLL_A_PIN_FREQUENCY: -+ ret = dpll_pin_freq_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; -+ case DPLL_A_PIN_PARENT_DEVICE: -+ ret = dpll_pin_parent_device_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; -+ case DPLL_A_PIN_PARENT_PIN: -+ ret = dpll_pin_parent_pin_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; -+ } -+ } -+ -+ return 0; -+} -+ -+static struct dpll_pin * -+dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, -+ enum dpll_pin_type type, struct nlattr *board_label, -+ struct nlattr *panel_label, struct nlattr *package_label, -+ struct netlink_ext_ack *extack) -+{ -+ bool board_match, panel_match, package_match; -+ struct dpll_pin *pin_match = NULL, *pin; -+ const struct dpll_pin_properties *prop; -+ bool cid_match, mod_match, type_match; -+ unsigned long i; -+ -+ xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) { -+ prop = pin->prop; -+ cid_match = clock_id ? pin->clock_id == clock_id : true; -+ mod_match = mod_name_attr && module_name(pin->module) ? -+ !nla_strcmp(mod_name_attr, -+ module_name(pin->module)) : true; -+ type_match = type ? prop->type == type : true; -+ board_match = board_label ? (prop->board_label ? -+ !nla_strcmp(board_label, prop->board_label) : false) : -+ true; -+ panel_match = panel_label ? (prop->panel_label ? -+ !nla_strcmp(panel_label, prop->panel_label) : false) : -+ true; -+ package_match = package_label ? (prop->package_label ? -+ !nla_strcmp(package_label, prop->package_label) : -+ false) : true; -+ if (cid_match && mod_match && type_match && board_match && -+ panel_match && package_match) { -+ if (pin_match) { -+ NL_SET_ERR_MSG(extack, "multiple matches"); -+ return ERR_PTR(-EINVAL); -+ } -+ pin_match = pin; -+ }; -+ } -+ if (!pin_match) { -+ NL_SET_ERR_MSG(extack, "not found"); -+ return ERR_PTR(-ENODEV); -+ } -+ return pin_match; -+} -+ -+static struct dpll_pin *dpll_pin_find_from_nlattr(struct genl_info *info) -+{ -+ struct nlattr *attr, *mod_name_attr = NULL, *board_label_attr = NULL, -+ *panel_label_attr = NULL, *package_label_attr = NULL; -+ enum dpll_pin_type type = 0; -+ u64 clock_id = 0; -+ int rem = 0; -+ -+ nla_for_each_attr(attr, genlmsg_data(info->genlhdr), -+ genlmsg_len(info->genlhdr), rem) { -+ switch (nla_type(attr)) { -+ case DPLL_A_PIN_CLOCK_ID: -+ if (clock_id) -+ goto duplicated_attr; -+ clock_id = nla_get_u64(attr); -+ break; -+ case DPLL_A_PIN_MODULE_NAME: -+ if (mod_name_attr) -+ goto duplicated_attr; -+ mod_name_attr = attr; -+ break; -+ case DPLL_A_PIN_TYPE: -+ if (type) -+ goto duplicated_attr; -+ type = nla_get_u32(attr); -+ break; -+ case DPLL_A_PIN_BOARD_LABEL: -+ if (board_label_attr) -+ goto duplicated_attr; -+ board_label_attr = attr; -+ break; -+ case DPLL_A_PIN_PANEL_LABEL: -+ if (panel_label_attr) -+ goto duplicated_attr; -+ panel_label_attr = attr; -+ break; -+ case DPLL_A_PIN_PACKAGE_LABEL: -+ if (package_label_attr) -+ goto duplicated_attr; -+ package_label_attr = attr; -+ break; -+ default: -+ break; -+ } -+ } -+ if (!(clock_id || mod_name_attr || board_label_attr || -+ panel_label_attr || package_label_attr)) { -+ NL_SET_ERR_MSG(info->extack, "missing attributes"); -+ return ERR_PTR(-EINVAL); -+ } -+ return dpll_pin_find(clock_id, mod_name_attr, type, board_label_attr, -+ panel_label_attr, package_label_attr, -+ info->extack); -+duplicated_attr: -+ NL_SET_ERR_MSG(info->extack, "duplicated attribute"); -+ return ERR_PTR(-EINVAL); -+} -+ -+int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_pin *pin; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_PIN_ID_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ -+ pin = dpll_pin_find_from_nlattr(info); -+ if (!IS_ERR(pin)) { -+ ret = dpll_msg_add_pin_handle(msg, pin); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_pin *pin = info->user_ptr[0]; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ if (!pin) -+ return -ENODEV; -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_PIN_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ ret = dpll_cmd_pin_get_one(msg, pin, info->extack); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) -+{ -+ struct dpll_dump_ctx *ctx = dpll_dump_context(cb); -+ struct dpll_pin *pin; -+ struct nlattr *hdr; -+ unsigned long i; -+ int ret = 0; -+ -+ xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, -+ ctx->idx) { -+ hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, -+ cb->nlh->nlmsg_seq, -+ &dpll_nl_family, NLM_F_MULTI, -+ DPLL_CMD_PIN_GET); -+ if (!hdr) { -+ ret = -EMSGSIZE; -+ break; -+ } -+ ret = dpll_cmd_pin_get_one(skb, pin, cb->extack); -+ if (ret) { -+ genlmsg_cancel(skb, hdr); -+ break; -+ } -+ genlmsg_end(skb, hdr); -+ } -+ if (ret == -EMSGSIZE) { -+ ctx->idx = i; -+ return skb->len; -+ } -+ return ret; -+} -+ -+int dpll_nl_pin_set_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_pin *pin = info->user_ptr[0]; -+ -+ return dpll_pin_set_from_nlattr(pin, info); -+} -+ -+static struct dpll_device * -+dpll_device_find(u64 clock_id, struct nlattr *mod_name_attr, -+ enum dpll_type type, struct netlink_ext_ack *extack) -+{ -+ struct dpll_device *dpll_match = NULL, *dpll; -+ bool cid_match, mod_match, type_match; -+ unsigned long i; -+ -+ xa_for_each_marked(&dpll_device_xa, i, dpll, DPLL_REGISTERED) { -+ cid_match = clock_id ? dpll->clock_id == clock_id : true; -+ mod_match = mod_name_attr ? (module_name(dpll->module) ? -+ !nla_strcmp(mod_name_attr, -+ module_name(dpll->module)) : false) : true; -+ type_match = type ? dpll->type == type : true; -+ if (cid_match && mod_match && type_match) { -+ if (dpll_match) { -+ NL_SET_ERR_MSG(extack, "multiple matches"); -+ return ERR_PTR(-EINVAL); -+ } -+ dpll_match = dpll; -+ } -+ } -+ if (!dpll_match) { -+ NL_SET_ERR_MSG(extack, "not found"); -+ return ERR_PTR(-ENODEV); -+ } -+ -+ return dpll_match; -+} -+ -+static struct dpll_device * -+dpll_device_find_from_nlattr(struct genl_info *info) -+{ -+ struct nlattr *attr, *mod_name_attr = NULL; -+ enum dpll_type type = 0; -+ u64 clock_id = 0; -+ int rem = 0; -+ -+ nla_for_each_attr(attr, genlmsg_data(info->genlhdr), -+ genlmsg_len(info->genlhdr), rem) { -+ switch (nla_type(attr)) { -+ case DPLL_A_CLOCK_ID: -+ if (clock_id) -+ goto duplicated_attr; -+ clock_id = nla_get_u64(attr); -+ break; -+ case DPLL_A_MODULE_NAME: -+ if (mod_name_attr) -+ goto duplicated_attr; -+ mod_name_attr = attr; -+ break; -+ case DPLL_A_TYPE: -+ if (type) -+ goto duplicated_attr; -+ type = nla_get_u32(attr); -+ break; -+ default: -+ break; -+ } -+ } -+ if (!clock_id && !mod_name_attr && !type) { -+ NL_SET_ERR_MSG(info->extack, "missing attributes"); -+ return ERR_PTR(-EINVAL); -+ } -+ return dpll_device_find(clock_id, mod_name_attr, type, info->extack); -+duplicated_attr: -+ NL_SET_ERR_MSG(info->extack, "duplicated attribute"); -+ return ERR_PTR(-EINVAL); -+} -+ -+int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_device *dpll; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_DEVICE_ID_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ -+ dpll = dpll_device_find_from_nlattr(info); -+ if (!IS_ERR(dpll)) { -+ ret = dpll_msg_add_dev_handle(msg, dpll); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_device *dpll = info->user_ptr[0]; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_DEVICE_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ -+ ret = dpll_device_get_one(dpll, msg, info->extack); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_device_set_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ /* placeholder for set command */ -+ return 0; -+} -+ -+int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) -+{ -+ struct dpll_dump_ctx *ctx = dpll_dump_context(cb); -+ struct dpll_device *dpll; -+ struct nlattr *hdr; -+ unsigned long i; -+ int ret = 0; -+ -+ xa_for_each_marked_start(&dpll_device_xa, i, dpll, DPLL_REGISTERED, -+ ctx->idx) { -+ hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, -+ cb->nlh->nlmsg_seq, &dpll_nl_family, -+ NLM_F_MULTI, DPLL_CMD_DEVICE_GET); -+ if (!hdr) { -+ ret = -EMSGSIZE; -+ break; -+ } -+ ret = dpll_device_get_one(dpll, skb, cb->extack); -+ if (ret) { -+ genlmsg_cancel(skb, hdr); -+ break; -+ } -+ genlmsg_end(skb, hdr); -+ } -+ if (ret == -EMSGSIZE) { -+ ctx->idx = i; -+ return skb->len; -+ } -+ return ret; -+} -+ -+int dpll_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ u32 id; -+ -+ if (GENL_REQ_ATTR_CHECK(info, DPLL_A_ID)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ id = nla_get_u32(info->attrs[DPLL_A_ID]); -+ info->user_ptr[0] = dpll_device_get_by_id(id); -+ if (!info->user_ptr[0]) { -+ NL_SET_ERR_MSG(info->extack, "device not found"); -+ goto unlock; -+ } -+ return 0; -+unlock: -+ mutex_unlock(&dpll_lock); -+ return -ENODEV; -+} -+ -+void dpll_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_unlock(&dpll_lock); -+} -+ -+int -+dpll_lock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_lock(&dpll_lock); -+ -+ return 0; -+} -+ -+void -+dpll_unlock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_unlock(&dpll_lock); -+} -+ -+int dpll_lock_dumpit(struct netlink_callback *cb) -+{ -+ mutex_lock(&dpll_lock); -+ -+ return 0; -+} -+ -+int dpll_unlock_dumpit(struct netlink_callback *cb) -+{ -+ mutex_unlock(&dpll_lock); -+ -+ return 0; -+} -+ -+int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ int ret; -+ -+ mutex_lock(&dpll_lock); -+ if (GENL_REQ_ATTR_CHECK(info, DPLL_A_PIN_ID)) { -+ ret = -EINVAL; -+ goto unlock_dev; -+ } -+ info->user_ptr[0] = xa_load(&dpll_pin_xa, -+ nla_get_u32(info->attrs[DPLL_A_PIN_ID])); -+ if (!info->user_ptr[0]) { -+ NL_SET_ERR_MSG(info->extack, "pin not found"); -+ ret = -ENODEV; -+ goto unlock_dev; -+ } -+ -+ return 0; -+ -+unlock_dev: -+ mutex_unlock(&dpll_lock); -+ return ret; -+} -+ -+void dpll_pin_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_unlock(&dpll_lock); -+} -diff --git a/drivers/dpll/dpll_netlink.h b/drivers/dpll/dpll_netlink.h -new file mode 100644 -index 000000000000..a9cfd55f57fc ---- /dev/null -+++ b/drivers/dpll/dpll_netlink.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ */ -+ -+int dpll_device_create_ntf(struct dpll_device *dpll); -+ -+int dpll_device_delete_ntf(struct dpll_device *dpll); -+ -+int dpll_pin_create_ntf(struct dpll_pin *pin); -+ -+int dpll_pin_delete_ntf(struct dpll_pin *pin); -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -index b47c3560b937..2202310c10cd 100644 ---- a/include/linux/dpll.h -+++ b/include/linux/dpll.h -@@ -130,4 +130,8 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, - const struct dpll_pin_ops *ops, void *priv); - -+int dpll_device_change_ntf(struct dpll_device *dpll); -+ -+int dpll_pin_change_ntf(struct dpll_pin *pin); -+ - #endif --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch b/kernel-rt/debian/patches/ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch deleted file mode 100644 index 2a8f52fc..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 41ef885df68771af53969ce6ce97016bc2fc418b Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 13 Sep 2023 21:49:39 +0100 -Subject: [PATCH 05/46] netdev: expose DPLL pin handle for netdevice - -In case netdevice represents a SyncE port, the user needs to understand -the connection between netdevice and associated DPLL pin. There might me -multiple netdevices pointing to the same pin, in case of VF/SF -implementation. - -Add a IFLA Netlink attribute to nest the DPLL pin handle, similar to -how it is implemented for devlink port. Add a struct dpll_pin pointer -to netdev and protect access to it by RTNL. Expose netdev_dpll_pin_set() -and netdev_dpll_pin_clear() helpers to the drivers so they can set/clear -the DPLL pin relationship to netdev. - -Note that during the lifetime of struct dpll_pin the pin handle does not -change. Therefore it is save to access it lockless. It is drivers -responsibility to call netdev_dpll_pin_clear() before dpll_pin_put(). - -Signed-off-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: David S. Miller -(cherry picked from commit 5f18426928800c59fb0f9bc8fb0c182bb6f5ee24) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 16 ++++++++++++++-- - include/linux/dpll.h | 15 +++++++++++++++ - include/linux/netdevice.h | 21 +++++++++++++++++++++ - include/uapi/linux/if_link.h | 2 +- - net/core/dev.c | 22 ++++++++++++++++++++++ - net/core/rtnetlink.c | 36 ++++++++++++++++++++++++++++++++++++ - 6 files changed, 109 insertions(+), 3 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 9464a6865977..764437a0661b 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -47,6 +47,18 @@ dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id) - return 0; - } - -+/** -+ * dpll_msg_pin_handle_size - get size of pin handle attribute for given pin -+ * @pin: pin pointer -+ * -+ * Return: byte size of pin handle attribute for given pin. -+ */ -+size_t dpll_msg_pin_handle_size(struct dpll_pin *pin) -+{ -+ return pin ? nla_total_size(4) : 0; /* DPLL_A_PIN_ID */ -+} -+EXPORT_SYMBOL_GPL(dpll_msg_pin_handle_size); -+ - /** - * dpll_msg_add_pin_handle - attach pin handle attribute to a given message - * @msg: pointer to sk_buff message to attach a pin handle -@@ -56,8 +68,7 @@ dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id) - * * 0 - success - * * -EMSGSIZE - no space in message to attach pin handle - */ --static int --dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) -+int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) - { - if (!pin) - return 0; -@@ -65,6 +76,7 @@ dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) - return -EMSGSIZE; - return 0; - } -+EXPORT_SYMBOL_GPL(dpll_msg_add_pin_handle); - - static int - dpll_msg_add_mode(struct sk_buff *msg, struct dpll_device *dpll, -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -index 2202310c10cd..bbc480cd2932 100644 ---- a/include/linux/dpll.h -+++ b/include/linux/dpll.h -@@ -101,6 +101,21 @@ struct dpll_pin_properties { - struct dpll_pin_frequency *freq_supported; - }; - -+#if IS_ENABLED(CONFIG_DPLL) -+size_t dpll_msg_pin_handle_size(struct dpll_pin *pin); -+int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin); -+#else -+static inline size_t dpll_msg_pin_handle_size(struct dpll_pin *pin) -+{ -+ return 0; -+} -+ -+static inline int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) -+{ -+ return 0; -+} -+#endif -+ - struct dpll_device * - dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module); - -diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h -index b8e60a20416b..272c44030449 100644 ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -79,6 +79,8 @@ struct xdp_buff; - struct xdp_frame; - struct xdp_metadata_ops; - struct xdp_md; -+/* DPLL specific */ -+struct dpll_pin; - - typedef u32 xdp_features_t; - -@@ -2060,6 +2062,9 @@ enum netdev_stat_type { - * SET_NETDEV_DEVLINK_PORT macro. This pointer is static - * during the time netdevice is registered. - * -+ * @dpll_pin: Pointer to the SyncE source pin of a DPLL subsystem, -+ * where the clock is recovered. -+ * - * FIXME: cleanup struct net_device such that network protocol info - * moves out. - */ -@@ -2417,6 +2422,10 @@ struct net_device { - struct rtnl_hw_stats64 *offload_xstats_l3; - - struct devlink_port *devlink_port; -+ -+#if IS_ENABLED(CONFIG_DPLL) -+ struct dpll_pin *dpll_pin; -+#endif - }; - #define to_net_dev(d) container_of(d, struct net_device, dev) - -@@ -3962,6 +3971,18 @@ int dev_get_mac_address(struct sockaddr *sa, struct net *net, char *dev_name); - int dev_get_port_parent_id(struct net_device *dev, - struct netdev_phys_item_id *ppid, bool recurse); - bool netdev_port_same_parent_id(struct net_device *a, struct net_device *b); -+void netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin); -+void netdev_dpll_pin_clear(struct net_device *dev); -+ -+static inline struct dpll_pin *netdev_dpll_pin(const struct net_device *dev) -+{ -+#if IS_ENABLED(CONFIG_DPLL) -+ return dev->dpll_pin; -+#else -+ return NULL; -+#endif -+} -+ - struct sk_buff *validate_xmit_skb_list(struct sk_buff *skb, struct net_device *dev, bool *again); - struct sk_buff *dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev, - struct netdev_queue *txq, int *ret); -diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h -index ce3117df9cec..fac351a93aed 100644 ---- a/include/uapi/linux/if_link.h -+++ b/include/uapi/linux/if_link.h -@@ -376,7 +376,7 @@ enum { - - IFLA_GSO_IPV4_MAX_SIZE, - IFLA_GRO_IPV4_MAX_SIZE, -- -+ IFLA_DPLL_PIN, - __IFLA_MAX - }; - -diff --git a/net/core/dev.c b/net/core/dev.c -index 890b3b758d3f..5895bf5fab4b 100644 ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -9064,6 +9064,28 @@ bool netdev_port_same_parent_id(struct net_device *a, struct net_device *b) - } - EXPORT_SYMBOL(netdev_port_same_parent_id); - -+static void netdev_dpll_pin_assign(struct net_device *dev, struct dpll_pin *dpll_pin) -+{ -+#if IS_ENABLED(CONFIG_DPLL) -+ rtnl_lock(); -+ dev->dpll_pin = dpll_pin; -+ rtnl_unlock(); -+#endif -+} -+ -+void netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin) -+{ -+ WARN_ON(!dpll_pin); -+ netdev_dpll_pin_assign(dev, dpll_pin); -+} -+EXPORT_SYMBOL(netdev_dpll_pin_set); -+ -+void netdev_dpll_pin_clear(struct net_device *dev) -+{ -+ netdev_dpll_pin_assign(dev, NULL); -+} -+EXPORT_SYMBOL(netdev_dpll_pin_clear); -+ - /** - * dev_change_proto_down - set carrier according to proto_down. - * -diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c -index 7ea66de1442c..bb004419d318 100644 ---- a/net/core/rtnetlink.c -+++ b/net/core/rtnetlink.c -@@ -57,6 +57,7 @@ - #if IS_ENABLED(CONFIG_IPV6) - #include - #endif -+#include - - #include "dev.h" - -@@ -1055,6 +1056,15 @@ static size_t rtnl_devlink_port_size(const struct net_device *dev) - return size; - } - -+static size_t rtnl_dpll_pin_size(const struct net_device *dev) -+{ -+ size_t size = nla_total_size(0); /* nest IFLA_DPLL_PIN */ -+ -+ size += dpll_msg_pin_handle_size(netdev_dpll_pin(dev)); -+ -+ return size; -+} -+ - static noinline size_t if_nlmsg_size(const struct net_device *dev, - u32 ext_filter_mask) - { -@@ -1111,6 +1121,7 @@ static noinline size_t if_nlmsg_size(const struct net_device *dev, - + rtnl_prop_list_size(dev) - + nla_total_size(MAX_ADDR_LEN) /* IFLA_PERM_ADDRESS */ - + rtnl_devlink_port_size(dev) -+ + rtnl_dpll_pin_size(dev) - + 0; - } - -@@ -1774,6 +1785,28 @@ static int rtnl_fill_devlink_port(struct sk_buff *skb, - return ret; - } - -+static int rtnl_fill_dpll_pin(struct sk_buff *skb, -+ const struct net_device *dev) -+{ -+ struct nlattr *dpll_pin_nest; -+ int ret; -+ -+ dpll_pin_nest = nla_nest_start(skb, IFLA_DPLL_PIN); -+ if (!dpll_pin_nest) -+ return -EMSGSIZE; -+ -+ ret = dpll_msg_add_pin_handle(skb, netdev_dpll_pin(dev)); -+ if (ret < 0) -+ goto nest_cancel; -+ -+ nla_nest_end(skb, dpll_pin_nest); -+ return 0; -+ -+nest_cancel: -+ nla_nest_cancel(skb, dpll_pin_nest); -+ return ret; -+} -+ - static int rtnl_fill_ifinfo(struct sk_buff *skb, - struct net_device *dev, struct net *src_net, - int type, u32 pid, u32 seq, u32 change, -@@ -1916,6 +1949,9 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, - if (rtnl_fill_devlink_port(skb, dev)) - goto nla_put_failure; - -+ if (rtnl_fill_dpll_pin(skb, dev)) -+ goto nla_put_failure; -+ - nlmsg_end(skb, nlh); - return 0; - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch b/kernel-rt/debian/patches/ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch deleted file mode 100644 index 8c919f2b..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch +++ /dev/null @@ -1,1643 +0,0 @@ -From e342f0214c4e4e0245b95c02acaea029c256edfb Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 13 Sep 2023 21:49:40 +0100 -Subject: [PATCH 06/46] ice: add admin commands to access cgu configuration - -Add firmware admin command to access clock generation unit -configuration, it is required to enable Extended PTP and SyncE features -in the driver. -Add definitions of possible hardware variations of input and output pins -related to clock generation unit and functions to access the data. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 8a3a565ff210a02a4db270a2e61c37b6687b15aa) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 + - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 246 +++++++- - drivers/net/ethernet/intel/ice/ice_common.c | 492 +++++++++++++++- - drivers/net/ethernet/intel/ice/ice_common.h | 44 ++ - drivers/net/ethernet/intel/ice/ice_lib.c | 17 +- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 530 ++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 86 +++ - drivers/net/ethernet/intel/ice/ice_type.h | 1 + - 8 files changed, 1385 insertions(+), 33 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 2695794a5df7..72c296722e41 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -199,7 +199,9 @@ extern const char ice_drv_ver[]; - enum ice_feature { - ICE_F_DSCP, - ICE_F_PTP_EXTTS, -+ ICE_F_PHY_RCLK, - ICE_F_SMA_CTRL, -+ ICE_F_CGU, - ICE_F_GNSS, - ICE_F_ROCE_LAG, - ICE_F_SRIOV_LAG, -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 72ca2199c957..aa532bfa1957 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -1352,6 +1352,30 @@ struct ice_aqc_set_mac_lb { - u8 reserved[15]; - }; - -+/* Set PHY recovered clock output (direct 0x0630) */ -+struct ice_aqc_set_phy_rec_clk_out { -+ u8 phy_output; -+ u8 port_num; -+#define ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT 0xFF -+ u8 flags; -+#define ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN BIT(0) -+ u8 rsvd; -+ __le32 freq; -+ u8 rsvd2[6]; -+ __le16 node_handle; -+}; -+ -+/* Get PHY recovered clock output (direct 0x0631) */ -+struct ice_aqc_get_phy_rec_clk_out { -+ u8 phy_output; -+ u8 port_num; -+#define ICE_AQC_GET_PHY_REC_CLK_OUT_CURR_PORT 0xFF -+ u8 flags; -+#define ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN BIT(0) -+ u8 rsvd[11]; -+ __le16 node_handle; -+}; -+ - struct ice_aqc_link_topo_params { - u8 lport_num; - u8 lport_num_valid; -@@ -1368,6 +1392,8 @@ struct ice_aqc_link_topo_params { - #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 -+#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 -+#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 - #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 - #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ - (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) -@@ -1404,8 +1430,12 @@ struct ice_aqc_link_topo_addr { - struct ice_aqc_get_link_topo { - struct ice_aqc_link_topo_addr addr; - u8 node_part_num; --#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 --#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 0x24 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 0x25 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY 0x30 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 - u8 rsvd[9]; - }; - -@@ -2126,6 +2156,193 @@ struct ice_aqc_get_pkg_info_resp { - struct ice_aqc_get_pkg_info pkg_info[]; - }; - -+/* Get CGU abilities command response data structure (indirect 0x0C61) */ -+struct ice_aqc_get_cgu_abilities { -+ u8 num_inputs; -+ u8 num_outputs; -+ u8 pps_dpll_idx; -+ u8 eec_dpll_idx; -+ __le32 max_in_freq; -+ __le32 max_in_phase_adj; -+ __le32 max_out_freq; -+ __le32 max_out_phase_adj; -+ u8 cgu_part_num; -+ u8 rsvd[3]; -+}; -+ -+/* Set CGU input config (direct 0x0C62) */ -+struct ice_aqc_set_cgu_input_config { -+ u8 input_idx; -+ u8 flags1; -+#define ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_FREQ BIT(6) -+#define ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY BIT(7) -+ u8 flags2; -+#define ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5) -+#define ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6) -+ u8 rsvd; -+ __le32 freq; -+ __le32 phase_delay; -+ u8 rsvd2[2]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU input config response descriptor structure (direct 0x0C63) */ -+struct ice_aqc_get_cgu_input_config { -+ u8 input_idx; -+ u8 status; -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_LOS BIT(0) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_SCM_FAIL BIT(1) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_CFM_FAIL BIT(2) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_GST_FAIL BIT(3) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_PFM_FAIL BIT(4) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_ESYNC_FAIL BIT(6) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_ESYNC_CAP BIT(7) -+ u8 type; -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_READ_ONLY BIT(0) -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_GPS BIT(4) -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_EXTERNAL BIT(5) -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_PHY BIT(6) -+ u8 flags1; -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_PHASE_DELAY_SUPP BIT(0) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_1PPS_SUPP BIT(2) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_10MHZ_SUPP BIT(3) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_ANYFREQ BIT(7) -+ __le32 freq; -+ __le32 phase_delay; -+ u8 flags2; -+#define ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6) -+ u8 rsvd[1]; -+ __le16 node_handle; -+}; -+ -+/* Set CGU output config (direct 0x0C64) */ -+struct ice_aqc_set_cgu_output_config { -+ u8 output_idx; -+ u8 flags; -+#define ICE_AQC_SET_CGU_OUT_CFG_OUT_EN BIT(0) -+#define ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN BIT(1) -+#define ICE_AQC_SET_CGU_OUT_CFG_UPDATE_FREQ BIT(2) -+#define ICE_AQC_SET_CGU_OUT_CFG_UPDATE_PHASE BIT(3) -+#define ICE_AQC_SET_CGU_OUT_CFG_UPDATE_SRC_SEL BIT(4) -+ u8 src_sel; -+#define ICE_AQC_SET_CGU_OUT_CFG_DPLL_SRC_SEL ICE_M(0x1F, 0) -+ u8 rsvd; -+ __le32 freq; -+ __le32 phase_delay; -+ u8 rsvd2[2]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU output config (direct 0x0C65) */ -+struct ice_aqc_get_cgu_output_config { -+ u8 output_idx; -+ u8 flags; -+#define ICE_AQC_GET_CGU_OUT_CFG_OUT_EN BIT(0) -+#define ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN BIT(1) -+#define ICE_AQC_GET_CGU_OUT_CFG_ESYNC_ABILITY BIT(2) -+ u8 src_sel; -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT 0 -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL \ -+ ICE_M(0x1F, ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT) -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT 5 -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_MODE \ -+ ICE_M(0x7, ICE_AQC_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT) -+ u8 rsvd; -+ __le32 freq; -+ __le32 src_freq; -+ u8 rsvd2[2]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU DPLL status (direct 0x0C66) */ -+struct ice_aqc_get_cgu_dpll_status { -+ u8 dpll_num; -+ u8 ref_state; -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_LOS BIT(0) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_SCM BIT(1) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_CFM BIT(2) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_GST BIT(3) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_PFM BIT(4) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_FAST_LOCK_EN BIT(5) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_ESYNC BIT(6) -+ u8 dpll_state; -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK BIT(0) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO BIT(1) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY BIT(2) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_FLHIT BIT(5) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_PSLHIT BIT(7) -+ u8 config; -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_CLK_REF_SEL ICE_M(0x1F, 0) -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_SHIFT 5 -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE \ -+ ICE_M(0x7, ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_SHIFT) -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_FREERUN 0 -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_AUTOMATIC \ -+ ICE_M(0x3, ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_SHIFT) -+ __le32 phase_offset_h; -+ __le32 phase_offset_l; -+ u8 eec_mode; -+#define ICE_AQC_GET_CGU_DPLL_STATUS_EEC_MODE_1 0xA -+#define ICE_AQC_GET_CGU_DPLL_STATUS_EEC_MODE_2 0xB -+#define ICE_AQC_GET_CGU_DPLL_STATUS_EEC_MODE_UNKNOWN 0xF -+ u8 rsvd[1]; -+ __le16 node_handle; -+}; -+ -+/* Set CGU DPLL config (direct 0x0C67) */ -+struct ice_aqc_set_cgu_dpll_config { -+ u8 dpll_num; -+ u8 ref_state; -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_LOS BIT(0) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_SCM BIT(1) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_CFM BIT(2) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_GST BIT(3) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_PFM BIT(4) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_FLOCK_EN BIT(5) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_ESYNC BIT(6) -+ u8 rsvd; -+ u8 config; -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_CLK_REF_SEL ICE_M(0x1F, 0) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_SHIFT 5 -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE \ -+ ICE_M(0x7, ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_SHIFT) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_FREERUN 0 -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_AUTOMATIC \ -+ ICE_M(0x3, ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_SHIFT) -+ u8 rsvd2[8]; -+ u8 eec_mode; -+ u8 rsvd3[1]; -+ __le16 node_handle; -+}; -+ -+/* Set CGU reference priority (direct 0x0C68) */ -+struct ice_aqc_set_cgu_ref_prio { -+ u8 dpll_num; -+ u8 ref_idx; -+ u8 ref_priority; -+ u8 rsvd[11]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU reference priority (direct 0x0C69) */ -+struct ice_aqc_get_cgu_ref_prio { -+ u8 dpll_num; -+ u8 ref_idx; -+ u8 ref_priority; /* Valid only in response */ -+ u8 rsvd[13]; -+}; -+ -+/* Get CGU info (direct 0x0C6A) */ -+struct ice_aqc_get_cgu_info { -+ __le32 cgu_id; -+ __le32 cgu_cfg_ver; -+ __le32 cgu_fw_ver; -+ u8 node_part_num; -+ u8 dev_rev; -+ __le16 node_handle; -+}; -+ - /* Driver Shared Parameters (direct, 0x0C90) */ - struct ice_aqc_driver_shared_params { - u8 set_or_get_op; -@@ -2195,6 +2412,8 @@ struct ice_aq_desc { - struct ice_aqc_get_phy_caps get_phy; - struct ice_aqc_set_phy_cfg set_phy; - struct ice_aqc_restart_an restart_an; -+ struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out; -+ struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out; - struct ice_aqc_gpio read_write_gpio; - struct ice_aqc_sff_eeprom read_write_sff_param; - struct ice_aqc_set_port_id_led set_port_id_led; -@@ -2235,6 +2454,15 @@ struct ice_aq_desc { - struct ice_aqc_fw_logging fw_logging; - struct ice_aqc_get_clear_fw_log get_clear_fw_log; - struct ice_aqc_download_pkg download_pkg; -+ struct ice_aqc_set_cgu_input_config set_cgu_input_config; -+ struct ice_aqc_get_cgu_input_config get_cgu_input_config; -+ struct ice_aqc_set_cgu_output_config set_cgu_output_config; -+ struct ice_aqc_get_cgu_output_config get_cgu_output_config; -+ struct ice_aqc_get_cgu_dpll_status get_cgu_dpll_status; -+ struct ice_aqc_set_cgu_dpll_config set_cgu_dpll_config; -+ struct ice_aqc_set_cgu_ref_prio set_cgu_ref_prio; -+ struct ice_aqc_get_cgu_ref_prio get_cgu_ref_prio; -+ struct ice_aqc_get_cgu_info get_cgu_info; - struct ice_aqc_driver_shared_params drv_shared_params; - struct ice_aqc_set_mac_lb set_mac_lb; - struct ice_aqc_alloc_free_res_cmd sw_res_ctrl; -@@ -2359,6 +2587,8 @@ enum ice_adminq_opc { - ice_aqc_opc_get_link_status = 0x0607, - ice_aqc_opc_set_event_mask = 0x0613, - ice_aqc_opc_set_mac_lb = 0x0620, -+ ice_aqc_opc_set_phy_rec_clk_out = 0x0630, -+ ice_aqc_opc_get_phy_rec_clk_out = 0x0631, - ice_aqc_opc_get_link_topo = 0x06E0, - ice_aqc_opc_read_i2c = 0x06E2, - ice_aqc_opc_write_i2c = 0x06E3, -@@ -2414,6 +2644,18 @@ enum ice_adminq_opc { - ice_aqc_opc_update_pkg = 0x0C42, - ice_aqc_opc_get_pkg_info_list = 0x0C43, - -+ /* 1588/SyncE commands/events */ -+ ice_aqc_opc_get_cgu_abilities = 0x0C61, -+ ice_aqc_opc_set_cgu_input_config = 0x0C62, -+ ice_aqc_opc_get_cgu_input_config = 0x0C63, -+ ice_aqc_opc_set_cgu_output_config = 0x0C64, -+ ice_aqc_opc_get_cgu_output_config = 0x0C65, -+ ice_aqc_opc_get_cgu_dpll_status = 0x0C66, -+ ice_aqc_opc_set_cgu_dpll_config = 0x0C67, -+ ice_aqc_opc_set_cgu_ref_prio = 0x0C68, -+ ice_aqc_opc_get_cgu_ref_prio = 0x0C69, -+ ice_aqc_opc_get_cgu_info = 0x0C6A, -+ - ice_aqc_opc_driver_shared_params = 0x0C90, - - /* Standalone Commands/Events */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 80deca45ab59..089558b3b1ae 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -8,6 +8,7 @@ - #include "ice_ptp_hw.h" - - #define ICE_PF_RESET_WAIT_COUNT 300 -+#define ICE_MAX_NETLIST_SIZE 10 - - static const char * const ice_link_mode_str_low[] = { - [0] = "100BASE_TX", -@@ -435,6 +436,81 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, - return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); - } - -+/** -+ * ice_aq_get_netlist_node -+ * @hw: pointer to the hw struct -+ * @cmd: get_link_topo AQ structure -+ * @node_part_number: output node part number if node found -+ * @node_handle: output node handle parameter if node found -+ * -+ * Get netlist node handle. -+ */ -+int -+ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, -+ u8 *node_part_number, u16 *node_handle) -+{ -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); -+ desc.params.get_link_topo = *cmd; -+ -+ if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL)) -+ return -EINTR; -+ -+ if (node_handle) -+ *node_handle = -+ le16_to_cpu(desc.params.get_link_topo.addr.handle); -+ if (node_part_number) -+ *node_part_number = desc.params.get_link_topo.node_part_num; -+ -+ return 0; -+} -+ -+/** -+ * ice_find_netlist_node -+ * @hw: pointer to the hw struct -+ * @node_type_ctx: type of netlist node to look for -+ * @node_part_number: node part number to look for -+ * @node_handle: output parameter if node found - optional -+ * -+ * Find and return the node handle for a given node type and part number in the -+ * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST -+ * otherwise. If node_handle provided, it would be set to found node handle. -+ */ -+int -+ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -+ u16 *node_handle) -+{ -+ struct ice_aqc_get_link_topo cmd; -+ u8 rec_node_part_number; -+ u16 rec_node_handle; -+ u8 idx; -+ -+ for (idx = 0; idx < ICE_MAX_NETLIST_SIZE; idx++) { -+ int status; -+ -+ memset(&cmd, 0, sizeof(cmd)); -+ -+ cmd.addr.topo_params.node_type_ctx = -+ (node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S); -+ cmd.addr.topo_params.index = idx; -+ -+ status = ice_aq_get_netlist_node(hw, &cmd, -+ &rec_node_part_number, -+ &rec_node_handle); -+ if (status) -+ return status; -+ -+ if (rec_node_part_number == node_part_number) { -+ if (node_handle) -+ *node_handle = rec_node_handle; -+ return 0; -+ } -+ } -+ -+ return -ENOTBLK; -+} -+ - /** - * ice_is_media_cage_present - * @pi: port information structure -@@ -2654,33 +2730,6 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, - ice_recalc_port_limited_caps(hw, &dev_p->common_cap); - } - --/** -- * ice_aq_get_netlist_node -- * @hw: pointer to the hw struct -- * @cmd: get_link_topo AQ structure -- * @node_part_number: output node part number if node found -- * @node_handle: output node handle parameter if node found -- */ --static int --ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, -- u8 *node_part_number, u16 *node_handle) --{ -- struct ice_aq_desc desc; -- -- ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); -- desc.params.get_link_topo = *cmd; -- -- if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL)) -- return -EIO; -- -- if (node_handle) -- *node_handle = le16_to_cpu(desc.params.get_link_topo.addr.handle); -- if (node_part_number) -- *node_part_number = desc.params.get_link_topo.node_part_num; -- -- return 0; --} -- - /** - * ice_is_pf_c827 - check if pf contains c827 phy - * @hw: pointer to the hw struct -@@ -4998,6 +5047,395 @@ ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, - return status; - } - -+/** -+ * ice_aq_get_cgu_abilities - get cgu abilities -+ * @hw: pointer to the HW struct -+ * @abilities: CGU abilities -+ * -+ * Get CGU abilities (0x0C61) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_abilities(struct ice_hw *hw, -+ struct ice_aqc_get_cgu_abilities *abilities) -+{ -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_abilities); -+ return ice_aq_send_cmd(hw, &desc, abilities, sizeof(*abilities), NULL); -+} -+ -+/** -+ * ice_aq_set_input_pin_cfg - set input pin config -+ * @hw: pointer to the HW struct -+ * @input_idx: Input index -+ * @flags1: Input flags -+ * @flags2: Input flags -+ * @freq: Frequency in Hz -+ * @phase_delay: Delay in ps -+ * -+ * Set CGU input config (0x0C62) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2, -+ u32 freq, s32 phase_delay) -+{ -+ struct ice_aqc_set_cgu_input_config *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_input_config); -+ cmd = &desc.params.set_cgu_input_config; -+ cmd->input_idx = input_idx; -+ cmd->flags1 = flags1; -+ cmd->flags2 = flags2; -+ cmd->freq = cpu_to_le32(freq); -+ cmd->phase_delay = cpu_to_le32(phase_delay); -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_get_input_pin_cfg - get input pin config -+ * @hw: pointer to the HW struct -+ * @input_idx: Input index -+ * @status: Pin status -+ * @type: Pin type -+ * @flags1: Input flags -+ * @flags2: Input flags -+ * @freq: Frequency in Hz -+ * @phase_delay: Delay in ps -+ * -+ * Get CGU input config (0x0C63) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type, -+ u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay) -+{ -+ struct ice_aqc_get_cgu_input_config *cmd; -+ struct ice_aq_desc desc; -+ int ret; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_input_config); -+ cmd = &desc.params.get_cgu_input_config; -+ cmd->input_idx = input_idx; -+ -+ ret = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!ret) { -+ if (status) -+ *status = cmd->status; -+ if (type) -+ *type = cmd->type; -+ if (flags1) -+ *flags1 = cmd->flags1; -+ if (flags2) -+ *flags2 = cmd->flags2; -+ if (freq) -+ *freq = le32_to_cpu(cmd->freq); -+ if (phase_delay) -+ *phase_delay = le32_to_cpu(cmd->phase_delay); -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_aq_set_output_pin_cfg - set output pin config -+ * @hw: pointer to the HW struct -+ * @output_idx: Output index -+ * @flags: Output flags -+ * @src_sel: Index of DPLL block -+ * @freq: Output frequency -+ * @phase_delay: Output phase compensation -+ * -+ * Set CGU output config (0x0C64) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags, -+ u8 src_sel, u32 freq, s32 phase_delay) -+{ -+ struct ice_aqc_set_cgu_output_config *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_output_config); -+ cmd = &desc.params.set_cgu_output_config; -+ cmd->output_idx = output_idx; -+ cmd->flags = flags; -+ cmd->src_sel = src_sel; -+ cmd->freq = cpu_to_le32(freq); -+ cmd->phase_delay = cpu_to_le32(phase_delay); -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_get_output_pin_cfg - get output pin config -+ * @hw: pointer to the HW struct -+ * @output_idx: Output index -+ * @flags: Output flags -+ * @src_sel: Internal DPLL source -+ * @freq: Output frequency -+ * @src_freq: Source frequency -+ * -+ * Get CGU output config (0x0C65) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 *flags, -+ u8 *src_sel, u32 *freq, u32 *src_freq) -+{ -+ struct ice_aqc_get_cgu_output_config *cmd; -+ struct ice_aq_desc desc; -+ int ret; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_output_config); -+ cmd = &desc.params.get_cgu_output_config; -+ cmd->output_idx = output_idx; -+ -+ ret = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!ret) { -+ if (flags) -+ *flags = cmd->flags; -+ if (src_sel) -+ *src_sel = cmd->src_sel; -+ if (freq) -+ *freq = le32_to_cpu(cmd->freq); -+ if (src_freq) -+ *src_freq = le32_to_cpu(cmd->src_freq); -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_aq_get_cgu_dpll_status - get dpll status -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_state: Reference clock state -+ * @config: current DPLL config -+ * @dpll_state: current DPLL state -+ * @phase_offset: Phase offset in ns -+ * @eec_mode: EEC_mode -+ * -+ * Get CGU DPLL status (0x0C66) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, -+ u8 *dpll_state, u8 *config, s64 *phase_offset, -+ u8 *eec_mode) -+{ -+ struct ice_aqc_get_cgu_dpll_status *cmd; -+ const s64 nsec_per_psec = 1000LL; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_dpll_status); -+ cmd = &desc.params.get_cgu_dpll_status; -+ cmd->dpll_num = dpll_num; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) { -+ *ref_state = cmd->ref_state; -+ *dpll_state = cmd->dpll_state; -+ *config = cmd->config; -+ *phase_offset = le32_to_cpu(cmd->phase_offset_h); -+ *phase_offset <<= 32; -+ *phase_offset += le32_to_cpu(cmd->phase_offset_l); -+ *phase_offset = div64_s64(sign_extend64(*phase_offset, 47), -+ nsec_per_psec); -+ *eec_mode = cmd->eec_mode; -+ } -+ -+ return status; -+} -+ -+/** -+ * ice_aq_set_cgu_dpll_config - set dpll config -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_state: Reference clock state -+ * @config: DPLL config -+ * @eec_mode: EEC mode -+ * -+ * Set CGU DPLL config (0x0C67) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_cgu_dpll_config(struct ice_hw *hw, u8 dpll_num, u8 ref_state, -+ u8 config, u8 eec_mode) -+{ -+ struct ice_aqc_set_cgu_dpll_config *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_dpll_config); -+ cmd = &desc.params.set_cgu_dpll_config; -+ cmd->dpll_num = dpll_num; -+ cmd->ref_state = ref_state; -+ cmd->config = config; -+ cmd->eec_mode = eec_mode; -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_set_cgu_ref_prio - set input reference priority -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_idx: Reference pin index -+ * @ref_priority: Reference input priority -+ * -+ * Set CGU reference priority (0x0C68) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 ref_priority) -+{ -+ struct ice_aqc_set_cgu_ref_prio *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_ref_prio); -+ cmd = &desc.params.set_cgu_ref_prio; -+ cmd->dpll_num = dpll_num; -+ cmd->ref_idx = ref_idx; -+ cmd->ref_priority = ref_priority; -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_get_cgu_ref_prio - get input reference priority -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_idx: Reference pin index -+ * @ref_prio: Reference input priority -+ * -+ * Get CGU reference priority (0x0C69) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 *ref_prio) -+{ -+ struct ice_aqc_get_cgu_ref_prio *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_ref_prio); -+ cmd = &desc.params.get_cgu_ref_prio; -+ cmd->dpll_num = dpll_num; -+ cmd->ref_idx = ref_idx; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) -+ *ref_prio = cmd->ref_priority; -+ -+ return status; -+} -+ -+/** -+ * ice_aq_get_cgu_info - get cgu info -+ * @hw: pointer to the HW struct -+ * @cgu_id: CGU ID -+ * @cgu_cfg_ver: CGU config version -+ * @cgu_fw_ver: CGU firmware version -+ * -+ * Get CGU info (0x0C6A) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_info(struct ice_hw *hw, u32 *cgu_id, u32 *cgu_cfg_ver, -+ u32 *cgu_fw_ver) -+{ -+ struct ice_aqc_get_cgu_info *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_info); -+ cmd = &desc.params.get_cgu_info; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) { -+ *cgu_id = le32_to_cpu(cmd->cgu_id); -+ *cgu_cfg_ver = le32_to_cpu(cmd->cgu_cfg_ver); -+ *cgu_fw_ver = le32_to_cpu(cmd->cgu_fw_ver); -+ } -+ -+ return status; -+} -+ -+/** -+ * ice_aq_set_phy_rec_clk_out - set RCLK phy out -+ * @hw: pointer to the HW struct -+ * @phy_output: PHY reference clock output pin -+ * @enable: GPIO state to be applied -+ * @freq: PHY output frequency -+ * -+ * Set phy recovered clock as reference (0x0630) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, -+ u32 *freq) -+{ -+ struct ice_aqc_set_phy_rec_clk_out *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_rec_clk_out); -+ cmd = &desc.params.set_phy_rec_clk_out; -+ cmd->phy_output = phy_output; -+ cmd->port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; -+ cmd->flags = enable & ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN; -+ cmd->freq = cpu_to_le32(*freq); -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) -+ *freq = le32_to_cpu(cmd->freq); -+ -+ return status; -+} -+ -+/** -+ * ice_aq_get_phy_rec_clk_out - get phy recovered signal info -+ * @hw: pointer to the HW struct -+ * @phy_output: PHY reference clock output pin -+ * @port_num: Port number -+ * @flags: PHY flags -+ * @node_handle: PHY output frequency -+ * -+ * Get PHY recovered clock output info (0x0631) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, u8 *port_num, -+ u8 *flags, u16 *node_handle) -+{ -+ struct ice_aqc_get_phy_rec_clk_out *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_rec_clk_out); -+ cmd = &desc.params.get_phy_rec_clk_out; -+ cmd->phy_output = *phy_output; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) { -+ *phy_output = cmd->phy_output; -+ if (port_num) -+ *port_num = cmd->port_num; -+ if (flags) -+ *flags = cmd->flags; -+ if (node_handle) -+ *node_handle = le16_to_cpu(cmd->node_handle); -+ } -+ -+ return status; -+} -+ - /** - * ice_replay_pre_init - replay pre initialization - * @hw: pointer to the HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 226b81f97a92..74e44b450de4 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -94,6 +94,12 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, - struct ice_sq_cd *cd); - bool ice_is_pf_c827(struct ice_hw *hw); - int -+ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -+ u16 *node_handle); -+int -+ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, -+ u8 *node_part_number, u16 *node_handle); -+int - ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, - enum ice_adminq_opc opc, struct ice_sq_cd *cd); - int -@@ -196,6 +202,44 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf); - struct ice_q_ctx * - ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); - int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in); -+int -+ice_aq_get_cgu_abilities(struct ice_hw *hw, -+ struct ice_aqc_get_cgu_abilities *abilities); -+int -+ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2, -+ u32 freq, s32 phase_delay); -+int -+ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type, -+ u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay); -+int -+ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags, -+ u8 src_sel, u32 freq, s32 phase_delay); -+int -+ice_aq_get_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 *flags, -+ u8 *src_sel, u32 *freq, u32 *src_freq); -+int -+ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, -+ u8 *dpll_state, u8 *config, s64 *phase_offset, -+ u8 *eec_mode); -+int -+ice_aq_set_cgu_dpll_config(struct ice_hw *hw, u8 dpll_num, u8 ref_state, -+ u8 config, u8 eec_mode); -+int -+ice_aq_set_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 ref_priority); -+int -+ice_aq_get_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 *ref_prio); -+int -+ice_aq_get_cgu_info(struct ice_hw *hw, u32 *cgu_id, u32 *cgu_cfg_ver, -+ u32 *cgu_fw_ver); -+ -+int -+ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, -+ u32 *freq); -+int -+ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, u8 *port_num, -+ u8 *flags, u16 *node_handle); - void - ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, - u64 *prev_stat, u64 *cur_stat); -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 13ca3342a0ce..2847fc17d224 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4003,13 +4003,22 @@ void ice_init_feature_support(struct ice_pf *pf) - case ICE_DEV_ID_E810C_BACKPLANE: - case ICE_DEV_ID_E810C_QSFP: - case ICE_DEV_ID_E810C_SFP: -+ case ICE_DEV_ID_E810_XXV_BACKPLANE: -+ case ICE_DEV_ID_E810_XXV_QSFP: -+ case ICE_DEV_ID_E810_XXV_SFP: - ice_set_feature_support(pf, ICE_F_DSCP); - ice_set_feature_support(pf, ICE_F_PTP_EXTTS); -- if (ice_is_e810t(&pf->hw)) { -+ if (ice_is_phy_rclk_present(&pf->hw)) -+ ice_set_feature_support(pf, ICE_F_PHY_RCLK); -+ /* If we don't own the timer - don't enable other caps */ -+ if (!pf->hw.func_caps.ts_func_info.src_tmr_owned) -+ break; -+ if (ice_is_cgu_present(&pf->hw)) -+ ice_set_feature_support(pf, ICE_F_CGU); -+ if (ice_is_clock_mux_present_e810t(&pf->hw)) - ice_set_feature_support(pf, ICE_F_SMA_CTRL); -- if (ice_gnss_is_gps_present(&pf->hw)) -- ice_set_feature_support(pf, ICE_F_GNSS); -- } -+ if (ice_gnss_is_gps_present(&pf->hw)) -+ ice_set_feature_support(pf, ICE_F_GNSS); - break; - default: - break; -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index f818dd215c05..00ddf37296cc 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -7,6 +7,132 @@ - #include "ice_ptp_consts.h" - #include "ice_cgu_regs.h" - -+static struct dpll_pin_frequency ice_cgu_pin_freq_common[] = { -+ DPLL_PIN_FREQUENCY_1PPS, -+ DPLL_PIN_FREQUENCY_10MHZ, -+}; -+ -+static struct dpll_pin_frequency ice_cgu_pin_freq_1_hz[] = { -+ DPLL_PIN_FREQUENCY_1PPS, -+}; -+ -+static struct dpll_pin_frequency ice_cgu_pin_freq_10_mhz[] = { -+ DPLL_PIN_FREQUENCY_10MHZ, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_sfp_cgu_inputs[] = { -+ { "CVL-SDP22", ZL_REF0P, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "CVL-SDP20", ZL_REF0N, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "C827_0-RCLKA", ZL_REF1P, DPLL_PIN_TYPE_MUX, 0, }, -+ { "C827_0-RCLKB", ZL_REF1N, DPLL_PIN_TYPE_MUX, 0, }, -+ { "SMA1", ZL_REF3P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "SMA2/U.FL2", ZL_REF3N, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "GNSS-1PPS", ZL_REF4P, DPLL_PIN_TYPE_GNSS, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "OCXO", ZL_REF4N, DPLL_PIN_TYPE_INT_OSCILLATOR, 0, }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_qsfp_cgu_inputs[] = { -+ { "CVL-SDP22", ZL_REF0P, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "CVL-SDP20", ZL_REF0N, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "C827_0-RCLKA", ZL_REF1P, DPLL_PIN_TYPE_MUX, }, -+ { "C827_0-RCLKB", ZL_REF1N, DPLL_PIN_TYPE_MUX, }, -+ { "C827_1-RCLKA", ZL_REF2P, DPLL_PIN_TYPE_MUX, }, -+ { "C827_1-RCLKB", ZL_REF2N, DPLL_PIN_TYPE_MUX, }, -+ { "SMA1", ZL_REF3P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "SMA2/U.FL2", ZL_REF3N, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "GNSS-1PPS", ZL_REF4P, DPLL_PIN_TYPE_GNSS, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "OCXO", ZL_REF4N, DPLL_PIN_TYPE_INT_OSCILLATOR, }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_sfp_cgu_outputs[] = { -+ { "REF-SMA1", ZL_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "REF-SMA2/U.FL2", ZL_OUT1, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "PHY-CLK", ZL_OUT2, DPLL_PIN_TYPE_SYNCE_ETH_PORT, }, -+ { "MAC-CLK", ZL_OUT3, DPLL_PIN_TYPE_SYNCE_ETH_PORT, }, -+ { "CVL-SDP21", ZL_OUT4, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "CVL-SDP23", ZL_OUT5, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_qsfp_cgu_outputs[] = { -+ { "REF-SMA1", ZL_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "REF-SMA2/U.FL2", ZL_OUT1, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "PHY-CLK", ZL_OUT2, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "PHY2-CLK", ZL_OUT3, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "MAC-CLK", ZL_OUT4, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "CVL-SDP21", ZL_OUT5, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "CVL-SDP23", ZL_OUT6, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_si_cgu_inputs[] = { -+ { "NONE", SI_REF0P, 0, 0 }, -+ { "NONE", SI_REF0N, 0, 0 }, -+ { "SYNCE0_DP", SI_REF1P, DPLL_PIN_TYPE_MUX, 0 }, -+ { "SYNCE0_DN", SI_REF1N, DPLL_PIN_TYPE_MUX, 0 }, -+ { "EXT_CLK_SYNC", SI_REF2P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "NONE", SI_REF2N, 0, 0 }, -+ { "EXT_PPS_OUT", SI_REF3, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "INT_PPS_OUT", SI_REF4, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_si_cgu_outputs[] = { -+ { "1588-TIME_SYNC", SI_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "PHY-CLK", SI_OUT1, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "10MHZ-SMA2", SI_OUT2, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_10_mhz), ice_cgu_pin_freq_10_mhz }, -+ { "PPS-SMA1", SI_OUT3, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_zl_cgu_inputs[] = { -+ { "NONE", ZL_REF0P, 0, 0 }, -+ { "INT_PPS_OUT", ZL_REF0N, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "SYNCE0_DP", ZL_REF1P, DPLL_PIN_TYPE_MUX, 0 }, -+ { "SYNCE0_DN", ZL_REF1N, DPLL_PIN_TYPE_MUX, 0 }, -+ { "NONE", ZL_REF2P, 0, 0 }, -+ { "NONE", ZL_REF2N, 0, 0 }, -+ { "EXT_CLK_SYNC", ZL_REF3P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "NONE", ZL_REF3N, 0, 0 }, -+ { "EXT_PPS_OUT", ZL_REF4P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "OCXO", ZL_REF4N, DPLL_PIN_TYPE_INT_OSCILLATOR, 0 }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_zl_cgu_outputs[] = { -+ { "PPS-SMA1", ZL_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "10MHZ-SMA2", ZL_OUT1, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_10_mhz), ice_cgu_pin_freq_10_mhz }, -+ { "PHY-CLK", ZL_OUT2, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "1588-TIME_REF", ZL_OUT3, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "CPK-TIME_SYNC", ZL_OUT4, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "NONE", ZL_OUT5, 0, 0 }, -+}; -+ - /* Low level functions for interacting with and managing the device clock used - * for the Precision Time Protocol. - * -@@ -3353,6 +3479,90 @@ int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - return ice_clear_phy_tstamp_e822(hw, block, idx); - } - -+/** -+ * ice_is_phy_rclk_present - check recovered clk presence -+ * @hw: pointer to the hw struct -+ * -+ * Check if the PHY Recovered Clock device is present in the netlist -+ * Return: -+ * * true - device found in netlist -+ * * false - device not found -+ */ -+bool ice_is_phy_rclk_present(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && -+ ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_is_clock_mux_present_e810t -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Multiplexer device is present in the netlist -+ * Return: -+ * * true - device found in netlist -+ * * false - device not found -+ */ -+bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, -+ NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_get_pf_c827_idx - find and return the C827 index for the current pf -+ * @hw: pointer to the hw struct -+ * @idx: index of the found C827 PHY -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) -+{ -+ struct ice_aqc_get_link_topo cmd; -+ u8 node_part_number; -+ u16 node_handle; -+ int status; -+ u8 ctx; -+ -+ if (hw->mac_type != ICE_MAC_E810) -+ return -ENODEV; -+ -+ if (hw->device_id != ICE_DEV_ID_E810C_QSFP) { -+ *idx = C827_0; -+ return 0; -+ } -+ -+ memset(&cmd, 0, sizeof(cmd)); -+ -+ ctx = ICE_AQC_LINK_TOPO_NODE_TYPE_PHY << ICE_AQC_LINK_TOPO_NODE_TYPE_S; -+ ctx |= ICE_AQC_LINK_TOPO_NODE_CTX_PORT << ICE_AQC_LINK_TOPO_NODE_CTX_S; -+ cmd.addr.topo_params.node_type_ctx = ctx; -+ -+ status = ice_aq_get_netlist_node(hw, &cmd, &node_part_number, -+ &node_handle); -+ if (status || node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_C827) -+ return -ENOENT; -+ -+ if (node_handle == E810C_QSFP_C827_0_HANDLE) -+ *idx = C827_0; -+ else if (node_handle == E810C_QSFP_C827_1_HANDLE) -+ *idx = C827_1; -+ else -+ return -EIO; -+ -+ return 0; -+} -+ - /** - * ice_ptp_reset_ts_memory - Reset timestamp memory for all blocks - * @hw: pointer to the HW struct -@@ -3407,3 +3617,323 @@ int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - return ice_get_phy_tx_tstamp_ready_e822(hw, block, - tstamp_ready); - } -+ -+/** -+ * ice_is_cgu_present - check for CGU presence -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Generation Unit (CGU) device is present in the netlist -+ * Return: -+ * * true - cgu is present -+ * * false - cgu is not present -+ */ -+bool ice_is_cgu_present(struct ice_hw *hw) -+{ -+ if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; -+ return true; -+ } else if (!ice_find_netlist_node(hw, -+ ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; -+ return true; -+ } -+ -+ return false; -+} -+ -+/** -+ * ice_cgu_get_pin_desc_e823 - get pin description array -+ * @hw: pointer to the hw struct -+ * @input: if request is done against input or output pin -+ * @size: number of inputs/outputs -+ * -+ * Return: pointer to pin description array associated to given hw. -+ */ -+static const struct ice_cgu_pin_desc * -+ice_cgu_get_pin_desc_e823(struct ice_hw *hw, bool input, int *size) -+{ -+ static const struct ice_cgu_pin_desc *t; -+ -+ if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032) { -+ if (input) { -+ t = ice_e823_zl_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e823_zl_cgu_inputs); -+ } else { -+ t = ice_e823_zl_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e823_zl_cgu_outputs); -+ } -+ } else if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384) { -+ if (input) { -+ t = ice_e823_si_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e823_si_cgu_inputs); -+ } else { -+ t = ice_e823_si_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e823_si_cgu_outputs); -+ } -+ } else { -+ t = NULL; -+ *size = 0; -+ } -+ -+ return t; -+} -+ -+/** -+ * ice_cgu_get_pin_desc - get pin description array -+ * @hw: pointer to the hw struct -+ * @input: if request is done against input or output pins -+ * @size: size of array returned by function -+ * -+ * Return: pointer to pin description array associated to given hw. -+ */ -+static const struct ice_cgu_pin_desc * -+ice_cgu_get_pin_desc(struct ice_hw *hw, bool input, int *size) -+{ -+ const struct ice_cgu_pin_desc *t = NULL; -+ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E810C_SFP: -+ if (input) { -+ t = ice_e810t_sfp_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e810t_sfp_cgu_inputs); -+ } else { -+ t = ice_e810t_sfp_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e810t_sfp_cgu_outputs); -+ } -+ break; -+ case ICE_DEV_ID_E810C_QSFP: -+ if (input) { -+ t = ice_e810t_qsfp_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e810t_qsfp_cgu_inputs); -+ } else { -+ t = ice_e810t_qsfp_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e810t_qsfp_cgu_outputs); -+ } -+ break; -+ case ICE_DEV_ID_E823L_10G_BASE_T: -+ case ICE_DEV_ID_E823L_1GBE: -+ case ICE_DEV_ID_E823L_BACKPLANE: -+ case ICE_DEV_ID_E823L_QSFP: -+ case ICE_DEV_ID_E823L_SFP: -+ case ICE_DEV_ID_E823C_10G_BASE_T: -+ case ICE_DEV_ID_E823C_BACKPLANE: -+ case ICE_DEV_ID_E823C_QSFP: -+ case ICE_DEV_ID_E823C_SFP: -+ case ICE_DEV_ID_E823C_SGMII: -+ t = ice_cgu_get_pin_desc_e823(hw, input, size); -+ break; -+ default: -+ break; -+ } -+ -+ return t; -+} -+ -+/** -+ * ice_cgu_get_pin_type - get pin's type -+ * @hw: pointer to the hw struct -+ * @pin: pin index -+ * @input: if request is done against input or output pin -+ * -+ * Return: type of a pin. -+ */ -+enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input) -+{ -+ const struct ice_cgu_pin_desc *t; -+ int t_size; -+ -+ t = ice_cgu_get_pin_desc(hw, input, &t_size); -+ -+ if (!t) -+ return 0; -+ -+ if (pin >= t_size) -+ return 0; -+ -+ return t[pin].type; -+} -+ -+/** -+ * ice_cgu_get_pin_freq_supp - get pin's supported frequency -+ * @hw: pointer to the hw struct -+ * @pin: pin index -+ * @input: if request is done against input or output pin -+ * @num: output number of supported frequencies -+ * -+ * Get frequency supported number and array of supported frequencies. -+ * -+ * Return: array of supported frequencies for given pin. -+ */ -+struct dpll_pin_frequency * -+ice_cgu_get_pin_freq_supp(struct ice_hw *hw, u8 pin, bool input, u8 *num) -+{ -+ const struct ice_cgu_pin_desc *t; -+ int t_size; -+ -+ *num = 0; -+ t = ice_cgu_get_pin_desc(hw, input, &t_size); -+ if (!t) -+ return NULL; -+ if (pin >= t_size) -+ return NULL; -+ *num = t[pin].freq_supp_num; -+ -+ return t[pin].freq_supp; -+} -+ -+/** -+ * ice_cgu_get_pin_name - get pin's name -+ * @hw: pointer to the hw struct -+ * @pin: pin index -+ * @input: if request is done against input or output pin -+ * -+ * Return: -+ * * null terminated char array with name -+ * * NULL in case of failure -+ */ -+const char *ice_cgu_get_pin_name(struct ice_hw *hw, u8 pin, bool input) -+{ -+ const struct ice_cgu_pin_desc *t; -+ int t_size; -+ -+ t = ice_cgu_get_pin_desc(hw, input, &t_size); -+ -+ if (!t) -+ return NULL; -+ -+ if (pin >= t_size) -+ return NULL; -+ -+ return t[pin].name; -+} -+ -+/** -+ * ice_get_cgu_state - get the state of the DPLL -+ * @hw: pointer to the hw struct -+ * @dpll_idx: Index of internal DPLL unit -+ * @last_dpll_state: last known state of DPLL -+ * @pin: pointer to a buffer for returning currently active pin -+ * @ref_state: reference clock state -+ * @eec_mode: eec mode of the DPLL -+ * @phase_offset: pointer to a buffer for returning phase offset -+ * @dpll_state: state of the DPLL (output) -+ * -+ * This function will read the state of the DPLL(dpll_idx). Non-null -+ * 'pin', 'ref_state', 'eec_mode' and 'phase_offset' parameters are used to -+ * retrieve currently active pin, state, mode and phase_offset respectively. -+ * -+ * Return: state of the DPLL -+ */ -+int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, -+ enum dpll_lock_status last_dpll_state, u8 *pin, -+ u8 *ref_state, u8 *eec_mode, s64 *phase_offset, -+ enum dpll_lock_status *dpll_state) -+{ -+ u8 hw_ref_state, hw_dpll_state, hw_eec_mode, hw_config; -+ s64 hw_phase_offset; -+ int status; -+ -+ status = ice_aq_get_cgu_dpll_status(hw, dpll_idx, &hw_ref_state, -+ &hw_dpll_state, &hw_config, -+ &hw_phase_offset, &hw_eec_mode); -+ if (status) -+ return status; -+ -+ if (pin) -+ /* current ref pin in dpll_state_refsel_status_X register */ -+ *pin = hw_config & ICE_AQC_GET_CGU_DPLL_CONFIG_CLK_REF_SEL; -+ if (phase_offset) -+ *phase_offset = hw_phase_offset; -+ if (ref_state) -+ *ref_state = hw_ref_state; -+ if (eec_mode) -+ *eec_mode = hw_eec_mode; -+ if (!dpll_state) -+ return 0; -+ -+ /* According to ZL DPLL documentation, once state reach LOCKED_HO_ACQ -+ * it would never return to FREERUN. This aligns to ITU-T G.781 -+ * Recommendation. We cannot report HOLDOVER as HO memory is cleared -+ * while switching to another reference. -+ * Only for situations where previous state was either: "LOCKED without -+ * HO_ACQ" or "HOLDOVER" we actually back to FREERUN. -+ */ -+ if (hw_dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK) { -+ if (hw_dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY) -+ *dpll_state = DPLL_LOCK_STATUS_LOCKED_HO_ACQ; -+ else -+ *dpll_state = DPLL_LOCK_STATUS_LOCKED; -+ } else if (last_dpll_state == DPLL_LOCK_STATUS_LOCKED_HO_ACQ || -+ last_dpll_state == DPLL_LOCK_STATUS_HOLDOVER) { -+ *dpll_state = DPLL_LOCK_STATUS_HOLDOVER; -+ } else { -+ *dpll_state = DPLL_LOCK_STATUS_UNLOCKED; -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_get_cgu_rclk_pin_info - get info on available recovered clock pins -+ * @hw: pointer to the hw struct -+ * @base_idx: returns index of first recovered clock pin on device -+ * @pin_num: returns number of recovered clock pins available on device -+ * -+ * Based on hw provide caller info about recovery clock pins available on the -+ * board. -+ * -+ * Return: -+ * * 0 - success, information is valid -+ * * negative - failure, information is not valid -+ */ -+int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) -+{ -+ u8 phy_idx; -+ int ret; -+ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E810C_SFP: -+ case ICE_DEV_ID_E810C_QSFP: -+ -+ ret = ice_get_pf_c827_idx(hw, &phy_idx); -+ if (ret) -+ return ret; -+ *base_idx = E810T_CGU_INPUT_C827(phy_idx, ICE_RCLKA_PIN); -+ *pin_num = ICE_E810_RCLK_PINS_NUM; -+ ret = 0; -+ break; -+ case ICE_DEV_ID_E823L_10G_BASE_T: -+ case ICE_DEV_ID_E823L_1GBE: -+ case ICE_DEV_ID_E823L_BACKPLANE: -+ case ICE_DEV_ID_E823L_QSFP: -+ case ICE_DEV_ID_E823L_SFP: -+ case ICE_DEV_ID_E823C_10G_BASE_T: -+ case ICE_DEV_ID_E823C_BACKPLANE: -+ case ICE_DEV_ID_E823C_QSFP: -+ case ICE_DEV_ID_E823C_SFP: -+ case ICE_DEV_ID_E823C_SGMII: -+ *pin_num = ICE_E822_RCLK_PINS_NUM; -+ ret = 0; -+ if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032) -+ *base_idx = ZL_REF1P; -+ else if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384) -+ *base_idx = SI_REF1P; -+ else -+ ret = -ENODEV; -+ -+ break; -+ default: -+ ret = -ENODEV; -+ break; -+ } -+ -+ return ret; -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 9aa10b0426fd..594cc6875a95 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -3,6 +3,7 @@ - - #ifndef _ICE_PTP_HW_H_ - #define _ICE_PTP_HW_H_ -+#include - - enum ice_ptp_tmr_cmd { - INIT_TIME, -@@ -110,6 +111,77 @@ struct ice_cgu_pll_params_e822 { - u32 post_pll_div; - }; - -+#define E810C_QSFP_C827_0_HANDLE 2 -+#define E810C_QSFP_C827_1_HANDLE 3 -+enum ice_e810_c827_idx { -+ C827_0, -+ C827_1 -+}; -+ -+enum ice_phy_rclk_pins { -+ ICE_RCLKA_PIN = 0, /* SCL pin */ -+ ICE_RCLKB_PIN, /* SDA pin */ -+}; -+ -+#define ICE_E810_RCLK_PINS_NUM (ICE_RCLKB_PIN + 1) -+#define ICE_E822_RCLK_PINS_NUM (ICE_RCLKA_PIN + 1) -+#define E810T_CGU_INPUT_C827(_phy, _pin) ((_phy) * ICE_E810_RCLK_PINS_NUM + \ -+ (_pin) + ZL_REF1P) -+ -+enum ice_zl_cgu_in_pins { -+ ZL_REF0P = 0, -+ ZL_REF0N, -+ ZL_REF1P, -+ ZL_REF1N, -+ ZL_REF2P, -+ ZL_REF2N, -+ ZL_REF3P, -+ ZL_REF3N, -+ ZL_REF4P, -+ ZL_REF4N, -+ NUM_ZL_CGU_INPUT_PINS -+}; -+ -+enum ice_zl_cgu_out_pins { -+ ZL_OUT0 = 0, -+ ZL_OUT1, -+ ZL_OUT2, -+ ZL_OUT3, -+ ZL_OUT4, -+ ZL_OUT5, -+ ZL_OUT6, -+ NUM_ZL_CGU_OUTPUT_PINS -+}; -+ -+enum ice_si_cgu_in_pins { -+ SI_REF0P = 0, -+ SI_REF0N, -+ SI_REF1P, -+ SI_REF1N, -+ SI_REF2P, -+ SI_REF2N, -+ SI_REF3, -+ SI_REF4, -+ NUM_SI_CGU_INPUT_PINS -+}; -+ -+enum ice_si_cgu_out_pins { -+ SI_OUT0 = 0, -+ SI_OUT1, -+ SI_OUT2, -+ SI_OUT3, -+ SI_OUT4, -+ NUM_SI_CGU_OUTPUT_PINS -+}; -+ -+struct ice_cgu_pin_desc { -+ char *name; -+ u8 index; -+ enum dpll_pin_type type; -+ u32 freq_supp_num; -+ struct dpll_pin_frequency *freq_supp; -+}; -+ - extern const struct - ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ]; - -@@ -197,6 +269,20 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw); - int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); - int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); - int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data); -+bool ice_is_pca9575_present(struct ice_hw *hw); -+bool ice_is_phy_rclk_present(struct ice_hw *hw); -+bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); -+int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx); -+bool ice_is_cgu_present(struct ice_hw *hw); -+enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input); -+struct dpll_pin_frequency * -+ice_cgu_get_pin_freq_supp(struct ice_hw *hw, u8 pin, bool input, u8 *num); -+const char *ice_cgu_get_pin_name(struct ice_hw *hw, u8 pin, bool input); -+int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, -+ enum dpll_lock_status last_dpll_state, u8 *pin, -+ u8 *ref_state, u8 *eec_mode, s64 *phase_offset, -+ enum dpll_lock_status *dpll_state); -+int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - - #define PFTSYN_SEM_BYTES 4 - -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 5e353b0cbe6f..5eb778d9ae64 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -965,6 +965,7 @@ struct ice_hw { - DECLARE_BITMAP(hw_ptype, ICE_FLOW_PTYPE_MAX); - u8 dvm_ena; - u16 io_expander_handle; -+ u8 cgu_part_number; - }; - - /* Statistics collected by each port, VSI, VEB, and S-channel */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch b/kernel-rt/debian/patches/ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch deleted file mode 100644 index 28f51fc7..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch +++ /dev/null @@ -1,2132 +0,0 @@ -From 91572478afe0c6537bf7a0d52dbd7062bacbb13a Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 13 Sep 2023 21:49:41 +0100 -Subject: [PATCH 07/46] ice: implement dpll interface to control cgu - -Control over clock generation unit is required for further development -of Synchronous Ethernet feature. Interface provides ability to obtain -current state of a dpll, its sources and outputs which are pins, and -allows their configuration. - -Co-developed-by: Milena Olech -Signed-off-by: Milena Olech -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit d7999f5ea64bb10d2857b8cbfe973be373bac7c9) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/Kconfig | 1 + - drivers/net/ethernet/intel/ice/Makefile | 3 +- - drivers/net/ethernet/intel/ice/ice.h | 3 + - drivers/net/ethernet/intel/ice/ice_dpll.c | 1904 +++++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_dpll.h | 104 ++ - drivers/net/ethernet/intel/ice/ice_main.c | 6 + - 6 files changed, 2020 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/intel/ice/ice_dpll.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_dpll.h - -diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig -index 9bc0a9519899..913dcf928d15 100644 ---- a/drivers/net/ethernet/intel/Kconfig -+++ b/drivers/net/ethernet/intel/Kconfig -@@ -284,6 +284,7 @@ config ICE - select DIMLIB - select NET_DEVLINK - select PLDMFW -+ select DPLL - help - This driver supports Intel(R) Ethernet Connection E800 Series of - devices. For more information on how to identify your adapter, go -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 960277d78e09..00806ddf5bf0 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -34,7 +34,8 @@ ice-y := ice_main.o \ - ice_lag.o \ - ice_ethtool.o \ - ice_repr.o \ -- ice_tc_lib.o -+ ice_tc_lib.o \ -+ ice_dpll.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 72c296722e41..537d5939c28e 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -76,6 +76,7 @@ - #include "ice_vsi_vlan_ops.h" - #include "ice_gnss.h" - #include "ice_irq.h" -+#include "ice_dpll.h" - - extern const char ice_drv_ver[]; - #define ICE_BAR0 0 -@@ -510,6 +511,7 @@ enum ice_pf_flags { - ICE_FLAG_UNPLUG_AUX_DEV, - ICE_FLAG_MTU_CHANGED, - ICE_FLAG_GNSS, /* GNSS successfully initialized */ -+ ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ - ICE_PF_FLAGS_NBITS /* must be last */ - }; - -@@ -642,6 +644,7 @@ struct ice_pf { - #define ICE_VF_AGG_NODE_ID_START 65 - #define ICE_MAX_VF_AGG_NODES 32 - struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; -+ struct ice_dplls dplls; - }; - - extern struct workqueue_struct *ice_lag_wq; -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -new file mode 100644 -index 000000000000..1faee9cb944d ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -0,0 +1,1904 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (C) 2022, Intel Corporation. */ -+ -+#include "ice.h" -+#include "ice_lib.h" -+#include "ice_trace.h" -+#include -+ -+#define ICE_CGU_STATE_ACQ_ERR_THRESHOLD 50 -+#define ICE_DPLL_PIN_IDX_INVALID 0xff -+#define ICE_DPLL_RCLK_NUM_PER_PF 1 -+ -+/** -+ * enum ice_dpll_pin_type - enumerate ice pin types: -+ * @ICE_DPLL_PIN_INVALID: invalid pin type -+ * @ICE_DPLL_PIN_TYPE_INPUT: input pin -+ * @ICE_DPLL_PIN_TYPE_OUTPUT: output pin -+ * @ICE_DPLL_PIN_TYPE_RCLK_INPUT: recovery clock input pin -+ */ -+enum ice_dpll_pin_type { -+ ICE_DPLL_PIN_INVALID, -+ ICE_DPLL_PIN_TYPE_INPUT, -+ ICE_DPLL_PIN_TYPE_OUTPUT, -+ ICE_DPLL_PIN_TYPE_RCLK_INPUT, -+}; -+ -+static const char * const pin_type_name[] = { -+ [ICE_DPLL_PIN_TYPE_INPUT] = "input", -+ [ICE_DPLL_PIN_TYPE_OUTPUT] = "output", -+ [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input", -+}; -+ -+/** -+ * ice_dpll_pin_freq_set - set pin's frequency -+ * @pf: private board structure -+ * @pin: pointer to a pin -+ * @pin_type: type of pin being configured -+ * @freq: frequency to be set -+ * @extack: error reporting -+ * -+ * Set requested frequency on a pin. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error on AQ or wrong pin type given -+ */ -+static int -+ice_dpll_pin_freq_set(struct ice_pf *pf, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, const u32 freq, -+ struct netlink_ext_ack *extack) -+{ -+ u8 flags; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ flags = ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_FREQ; -+ ret = ice_aq_set_input_pin_cfg(&pf->hw, pin->idx, flags, -+ pin->flags[0], freq, 0); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ flags = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_FREQ; -+ ret = ice_aq_set_output_pin_cfg(&pf->hw, pin->idx, flags, -+ 0, freq, 0); -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (ret) { -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin freq:%u on pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ freq, pin->idx); -+ return ret; -+ } -+ pin->freq = freq; -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_frequency_set - wrapper for pin callback for set frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: frequency to be set -+ * @extack: error reporting -+ * @pin_type: type of pin being configured -+ * -+ * Wraps internal set frequency command on a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't set in hw -+ */ -+static int -+ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const u32 frequency, -+ struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_pin_freq_set(pf, p, pin_type, frequency, extack); -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_input_frequency_set - input pin callback for set frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: frequency to be set -+ * @extack: error reporting -+ * -+ * Wraps internal set frequency command on a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't set in hw -+ */ -+static int -+ice_dpll_input_frequency_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_set(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_output_frequency_set - output pin callback for set frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: frequency to be set -+ * @extack: error reporting -+ * -+ * Wraps internal set frequency command on a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't set in hw -+ */ -+static int -+ice_dpll_output_frequency_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_set(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_frequency_get - wrapper for pin callback for get frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: on success holds pin's frequency -+ * @extack: error reporting -+ * @pin_type: type of pin being configured -+ * -+ * Wraps internal get frequency command of a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't get from hw -+ */ -+static int -+ice_dpll_frequency_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *frequency = p->freq; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_input_frequency_get - input pin callback for get frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: on success holds pin's frequency -+ * @extack: error reporting -+ * -+ * Wraps internal get frequency command of a input pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't get from hw -+ */ -+static int -+ice_dpll_input_frequency_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_get(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_output_frequency_get - output pin callback for get frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: on success holds pin's frequency -+ * @extack: error reporting -+ * -+ * Wraps internal get frequency command of a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't get from hw -+ */ -+static int -+ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_get(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_pin_enable - enable a pin on dplls -+ * @hw: board private hw structure -+ * @pin: pointer to a pin -+ * @pin_type: type of pin being enabled -+ * @extack: error reporting -+ * -+ * Enable a pin on both dplls. Store current state in pin->flags. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - OK -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, -+ struct netlink_ext_ack *extack) -+{ -+ u8 flags = 0; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; -+ flags |= ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN; -+ ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; -+ flags |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; -+ ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0); -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to enable %s pin:%u\n", -+ ret, ice_aq_str(hw->adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_pin_disable - disable a pin on dplls -+ * @hw: board private hw structure -+ * @pin: pointer to a pin -+ * @pin_type: type of pin being disabled -+ * @extack: error reporting -+ * -+ * Disable a pin on both dplls. Store current state in pin->flags. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - OK -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_disable(struct ice_hw *hw, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, -+ struct netlink_ext_ack *extack) -+{ -+ u8 flags = 0; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; -+ ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; -+ ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0); -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to disable %s pin:%u\n", -+ ret, ice_aq_str(hw->adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_pin_state_update - update pin's state -+ * @pf: private board struct -+ * @pin: structure with pin attributes to be updated -+ * @pin_type: type of pin being updated -+ * @extack: error reporting -+ * -+ * Determine pin current state and frequency, then update struct -+ * holding the pin info. For input pin states are separated for each -+ * dpll, for rclk pins states are separated for each parent. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - OK -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, -+ struct netlink_ext_ack *extack) -+{ -+ u8 parent, port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ ret = ice_aq_get_input_pin_cfg(&pf->hw, pin->idx, NULL, NULL, -+ NULL, &pin->flags[0], -+ &pin->freq, NULL); -+ if (ret) -+ goto err; -+ if (ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN & pin->flags[0]) { -+ if (pin->pin) { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ pin->pin == pf->dplls.eec.active_input ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_SELECTABLE; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ pin->pin == pf->dplls.pps.active_input ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_SELECTABLE; -+ } else { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ DPLL_PIN_STATE_SELECTABLE; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ DPLL_PIN_STATE_SELECTABLE; -+ } -+ } else { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ } -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ ret = ice_aq_get_output_pin_cfg(&pf->hw, pin->idx, -+ &pin->flags[0], NULL, -+ &pin->freq, NULL); -+ if (ret) -+ goto err; -+ if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) -+ pin->state[0] = DPLL_PIN_STATE_CONNECTED; -+ else -+ pin->state[0] = DPLL_PIN_STATE_DISCONNECTED; -+ break; -+ case ICE_DPLL_PIN_TYPE_RCLK_INPUT: -+ for (parent = 0; parent < pf->dplls.rclk.num_parents; -+ parent++) { -+ u8 p = parent; -+ -+ ret = ice_aq_get_phy_rec_clk_out(&pf->hw, &p, -+ &port_num, -+ &pin->flags[parent], -+ NULL); -+ if (ret) -+ goto err; -+ if (ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN & -+ pin->flags[parent]) -+ pin->state[parent] = DPLL_PIN_STATE_CONNECTED; -+ else -+ pin->state[parent] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ } -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+err: -+ if (extack) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to update %s pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ else -+ dev_err_ratelimited(ice_pf_to_dev(pf), -+ "err:%d %s failed to update %s pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ return ret; -+} -+ -+/** -+ * ice_dpll_hw_input_prio_set - set input priority value in hardware -+ * @pf: board private structure -+ * @dpll: ice dpll pointer -+ * @pin: ice pin pointer -+ * @prio: priority value being set on a dpll -+ * @extack: error reporting -+ * -+ * Internal wrapper for setting the priority in the hardware. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_hw_input_prio_set(struct ice_pf *pf, struct ice_dpll *dpll, -+ struct ice_dpll_pin *pin, const u32 prio, -+ struct netlink_ext_ack *extack) -+{ -+ int ret; -+ -+ ret = ice_aq_set_cgu_ref_prio(&pf->hw, dpll->dpll_idx, pin->idx, -+ (u8)prio); -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin prio:%u on pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ prio, pin->idx); -+ else -+ dpll->input_prio[pin->idx] = prio; -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_lock_status_get - get dpll lock status callback -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @status: on success holds dpll's lock status -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback, provides dpll's lock status. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_lock_status_get(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *status = d->dpll_state; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_mode_supported - check if dpll's working mode is supported -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @mode: mode to be checked for support -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Provides information if working mode is supported -+ * by dpll. -+ * -+ * Return: -+ * * true - mode is supported -+ * * false - mode is not supported -+ */ -+static bool ice_dpll_mode_supported(const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_mode mode, -+ struct netlink_ext_ack *extack) -+{ -+ if (mode == DPLL_MODE_AUTOMATIC) -+ return true; -+ -+ return false; -+} -+ -+/** -+ * ice_dpll_mode_get - get dpll's working mode -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @mode: on success holds current working mode of dpll -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Provides working mode of dpll. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int ice_dpll_mode_get(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_mode *mode, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *mode = d->mode; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_pin_state_set - set pin's state on dpll -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @enable: if pin shalll be enabled -+ * @extack: error reporting -+ * @pin_type: type of a pin -+ * -+ * Set pin state on a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - OK or no change required -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ bool enable, struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ if (enable) -+ ret = ice_dpll_pin_enable(&pf->hw, p, pin_type, extack); -+ else -+ ret = ice_dpll_pin_disable(&pf->hw, p, pin_type, extack); -+ if (!ret) -+ ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_output_state_set - enable/disable output pin on dpll device -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: dpll being configured -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: state of pin to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Set given state on output type pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - successfully enabled mode -+ * * negative - failed to enable mode -+ */ -+static int -+ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ bool enable = state == DPLL_PIN_STATE_CONNECTED; -+ -+ return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_input_state_set - enable/disable input pin on dpll levice -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: dpll being configured -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: state of pin to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Enables given mode on input type pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - successfully enabled mode -+ * * negative - failed to enable mode -+ */ -+static int -+ice_dpll_input_state_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ bool enable = state == DPLL_PIN_STATE_SELECTABLE; -+ -+ return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_pin_state_get - set pin's state on dpll -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: on success holds state of the pin -+ * @extack: error reporting -+ * @pin_type: type of questioned pin -+ * -+ * Determine pin state set it on a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failed to get state -+ */ -+static int -+ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); -+ if (ret) -+ goto unlock; -+ if (pin_type == ICE_DPLL_PIN_TYPE_INPUT) -+ *state = p->state[d->dpll_idx]; -+ else if (pin_type == ICE_DPLL_PIN_TYPE_OUTPUT) -+ *state = p->state[0]; -+ ret = 0; -+unlock: -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_output_state_get - get output pin state on dpll device -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: on success holds state of the pin -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Check state of a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failed to get state -+ */ -+static int -+ice_dpll_output_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_state_get(pin, pin_priv, dpll, dpll_priv, state, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_input_state_get - get input pin state on dpll device -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: on success holds state of the pin -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Check state of a input pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failed to get state -+ */ -+static int -+ice_dpll_input_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_state_get(pin, pin_priv, dpll, dpll_priv, state, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_input_prio_get - get dpll's input prio -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @prio: on success - returns input priority on dpll -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting priority of a input pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_input_prio_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u32 *prio, struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *prio = d->input_prio[p->idx]; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_input_prio_set - set dpll input prio -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @prio: input priority to be set on dpll -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for setting priority of a input pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u32 prio, struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ if (prio > ICE_DPLL_PRIO_MAX) { -+ NL_SET_ERR_MSG_FMT(extack, "prio out of supported range 0-%d", -+ ICE_DPLL_PRIO_MAX); -+ return -EINVAL; -+ } -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_input_direction - callback for get input pin direction -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @direction: holds input pin direction -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting direction of a input pin. -+ * -+ * Return: -+ * * 0 - success -+ */ -+static int -+ice_dpll_input_direction(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ *direction = DPLL_PIN_DIRECTION_INPUT; -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_output_direction - callback for get output pin direction -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @direction: holds output pin direction -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting direction of an output pin. -+ * -+ * Return: -+ * * 0 - success -+ */ -+static int -+ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ *direction = DPLL_PIN_DIRECTION_OUTPUT; -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_rclk_state_on_pin_set - set a state on rclk pin -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @parent_pin: pin parent pointer -+ * @parent_pin_priv: parent private data pointer passed on pin registration -+ * @state: state to be set on pin -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback, set a state of a rclk pin on a parent pin -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv, *parent = parent_pin_priv; -+ bool enable = state == DPLL_PIN_STATE_CONNECTED; -+ struct ice_pf *pf = p->pf; -+ int ret = -EINVAL; -+ u32 hw_idx; -+ -+ mutex_lock(&pf->dplls.lock); -+ hw_idx = parent->idx - pf->dplls.base_rclk_idx; -+ if (hw_idx >= pf->dplls.num_inputs) -+ goto unlock; -+ -+ if ((enable && p->state[hw_idx] == DPLL_PIN_STATE_CONNECTED) || -+ (!enable && p->state[hw_idx] == DPLL_PIN_STATE_DISCONNECTED)) { -+ NL_SET_ERR_MSG_FMT(extack, -+ "pin:%u state:%u on parent:%u already set", -+ p->idx, state, parent->idx); -+ goto unlock; -+ } -+ ret = ice_aq_set_phy_rec_clk_out(&pf->hw, hw_idx, enable, -+ &p->freq); -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin state:%u for pin:%u on parent:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ state, p->idx, parent->idx); -+unlock: -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_rclk_state_on_pin_get - get a state of rclk pin -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @parent_pin: pin parent pointer -+ * @parent_pin_priv: pin parent priv data pointer passed on pin registration -+ * @state: on success holds pin state on parent pin -+ * @extack: error reporting -+ * -+ * dpll subsystem callback, get a state of a recovered clock pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv, *parent = parent_pin_priv; -+ struct ice_pf *pf = p->pf; -+ int ret = -EINVAL; -+ u32 hw_idx; -+ -+ mutex_lock(&pf->dplls.lock); -+ hw_idx = parent->idx - pf->dplls.base_rclk_idx; -+ if (hw_idx >= pf->dplls.num_inputs) -+ goto unlock; -+ -+ ret = ice_dpll_pin_state_update(pf, p, ICE_DPLL_PIN_TYPE_RCLK_INPUT, -+ extack); -+ if (ret) -+ goto unlock; -+ -+ *state = p->state[hw_idx]; -+ ret = 0; -+unlock: -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+static const struct dpll_pin_ops ice_dpll_rclk_ops = { -+ .state_on_pin_set = ice_dpll_rclk_state_on_pin_set, -+ .state_on_pin_get = ice_dpll_rclk_state_on_pin_get, -+ .direction_get = ice_dpll_input_direction, -+}; -+ -+static const struct dpll_pin_ops ice_dpll_input_ops = { -+ .frequency_get = ice_dpll_input_frequency_get, -+ .frequency_set = ice_dpll_input_frequency_set, -+ .state_on_dpll_get = ice_dpll_input_state_get, -+ .state_on_dpll_set = ice_dpll_input_state_set, -+ .prio_get = ice_dpll_input_prio_get, -+ .prio_set = ice_dpll_input_prio_set, -+ .direction_get = ice_dpll_input_direction, -+}; -+ -+static const struct dpll_pin_ops ice_dpll_output_ops = { -+ .frequency_get = ice_dpll_output_frequency_get, -+ .frequency_set = ice_dpll_output_frequency_set, -+ .state_on_dpll_get = ice_dpll_output_state_get, -+ .state_on_dpll_set = ice_dpll_output_state_set, -+ .direction_get = ice_dpll_output_direction, -+}; -+ -+static const struct dpll_device_ops ice_dpll_ops = { -+ .lock_status_get = ice_dpll_lock_status_get, -+ .mode_supported = ice_dpll_mode_supported, -+ .mode_get = ice_dpll_mode_get, -+}; -+ -+/** -+ * ice_generate_clock_id - generates unique clock_id for registering dpll. -+ * @pf: board private structure -+ * -+ * Generates unique (per board) clock_id for allocation and search of dpll -+ * devices in Linux dpll subsystem. -+ * -+ * Return: generated clock id for the board -+ */ -+static u64 ice_generate_clock_id(struct ice_pf *pf) -+{ -+ return pci_get_dsn(pf->pdev); -+} -+ -+/** -+ * ice_dpll_notify_changes - notify dpll subsystem about changes -+ * @d: pointer do dpll -+ * -+ * Once change detected appropriate event is submitted to the dpll subsystem. -+ */ -+static void ice_dpll_notify_changes(struct ice_dpll *d) -+{ -+ if (d->prev_dpll_state != d->dpll_state) { -+ d->prev_dpll_state = d->dpll_state; -+ dpll_device_change_ntf(d->dpll); -+ } -+ if (d->prev_input != d->active_input) { -+ if (d->prev_input) -+ dpll_pin_change_ntf(d->prev_input); -+ d->prev_input = d->active_input; -+ if (d->active_input) -+ dpll_pin_change_ntf(d->active_input); -+ } -+} -+ -+/** -+ * ice_dpll_update_state - update dpll state -+ * @pf: pf private structure -+ * @d: pointer to queried dpll device -+ * @init: if function called on initialization of ice dpll -+ * -+ * Poll current state of dpll from hw and update ice_dpll struct. -+ * -+ * Context: Called by kworker under pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - AQ failure -+ */ -+static int -+ice_dpll_update_state(struct ice_pf *pf, struct ice_dpll *d, bool init) -+{ -+ struct ice_dpll_pin *p = NULL; -+ int ret; -+ -+ ret = ice_get_cgu_state(&pf->hw, d->dpll_idx, d->prev_dpll_state, -+ &d->input_idx, &d->ref_state, &d->eec_mode, -+ &d->phase_shift, &d->dpll_state); -+ -+ dev_dbg(ice_pf_to_dev(pf), -+ "update dpll=%d, prev_src_idx:%u, src_idx:%u, state:%d, prev:%d mode:%d\n", -+ d->dpll_idx, d->prev_input_idx, d->input_idx, -+ d->dpll_state, d->prev_dpll_state, d->mode); -+ if (ret) { -+ dev_err(ice_pf_to_dev(pf), -+ "update dpll=%d state failed, ret=%d %s\n", -+ d->dpll_idx, ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status)); -+ return ret; -+ } -+ if (init) { -+ if (d->dpll_state == DPLL_LOCK_STATUS_LOCKED || -+ d->dpll_state == DPLL_LOCK_STATUS_LOCKED_HO_ACQ) -+ d->active_input = pf->dplls.inputs[d->input_idx].pin; -+ p = &pf->dplls.inputs[d->input_idx]; -+ return ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, NULL); -+ } -+ if (d->dpll_state == DPLL_LOCK_STATUS_HOLDOVER || -+ d->dpll_state == DPLL_LOCK_STATUS_UNLOCKED) { -+ d->active_input = NULL; -+ if (d->input_idx != ICE_DPLL_PIN_IDX_INVALID) -+ p = &pf->dplls.inputs[d->input_idx]; -+ d->prev_input_idx = ICE_DPLL_PIN_IDX_INVALID; -+ d->input_idx = ICE_DPLL_PIN_IDX_INVALID; -+ if (!p) -+ return 0; -+ ret = ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, NULL); -+ } else if (d->input_idx != d->prev_input_idx) { -+ if (d->prev_input_idx != ICE_DPLL_PIN_IDX_INVALID) { -+ p = &pf->dplls.inputs[d->prev_input_idx]; -+ ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, -+ NULL); -+ } -+ if (d->input_idx != ICE_DPLL_PIN_IDX_INVALID) { -+ p = &pf->dplls.inputs[d->input_idx]; -+ d->active_input = p->pin; -+ ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, -+ NULL); -+ } -+ d->prev_input_idx = d->input_idx; -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_periodic_work - DPLLs periodic worker -+ * @work: pointer to kthread_work structure -+ * -+ * DPLLs periodic worker is responsible for polling state of dpll. -+ * Context: Holds pf->dplls.lock -+ */ -+static void ice_dpll_periodic_work(struct kthread_work *work) -+{ -+ struct ice_dplls *d = container_of(work, struct ice_dplls, work.work); -+ struct ice_pf *pf = container_of(d, struct ice_pf, dplls); -+ struct ice_dpll *de = &pf->dplls.eec; -+ struct ice_dpll *dp = &pf->dplls.pps; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_update_state(pf, de, false); -+ if (!ret) -+ ret = ice_dpll_update_state(pf, dp, false); -+ if (ret) { -+ d->cgu_state_acq_err_num++; -+ /* stop rescheduling this worker */ -+ if (d->cgu_state_acq_err_num > -+ ICE_CGU_STATE_ACQ_ERR_THRESHOLD) { -+ dev_err(ice_pf_to_dev(pf), -+ "EEC/PPS DPLLs periodic work disabled\n"); -+ mutex_unlock(&pf->dplls.lock); -+ return; -+ } -+ } -+ mutex_unlock(&pf->dplls.lock); -+ ice_dpll_notify_changes(de); -+ ice_dpll_notify_changes(dp); -+ -+ /* Run twice a second or reschedule if update failed */ -+ kthread_queue_delayed_work(d->kworker, &d->work, -+ ret ? msecs_to_jiffies(10) : -+ msecs_to_jiffies(500)); -+} -+ -+/** -+ * ice_dpll_release_pins - release pins resources from dpll subsystem -+ * @pins: pointer to pins array -+ * @count: number of pins -+ * -+ * Release resources of given pins array in the dpll subsystem. -+ */ -+static void ice_dpll_release_pins(struct ice_dpll_pin *pins, int count) -+{ -+ int i; -+ -+ for (i = 0; i < count; i++) -+ dpll_pin_put(pins[i].pin); -+} -+ -+/** -+ * ice_dpll_get_pins - get pins from dpll subsystem -+ * @pf: board private structure -+ * @pins: pointer to pins array -+ * @start_idx: get starts from this pin idx value -+ * @count: number of pins -+ * @clock_id: clock_id of dpll device -+ * -+ * Get pins - allocate - in dpll subsystem, store them in pin field of given -+ * pins array. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - allocation failure reason -+ */ -+static int -+ice_dpll_get_pins(struct ice_pf *pf, struct ice_dpll_pin *pins, -+ int start_idx, int count, u64 clock_id) -+{ -+ int i, ret; -+ -+ for (i = 0; i < count; i++) { -+ pins[i].pin = dpll_pin_get(clock_id, i + start_idx, THIS_MODULE, -+ &pins[i].prop); -+ if (IS_ERR(pins[i].pin)) { -+ ret = PTR_ERR(pins[i].pin); -+ goto release_pins; -+ } -+ } -+ -+ return 0; -+ -+release_pins: -+ while (--i >= 0) -+ dpll_pin_put(pins[i].pin); -+ return ret; -+} -+ -+/** -+ * ice_dpll_unregister_pins - unregister pins from a dpll -+ * @dpll: dpll device pointer -+ * @pins: pointer to pins array -+ * @ops: callback ops registered with the pins -+ * @count: number of pins -+ * -+ * Unregister pins of a given array of pins from given dpll device registered in -+ * dpll subsystem. -+ */ -+static void -+ice_dpll_unregister_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins, -+ const struct dpll_pin_ops *ops, int count) -+{ -+ int i; -+ -+ for (i = 0; i < count; i++) -+ dpll_pin_unregister(dpll, pins[i].pin, ops, &pins[i]); -+} -+ -+/** -+ * ice_dpll_register_pins - register pins with a dpll -+ * @dpll: dpll pointer to register pins with -+ * @pins: pointer to pins array -+ * @ops: callback ops registered with the pins -+ * @count: number of pins -+ * -+ * Register pins of a given array with given dpll in dpll subsystem. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - registration failure reason -+ */ -+static int -+ice_dpll_register_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins, -+ const struct dpll_pin_ops *ops, int count) -+{ -+ int ret, i; -+ -+ for (i = 0; i < count; i++) { -+ ret = dpll_pin_register(dpll, pins[i].pin, ops, &pins[i]); -+ if (ret) -+ goto unregister_pins; -+ } -+ -+ return 0; -+ -+unregister_pins: -+ while (--i >= 0) -+ dpll_pin_unregister(dpll, pins[i].pin, ops, &pins[i]); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_direct_pins - deinitialize direct pins -+ * @cgu: if cgu is present and controlled by this NIC -+ * @pins: pointer to pins array -+ * @count: number of pins -+ * @ops: callback ops registered with the pins -+ * @first: dpll device pointer -+ * @second: dpll device pointer -+ * -+ * If cgu is owned unregister pins from given dplls. -+ * Release pins resources to the dpll subsystem. -+ */ -+static void -+ice_dpll_deinit_direct_pins(bool cgu, struct ice_dpll_pin *pins, int count, -+ const struct dpll_pin_ops *ops, -+ struct dpll_device *first, -+ struct dpll_device *second) -+{ -+ if (cgu) { -+ ice_dpll_unregister_pins(first, pins, ops, count); -+ ice_dpll_unregister_pins(second, pins, ops, count); -+ } -+ ice_dpll_release_pins(pins, count); -+} -+ -+/** -+ * ice_dpll_init_direct_pins - initialize direct pins -+ * @pf: board private structure -+ * @cgu: if cgu is present and controlled by this NIC -+ * @pins: pointer to pins array -+ * @start_idx: on which index shall allocation start in dpll subsystem -+ * @count: number of pins -+ * @ops: callback ops registered with the pins -+ * @first: dpll device pointer -+ * @second: dpll device pointer -+ * -+ * Allocate directly connected pins of a given array in dpll subsystem. -+ * If cgu is owned register allocated pins with given dplls. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - registration failure reason -+ */ -+static int -+ice_dpll_init_direct_pins(struct ice_pf *pf, bool cgu, -+ struct ice_dpll_pin *pins, int start_idx, int count, -+ const struct dpll_pin_ops *ops, -+ struct dpll_device *first, struct dpll_device *second) -+{ -+ int ret; -+ -+ ret = ice_dpll_get_pins(pf, pins, start_idx, count, pf->dplls.clock_id); -+ if (ret) -+ return ret; -+ if (cgu) { -+ ret = ice_dpll_register_pins(first, pins, ops, count); -+ if (ret) -+ goto release_pins; -+ ret = ice_dpll_register_pins(second, pins, ops, count); -+ if (ret) -+ goto unregister_first; -+ } -+ -+ return 0; -+ -+unregister_first: -+ ice_dpll_unregister_pins(first, pins, ops, count); -+release_pins: -+ ice_dpll_release_pins(pins, count); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_rclk_pin - release rclk pin resources -+ * @pf: board private structure -+ * -+ * Deregister rclk pin from parent pins and release resources in dpll subsystem. -+ */ -+static void ice_dpll_deinit_rclk_pin(struct ice_pf *pf) -+{ -+ struct ice_dpll_pin *rclk = &pf->dplls.rclk; -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ struct dpll_pin *parent; -+ int i; -+ -+ for (i = 0; i < rclk->num_parents; i++) { -+ parent = pf->dplls.inputs[rclk->parent_idx[i]].pin; -+ if (!parent) -+ continue; -+ dpll_pin_on_pin_unregister(parent, rclk->pin, -+ &ice_dpll_rclk_ops, rclk); -+ } -+ if (WARN_ON_ONCE(!vsi || !vsi->netdev)) -+ return; -+ netdev_dpll_pin_clear(vsi->netdev); -+ dpll_pin_put(rclk->pin); -+} -+ -+/** -+ * ice_dpll_init_rclk_pins - initialize recovered clock pin -+ * @pf: board private structure -+ * @pin: pin to register -+ * @start_idx: on which index shall allocation start in dpll subsystem -+ * @ops: callback ops registered with the pins -+ * -+ * Allocate resource for recovered clock pin in dpll subsystem. Register the -+ * pin with the parents it has in the info. Register pin with the pf's main vsi -+ * netdev. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - registration failure reason -+ */ -+static int -+ice_dpll_init_rclk_pins(struct ice_pf *pf, struct ice_dpll_pin *pin, -+ int start_idx, const struct dpll_pin_ops *ops) -+{ -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ struct dpll_pin *parent; -+ int ret, i; -+ -+ ret = ice_dpll_get_pins(pf, pin, start_idx, ICE_DPLL_RCLK_NUM_PER_PF, -+ pf->dplls.clock_id); -+ if (ret) -+ return ret; -+ for (i = 0; i < pf->dplls.rclk.num_parents; i++) { -+ parent = pf->dplls.inputs[pf->dplls.rclk.parent_idx[i]].pin; -+ if (!parent) { -+ ret = -ENODEV; -+ goto unregister_pins; -+ } -+ ret = dpll_pin_on_pin_register(parent, pf->dplls.rclk.pin, -+ ops, &pf->dplls.rclk); -+ if (ret) -+ goto unregister_pins; -+ } -+ if (WARN_ON((!vsi || !vsi->netdev))) -+ return -EINVAL; -+ netdev_dpll_pin_set(vsi->netdev, pf->dplls.rclk.pin); -+ -+ return 0; -+ -+unregister_pins: -+ while (i) { -+ parent = pf->dplls.inputs[pf->dplls.rclk.parent_idx[--i]].pin; -+ dpll_pin_on_pin_unregister(parent, pf->dplls.rclk.pin, -+ &ice_dpll_rclk_ops, &pf->dplls.rclk); -+ } -+ ice_dpll_release_pins(pin, ICE_DPLL_RCLK_NUM_PER_PF); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_pins - deinitialize direct pins -+ * @pf: board private structure -+ * @cgu: if cgu is controlled by this pf -+ * -+ * If cgu is owned unregister directly connected pins from the dplls. -+ * Release resources of directly connected pins from the dpll subsystem. -+ */ -+static void ice_dpll_deinit_pins(struct ice_pf *pf, bool cgu) -+{ -+ struct ice_dpll_pin *outputs = pf->dplls.outputs; -+ struct ice_dpll_pin *inputs = pf->dplls.inputs; -+ int num_outputs = pf->dplls.num_outputs; -+ int num_inputs = pf->dplls.num_inputs; -+ struct ice_dplls *d = &pf->dplls; -+ struct ice_dpll *de = &d->eec; -+ struct ice_dpll *dp = &d->pps; -+ -+ ice_dpll_deinit_rclk_pin(pf); -+ if (cgu) { -+ ice_dpll_unregister_pins(dp->dpll, inputs, &ice_dpll_input_ops, -+ num_inputs); -+ ice_dpll_unregister_pins(de->dpll, inputs, &ice_dpll_input_ops, -+ num_inputs); -+ } -+ ice_dpll_release_pins(inputs, num_inputs); -+ if (cgu) { -+ ice_dpll_unregister_pins(dp->dpll, outputs, -+ &ice_dpll_output_ops, num_outputs); -+ ice_dpll_unregister_pins(de->dpll, outputs, -+ &ice_dpll_output_ops, num_outputs); -+ ice_dpll_release_pins(outputs, num_outputs); -+ } -+} -+ -+/** -+ * ice_dpll_init_pins - init pins and register pins with a dplls -+ * @pf: board private structure -+ * @cgu: if cgu is present and controlled by this NIC -+ * -+ * Initialize directly connected pf's pins within pf's dplls in a Linux dpll -+ * subsystem. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - initialization failure reason -+ */ -+static int ice_dpll_init_pins(struct ice_pf *pf, bool cgu) -+{ -+ u32 rclk_idx; -+ int ret; -+ -+ ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.inputs, 0, -+ pf->dplls.num_inputs, -+ &ice_dpll_input_ops, -+ pf->dplls.eec.dpll, pf->dplls.pps.dpll); -+ if (ret) -+ return ret; -+ if (cgu) { -+ ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.outputs, -+ pf->dplls.num_inputs, -+ pf->dplls.num_outputs, -+ &ice_dpll_output_ops, -+ pf->dplls.eec.dpll, -+ pf->dplls.pps.dpll); -+ if (ret) -+ goto deinit_inputs; -+ } -+ rclk_idx = pf->dplls.num_inputs + pf->dplls.num_outputs + pf->hw.pf_id; -+ ret = ice_dpll_init_rclk_pins(pf, &pf->dplls.rclk, rclk_idx, -+ &ice_dpll_rclk_ops); -+ if (ret) -+ goto deinit_outputs; -+ -+ return 0; -+deinit_outputs: -+ ice_dpll_deinit_direct_pins(cgu, pf->dplls.outputs, -+ pf->dplls.num_outputs, -+ &ice_dpll_output_ops, pf->dplls.pps.dpll, -+ pf->dplls.eec.dpll); -+deinit_inputs: -+ ice_dpll_deinit_direct_pins(cgu, pf->dplls.inputs, pf->dplls.num_inputs, -+ &ice_dpll_input_ops, pf->dplls.pps.dpll, -+ pf->dplls.eec.dpll); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_dpll - deinitialize dpll device -+ * @pf: board private structure -+ * @d: pointer to ice_dpll -+ * @cgu: if cgu is present and controlled by this NIC -+ * -+ * If cgu is owned unregister the dpll from dpll subsystem. -+ * Release resources of dpll device from dpll subsystem. -+ */ -+static void -+ice_dpll_deinit_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu) -+{ -+ if (cgu) -+ dpll_device_unregister(d->dpll, &ice_dpll_ops, d); -+ dpll_device_put(d->dpll); -+} -+ -+/** -+ * ice_dpll_init_dpll - initialize dpll device in dpll subsystem -+ * @pf: board private structure -+ * @d: dpll to be initialized -+ * @cgu: if cgu is present and controlled by this NIC -+ * @type: type of dpll being initialized -+ * -+ * Allocate dpll instance for this board in dpll subsystem, if cgu is controlled -+ * by this NIC, register dpll with the callback ops. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - initialization failure reason -+ */ -+static int -+ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu, -+ enum dpll_type type) -+{ -+ u64 clock_id = pf->dplls.clock_id; -+ int ret; -+ -+ d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE); -+ if (IS_ERR(d->dpll)) { -+ ret = PTR_ERR(d->dpll); -+ dev_err(ice_pf_to_dev(pf), -+ "dpll_device_get failed (%p) err=%d\n", d, ret); -+ return ret; -+ } -+ d->pf = pf; -+ if (cgu) { -+ ret = dpll_device_register(d->dpll, type, &ice_dpll_ops, d); -+ if (ret) { -+ dpll_device_put(d->dpll); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_deinit_worker - deinitialize dpll kworker -+ * @pf: board private structure -+ * -+ * Stop dpll's kworker, release it's resources. -+ */ -+static void ice_dpll_deinit_worker(struct ice_pf *pf) -+{ -+ struct ice_dplls *d = &pf->dplls; -+ -+ kthread_cancel_delayed_work_sync(&d->work); -+ kthread_destroy_worker(d->kworker); -+} -+ -+/** -+ * ice_dpll_init_worker - Initialize DPLLs periodic worker -+ * @pf: board private structure -+ * -+ * Create and start DPLLs periodic worker. -+ * -+ * Context: Shall be called after pf->dplls.lock is initialized. -+ * Return: -+ * * 0 - success -+ * * negative - create worker failure -+ */ -+static int ice_dpll_init_worker(struct ice_pf *pf) -+{ -+ struct ice_dplls *d = &pf->dplls; -+ struct kthread_worker *kworker; -+ -+ ice_dpll_update_state(pf, &d->eec, true); -+ ice_dpll_update_state(pf, &d->pps, true); -+ kthread_init_delayed_work(&d->work, ice_dpll_periodic_work); -+ kworker = kthread_create_worker(0, "ice-dplls-%s", -+ dev_name(ice_pf_to_dev(pf))); -+ if (IS_ERR(kworker)) -+ return PTR_ERR(kworker); -+ d->kworker = kworker; -+ d->cgu_state_acq_err_num = 0; -+ kthread_queue_delayed_work(d->kworker, &d->work, 0); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_init_info_direct_pins - initializes direct pins info -+ * @pf: board private structure -+ * @pin_type: type of pins being initialized -+ * -+ * Init information for directly connected pins, cache them in pf's pins -+ * structures. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int -+ice_dpll_init_info_direct_pins(struct ice_pf *pf, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll *de = &pf->dplls.eec, *dp = &pf->dplls.pps; -+ int num_pins, i, ret = -EINVAL; -+ struct ice_hw *hw = &pf->hw; -+ struct ice_dpll_pin *pins; -+ u8 freq_supp_num; -+ bool input; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ pins = pf->dplls.inputs; -+ num_pins = pf->dplls.num_inputs; -+ input = true; -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ pins = pf->dplls.outputs; -+ num_pins = pf->dplls.num_outputs; -+ input = false; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < num_pins; i++) { -+ pins[i].idx = i; -+ pins[i].prop.board_label = ice_cgu_get_pin_name(hw, i, input); -+ pins[i].prop.type = ice_cgu_get_pin_type(hw, i, input); -+ if (input) { -+ ret = ice_aq_get_cgu_ref_prio(hw, de->dpll_idx, i, -+ &de->input_prio[i]); -+ if (ret) -+ return ret; -+ ret = ice_aq_get_cgu_ref_prio(hw, dp->dpll_idx, i, -+ &dp->input_prio[i]); -+ if (ret) -+ return ret; -+ pins[i].prop.capabilities |= -+ DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE; -+ } -+ pins[i].prop.capabilities |= -+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ ret = ice_dpll_pin_state_update(pf, &pins[i], pin_type, NULL); -+ if (ret) -+ return ret; -+ pins[i].prop.freq_supported = -+ ice_cgu_get_pin_freq_supp(hw, i, input, &freq_supp_num); -+ pins[i].prop.freq_supported_num = freq_supp_num; -+ pins[i].pf = pf; -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_init_info_rclk_pin - initializes rclk pin information -+ * @pf: board private structure -+ * -+ * Init information for rclk pin, cache them in pf->dplls.rclk. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int ice_dpll_init_info_rclk_pin(struct ice_pf *pf) -+{ -+ struct ice_dpll_pin *pin = &pf->dplls.rclk; -+ -+ pin->prop.type = DPLL_PIN_TYPE_SYNCE_ETH_PORT; -+ pin->prop.capabilities |= DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ pin->pf = pf; -+ -+ return ice_dpll_pin_state_update(pf, pin, -+ ICE_DPLL_PIN_TYPE_RCLK_INPUT, NULL); -+} -+ -+/** -+ * ice_dpll_init_pins_info - init pins info wrapper -+ * @pf: board private structure -+ * @pin_type: type of pins being initialized -+ * -+ * Wraps functions for pin initialization. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int -+ice_dpll_init_pins_info(struct ice_pf *pf, enum ice_dpll_pin_type pin_type) -+{ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ return ice_dpll_init_info_direct_pins(pf, pin_type); -+ case ICE_DPLL_PIN_TYPE_RCLK_INPUT: -+ return ice_dpll_init_info_rclk_pin(pf); -+ default: -+ return -EINVAL; -+ } -+} -+ -+/** -+ * ice_dpll_deinit_info - release memory allocated for pins info -+ * @pf: board private structure -+ * -+ * Release memory allocated for pins by ice_dpll_init_info function. -+ */ -+static void ice_dpll_deinit_info(struct ice_pf *pf) -+{ -+ kfree(pf->dplls.inputs); -+ kfree(pf->dplls.outputs); -+ kfree(pf->dplls.eec.input_prio); -+ kfree(pf->dplls.pps.input_prio); -+} -+ -+/** -+ * ice_dpll_init_info - prepare pf's dpll information structure -+ * @pf: board private structure -+ * @cgu: if cgu is present and controlled by this NIC -+ * -+ * Acquire (from HW) and set basic dpll information (on pf->dplls struct). -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int ice_dpll_init_info(struct ice_pf *pf, bool cgu) -+{ -+ struct ice_aqc_get_cgu_abilities abilities; -+ struct ice_dpll *de = &pf->dplls.eec; -+ struct ice_dpll *dp = &pf->dplls.pps; -+ struct ice_dplls *d = &pf->dplls; -+ struct ice_hw *hw = &pf->hw; -+ int ret, alloc_size, i; -+ -+ d->clock_id = ice_generate_clock_id(pf); -+ ret = ice_aq_get_cgu_abilities(hw, &abilities); -+ if (ret) { -+ dev_err(ice_pf_to_dev(pf), -+ "err:%d %s failed to read cgu abilities\n", -+ ret, ice_aq_str(hw->adminq.sq_last_status)); -+ return ret; -+ } -+ -+ de->dpll_idx = abilities.eec_dpll_idx; -+ dp->dpll_idx = abilities.pps_dpll_idx; -+ d->num_inputs = abilities.num_inputs; -+ d->num_outputs = abilities.num_outputs; -+ d->input_phase_adj_max = le32_to_cpu(abilities.max_in_phase_adj); -+ d->output_phase_adj_max = le32_to_cpu(abilities.max_out_phase_adj); -+ -+ alloc_size = sizeof(*d->inputs) * d->num_inputs; -+ d->inputs = kzalloc(alloc_size, GFP_KERNEL); -+ if (!d->inputs) -+ return -ENOMEM; -+ -+ alloc_size = sizeof(*de->input_prio) * d->num_inputs; -+ de->input_prio = kzalloc(alloc_size, GFP_KERNEL); -+ if (!de->input_prio) -+ return -ENOMEM; -+ -+ dp->input_prio = kzalloc(alloc_size, GFP_KERNEL); -+ if (!dp->input_prio) -+ return -ENOMEM; -+ -+ ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_INPUT); -+ if (ret) -+ goto deinit_info; -+ -+ if (cgu) { -+ alloc_size = sizeof(*d->outputs) * d->num_outputs; -+ d->outputs = kzalloc(alloc_size, GFP_KERNEL); -+ if (!d->outputs) { -+ ret = -ENOMEM; -+ goto deinit_info; -+ } -+ -+ ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_OUTPUT); -+ if (ret) -+ goto deinit_info; -+ } -+ -+ ret = ice_get_cgu_rclk_pin_info(&pf->hw, &d->base_rclk_idx, -+ &pf->dplls.rclk.num_parents); -+ if (ret) -+ return ret; -+ for (i = 0; i < pf->dplls.rclk.num_parents; i++) -+ pf->dplls.rclk.parent_idx[i] = d->base_rclk_idx + i; -+ ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_RCLK_INPUT); -+ if (ret) -+ return ret; -+ de->mode = DPLL_MODE_AUTOMATIC; -+ dp->mode = DPLL_MODE_AUTOMATIC; -+ -+ dev_dbg(ice_pf_to_dev(pf), -+ "%s - success, inputs:%u, outputs:%u rclk-parents:%u\n", -+ __func__, d->num_inputs, d->num_outputs, d->rclk.num_parents); -+ -+ return 0; -+ -+deinit_info: -+ dev_err(ice_pf_to_dev(pf), -+ "%s - fail: d->inputs:%p, de->input_prio:%p, dp->input_prio:%p, d->outputs:%p\n", -+ __func__, d->inputs, de->input_prio, -+ dp->input_prio, d->outputs); -+ ice_dpll_deinit_info(pf); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit - Disable the driver/HW support for dpll subsystem -+ * the dpll device. -+ * @pf: board private structure -+ * -+ * Handles the cleanup work required after dpll initialization, freeing -+ * resources and unregistering the dpll, pin and all resources used for -+ * handling them. -+ * -+ * Context: Destroys pf->dplls.lock mutex. Call only if ICE_FLAG_DPLL was set. -+ */ -+void ice_dpll_deinit(struct ice_pf *pf) -+{ -+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU); -+ -+ clear_bit(ICE_FLAG_DPLL, pf->flags); -+ if (cgu) -+ ice_dpll_deinit_worker(pf); -+ -+ ice_dpll_deinit_pins(pf, cgu); -+ ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu); -+ ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu); -+ ice_dpll_deinit_info(pf); -+ mutex_destroy(&pf->dplls.lock); -+} -+ -+/** -+ * ice_dpll_init - initialize support for dpll subsystem -+ * @pf: board private structure -+ * -+ * Set up the device dplls, register them and pins connected within Linux dpll -+ * subsystem. Allow userspace to obtain state of DPLL and handling of DPLL -+ * configuration requests. -+ * -+ * Context: Initializes pf->dplls.lock mutex. -+ */ -+void ice_dpll_init(struct ice_pf *pf) -+{ -+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU); -+ struct ice_dplls *d = &pf->dplls; -+ int err = 0; -+ -+ err = ice_dpll_init_info(pf, cgu); -+ if (err) -+ goto err_exit; -+ err = ice_dpll_init_dpll(pf, &pf->dplls.eec, cgu, DPLL_TYPE_EEC); -+ if (err) -+ goto deinit_info; -+ err = ice_dpll_init_dpll(pf, &pf->dplls.pps, cgu, DPLL_TYPE_PPS); -+ if (err) -+ goto deinit_eec; -+ err = ice_dpll_init_pins(pf, cgu); -+ if (err) -+ goto deinit_pps; -+ mutex_init(&d->lock); -+ if (cgu) { -+ err = ice_dpll_init_worker(pf); -+ if (err) -+ goto deinit_pins; -+ } -+ set_bit(ICE_FLAG_DPLL, pf->flags); -+ -+ return; -+ -+deinit_pins: -+ ice_dpll_deinit_pins(pf, cgu); -+deinit_pps: -+ ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu); -+deinit_eec: -+ ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu); -+deinit_info: -+ ice_dpll_deinit_info(pf); -+err_exit: -+ mutex_destroy(&d->lock); -+ dev_warn(ice_pf_to_dev(pf), "DPLLs init failure err:%d\n", err); -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -new file mode 100644 -index 000000000000..9c524c4bdfd7 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -0,0 +1,104 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* Copyright (C) 2022, Intel Corporation. */ -+ -+#ifndef _ICE_DPLL_H_ -+#define _ICE_DPLL_H_ -+ -+#include "ice.h" -+ -+#define ICE_DPLL_PRIO_MAX 0xF -+#define ICE_DPLL_RCLK_NUM_MAX 4 -+ -+/** ice_dpll_pin - store info about pins -+ * @pin: dpll pin structure -+ * @pf: pointer to pf, which has registered the dpll_pin -+ * @idx: ice pin private idx -+ * @num_parents: hols number of parent pins -+ * @parent_idx: hold indexes of parent pins -+ * @flags: pin flags returned from HW -+ * @state: state of a pin -+ * @prop: pin properties -+ * @freq: current frequency of a pin -+ */ -+struct ice_dpll_pin { -+ struct dpll_pin *pin; -+ struct ice_pf *pf; -+ u8 idx; -+ u8 num_parents; -+ u8 parent_idx[ICE_DPLL_RCLK_NUM_MAX]; -+ u8 flags[ICE_DPLL_RCLK_NUM_MAX]; -+ u8 state[ICE_DPLL_RCLK_NUM_MAX]; -+ struct dpll_pin_properties prop; -+ u32 freq; -+}; -+ -+/** ice_dpll - store info required for DPLL control -+ * @dpll: pointer to dpll dev -+ * @pf: pointer to pf, which has registered the dpll_device -+ * @dpll_idx: index of dpll on the NIC -+ * @input_idx: currently selected input index -+ * @prev_input_idx: previously selected input index -+ * @ref_state: state of dpll reference signals -+ * @eec_mode: eec_mode dpll is configured for -+ * @phase_shift: phase shift delay of a dpll -+ * @input_prio: priorities of each input -+ * @dpll_state: current dpll sync state -+ * @prev_dpll_state: last dpll sync state -+ * @active_input: pointer to active input pin -+ * @prev_input: pointer to previous active input pin -+ */ -+struct ice_dpll { -+ struct dpll_device *dpll; -+ struct ice_pf *pf; -+ u8 dpll_idx; -+ u8 input_idx; -+ u8 prev_input_idx; -+ u8 ref_state; -+ u8 eec_mode; -+ s64 phase_shift; -+ u8 *input_prio; -+ enum dpll_lock_status dpll_state; -+ enum dpll_lock_status prev_dpll_state; -+ enum dpll_mode mode; -+ struct dpll_pin *active_input; -+ struct dpll_pin *prev_input; -+}; -+ -+/** ice_dplls - store info required for CCU (clock controlling unit) -+ * @kworker: periodic worker -+ * @work: periodic work -+ * @lock: locks access to configuration of a dpll -+ * @eec: pointer to EEC dpll dev -+ * @pps: pointer to PPS dpll dev -+ * @inputs: input pins pointer -+ * @outputs: output pins pointer -+ * @rclk: recovered pins pointer -+ * @num_inputs: number of input pins available on dpll -+ * @num_outputs: number of output pins available on dpll -+ * @cgu_state_acq_err_num: number of errors returned during periodic work -+ * @base_rclk_idx: idx of first pin used for clock revocery pins -+ * @clock_id: clock_id of dplls -+ */ -+struct ice_dplls { -+ struct kthread_worker *kworker; -+ struct kthread_delayed_work work; -+ struct mutex lock; -+ struct ice_dpll eec; -+ struct ice_dpll pps; -+ struct ice_dpll_pin *inputs; -+ struct ice_dpll_pin *outputs; -+ struct ice_dpll_pin rclk; -+ u8 num_inputs; -+ u8 num_outputs; -+ int cgu_state_acq_err_num; -+ u8 base_rclk_idx; -+ u64 clock_id; -+ s32 input_phase_adj_max; -+ s32 output_phase_adj_max; -+}; -+ -+void ice_dpll_init(struct ice_pf *pf); -+ -+void ice_dpll_deinit(struct ice_pf *pf); -+ -+#endif -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index c5ef2f422c34..6d75284301cc 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -4679,6 +4679,10 @@ static void ice_init_features(struct ice_pf *pf) - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_init(pf); - -+ if (ice_is_feature_supported(pf, ICE_F_CGU) || -+ ice_is_feature_supported(pf, ICE_F_PHY_RCLK)) -+ ice_dpll_init(pf); -+ - /* Note: Flow director init failure is non-fatal to load */ - if (ice_init_fdir(pf)) - dev_err(dev, "could not initialize flow director\n"); -@@ -4708,6 +4712,8 @@ static void ice_deinit_features(struct ice_pf *pf) - ice_gnss_exit(pf); - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) - ice_ptp_release(pf); -+ if (test_bit(ICE_FLAG_DPLL, pf->flags)) -+ ice_dpll_deinit(pf); - } - - static void ice_init_wakeup(struct ice_pf *pf) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch b/kernel-rt/debian/patches/ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch deleted file mode 100644 index 0fb63982..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch +++ /dev/null @@ -1,651 +0,0 @@ -From b0564f1f3105dde3373d0c68a17c8016c23b0aae Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:42 +0100 -Subject: [PATCH 08/46] ptp_ocp: implement DPLL ops - -Implement basic DPLL operations in ptp_ocp driver as the -simplest example of using new subsystem. - -Signed-off-by: Vadim Fedorenko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 09eeb3aecc6c74c9a911396f9ab46b1a41fcd7b8) -Signed-off-by: Jiping Ma ---- - drivers/ptp/Kconfig | 1 + - drivers/ptp/ptp_ocp.c | 369 +++++++++++++++++++++++++++++++++++------- - 2 files changed, 310 insertions(+), 60 deletions(-) - -diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig -index ed9d97a032f1..5dd5f188e14f 100644 ---- a/drivers/ptp/Kconfig -+++ b/drivers/ptp/Kconfig -@@ -188,6 +188,7 @@ config PTP_1588_CLOCK_OCP - depends on COMMON_CLK - select NET_DEVLINK - select CRC16 -+ select DPLL - help - This driver adds support for an OpenCompute time card. - -diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c -index a7a6947ab4bc..41eaffcae462 100644 ---- a/drivers/ptp/ptp_ocp.c -+++ b/drivers/ptp/ptp_ocp.c -@@ -23,6 +23,7 @@ - #include - #include - #include -+#include - - #define PCI_VENDOR_ID_FACEBOOK 0x1d9b - #define PCI_DEVICE_ID_FACEBOOK_TIMECARD 0x0400 -@@ -260,12 +261,21 @@ enum ptp_ocp_sma_mode { - SMA_MODE_OUT, - }; - -+static struct dpll_pin_frequency ptp_ocp_sma_freq[] = { -+ DPLL_PIN_FREQUENCY_1PPS, -+ DPLL_PIN_FREQUENCY_10MHZ, -+ DPLL_PIN_FREQUENCY_IRIG_B, -+ DPLL_PIN_FREQUENCY_DCF77, -+}; -+ - struct ptp_ocp_sma_connector { - enum ptp_ocp_sma_mode mode; - bool fixed_fcn; - bool fixed_dir; - bool disabled; - u8 default_fcn; -+ struct dpll_pin *dpll_pin; -+ struct dpll_pin_properties dpll_prop; - }; - - struct ocp_attr_group { -@@ -294,6 +304,7 @@ struct ptp_ocp_serial_port { - - #define OCP_BOARD_ID_LEN 13 - #define OCP_SERIAL_LEN 6 -+#define OCP_SMA_NUM 4 - - struct ptp_ocp { - struct pci_dev *pdev; -@@ -331,7 +342,9 @@ struct ptp_ocp { - const struct attribute_group **attr_group; - const struct ptp_ocp_eeprom_map *eeprom_map; - struct dentry *debug_root; -+ bool sync; - time64_t gnss_lost; -+ struct delayed_work sync_work; - int id; - int n_irqs; - struct ptp_ocp_serial_port gnss_port; -@@ -350,8 +363,9 @@ struct ptp_ocp { - u32 ts_window_adjust; - u64 fw_cap; - struct ptp_ocp_signal signal[4]; -- struct ptp_ocp_sma_connector sma[4]; -+ struct ptp_ocp_sma_connector sma[OCP_SMA_NUM]; - const struct ocp_sma_op *sma_op; -+ struct dpll_device *dpll; - }; - - #define OCP_REQ_TIMESTAMP BIT(0) -@@ -835,6 +849,7 @@ static DEFINE_IDR(ptp_ocp_idr); - struct ocp_selector { - const char *name; - int value; -+ u64 frequency; - }; - - static const struct ocp_selector ptp_ocp_clock[] = { -@@ -855,31 +870,31 @@ static const struct ocp_selector ptp_ocp_clock[] = { - #define SMA_SELECT_MASK GENMASK(14, 0) - - static const struct ocp_selector ptp_ocp_sma_in[] = { -- { .name = "10Mhz", .value = 0x0000 }, -- { .name = "PPS1", .value = 0x0001 }, -- { .name = "PPS2", .value = 0x0002 }, -- { .name = "TS1", .value = 0x0004 }, -- { .name = "TS2", .value = 0x0008 }, -- { .name = "IRIG", .value = 0x0010 }, -- { .name = "DCF", .value = 0x0020 }, -- { .name = "TS3", .value = 0x0040 }, -- { .name = "TS4", .value = 0x0080 }, -- { .name = "FREQ1", .value = 0x0100 }, -- { .name = "FREQ2", .value = 0x0200 }, -- { .name = "FREQ3", .value = 0x0400 }, -- { .name = "FREQ4", .value = 0x0800 }, -- { .name = "None", .value = SMA_DISABLE }, -+ { .name = "10Mhz", .value = 0x0000, .frequency = 10000000 }, -+ { .name = "PPS1", .value = 0x0001, .frequency = 1 }, -+ { .name = "PPS2", .value = 0x0002, .frequency = 1 }, -+ { .name = "TS1", .value = 0x0004, .frequency = 0 }, -+ { .name = "TS2", .value = 0x0008, .frequency = 0 }, -+ { .name = "IRIG", .value = 0x0010, .frequency = 10000 }, -+ { .name = "DCF", .value = 0x0020, .frequency = 77500 }, -+ { .name = "TS3", .value = 0x0040, .frequency = 0 }, -+ { .name = "TS4", .value = 0x0080, .frequency = 0 }, -+ { .name = "FREQ1", .value = 0x0100, .frequency = 0 }, -+ { .name = "FREQ2", .value = 0x0200, .frequency = 0 }, -+ { .name = "FREQ3", .value = 0x0400, .frequency = 0 }, -+ { .name = "FREQ4", .value = 0x0800, .frequency = 0 }, -+ { .name = "None", .value = SMA_DISABLE, .frequency = 0 }, - { } - }; - - static const struct ocp_selector ptp_ocp_sma_out[] = { -- { .name = "10Mhz", .value = 0x0000 }, -- { .name = "PHC", .value = 0x0001 }, -- { .name = "MAC", .value = 0x0002 }, -- { .name = "GNSS1", .value = 0x0004 }, -- { .name = "GNSS2", .value = 0x0008 }, -- { .name = "IRIG", .value = 0x0010 }, -- { .name = "DCF", .value = 0x0020 }, -+ { .name = "10Mhz", .value = 0x0000, .frequency = 10000000 }, -+ { .name = "PHC", .value = 0x0001, .frequency = 1 }, -+ { .name = "MAC", .value = 0x0002, .frequency = 1 }, -+ { .name = "GNSS1", .value = 0x0004, .frequency = 1 }, -+ { .name = "GNSS2", .value = 0x0008, .frequency = 1 }, -+ { .name = "IRIG", .value = 0x0010, .frequency = 10000 }, -+ { .name = "DCF", .value = 0x0020, .frequency = 77000 }, - { .name = "GEN1", .value = 0x0040 }, - { .name = "GEN2", .value = 0x0080 }, - { .name = "GEN3", .value = 0x0100 }, -@@ -890,15 +905,15 @@ static const struct ocp_selector ptp_ocp_sma_out[] = { - }; - - static const struct ocp_selector ptp_ocp_art_sma_in[] = { -- { .name = "PPS1", .value = 0x0001 }, -- { .name = "10Mhz", .value = 0x0008 }, -+ { .name = "PPS1", .value = 0x0001, .frequency = 1 }, -+ { .name = "10Mhz", .value = 0x0008, .frequency = 1000000 }, - { } - }; - - static const struct ocp_selector ptp_ocp_art_sma_out[] = { -- { .name = "PHC", .value = 0x0002 }, -- { .name = "GNSS", .value = 0x0004 }, -- { .name = "10Mhz", .value = 0x0010 }, -+ { .name = "PHC", .value = 0x0002, .frequency = 1 }, -+ { .name = "GNSS", .value = 0x0004, .frequency = 1 }, -+ { .name = "10Mhz", .value = 0x0010, .frequency = 10000000 }, - { } - }; - -@@ -1351,7 +1366,6 @@ static int - ptp_ocp_init_clock(struct ptp_ocp *bp) - { - struct timespec64 ts; -- bool sync; - u32 ctrl; - - ctrl = OCP_CTRL_ENABLE; -@@ -1375,8 +1389,8 @@ ptp_ocp_init_clock(struct ptp_ocp *bp) - - ptp_ocp_estimate_pci_timing(bp); - -- sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; -- if (!sync) { -+ bp->sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; -+ if (!bp->sync) { - ktime_get_clocktai_ts64(&ts); - ptp_ocp_settime(&bp->ptp_info, &ts); - } -@@ -2289,22 +2303,35 @@ ptp_ocp_sma_fb_set_inputs(struct ptp_ocp *bp, int sma_nr, u32 val) - static void - ptp_ocp_sma_fb_init(struct ptp_ocp *bp) - { -+ struct dpll_pin_properties prop = { -+ .board_label = NULL, -+ .type = DPLL_PIN_TYPE_EXT, -+ .capabilities = DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE, -+ .freq_supported_num = ARRAY_SIZE(ptp_ocp_sma_freq), -+ .freq_supported = ptp_ocp_sma_freq, -+ -+ }; - u32 reg; - int i; - - /* defaults */ -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ bp->sma[i].default_fcn = i & 1; -+ bp->sma[i].dpll_prop = prop; -+ bp->sma[i].dpll_prop.board_label = -+ bp->ptp_info.pin_config[i].name; -+ } - bp->sma[0].mode = SMA_MODE_IN; - bp->sma[1].mode = SMA_MODE_IN; - bp->sma[2].mode = SMA_MODE_OUT; - bp->sma[3].mode = SMA_MODE_OUT; -- for (i = 0; i < 4; i++) -- bp->sma[i].default_fcn = i & 1; -- - /* If no SMA1 map, the pin functions and directions are fixed. */ - if (!bp->sma_map1) { -- for (i = 0; i < 4; i++) { -+ for (i = 0; i < OCP_SMA_NUM; i++) { - bp->sma[i].fixed_fcn = true; - bp->sma[i].fixed_dir = true; -+ bp->sma[1].dpll_prop.capabilities &= -+ ~DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE; - } - return; - } -@@ -2314,7 +2341,7 @@ ptp_ocp_sma_fb_init(struct ptp_ocp *bp) - */ - reg = ioread32(&bp->sma_map2->gpio2); - if (reg == 0xffffffff) { -- for (i = 0; i < 4; i++) -+ for (i = 0; i < OCP_SMA_NUM; i++) - bp->sma[i].fixed_dir = true; - } else { - reg = ioread32(&bp->sma_map1->gpio1); -@@ -2336,7 +2363,7 @@ static const struct ocp_sma_op ocp_fb_sma_op = { - }; - - static int --ptp_ocp_fb_set_pins(struct ptp_ocp *bp) -+ptp_ocp_set_pins(struct ptp_ocp *bp) - { - struct ptp_pin_desc *config; - int i; -@@ -2403,16 +2430,16 @@ ptp_ocp_fb_board_init(struct ptp_ocp *bp, struct ocp_resource *r) - - ptp_ocp_tod_init(bp); - ptp_ocp_nmea_out_init(bp); -- ptp_ocp_sma_init(bp); - ptp_ocp_signal_init(bp); - - err = ptp_ocp_attr_group_add(bp, fb_timecard_groups); - if (err) - return err; - -- err = ptp_ocp_fb_set_pins(bp); -+ err = ptp_ocp_set_pins(bp); - if (err) - return err; -+ ptp_ocp_sma_init(bp); - - return ptp_ocp_init_clock(bp); - } -@@ -2452,6 +2479,14 @@ ptp_ocp_register_resources(struct ptp_ocp *bp, kernel_ulong_t driver_data) - static void - ptp_ocp_art_sma_init(struct ptp_ocp *bp) - { -+ struct dpll_pin_properties prop = { -+ .board_label = NULL, -+ .type = DPLL_PIN_TYPE_EXT, -+ .capabilities = 0, -+ .freq_supported_num = ARRAY_SIZE(ptp_ocp_sma_freq), -+ .freq_supported = ptp_ocp_sma_freq, -+ -+ }; - u32 reg; - int i; - -@@ -2466,16 +2501,16 @@ ptp_ocp_art_sma_init(struct ptp_ocp *bp) - bp->sma[2].default_fcn = 0x10; /* OUT: 10Mhz */ - bp->sma[3].default_fcn = 0x02; /* OUT: PHC */ - -- /* If no SMA map, the pin functions and directions are fixed. */ -- if (!bp->art_sma) { -- for (i = 0; i < 4; i++) { -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ /* If no SMA map, the pin functions and directions are fixed. */ -+ bp->sma[i].dpll_prop = prop; -+ bp->sma[i].dpll_prop.board_label = -+ bp->ptp_info.pin_config[i].name; -+ if (!bp->art_sma) { - bp->sma[i].fixed_fcn = true; - bp->sma[i].fixed_dir = true; -+ continue; - } -- return; -- } -- -- for (i = 0; i < 4; i++) { - reg = ioread32(&bp->art_sma->map[i].gpio); - - switch (reg & 0xff) { -@@ -2486,9 +2521,13 @@ ptp_ocp_art_sma_init(struct ptp_ocp *bp) - case 1: - case 8: - bp->sma[i].mode = SMA_MODE_IN; -+ bp->sma[i].dpll_prop.capabilities = -+ DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE; - break; - default: - bp->sma[i].mode = SMA_MODE_OUT; -+ bp->sma[i].dpll_prop.capabilities = -+ DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE; - break; - } - } -@@ -2555,6 +2594,9 @@ ptp_ocp_art_board_init(struct ptp_ocp *bp, struct ocp_resource *r) - /* Enable MAC serial port during initialisation */ - iowrite32(1, &bp->board_config->mro50_serial_activate); - -+ err = ptp_ocp_set_pins(bp); -+ if (err) -+ return err; - ptp_ocp_sma_init(bp); - - err = ptp_ocp_attr_group_add(bp, art_timecard_groups); -@@ -2696,16 +2738,9 @@ sma4_show(struct device *dev, struct device_attribute *attr, char *buf) - } - - static int --ptp_ocp_sma_store(struct ptp_ocp *bp, const char *buf, int sma_nr) -+ptp_ocp_sma_store_val(struct ptp_ocp *bp, int val, enum ptp_ocp_sma_mode mode, int sma_nr) - { - struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; -- enum ptp_ocp_sma_mode mode; -- int val; -- -- mode = sma->mode; -- val = sma_parse_inputs(bp->sma_op->tbl, buf, &mode); -- if (val < 0) -- return val; - - if (sma->fixed_dir && (mode != sma->mode || val & SMA_DISABLE)) - return -EOPNOTSUPP; -@@ -2740,6 +2775,20 @@ ptp_ocp_sma_store(struct ptp_ocp *bp, const char *buf, int sma_nr) - return val; - } - -+static int -+ptp_ocp_sma_store(struct ptp_ocp *bp, const char *buf, int sma_nr) -+{ -+ struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; -+ enum ptp_ocp_sma_mode mode; -+ int val; -+ -+ mode = sma->mode; -+ val = sma_parse_inputs(bp->sma_op->tbl, buf, &mode); -+ if (val < 0) -+ return val; -+ return ptp_ocp_sma_store_val(bp, val, mode, sma_nr); -+} -+ - static ssize_t - sma1_store(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -@@ -3834,9 +3883,8 @@ ptp_ocp_summary_show(struct seq_file *s, void *data) - strcpy(buf, "unknown"); - break; - } -- val = ioread32(&bp->reg->status); - seq_printf(s, "%7s: %s, state: %s\n", "PHC src", buf, -- val & OCP_STATUS_IN_SYNC ? "sync" : "unsynced"); -+ bp->sync ? "sync" : "unsynced"); - - if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, &sts)) { - struct timespec64 sys_ts; -@@ -4067,7 +4115,6 @@ ptp_ocp_phc_info(struct ptp_ocp *bp) - { - struct timespec64 ts; - u32 version, select; -- bool sync; - - version = ioread32(&bp->reg->version); - select = ioread32(&bp->reg->select); -@@ -4076,11 +4123,10 @@ ptp_ocp_phc_info(struct ptp_ocp *bp) - ptp_ocp_select_name_from_val(ptp_ocp_clock, select >> 16), - ptp_clock_index(bp->ptp)); - -- sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; - if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, NULL)) - dev_info(&bp->pdev->dev, "Time: %lld.%ld, %s\n", - ts.tv_sec, ts.tv_nsec, -- sync ? "in-sync" : "UNSYNCED"); -+ bp->sync ? "in-sync" : "UNSYNCED"); - } - - static void -@@ -4177,12 +4223,168 @@ ptp_ocp_detach(struct ptp_ocp *bp) - device_unregister(&bp->dev); - } - -+static int ptp_ocp_dpll_lock_status_get(const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp *bp = priv; -+ -+ *status = bp->sync ? DPLL_LOCK_STATUS_LOCKED : DPLL_LOCK_STATUS_UNLOCKED; -+ -+ return 0; -+} -+ -+static int ptp_ocp_dpll_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp *bp = priv; -+ int idx; -+ -+ if (bp->pps_select) { -+ idx = ioread32(&bp->pps_select->gpio1); -+ *state = (&bp->sma[idx] == pin_priv) ? DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_SELECTABLE; -+ return 0; -+ } -+ NL_SET_ERR_MSG(extack, "pin selection is not supported on current HW"); -+ return -EINVAL; -+} -+ -+static int ptp_ocp_dpll_mode_get(const struct dpll_device *dpll, void *priv, -+ u32 *mode, struct netlink_ext_ack *extack) -+{ -+ *mode = DPLL_MODE_AUTOMATIC; -+ return 0; -+} -+ -+static bool ptp_ocp_dpll_mode_supported(const struct dpll_device *dpll, -+ void *priv, const enum dpll_mode mode, -+ struct netlink_ext_ack *extack) -+{ -+ return mode == DPLL_MODE_AUTOMATIC; -+} -+ -+static int ptp_ocp_dpll_direction_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ -+ *direction = sma->mode == SMA_MODE_IN ? -+ DPLL_PIN_DIRECTION_INPUT : -+ DPLL_PIN_DIRECTION_OUTPUT; -+ return 0; -+} -+ -+static int ptp_ocp_dpll_direction_set(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_direction direction, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ struct ptp_ocp *bp = dpll_priv; -+ enum ptp_ocp_sma_mode mode; -+ int sma_nr = (sma - bp->sma); -+ -+ if (sma->fixed_dir) -+ return -EOPNOTSUPP; -+ mode = direction == DPLL_PIN_DIRECTION_INPUT ? -+ SMA_MODE_IN : SMA_MODE_OUT; -+ return ptp_ocp_sma_store_val(bp, 0, mode, sma_nr); -+} -+ -+static int ptp_ocp_dpll_frequency_set(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, u64 frequency, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ struct ptp_ocp *bp = dpll_priv; -+ const struct ocp_selector *tbl; -+ int sma_nr = (sma - bp->sma); -+ int i; -+ -+ if (sma->fixed_fcn) -+ return -EOPNOTSUPP; -+ -+ tbl = bp->sma_op->tbl[sma->mode]; -+ for (i = 0; tbl[i].name; i++) -+ if (tbl[i].frequency == frequency) -+ return ptp_ocp_sma_store_val(bp, i, sma->mode, sma_nr); -+ return -EINVAL; -+} -+ -+static int ptp_ocp_dpll_frequency_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, u64 *frequency, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ struct ptp_ocp *bp = dpll_priv; -+ const struct ocp_selector *tbl; -+ int sma_nr = (sma - bp->sma); -+ u32 val; -+ int i; -+ -+ val = bp->sma_op->get(bp, sma_nr); -+ tbl = bp->sma_op->tbl[sma->mode]; -+ for (i = 0; tbl[i].name; i++) -+ if (val == tbl[i].value) { -+ *frequency = tbl[i].frequency; -+ return 0; -+ } -+ -+ return -EINVAL; -+} -+ -+static const struct dpll_device_ops dpll_ops = { -+ .lock_status_get = ptp_ocp_dpll_lock_status_get, -+ .mode_get = ptp_ocp_dpll_mode_get, -+ .mode_supported = ptp_ocp_dpll_mode_supported, -+}; -+ -+static const struct dpll_pin_ops dpll_pins_ops = { -+ .frequency_get = ptp_ocp_dpll_frequency_get, -+ .frequency_set = ptp_ocp_dpll_frequency_set, -+ .direction_get = ptp_ocp_dpll_direction_get, -+ .direction_set = ptp_ocp_dpll_direction_set, -+ .state_on_dpll_get = ptp_ocp_dpll_state_get, -+}; -+ -+static void -+ptp_ocp_sync_work(struct work_struct *work) -+{ -+ struct ptp_ocp *bp; -+ bool sync; -+ -+ bp = container_of(work, struct ptp_ocp, sync_work.work); -+ sync = !!(ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC); -+ -+ if (bp->sync != sync) -+ dpll_device_change_ntf(bp->dpll); -+ -+ bp->sync = sync; -+ -+ queue_delayed_work(system_power_efficient_wq, &bp->sync_work, HZ); -+} -+ - static int - ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id) - { - struct devlink *devlink; - struct ptp_ocp *bp; -- int err; -+ int err, i; -+ u64 clkid; - - devlink = devlink_alloc(&ptp_ocp_devlink_ops, sizeof(*bp), &pdev->dev); - if (!devlink) { -@@ -4201,6 +4403,8 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id) - if (err) - goto out_disable; - -+ INIT_DELAYED_WORK(&bp->sync_work, ptp_ocp_sync_work); -+ - /* compat mode. - * Older FPGA firmware only returns 2 irq's. - * allow this - if not all of the IRQ's are returned, skip the -@@ -4232,8 +4436,43 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id) - - ptp_ocp_info(bp); - devlink_register(devlink); -- return 0; - -+ clkid = pci_get_dsn(pdev); -+ bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); -+ if (IS_ERR(bp->dpll)) { -+ err = PTR_ERR(bp->dpll); -+ dev_err(&pdev->dev, "dpll_device_alloc failed\n"); -+ goto out; -+ } -+ -+ err = dpll_device_register(bp->dpll, DPLL_TYPE_PPS, &dpll_ops, bp); -+ if (err) -+ goto out; -+ -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE, &bp->sma[i].dpll_prop); -+ if (IS_ERR(bp->sma[i].dpll_pin)) { -+ err = PTR_ERR(bp->dpll); -+ goto out_dpll; -+ } -+ -+ err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, -+ &bp->sma[i]); -+ if (err) { -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ goto out_dpll; -+ } -+ } -+ queue_delayed_work(system_power_efficient_wq, &bp->sync_work, HZ); -+ -+ return 0; -+out_dpll: -+ while (i) { -+ --i; -+ dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ } -+ dpll_device_put(bp->dpll); - out: - ptp_ocp_detach(bp); - out_disable: -@@ -4248,7 +4487,17 @@ ptp_ocp_remove(struct pci_dev *pdev) - { - struct ptp_ocp *bp = pci_get_drvdata(pdev); - struct devlink *devlink = priv_to_devlink(bp); -+ int i; - -+ cancel_delayed_work_sync(&bp->sync_work); -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ if (bp->sma[i].dpll_pin) { -+ dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, bp); -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ } -+ } -+ dpll_device_unregister(bp->dpll, &dpll_ops, bp); -+ dpll_device_put(bp->dpll); - devlink_unregister(devlink); - ptp_ocp_detach(bp); - pci_disable_device(pdev); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch b/kernel-rt/debian/patches/ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch deleted file mode 100644 index c609aacb..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch +++ /dev/null @@ -1,624 +0,0 @@ -From 5f8d07324a98db8f49c8ff40b71c62eba801b0eb Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 13 Sep 2023 21:49:43 +0100 -Subject: [PATCH 09/46] mlx5: Implement SyncE support using DPLL infrastructure - -Implement SyncE support using newly introduced DPLL support. -Make sure that each PFs/VFs/SFs probed with appropriate capability -will spawn a dpll auxiliary device and register appropriate dpll device -and pin instances. - -Signed-off-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: David S. Miller -(cherry picked from commit 496fd0a26bbf73b6b12407ee4fbe5ff49d659a6d) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/mellanox/mlx5/core/Kconfig | 8 + - .../net/ethernet/mellanox/mlx5/core/Makefile | 3 + - drivers/net/ethernet/mellanox/mlx5/core/dev.c | 17 + - .../net/ethernet/mellanox/mlx5/core/dpll.c | 432 ++++++++++++++++++ - include/linux/mlx5/driver.h | 2 + - include/linux/mlx5/mlx5_ifc.h | 59 ++- - 6 files changed, 520 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/dpll.c - -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig -index c4f4de82e29e..685335832a93 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig -+++ b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig -@@ -189,3 +189,11 @@ config MLX5_SF_MANAGER - port is managed through devlink. A subfunction supports RDMA, netdevice - and vdpa device. It is similar to a SRIOV VF but it doesn't require - SRIOV support. -+ -+config MLX5_DPLL -+ tristate "Mellanox 5th generation network adapters (ConnectX series) DPLL support" -+ depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE -+ select DPLL -+ help -+ DPLL support in Mellanox Technologies ConnectX NICs. -+ -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile -index 7e94caca4888..c44870b175f9 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile -+++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile -@@ -128,3 +128,6 @@ mlx5_core-$(CONFIG_MLX5_SF) += sf/vhca_event.o sf/dev/dev.o sf/dev/driver.o irq_ - # SF manager - # - mlx5_core-$(CONFIG_MLX5_SF_MANAGER) += sf/cmd.o sf/hw_table.o sf/devlink.o -+ -+obj-$(CONFIG_MLX5_DPLL) += mlx5_dpll.o -+mlx5_dpll-y := dpll.o -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/dev.c -index 7909f378dc93..1fc03480c2ff 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/dev.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/dev.c -@@ -206,6 +206,19 @@ static bool is_ib_enabled(struct mlx5_core_dev *dev) - return err ? false : val.vbool; - } - -+static bool is_dpll_supported(struct mlx5_core_dev *dev) -+{ -+ if (!IS_ENABLED(CONFIG_MLX5_DPLL)) -+ return false; -+ -+ if (!MLX5_CAP_MCAM_REG2(dev, synce_registers)) { -+ mlx5_core_warn(dev, "Missing SyncE capability\n"); -+ return false; -+ } -+ -+ return true; -+} -+ - enum { - MLX5_INTERFACE_PROTOCOL_ETH, - MLX5_INTERFACE_PROTOCOL_ETH_REP, -@@ -215,6 +228,8 @@ enum { - MLX5_INTERFACE_PROTOCOL_MPIB, - - MLX5_INTERFACE_PROTOCOL_VNET, -+ -+ MLX5_INTERFACE_PROTOCOL_DPLL, - }; - - static const struct mlx5_adev_device { -@@ -237,6 +252,8 @@ static const struct mlx5_adev_device { - .is_supported = &is_ib_rep_supported }, - [MLX5_INTERFACE_PROTOCOL_MPIB] = { .suffix = "multiport", - .is_supported = &is_mp_supported }, -+ [MLX5_INTERFACE_PROTOCOL_DPLL] = { .suffix = "dpll", -+ .is_supported = &is_dpll_supported }, - }; - - int mlx5_adev_idx_alloc(void) -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -new file mode 100644 -index 000000000000..74f0c7867120 ---- /dev/null -+++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -@@ -0,0 +1,432 @@ -+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB -+/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ -+ -+#include -+#include -+ -+/* This structure represents a reference to DPLL, one is created -+ * per mdev instance. -+ */ -+struct mlx5_dpll { -+ struct dpll_device *dpll; -+ struct dpll_pin *dpll_pin; -+ struct mlx5_core_dev *mdev; -+ struct workqueue_struct *wq; -+ struct delayed_work work; -+ struct { -+ bool valid; -+ enum dpll_lock_status lock_status; -+ enum dpll_pin_state pin_state; -+ } last; -+ struct notifier_block mdev_nb; -+ struct net_device *tracking_netdev; -+}; -+ -+static int mlx5_dpll_clock_id_get(struct mlx5_core_dev *mdev, u64 *clock_id) -+{ -+ u32 out[MLX5_ST_SZ_DW(msecq_reg)] = {}; -+ u32 in[MLX5_ST_SZ_DW(msecq_reg)] = {}; -+ int err; -+ -+ err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), -+ MLX5_REG_MSECQ, 0, 0); -+ if (err) -+ return err; -+ *clock_id = MLX5_GET64(msecq_reg, out, local_clock_identity); -+ return 0; -+} -+ -+static int -+mlx5_dpll_synce_status_get(struct mlx5_core_dev *mdev, -+ enum mlx5_msees_admin_status *admin_status, -+ enum mlx5_msees_oper_status *oper_status, -+ bool *ho_acq) -+{ -+ u32 out[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ u32 in[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ int err; -+ -+ err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), -+ MLX5_REG_MSEES, 0, 0); -+ if (err) -+ return err; -+ if (admin_status) -+ *admin_status = MLX5_GET(msees_reg, out, admin_status); -+ *oper_status = MLX5_GET(msees_reg, out, oper_status); -+ if (ho_acq) -+ *ho_acq = MLX5_GET(msees_reg, out, ho_acq); -+ return 0; -+} -+ -+static int -+mlx5_dpll_synce_status_set(struct mlx5_core_dev *mdev, -+ enum mlx5_msees_admin_status admin_status) -+{ -+ u32 out[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ u32 in[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ -+ MLX5_SET(msees_reg, in, field_select, -+ MLX5_MSEES_FIELD_SELECT_ENABLE | -+ MLX5_MSEES_FIELD_SELECT_ADMIN_STATUS); -+ MLX5_SET(msees_reg, in, admin_status, admin_status); -+ return mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), -+ MLX5_REG_MSEES, 0, 1); -+} -+ -+static enum dpll_lock_status -+mlx5_dpll_lock_status_get(enum mlx5_msees_oper_status oper_status, bool ho_acq) -+{ -+ switch (oper_status) { -+ case MLX5_MSEES_OPER_STATUS_SELF_TRACK: -+ fallthrough; -+ case MLX5_MSEES_OPER_STATUS_OTHER_TRACK: -+ return ho_acq ? DPLL_LOCK_STATUS_LOCKED_HO_ACQ : -+ DPLL_LOCK_STATUS_LOCKED; -+ case MLX5_MSEES_OPER_STATUS_HOLDOVER: -+ fallthrough; -+ case MLX5_MSEES_OPER_STATUS_FAIL_HOLDOVER: -+ return DPLL_LOCK_STATUS_HOLDOVER; -+ default: -+ return DPLL_LOCK_STATUS_UNLOCKED; -+ } -+} -+ -+static enum dpll_pin_state -+mlx5_dpll_pin_state_get(enum mlx5_msees_admin_status admin_status, -+ enum mlx5_msees_oper_status oper_status) -+{ -+ return (admin_status == MLX5_MSEES_ADMIN_STATUS_TRACK && -+ (oper_status == MLX5_MSEES_OPER_STATUS_SELF_TRACK || -+ oper_status == MLX5_MSEES_OPER_STATUS_OTHER_TRACK)) ? -+ DPLL_PIN_STATE_CONNECTED : DPLL_PIN_STATE_DISCONNECTED; -+} -+ -+static int mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack) -+{ -+ enum mlx5_msees_oper_status oper_status; -+ struct mlx5_dpll *mdpll = priv; -+ bool ho_acq; -+ int err; -+ -+ err = mlx5_dpll_synce_status_get(mdpll->mdev, NULL, -+ &oper_status, &ho_acq); -+ if (err) -+ return err; -+ -+ *status = mlx5_dpll_lock_status_get(oper_status, ho_acq); -+ return 0; -+} -+ -+static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, -+ void *priv, -+ u32 *mode, struct netlink_ext_ack *extack) -+{ -+ *mode = DPLL_MODE_MANUAL; -+ return 0; -+} -+ -+static bool mlx5_dpll_device_mode_supported(const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_mode mode, -+ struct netlink_ext_ack *extack) -+{ -+ return mode == DPLL_MODE_MANUAL; -+} -+ -+static const struct dpll_device_ops mlx5_dpll_device_ops = { -+ .lock_status_get = mlx5_dpll_device_lock_status_get, -+ .mode_get = mlx5_dpll_device_mode_get, -+ .mode_supported = mlx5_dpll_device_mode_supported, -+}; -+ -+static int mlx5_dpll_pin_direction_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ *direction = DPLL_PIN_DIRECTION_INPUT; -+ return 0; -+} -+ -+static int mlx5_dpll_state_on_dpll_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ enum mlx5_msees_admin_status admin_status; -+ enum mlx5_msees_oper_status oper_status; -+ struct mlx5_dpll *mdpll = pin_priv; -+ int err; -+ -+ err = mlx5_dpll_synce_status_get(mdpll->mdev, &admin_status, -+ &oper_status, NULL); -+ if (err) -+ return err; -+ *state = mlx5_dpll_pin_state_get(admin_status, oper_status); -+ return 0; -+} -+ -+static int mlx5_dpll_state_on_dpll_set(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlx5_dpll *mdpll = pin_priv; -+ -+ return mlx5_dpll_synce_status_set(mdpll->mdev, -+ state == DPLL_PIN_STATE_CONNECTED ? -+ MLX5_MSEES_ADMIN_STATUS_TRACK : -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING); -+} -+ -+static const struct dpll_pin_ops mlx5_dpll_pins_ops = { -+ .direction_get = mlx5_dpll_pin_direction_get, -+ .state_on_dpll_get = mlx5_dpll_state_on_dpll_get, -+ .state_on_dpll_set = mlx5_dpll_state_on_dpll_set, -+}; -+ -+static const struct dpll_pin_properties mlx5_dpll_pin_properties = { -+ .type = DPLL_PIN_TYPE_SYNCE_ETH_PORT, -+ .capabilities = DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE, -+}; -+ -+#define MLX5_DPLL_PERIODIC_WORK_INTERVAL 500 /* ms */ -+ -+static void mlx5_dpll_periodic_work_queue(struct mlx5_dpll *mdpll) -+{ -+ queue_delayed_work(mdpll->wq, &mdpll->work, -+ msecs_to_jiffies(MLX5_DPLL_PERIODIC_WORK_INTERVAL)); -+} -+ -+static void mlx5_dpll_periodic_work(struct work_struct *work) -+{ -+ struct mlx5_dpll *mdpll = container_of(work, struct mlx5_dpll, -+ work.work); -+ enum mlx5_msees_admin_status admin_status; -+ enum mlx5_msees_oper_status oper_status; -+ enum dpll_lock_status lock_status; -+ enum dpll_pin_state pin_state; -+ bool ho_acq; -+ int err; -+ -+ err = mlx5_dpll_synce_status_get(mdpll->mdev, &admin_status, -+ &oper_status, &ho_acq); -+ if (err) -+ goto err_out; -+ lock_status = mlx5_dpll_lock_status_get(oper_status, ho_acq); -+ pin_state = mlx5_dpll_pin_state_get(admin_status, oper_status); -+ -+ if (!mdpll->last.valid) -+ goto invalid_out; -+ -+ if (mdpll->last.lock_status != lock_status) -+ dpll_device_change_ntf(mdpll->dpll); -+ if (mdpll->last.pin_state != pin_state) -+ dpll_pin_change_ntf(mdpll->dpll_pin); -+ -+invalid_out: -+ mdpll->last.lock_status = lock_status; -+ mdpll->last.pin_state = pin_state; -+ mdpll->last.valid = true; -+err_out: -+ mlx5_dpll_periodic_work_queue(mdpll); -+} -+ -+static void mlx5_dpll_netdev_dpll_pin_set(struct mlx5_dpll *mdpll, -+ struct net_device *netdev) -+{ -+ if (mdpll->tracking_netdev) -+ return; -+ netdev_dpll_pin_set(netdev, mdpll->dpll_pin); -+ mdpll->tracking_netdev = netdev; -+} -+ -+static void mlx5_dpll_netdev_dpll_pin_clear(struct mlx5_dpll *mdpll) -+{ -+ if (!mdpll->tracking_netdev) -+ return; -+ netdev_dpll_pin_clear(mdpll->tracking_netdev); -+ mdpll->tracking_netdev = NULL; -+} -+ -+static int mlx5_dpll_mdev_notifier_event(struct notifier_block *nb, -+ unsigned long event, void *data) -+{ -+ struct mlx5_dpll *mdpll = container_of(nb, struct mlx5_dpll, mdev_nb); -+ struct net_device *netdev = data; -+ -+ switch (event) { -+ case MLX5_DRIVER_EVENT_UPLINK_NETDEV: -+ if (netdev) -+ mlx5_dpll_netdev_dpll_pin_set(mdpll, netdev); -+ else -+ mlx5_dpll_netdev_dpll_pin_clear(mdpll); -+ break; -+ default: -+ return NOTIFY_DONE; -+ } -+ -+ return NOTIFY_OK; -+} -+ -+static void mlx5_dpll_mdev_netdev_track(struct mlx5_dpll *mdpll, -+ struct mlx5_core_dev *mdev) -+{ -+ mdpll->mdev_nb.notifier_call = mlx5_dpll_mdev_notifier_event; -+ mlx5_blocking_notifier_register(mdev, &mdpll->mdev_nb); -+ mlx5_core_uplink_netdev_event_replay(mdev); -+} -+ -+static void mlx5_dpll_mdev_netdev_untrack(struct mlx5_dpll *mdpll, -+ struct mlx5_core_dev *mdev) -+{ -+ mlx5_blocking_notifier_unregister(mdev, &mdpll->mdev_nb); -+ mlx5_dpll_netdev_dpll_pin_clear(mdpll); -+} -+ -+static int mlx5_dpll_probe(struct auxiliary_device *adev, -+ const struct auxiliary_device_id *id) -+{ -+ struct mlx5_adev *edev = container_of(adev, struct mlx5_adev, adev); -+ struct mlx5_core_dev *mdev = edev->mdev; -+ struct mlx5_dpll *mdpll; -+ u64 clock_id; -+ int err; -+ -+ err = mlx5_dpll_synce_status_set(mdev, -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING); -+ if (err) -+ return err; -+ -+ err = mlx5_dpll_clock_id_get(mdev, &clock_id); -+ if (err) -+ return err; -+ -+ mdpll = kzalloc(sizeof(*mdpll), GFP_KERNEL); -+ if (!mdpll) -+ return -ENOMEM; -+ mdpll->mdev = mdev; -+ auxiliary_set_drvdata(adev, mdpll); -+ -+ /* Multiple mdev instances might share one DPLL device. */ -+ mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE); -+ if (IS_ERR(mdpll->dpll)) { -+ err = PTR_ERR(mdpll->dpll); -+ goto err_free_mdpll; -+ } -+ -+ err = dpll_device_register(mdpll->dpll, DPLL_TYPE_EEC, -+ &mlx5_dpll_device_ops, mdpll); -+ if (err) -+ goto err_put_dpll_device; -+ -+ /* Multiple mdev instances might share one DPLL pin. */ -+ mdpll->dpll_pin = dpll_pin_get(clock_id, mlx5_get_dev_index(mdev), -+ THIS_MODULE, &mlx5_dpll_pin_properties); -+ if (IS_ERR(mdpll->dpll_pin)) { -+ err = PTR_ERR(mdpll->dpll_pin); -+ goto err_unregister_dpll_device; -+ } -+ -+ err = dpll_pin_register(mdpll->dpll, mdpll->dpll_pin, -+ &mlx5_dpll_pins_ops, mdpll); -+ if (err) -+ goto err_put_dpll_pin; -+ -+ mdpll->wq = create_singlethread_workqueue("mlx5_dpll"); -+ if (!mdpll->wq) { -+ err = -ENOMEM; -+ goto err_unregister_dpll_pin; -+ } -+ -+ mlx5_dpll_mdev_netdev_track(mdpll, mdev); -+ -+ INIT_DELAYED_WORK(&mdpll->work, &mlx5_dpll_periodic_work); -+ mlx5_dpll_periodic_work_queue(mdpll); -+ -+ return 0; -+ -+err_unregister_dpll_pin: -+ dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin, -+ &mlx5_dpll_pins_ops, mdpll); -+err_put_dpll_pin: -+ dpll_pin_put(mdpll->dpll_pin); -+err_unregister_dpll_device: -+ dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll); -+err_put_dpll_device: -+ dpll_device_put(mdpll->dpll); -+err_free_mdpll: -+ kfree(mdpll); -+ return err; -+} -+ -+static void mlx5_dpll_remove(struct auxiliary_device *adev) -+{ -+ struct mlx5_dpll *mdpll = auxiliary_get_drvdata(adev); -+ struct mlx5_core_dev *mdev = mdpll->mdev; -+ -+ cancel_delayed_work(&mdpll->work); -+ mlx5_dpll_mdev_netdev_untrack(mdpll, mdev); -+ destroy_workqueue(mdpll->wq); -+ dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin, -+ &mlx5_dpll_pins_ops, mdpll); -+ dpll_pin_put(mdpll->dpll_pin); -+ dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll); -+ dpll_device_put(mdpll->dpll); -+ kfree(mdpll); -+ -+ mlx5_dpll_synce_status_set(mdev, -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING); -+} -+ -+static int mlx5_dpll_suspend(struct auxiliary_device *adev, pm_message_t state) -+{ -+ return 0; -+} -+ -+static int mlx5_dpll_resume(struct auxiliary_device *adev) -+{ -+ return 0; -+} -+ -+static const struct auxiliary_device_id mlx5_dpll_id_table[] = { -+ { .name = MLX5_ADEV_NAME ".dpll", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(auxiliary, mlx5_dpll_id_table); -+ -+static struct auxiliary_driver mlx5_dpll_driver = { -+ .name = "dpll", -+ .probe = mlx5_dpll_probe, -+ .remove = mlx5_dpll_remove, -+ .suspend = mlx5_dpll_suspend, -+ .resume = mlx5_dpll_resume, -+ .id_table = mlx5_dpll_id_table, -+}; -+ -+static int __init mlx5_dpll_init(void) -+{ -+ return auxiliary_driver_register(&mlx5_dpll_driver); -+} -+ -+static void __exit mlx5_dpll_exit(void) -+{ -+ auxiliary_driver_unregister(&mlx5_dpll_driver); -+} -+ -+module_init(mlx5_dpll_init); -+module_exit(mlx5_dpll_exit); -+ -+MODULE_AUTHOR("Jiri Pirko "); -+MODULE_DESCRIPTION("Mellanox 5th generation network adapters (ConnectX series) DPLL driver"); -+MODULE_LICENSE("Dual BSD/GPL"); -diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h -index ffb98bc43b2d..8829fc8646e0 100644 ---- a/include/linux/mlx5/driver.h -+++ b/include/linux/mlx5/driver.h -@@ -155,6 +155,8 @@ enum { - MLX5_REG_MCC = 0x9062, - MLX5_REG_MCDA = 0x9063, - MLX5_REG_MCAM = 0x907f, -+ MLX5_REG_MSECQ = 0x9155, -+ MLX5_REG_MSEES = 0x9156, - MLX5_REG_MIRC = 0x9162, - MLX5_REG_SBCAM = 0xB01F, - MLX5_REG_RESOURCE_DUMP = 0xC000, -diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h -index 3d1cd726df34..c959a2a654df 100644 ---- a/include/linux/mlx5/mlx5_ifc.h -+++ b/include/linux/mlx5/mlx5_ifc.h -@@ -10178,7 +10178,9 @@ struct mlx5_ifc_mcam_access_reg_bits2 { - u8 mirc[0x1]; - u8 regs_97_to_96[0x2]; - -- u8 regs_95_to_64[0x20]; -+ u8 regs_95_to_87[0x09]; -+ u8 synce_registers[0x2]; -+ u8 regs_84_to_64[0x15]; - - u8 regs_63_to_32[0x20]; - -@@ -12558,4 +12560,59 @@ struct mlx5_ifc_modify_page_track_obj_in_bits { - struct mlx5_ifc_page_track_bits obj_context; - }; - -+struct mlx5_ifc_msecq_reg_bits { -+ u8 reserved_at_0[0x20]; -+ -+ u8 reserved_at_20[0x12]; -+ u8 network_option[0x2]; -+ u8 local_ssm_code[0x4]; -+ u8 local_enhanced_ssm_code[0x8]; -+ -+ u8 local_clock_identity[0x40]; -+ -+ u8 reserved_at_80[0x180]; -+}; -+ -+enum { -+ MLX5_MSEES_FIELD_SELECT_ENABLE = BIT(0), -+ MLX5_MSEES_FIELD_SELECT_ADMIN_STATUS = BIT(1), -+ MLX5_MSEES_FIELD_SELECT_ADMIN_FREQ_MEASURE = BIT(2), -+}; -+ -+enum mlx5_msees_admin_status { -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING = 0x0, -+ MLX5_MSEES_ADMIN_STATUS_TRACK = 0x1, -+}; -+ -+enum mlx5_msees_oper_status { -+ MLX5_MSEES_OPER_STATUS_FREE_RUNNING = 0x0, -+ MLX5_MSEES_OPER_STATUS_SELF_TRACK = 0x1, -+ MLX5_MSEES_OPER_STATUS_OTHER_TRACK = 0x2, -+ MLX5_MSEES_OPER_STATUS_HOLDOVER = 0x3, -+ MLX5_MSEES_OPER_STATUS_FAIL_HOLDOVER = 0x4, -+ MLX5_MSEES_OPER_STATUS_FAIL_FREE_RUNNING = 0x5, -+}; -+ -+struct mlx5_ifc_msees_reg_bits { -+ u8 reserved_at_0[0x8]; -+ u8 local_port[0x8]; -+ u8 pnat[0x2]; -+ u8 lp_msb[0x2]; -+ u8 reserved_at_14[0xc]; -+ -+ u8 field_select[0x20]; -+ -+ u8 admin_status[0x4]; -+ u8 oper_status[0x4]; -+ u8 ho_acq[0x1]; -+ u8 reserved_at_49[0xc]; -+ u8 admin_freq_measure[0x1]; -+ u8 oper_freq_measure[0x1]; -+ u8 failure_reason[0x9]; -+ -+ u8 frequency_diff[0x20]; -+ -+ u8 reserved_at_80[0x180]; -+}; -+ - #endif /* MLX5_IFC_H */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch b/kernel-rt/debian/patches/ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch deleted file mode 100644 index d7713467..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 3d465acb6c1390963cef5bfc5d6fc6c957294104 Mon Sep 17 00:00:00 2001 -From: Yang Li -Date: Tue, 19 Sep 2023 09:03:05 +0800 -Subject: [PATCH 10/46] netdev: Remove unneeded semicolon - -./drivers/dpll/dpll_netlink.c:847:3-4: Unneeded semicolon - -Reported-by: Abaci Robot -Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=6605 -Signed-off-by: Yang Li -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202309190540.RFwfIgO7-lkp@intel.com/ -Link: https://lore.kernel.org/r/20230919010305.120991-1-yang.lee@linux.alibaba.com -Signed-off-by: Paolo Abeni -(cherry picked from commit f20161cf51657bf4c85380c0c1c80188a74f168d) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 764437a0661b..e20daba6896a 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -844,7 +844,7 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, - return ERR_PTR(-EINVAL); - } - pin_match = pin; -- }; -+ } - } - if (!pin_match) { - NL_SET_ERR_MSG(extack, "not found"); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch b/kernel-rt/debian/patches/ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch deleted file mode 100644 index 928da450..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 44ad8b2bd48e3a01f46e10aebb59e8e0a52dc9b1 Mon Sep 17 00:00:00 2001 -From: Lukas Bulwahn -Date: Mon, 25 Sep 2023 07:43:05 +0200 -Subject: [PATCH 11/46] MAINTAINERS: adjust header file entry in DPLL SUBSYSTEM - -Commit 9431063ad323 ("dpll: core: Add DPLL framework base functions") adds -the section DPLL SUBSYSTEM in MAINTAINERS and includes a file entry to the -non-existing file 'include/net/dpll.h'. - -Hence, ./scripts/get_maintainer.pl --self-test=patterns complains about a -broken reference. Looking at the file stat of the commit above, this entry -clearly intended to refer to 'include/linux/dpll.h'. - -Adjust this header file entry in DPLL SUBSYSTEM. - -Signed-off-by: Lukas Bulwahn -Reviewed-by: Vadim Fedorenko -Signed-off-by: David S. Miller -(cherry picked from commit 20f7cce7cf18020cd2b052a6441a7d1623f0e352) -Signed-off-by: Jiping Ma ---- - MAINTAINERS | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/MAINTAINERS b/MAINTAINERS -index 531d44ed1e7b..ba98a1973524 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -6373,7 +6373,7 @@ L: netdev@vger.kernel.org - S: Supported - F: Documentation/driver-api/dpll.rst - F: drivers/dpll/* --F: include/net/dpll.h -+F: include/linux/dpll.h - F: include/uapi/linux/dpll.h - - DRBD DRIVER --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch b/kernel-rt/debian/patches/ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch deleted file mode 100644 index fd2c12c2..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 28fb3199a16a20f9939236fb7cbd5821046de923 Mon Sep 17 00:00:00 2001 -From: Bagas Sanjaya -Date: Thu, 28 Sep 2023 12:27:07 +0700 -Subject: [PATCH 12/46] Documentation: dpll: Fix code blocks - -kernel test robot and Stephen Rothwell report htmldocs warnings: - -Documentation/driver-api/dpll.rst:427: WARNING: Error in "code-block" directive: -maximum 1 argument(s) allowed, 18 supplied. - -.. code-block:: c - ... -Documentation/driver-api/dpll.rst:444: WARNING: Error in "code-block" directive: -maximum 1 argument(s) allowed, 21 supplied. - -.. code-block:: c - ... -Documentation/driver-api/dpll.rst:474: WARNING: Error in "code-block" directive: -maximum 1 argument(s) allowed, 12 supplied. - -.. code-block:: c - ... - -Fix these above by adding missing blank line separator after code-block -directive. - -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202309180456.lOhxy9gS-lkp@intel.com/ -Reported-by: Stephen Rothwell -Closes: https://lore.kernel.org/linux-next/20230918131521.155e9e63@canb.auug.org.au/ -Fixes: dbb291f19393b6 ("dpll: documentation on DPLL subsystem interface") -Signed-off-by: Bagas Sanjaya -Acked-by: Randy Dunlap -Tested-by: Randy Dunlap -Reviewed-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20230928052708.44820-2-bagasdotme@gmail.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 92425d08a60814b4a2e91626f1e24e4fd5fd5c7e) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -index bb52f1b8c0be..01eb4de86703 100644 ---- a/Documentation/driver-api/dpll.rst -+++ b/Documentation/driver-api/dpll.rst -@@ -425,6 +425,7 @@ The simplest implementation is in the OCP TimeCard driver. The ops - structures are defined like this: - - .. code-block:: c -+ - static const struct dpll_device_ops dpll_ops = { - .lock_status_get = ptp_ocp_dpll_lock_status_get, - .mode_get = ptp_ocp_dpll_mode_get, -@@ -442,6 +443,7 @@ structures are defined like this: - The registration part is then looks like this part: - - .. code-block:: c -+ - clkid = pci_get_dsn(pdev); - bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); - if (IS_ERR(bp->dpll)) { -@@ -472,6 +474,7 @@ The registration part is then looks like this part: - In the error path we have to rewind every allocation in the reverse order: - - .. code-block:: c -+ - while (i) { - --i; - dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch b/kernel-rt/debian/patches/ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch deleted file mode 100644 index 7eb50453..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch +++ /dev/null @@ -1,61 +0,0 @@ -From d77ae1b7c63966150bf19653579623f532e8cafb Mon Sep 17 00:00:00 2001 -From: Bagas Sanjaya -Date: Thu, 28 Sep 2023 12:27:08 +0700 -Subject: [PATCH 13/46] Documentation: dpll: wrap DPLL_CMD_PIN_GET output in a - code block - -DPLL_CMD_PIN_GET netlink command output for mux-type pins looks ugly -with normal paragraph formatting. Format it as a code block instead. - -Signed-off-by: Bagas Sanjaya -Acked-by: Randy Dunlap -Tested-by: Randy Dunlap -Reviewed-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20230928052708.44820-3-bagasdotme@gmail.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit c8afdc01832943fab030103bd027ce021d26ddcf) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 26 +++++++++++++------------- - 1 file changed, 13 insertions(+), 13 deletions(-) - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -index 01eb4de86703..69670deb8c4e 100644 ---- a/Documentation/driver-api/dpll.rst -+++ b/Documentation/driver-api/dpll.rst -@@ -119,19 +119,19 @@ with. - If a pin was registered with multiple parent pins, they behave like a - multiple output multiplexer. In this case output of a - ``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested --attributes with current state related to each parent, like: -- --'pin': [{{ -- 'clock-id': 282574471561216, -- 'module-name': 'ice', -- 'capabilities': 4, -- 'id': 13, -- 'parent-pin': [ -- {'parent-id': 2, 'state': 'connected'}, -- {'parent-id': 3, 'state': 'disconnected'} -- ], -- 'type': 'synce-eth-port' -- }}] -+attributes with current state related to each parent, like:: -+ -+ 'pin': [{{ -+ 'clock-id': 282574471561216, -+ 'module-name': 'ice', -+ 'capabilities': 4, -+ 'id': 13, -+ 'parent-pin': [ -+ {'parent-id': 2, 'state': 'connected'}, -+ {'parent-id': 3, 'state': 'disconnected'} -+ ], -+ 'type': 'synce-eth-port' -+ }}] - - Only one child pin can provide its signal to the parent MUX-type pin at - a time, the selection is done by requesting change of a child pin state --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch b/kernel-rt/debian/patches/ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch deleted file mode 100644 index 60f6384c..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch +++ /dev/null @@ -1,54 +0,0 @@ -From a04c89a000d99aef7d7e9ba9180cd70789250dee Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Wed, 16 Aug 2023 17:00:54 -0700 -Subject: [PATCH 14/46] ice: remove ICE_F_PTP_EXTTS feature flag - -The ICE_F_PTP_EXTTS feature flag is ostensibly intended to support checking -whether the device supports external timestamp pins. It is only checked in -E810-specific code flows, and is enabled for all E810-based devices. E822 -and E823 flows unconditionally enable external timestamp support. - -This makes the feature flag meaningless, as it is always enabled. Just -unconditionally enable support for external timestamp pins and remove this -unnecessary flag. - -Signed-off-by: Jacob Keller -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 12a5a28b565bfb5abab7ab17fe3c6a3c02a2affe) -[jma: Adjust the code for context changes, because https://git.yoctoproject.org/ - linux-yocto/commit/?h=v6.6.40&id=0d1b22367ec2 already included the part - of code.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 - - drivers/net/ethernet/intel/ice/ice_lib.c | 1 - - 2 files changed, 2 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 537d5939c28e..b9cd0113b859 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -199,7 +199,6 @@ extern const char ice_drv_ver[]; - - enum ice_feature { - ICE_F_DSCP, -- ICE_F_PTP_EXTTS, - ICE_F_PHY_RCLK, - ICE_F_SMA_CTRL, - ICE_F_CGU, -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 2847fc17d224..f7a0dd570b34 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4007,7 +4007,6 @@ void ice_init_feature_support(struct ice_pf *pf) - case ICE_DEV_ID_E810_XXV_QSFP: - case ICE_DEV_ID_E810_XXV_SFP: - ice_set_feature_support(pf, ICE_F_DSCP); -- ice_set_feature_support(pf, ICE_F_PTP_EXTTS); - if (ice_is_phy_rclk_present(&pf->hw)) - ice_set_feature_support(pf, ICE_F_PHY_RCLK); - /* If we don't own the timer - don't enable other caps */ --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch b/kernel-rt/debian/patches/ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch deleted file mode 100644 index ad475e83..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 24aee90e5bf889b197efdd2b0bdb3676d68c7ded Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Wed, 16 Aug 2023 17:00:58 -0700 -Subject: [PATCH 15/46] ice: check netlist before enabling ICE_F_GNSS - -Similar to the change made for ICE_F_SMA_CTRL, check the netlist before -enabling support for ICE_F_GNSS. This ensures that the driver only enables -the GNSS feature on devices which actually have the feature enabled in the -firmware device configuration. - -Signed-off-by: Jacob Keller -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 89776a6a702e9b7bf9ae1691621f9699b2c18cc1) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 2 ++ - drivers/net/ethernet/intel/ice/ice_common.c | 15 +++++++++++++++ - drivers/net/ethernet/intel/ice/ice_common.h | 1 + - drivers/net/ethernet/intel/ice/ice_gnss.c | 3 +++ - 4 files changed, 21 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index aa532bfa1957..353ac55bdb9d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -1394,6 +1394,7 @@ struct ice_aqc_link_topo_params { - #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 -+#define ICE_AQC_LINK_TOPO_NODE_TYPE_GPS 11 - #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 - #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ - (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) -@@ -1436,6 +1437,7 @@ struct ice_aqc_get_link_topo { - #define ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY 0x30 - #define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 - #define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48 - u8 rsvd[9]; - }; - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 089558b3b1ae..8f31ae449948 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -2764,6 +2764,21 @@ bool ice_is_pf_c827(struct ice_hw *hw) - return false; - } - -+/** -+ * ice_is_gps_in_netlist -+ * @hw: pointer to the hw struct -+ * -+ * Check if the GPS generic device is present in the netlist -+ */ -+bool ice_is_gps_in_netlist(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL)) -+ return false; -+ -+ return true; -+} -+ - /** - * ice_aq_list_caps - query function/device capabilities - * @hw: pointer to the HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 74e44b450de4..47a75651ca38 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -93,6 +93,7 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, - struct ice_aqc_get_phy_caps_data *caps, - struct ice_sq_cd *cd); - bool ice_is_pf_c827(struct ice_hw *hw); -+bool ice_is_gps_in_netlist(struct ice_hw *hw); - int - ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, - u16 *node_handle); -diff --git a/drivers/net/ethernet/intel/ice/ice_gnss.c b/drivers/net/ethernet/intel/ice/ice_gnss.c -index 75c9de675f20..c8ea1af51ad3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_gnss.c -+++ b/drivers/net/ethernet/intel/ice/ice_gnss.c -@@ -389,6 +389,9 @@ bool ice_gnss_is_gps_present(struct ice_hw *hw) - if (!hw->func_caps.ts_func_info.src_tmr_owned) - return false; - -+ if (!ice_is_gps_in_netlist(hw)) -+ return false; -+ - #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) - if (ice_is_e810t(hw)) { - int err; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch b/kernel-rt/debian/patches/ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch deleted file mode 100644 index b5a8ceab..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch +++ /dev/null @@ -1,347 +0,0 @@ -From 97de9017c0311e01f354af4f70edb94d7dc58f80 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 2 Oct 2023 11:51:32 -0700 -Subject: [PATCH 16/46] ice: fix linking when CONFIG_PTP_1588_CLOCK=n - -The recent support for DPLL introduced by commit 8a3a565ff210 ("ice: add -admin commands to access cgu configuration") and commit d7999f5ea64b ("ice: -implement dpll interface to control cgu") broke linking the ice driver if -CONFIG_PTP_1588_CLOCK=n: - -ld: vmlinux.o: in function `ice_init_feature_support': -(.text+0x8702b8): undefined reference to `ice_is_phy_rclk_present' -ld: (.text+0x8702cd): undefined reference to `ice_is_cgu_present' -ld: (.text+0x8702d9): undefined reference to `ice_is_clock_mux_present_e810t' -ld: vmlinux.o: in function `ice_dpll_init_info_direct_pins': -ice_dpll.c:(.text+0x894167): undefined reference to `ice_cgu_get_pin_freq_supp' -ld: ice_dpll.c:(.text+0x894197): undefined reference to `ice_cgu_get_pin_name' -ld: ice_dpll.c:(.text+0x8941a8): undefined reference to `ice_cgu_get_pin_type' -ld: vmlinux.o: in function `ice_dpll_update_state': -ice_dpll.c:(.text+0x894494): undefined reference to `ice_get_cgu_state' -ld: vmlinux.o: in function `ice_dpll_init': -(.text+0x8953d5): undefined reference to `ice_get_cgu_rclk_pin_info' - -The first commit broke things by calling functions in -ice_init_feature_support that are compiled as part of ice_ptp_hw.o, -including: - -* ice_is_phy_rclk_present -* ice_is_clock_mux_present_e810t -* ice_is_cgU_present - -The second commit continued the break by calling several CGU functions -defined in ice_ptp_hw.c in the DPLL code. -Because the ice_dpll.c file is compiled unconditionally, it will not -link when CONFIG_PTP_1588_CLOCK=n. - -It might be possible to break this dependency and expose those functions -without CONFIG_PTP_1588_CLOCK, but that is not clear to me. - -For the DPLL case, simply compile ice_dpll.o only when we have -CONFIG_PTP_1588_CLOCK. Add stub no-op implementation of ice_dpll_init() and -ice_dpll_uninit() when CONFIG_PTP_1588_CLOCK=n into ice_dpll.h - -The other functions are part of checking the netlist to see if hardware -features are enabled. These checks don't really belong in ice_ptp_hw.c, and -make more sense as part of the ice_common.c file. We already have -ice_is_gps_in_netlist() in ice_common.c which is doing a similar check. - -Move the functions into ice_common.c and rename them to have the similar -postfix of "in_netlist()" to be more expressive of what they are actually -checking. - -This also makes the ice_find_netlist_node only called from within -ice_common.c, so its safe to mark it static and stop declaring it in the -ice_common.h header as well. - -Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202309191214.TaYEct4H-lkp@intel.com -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Tony Nguyen -Reviewed-by: Simon Horman -Tested-by: Simon Horman # build-tested -Link: https://lore.kernel.org/r/20231002185132.1575271-1-anthony.l.nguyen@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 91e43ca0090b5fd59302c3d150835299785f30ea) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/Makefile | 5 +- - drivers/net/ethernet/intel/ice/ice_common.c | 66 ++++++++++++++++++++- - drivers/net/ethernet/intel/ice/ice_common.h | 6 +- - drivers/net/ethernet/intel/ice/ice_dpll.h | 6 +- - drivers/net/ethernet/intel/ice/ice_lib.c | 6 +- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 66 --------------------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 3 - - 7 files changed, 76 insertions(+), 82 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 00806ddf5bf0..0679907980f7 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -34,8 +34,7 @@ ice-y := ice_main.o \ - ice_lag.o \ - ice_ethtool.o \ - ice_repr.o \ -- ice_tc_lib.o \ -- ice_dpll.o -+ ice_tc_lib.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -@@ -44,7 +43,7 @@ ice-$(CONFIG_PCI_IOV) += \ - ice_vf_mbx.o \ - ice_vf_vsi_vlan_ops.o \ - ice_vf_lib.o --ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o -+ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o ice_dpll.o - ice-$(CONFIG_DCB) += ice_dcb.o ice_dcb_nl.o ice_dcb_lib.o - ice-$(CONFIG_RFS_ACCEL) += ice_arfs.o - ice-$(CONFIG_XDP_SOCKETS) += ice_xsk.o -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 8f31ae449948..a1f1f037f327 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -477,9 +477,8 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, - * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST - * otherwise. If node_handle provided, it would be set to found node handle. - */ --int --ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -- u16 *node_handle) -+static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, -+ u8 node_part_number, u16 *node_handle) - { - struct ice_aqc_get_link_topo cmd; - u8 rec_node_part_number; -@@ -2764,6 +2763,67 @@ bool ice_is_pf_c827(struct ice_hw *hw) - return false; - } - -+/** -+ * ice_is_phy_rclk_in_netlist -+ * @hw: pointer to the hw struct -+ * -+ * Check if the PHY Recovered Clock device is present in the netlist -+ */ -+bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && -+ ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_is_clock_mux_in_netlist -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Multiplexer device is present in the netlist -+ */ -+bool ice_is_clock_mux_in_netlist(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, -+ NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_is_cgu_in_netlist - check for CGU presence -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Generation Unit (CGU) device is present in the netlist. -+ * Save the CGU part number in the hw structure for later use. -+ * Return: -+ * * true - cgu is present -+ * * false - cgu is not present -+ */ -+bool ice_is_cgu_in_netlist(struct ice_hw *hw) -+{ -+ if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; -+ return true; -+ } else if (!ice_find_netlist_node(hw, -+ ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; -+ return true; -+ } -+ -+ return false; -+} -+ - /** - * ice_is_gps_in_netlist - * @hw: pointer to the hw struct -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 47a75651ca38..7a966a0c224f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -93,11 +93,11 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, - struct ice_aqc_get_phy_caps_data *caps, - struct ice_sq_cd *cd); - bool ice_is_pf_c827(struct ice_hw *hw); -+bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw); -+bool ice_is_clock_mux_in_netlist(struct ice_hw *hw); -+bool ice_is_cgu_in_netlist(struct ice_hw *hw); - bool ice_is_gps_in_netlist(struct ice_hw *hw); - int --ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -- u16 *node_handle); --int - ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, - u8 *node_part_number, u16 *node_handle); - int -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -index 9c524c4bdfd7..2dfe764b81e1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.h -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -97,8 +97,12 @@ struct ice_dplls { - s32 output_phase_adj_max; - }; - -+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) - void ice_dpll_init(struct ice_pf *pf); -- - void ice_dpll_deinit(struct ice_pf *pf); -+#else -+static inline void ice_dpll_init(struct ice_pf *pf) { } -+static inline void ice_dpll_deinit(struct ice_pf *pf) { } -+#endif - - #endif -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index f7a0dd570b34..632091487413 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4007,14 +4007,14 @@ void ice_init_feature_support(struct ice_pf *pf) - case ICE_DEV_ID_E810_XXV_QSFP: - case ICE_DEV_ID_E810_XXV_SFP: - ice_set_feature_support(pf, ICE_F_DSCP); -- if (ice_is_phy_rclk_present(&pf->hw)) -+ if (ice_is_phy_rclk_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_PHY_RCLK); - /* If we don't own the timer - don't enable other caps */ - if (!pf->hw.func_caps.ts_func_info.src_tmr_owned) - break; -- if (ice_is_cgu_present(&pf->hw)) -+ if (ice_is_cgu_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_CGU); -- if (ice_is_clock_mux_present_e810t(&pf->hw)) -+ if (ice_is_clock_mux_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_SMA_CTRL); - if (ice_gnss_is_gps_present(&pf->hw)) - ice_set_feature_support(pf, ICE_F_GNSS); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 00ddf37296cc..8ccd633d9c2e 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -3479,45 +3479,6 @@ int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - return ice_clear_phy_tstamp_e822(hw, block, idx); - } - --/** -- * ice_is_phy_rclk_present - check recovered clk presence -- * @hw: pointer to the hw struct -- * -- * Check if the PHY Recovered Clock device is present in the netlist -- * Return: -- * * true - device found in netlist -- * * false - device not found -- */ --bool ice_is_phy_rclk_present(struct ice_hw *hw) --{ -- if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && -- ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) -- return false; -- -- return true; --} -- --/** -- * ice_is_clock_mux_present_e810t -- * @hw: pointer to the hw struct -- * -- * Check if the Clock Multiplexer device is present in the netlist -- * Return: -- * * true - device found in netlist -- * * false - device not found -- */ --bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) --{ -- if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, -- NULL)) -- return false; -- -- return true; --} -- - /** - * ice_get_pf_c827_idx - find and return the C827 index for the current pf - * @hw: pointer to the hw struct -@@ -3618,33 +3579,6 @@ int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - tstamp_ready); - } - --/** -- * ice_is_cgu_present - check for CGU presence -- * @hw: pointer to the hw struct -- * -- * Check if the Clock Generation Unit (CGU) device is present in the netlist -- * Return: -- * * true - cgu is present -- * * false - cgu is not present -- */ --bool ice_is_cgu_present(struct ice_hw *hw) --{ -- if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, -- NULL)) { -- hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; -- return true; -- } else if (!ice_find_netlist_node(hw, -- ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, -- NULL)) { -- hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; -- return true; -- } -- -- return false; --} -- - /** - * ice_cgu_get_pin_desc_e823 - get pin description array - * @hw: pointer to the hw struct -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 594cc6875a95..d81e77386b54 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -270,10 +270,7 @@ int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); - int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); - int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data); - bool ice_is_pca9575_present(struct ice_hw *hw); --bool ice_is_phy_rclk_present(struct ice_hw *hw); --bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); - int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx); --bool ice_is_cgu_present(struct ice_hw *hw); - enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input); - struct dpll_pin_frequency * - ice_cgu_get_pin_freq_supp(struct ice_hw *hw, u8 pin, bool input, u8 *num); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch b/kernel-rt/debian/patches/ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch deleted file mode 100644 index 1c29b719..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch +++ /dev/null @@ -1,48 +0,0 @@ -From c5af08d5854c37d5c12bc048e83024e552a3c438 Mon Sep 17 00:00:00 2001 -From: Nathan Chancellor -Date: Mon, 2 Oct 2023 13:55:20 -0700 -Subject: [PATCH 17/46] ptp: Fix type of mode parameter in - ptp_ocp_dpll_mode_get() - -When building with -Wincompatible-function-pointer-types-strict, a -warning designed to catch potential kCFI failures at build time rather -than run time due to incorrect function pointer types, there is a -warning due to a mismatch between the type of the mode parameter in -ptp_ocp_dpll_mode_get() vs. what the function pointer prototype for -->mode_get() in 'struct dpll_device_ops' expects. - - drivers/ptp/ptp_ocp.c:4353:14: error: incompatible function pointer types initializing 'int (*)(const struct dpll_device *, void *, enum dpll_mode *, struct netlink_ext_ack *)' with an expression of type 'int (const struct dpll_device *, void *, u32 *, struct netlink_ext_ack *)' (aka 'int (const struct dpll_device *, void *, unsigned int *, struct netlink_ext_ack *)') [-Werror,-Wincompatible-function-pointer-types-strict] - 4353 | .mode_get = ptp_ocp_dpll_mode_get, - | ^~~~~~~~~~~~~~~~~~~~~ - 1 error generated. - -Change the type of the mode parameter in ptp_ocp_dpll_mode_get() to -clear up the warning and avoid kCFI failures at run time. - -Fixes: 09eeb3aecc6c ("ptp_ocp: implement DPLL ops") -Signed-off-by: Nathan Chancellor -Reviewed-by: Simon Horman -Link: https://lore.kernel.org/r/20231002-net-wifpts-dpll_mode_get-v1-1-a356a16413cf@kernel.org -Signed-off-by: Jakub Kicinski -(cherry picked from commit 26cc115d590c70e66d8399f39e4d9973d26439bc) -Signed-off-by: Jiping Ma ---- - drivers/ptp/ptp_ocp.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c -index 41eaffcae462..30a7d08ef912 100644 ---- a/drivers/ptp/ptp_ocp.c -+++ b/drivers/ptp/ptp_ocp.c -@@ -4254,7 +4254,7 @@ static int ptp_ocp_dpll_state_get(const struct dpll_pin *pin, void *pin_priv, - } - - static int ptp_ocp_dpll_mode_get(const struct dpll_device *dpll, void *priv, -- u32 *mode, struct netlink_ext_ack *extack) -+ enum dpll_mode *mode, struct netlink_ext_ack *extack) - { - *mode = DPLL_MODE_AUTOMATIC; - return 0; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch b/kernel-rt/debian/patches/ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch deleted file mode 100644 index b8531771..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 3455575d5b1777e520c1b7157d5d6cca3b5bb30b Mon Sep 17 00:00:00 2001 -From: Nathan Chancellor -Date: Mon, 2 Oct 2023 13:55:21 -0700 -Subject: [PATCH 18/46] mlx5: Fix type of mode parameter in - mlx5_dpll_device_mode_get() - -When building with -Wincompatible-function-pointer-types-strict, a -warning designed to catch potential kCFI failures at build time rather -than run time due to incorrect function pointer types, there is a -warning due to a mismatch between the type of the mode parameter in -mlx5_dpll_device_mode_get() vs. what the function pointer prototype for -->mode_get() in 'struct dpll_device_ops' expects. - - drivers/net/ethernet/mellanox/mlx5/core/dpll.c:141:14: error: incompatible function pointer types initializing 'int (*)(const struct dpll_device *, void *, enum dpll_mode *, struct netlink_ext_ack *)' with an expression of type 'int (const struct dpll_device *, void *, u32 *, struct netlink_ext_ack *)' (aka 'int (const struct dpll_device *, void *, unsigned int *, struct netlink_ext_ack *)') [-Werror,-Wincompatible-function-pointer-types-strict] - 141 | .mode_get = mlx5_dpll_device_mode_get, - | ^~~~~~~~~~~~~~~~~~~~~~~~~ - 1 error generated. - -Change the type of the mode parameter in mlx5_dpll_device_mode_get() to -clear up the warning and avoid kCFI failures at run time. - -Fixes: 496fd0a26bbf ("mlx5: Implement SyncE support using DPLL infrastructure") -Signed-off-by: Nathan Chancellor -Reviewed-by: Simon Horman -Link: https://lore.kernel.org/r/20231002-net-wifpts-dpll_mode_get-v1-2-a356a16413cf@kernel.org -Signed-off-by: Jakub Kicinski -(cherry picked from commit f4ecb3d44a117b16029485325bda1bc98c26de36) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/mellanox/mlx5/core/dpll.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -index 74f0c7867120..2cd81bb32c66 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -@@ -121,8 +121,8 @@ static int mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, - } - - static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, -- void *priv, -- u32 *mode, struct netlink_ext_ack *extack) -+ void *priv, enum dpll_mode *mode, -+ struct netlink_ext_ack *extack) - { - *mode = DPLL_MODE_MANUAL; - return 0; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch b/kernel-rt/debian/patches/ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch deleted file mode 100644 index 6d95b174..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch +++ /dev/null @@ -1,177 +0,0 @@ -From a90e48a7c15fd31fe0a74ef674d3c483e4138e64 Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Fri, 6 Oct 2023 13:44:35 +0200 -Subject: [PATCH 19/46] tools: ynl-gen: lift type requirement for attribute - subsets - -In case an attribute is used in a subset, the type has to be currently -specified. As the attribute is already defined in the original set, this -is a redundant information in yaml file, moreover, may lead to -inconsistencies. - -Example: -attribute-sets: - ... - name: pin - enum-name: dpll_a_pin - attributes: - ... - - - name: parent-id - type: u32 - ... - - - name: pin-parent-device - subset-of: pin - attributes: - - - name: parent-id - type: u32 <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< - -Remove the requirement from schema files to specify the "type" for -attribute subsets. - -Signed-off-by: Jiri Pirko -Reviewed-by: Jakub Kicinski -Link: https://lore.kernel.org/r/20231006114436.1725425-2-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit e18f3dc2beaa5055e27334cd2d8b492bc3e9b3a4) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/genetlink-c.yaml | 14 +++++++++++++- - Documentation/netlink/genetlink-legacy.yaml | 14 +++++++++++++- - Documentation/netlink/genetlink.yaml | 14 +++++++++++++- - Documentation/netlink/netlink-raw.yaml | 14 +++++++++++++- - 4 files changed, 52 insertions(+), 4 deletions(-) - -diff --git a/Documentation/netlink/genetlink-c.yaml b/Documentation/netlink/genetlink-c.yaml -index 9806c44f604c..32736b2d8ae8 100644 ---- a/Documentation/netlink/genetlink-c.yaml -+++ b/Documentation/netlink/genetlink-c.yaml -@@ -142,7 +142,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -215,6 +215,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object -diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml -index 12a0a045605d..25fe1379b180 100644 ---- a/Documentation/netlink/genetlink-legacy.yaml -+++ b/Documentation/netlink/genetlink-legacy.yaml -@@ -180,7 +180,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -254,6 +254,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object -diff --git a/Documentation/netlink/genetlink.yaml b/Documentation/netlink/genetlink.yaml -index 3d338c48bf21..6ea1c947ce51 100644 ---- a/Documentation/netlink/genetlink.yaml -+++ b/Documentation/netlink/genetlink.yaml -@@ -115,7 +115,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -184,6 +184,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object -diff --git a/Documentation/netlink/netlink-raw.yaml b/Documentation/netlink/netlink-raw.yaml -index 896797876414..d976851b80f8 100644 ---- a/Documentation/netlink/netlink-raw.yaml -+++ b/Documentation/netlink/netlink-raw.yaml -@@ -187,7 +187,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -261,6 +261,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch b/kernel-rt/debian/patches/ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch deleted file mode 100644 index 5edaa13d..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch +++ /dev/null @@ -1,107 +0,0 @@ -From c6f3d22b1cdb4abcf53e2901974361bac7310635 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:32 +0200 -Subject: [PATCH 20/46] dpll: docs: add support for pin signal phase - offset/adjust - -Add documentation on: -- measurement of phase of signal between pin and dpll -- adjustment of pin signal phase - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 27ed30d1f861315719bd8c2b2e81576d71750331) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 53 ++++++++++++++++++++++++++++++- - 1 file changed, 52 insertions(+), 1 deletion(-) - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -index 69670deb8c4e..e3d593841aa7 100644 ---- a/Documentation/driver-api/dpll.rst -+++ b/Documentation/driver-api/dpll.rst -@@ -173,6 +173,47 @@ in order to configure active input of a MUX-type pin, the user needs to - request desired pin state of the child pin on the parent pin, - as described in the ``MUX-type pins`` chapter. - -+Phase offset measurement and adjustment -+======================================== -+ -+Device may provide ability to measure a phase difference between signals -+on a pin and its parent dpll device. If pin-dpll phase offset measurement -+is supported, it shall be provided with ``DPLL_A_PIN_PHASE_OFFSET`` -+attribute for each parent dpll device. -+ -+Device may also provide ability to adjust a signal phase on a pin. -+If pin phase adjustment is supported, minimal and maximal values that pin -+handle shall be provide to the user on ``DPLL_CMD_PIN_GET`` respond -+with ``DPLL_A_PIN_PHASE_ADJUST_MIN`` and ``DPLL_A_PIN_PHASE_ADJUST_MAX`` -+attributes. Configured phase adjust value is provided with -+``DPLL_A_PIN_PHASE_ADJUST`` attribute of a pin, and value change can be -+requested with the same attribute with ``DPLL_CMD_PIN_SET`` command. -+ -+ =============================== ====================================== -+ ``DPLL_A_PIN_ID`` configured pin id -+ ``DPLL_A_PIN_PHASE_ADJUST_MIN`` attr minimum value of phase adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST_MAX`` attr maximum value of phase adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST`` attr configured value of phase -+ adjustment on parent dpll device -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attribute for requesting -+ configuration on given parent dpll -+ device -+ ``DPLL_A_PIN_PARENT_ID`` parent dpll device id -+ ``DPLL_A_PIN_PHASE_OFFSET`` attr measured phase difference -+ between a pin and parent dpll device -+ =============================== ====================================== -+ -+All phase related values are provided in pico seconds, which represents -+time difference between signals phase. The negative value means that -+phase of signal on pin is earlier in time than dpll's signal. Positive -+value means that phase of signal on pin is later in time than signal of -+a dpll. -+ -+Phase adjust (also min and max) values are integers, but measured phase -+offset values are fractional with 3-digit decimal places and shell be -+divided with ``DPLL_PIN_PHASE_OFFSET_DIVIDER`` to get integer part and -+modulo divided to get fractional part. -+ - Configuration commands group - ============================ - -@@ -263,6 +304,12 @@ according to attribute purpose. - frequencies - ``DPLL_A_PIN_ANY_FREQUENCY_MIN`` attr minimum value of frequency - ``DPLL_A_PIN_ANY_FREQUENCY_MAX`` attr maximum value of frequency -+ ``DPLL_A_PIN_PHASE_ADJUST_MIN`` attr minimum value of phase -+ adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST_MAX`` attr maximum value of phase -+ adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST`` attr configured value of phase -+ adjustment on parent device - ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent device - the pin is connected with - ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id -@@ -270,8 +317,10 @@ according to attribute purpose. - dpll device - ``DPLL_A_PIN_STATE`` attr state of pin on the parent - dpll device -- ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the -+ ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the - parent dpll device -+ ``DPLL_A_PIN_PHASE_OFFSET`` attr measured phase difference -+ between a pin and parent dpll - ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin - the pin is connected with - ``DPLL_A_PIN_PARENT_ID`` attr parent pin id -@@ -284,6 +333,8 @@ according to attribute purpose. - ``DPLL_CMD_PIN_SET`` command to set pins configuration - ``DPLL_A_PIN_ID`` attr unique a pin ID - ``DPLL_A_PIN_FREQUENCY`` attr requested frequency of a pin -+ ``DPLL_A_PIN_PHASE_ADJUST`` attr requested value of phase -+ adjustment on parent device - ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent dpll - device configuration request - ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch b/kernel-rt/debian/patches/ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch deleted file mode 100644 index bd61c7ae..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 99c6ac37b209ab9c87c25d5b81318faa96eb47fb Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Fri, 6 Oct 2023 13:44:36 +0200 -Subject: [PATCH 21/46] netlink: specs: remove redundant type keys from - attributes in subsets - -No longer needed to define type for subset attributes. Remove those. - -Signed-off-by: Jiri Pirko -Reviewed-by: Jakub Kicinski -Link: https://lore.kernel.org/r/20231006114436.1725425-3-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 7049fd5df78cf0e7463d8e8bb41db60b6762df6c) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/devlink.yaml | 10 ---------- - Documentation/netlink/specs/dpll.yaml | 8 -------- - Documentation/netlink/specs/ethtool.yaml | 3 --- - 3 files changed, 21 deletions(-) - -diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml -index 065661acb878..dec130d2507c 100644 ---- a/Documentation/netlink/specs/devlink.yaml -+++ b/Documentation/netlink/specs/devlink.yaml -@@ -199,54 +199,44 @@ attribute-sets: - attributes: - - - name: reload-stats -- type: nest - - - name: remote-reload-stats -- type: nest - - - name: dl-reload-stats - subset-of: devlink - attributes: - - - name: reload-action-info -- type: nest - - - name: dl-reload-act-info - subset-of: devlink - attributes: - - - name: reload-action -- type: u8 - - - name: reload-action-stats -- type: nest - - - name: dl-reload-act-stats - subset-of: devlink - attributes: - - - name: reload-stats-entry -- type: nest - - - name: dl-reload-stats-entry - subset-of: devlink - attributes: - - - name: reload-stats-limit -- type: u8 - - - name: reload-stats-value -- type: u32 - - - name: dl-info-version - subset-of: devlink - attributes: - - - name: info-version-name -- type: string - - - name: info-version-value -- type: string - - operations: - enum-model: directional -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -index 8b86b28b47a6..1c1b53136c7b 100644 ---- a/Documentation/netlink/specs/dpll.yaml -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -278,36 +278,28 @@ attribute-sets: - attributes: - - - name: parent-id -- type: u32 - - - name: direction -- type: u32 - - - name: prio -- type: u32 - - - name: state -- type: u32 - - - name: pin-parent-pin - subset-of: pin - attributes: - - - name: parent-id -- type: u32 - - - name: state -- type: u32 - - - name: frequency-range - subset-of: pin - attributes: - - - name: frequency-min -- type: u64 - - - name: frequency-max -- type: u64 - - operations: - enum-name: dpll_cmd -diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml -index 837b565577ca..5c7a65b009b4 100644 ---- a/Documentation/netlink/specs/ethtool.yaml -+++ b/Documentation/netlink/specs/ethtool.yaml -@@ -818,13 +818,10 @@ attribute-sets: - attributes: - - - name: hist-bkt-low -- type: u32 - - - name: hist-bkt-hi -- type: u32 - - - name: hist-val -- type: u64 - - - name: stats - attributes: --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch b/kernel-rt/debian/patches/ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch deleted file mode 100644 index ee37f07a..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 304d5b650378394e20c1f65af6a4898c49f95e12 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:33 +0200 -Subject: [PATCH 22/46] dpll: spec: add support for pin-dpll signal phase - offset/adjust - -Add attributes for providing the user with: -- measurement of signals phase offset between pin and dpll -- ability to adjust the phase of pin signal - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit c3c6ab95c397134bf5948f18743b3ba8008e7c47) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/dpll.yaml | 30 +++++++++++++++++++++++++++ - drivers/dpll/dpll_nl.c | 8 ++++--- - drivers/dpll/dpll_nl.h | 2 +- - include/uapi/linux/dpll.h | 6 ++++++ - 4 files changed, 42 insertions(+), 4 deletions(-) - -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -index 1c1b53136c7b..cf8abe1c0550 100644 ---- a/Documentation/netlink/specs/dpll.yaml -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -164,6 +164,18 @@ definitions: - - - name: state-can-change - doc: pin state can be changed -+ - -+ type: const -+ name: phase-offset-divider -+ value: 1000 -+ doc: | -+ phase offset divider allows userspace to calculate a value of -+ measured signal phase difference between a pin and dpll device -+ as a fractional value with three digit decimal precision. -+ Value of (DPLL_A_PHASE_OFFSET / DPLL_PHASE_OFFSET_DIVIDER) is an -+ integer part of a measured phase offset value. -+ Value of (DPLL_A_PHASE_OFFSET % DPLL_PHASE_OFFSET_DIVIDER) is a -+ fractional part of a measured phase offset value. - - attribute-sets: - - -@@ -272,6 +284,18 @@ attribute-sets: - type: nest - multi-attr: true - nested-attributes: pin-parent-pin -+ - -+ name: phase-adjust-min -+ type: s32 -+ - -+ name: phase-adjust-max -+ type: s32 -+ - -+ name: phase-adjust -+ type: s32 -+ - -+ name: phase-offset -+ type: s64 - - - name: pin-parent-device - subset-of: pin -@@ -284,6 +308,8 @@ attribute-sets: - name: prio - - - name: state -+ - -+ name: phase-offset - - - name: pin-parent-pin - subset-of: pin -@@ -431,6 +457,9 @@ operations: - - capabilities - - parent-device - - parent-pin -+ - phase-adjust-min -+ - phase-adjust-max -+ - phase-adjust - - dump: - pre: dpll-lock-dumpit -@@ -458,6 +487,7 @@ operations: - - state - - parent-device - - parent-pin -+ - phase-adjust - - - name: pin-create-ntf - doc: Notification about pin appearing -diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c -index 14064c8c783b..eaee5be7aa64 100644 ---- a/drivers/dpll/dpll_nl.c -+++ b/drivers/dpll/dpll_nl.c -@@ -11,11 +11,12 @@ - #include - - /* Common nested types */ --const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1] = { -+const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1] = { - [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, - [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), - [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, - [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+ [DPLL_A_PIN_PHASE_OFFSET] = { .type = NLA_S64, }, - }; - - const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = { -@@ -61,7 +62,7 @@ static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = - }; - - /* DPLL_CMD_PIN_SET - do */ --static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] = { -+static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PHASE_ADJUST + 1] = { - [DPLL_A_PIN_ID] = { .type = NLA_U32, }, - [DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, }, - [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -@@ -69,6 +70,7 @@ static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] - [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), - [DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy), - [DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy), -+ [DPLL_A_PIN_PHASE_ADJUST] = { .type = NLA_S32, }, - }; - - /* Ops table for dpll */ -@@ -140,7 +142,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { - .doit = dpll_nl_pin_set_doit, - .post_doit = dpll_pin_post_doit, - .policy = dpll_pin_set_nl_policy, -- .maxattr = DPLL_A_PIN_PARENT_PIN, -+ .maxattr = DPLL_A_PIN_PHASE_ADJUST, - .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, - }, - }; -diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h -index 1f67aaed4742..92d4c9c4f788 100644 ---- a/drivers/dpll/dpll_nl.h -+++ b/drivers/dpll/dpll_nl.h -@@ -12,7 +12,7 @@ - #include - - /* Common nested types */ --extern const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1]; -+extern const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1]; - extern const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1]; - - int dpll_lock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h -index 20ef0718f8dc..715a491d2727 100644 ---- a/include/uapi/linux/dpll.h -+++ b/include/uapi/linux/dpll.h -@@ -138,6 +138,8 @@ enum dpll_pin_capabilities { - DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE = 4, - }; - -+#define DPLL_PHASE_OFFSET_DIVIDER 1000 -+ - enum dpll_a { - DPLL_A_ID = 1, - DPLL_A_MODULE_NAME, -@@ -173,6 +175,10 @@ enum dpll_a_pin { - DPLL_A_PIN_CAPABILITIES, - DPLL_A_PIN_PARENT_DEVICE, - DPLL_A_PIN_PARENT_PIN, -+ DPLL_A_PIN_PHASE_ADJUST_MIN, -+ DPLL_A_PIN_PHASE_ADJUST_MAX, -+ DPLL_A_PIN_PHASE_ADJUST, -+ DPLL_A_PIN_PHASE_OFFSET, - - __DPLL_A_PIN_MAX, - DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch b/kernel-rt/debian/patches/ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch deleted file mode 100644 index 0e8508be..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch +++ /dev/null @@ -1,251 +0,0 @@ -From 39f2322307b6cacde3f44d6ea8f64cc62d35ec79 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:34 +0200 -Subject: [PATCH 23/46] dpll: netlink/core: add support for pin-dpll signal - phase offset/adjust - -Add callback ops for pin-dpll phase measurement. -Add callback for pin signal phase adjustment. -Add min and max phase adjustment values to pin proprties. -Invoke callbacks in dpll_netlink.c when filling the pin details to -provide user with phase related attribute values. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit d7fbc0b7e846e9e0e70ae766d274b8720fbab412) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 138 +++++++++++++++++++++++++++++++++++- - include/linux/dpll.h | 18 +++++ - 2 files changed, 155 insertions(+), 1 deletion(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index e20daba6896a..09a6c2a1ea92 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -212,6 +212,53 @@ dpll_msg_add_pin_direction(struct sk_buff *msg, struct dpll_pin *pin, - return 0; - } - -+static int -+dpll_msg_add_pin_phase_adjust(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ s32 phase_adjust; -+ int ret; -+ -+ if (!ops->phase_adjust_get) -+ return 0; -+ ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), -+ &phase_adjust, extack); -+ if (ret) -+ return ret; -+ if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST, phase_adjust)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_phase_offset(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ s64 phase_offset; -+ int ret; -+ -+ if (!ops->phase_offset_get) -+ return 0; -+ ret = ops->phase_offset_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), &phase_offset, -+ extack); -+ if (ret) -+ return ret; -+ if (nla_put_64bit(msg, DPLL_A_PIN_PHASE_OFFSET, sizeof(phase_offset), -+ &phase_offset, DPLL_A_PIN_PAD)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ - static int - dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, - struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) -@@ -330,6 +377,9 @@ dpll_msg_add_pin_dplls(struct sk_buff *msg, struct dpll_pin *pin, - if (ret) - goto nest_cancel; - ret = dpll_msg_add_pin_direction(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_phase_offset(msg, pin, ref, extack); - if (ret) - goto nest_cancel; - nla_nest_end(msg, attr); -@@ -377,6 +427,15 @@ dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, - if (nla_put_u32(msg, DPLL_A_PIN_CAPABILITIES, prop->capabilities)) - return -EMSGSIZE; - ret = dpll_msg_add_pin_freq(msg, pin, ref, extack); -+ if (ret) -+ return ret; -+ if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST_MIN, -+ prop->phase_range.min)) -+ return -EMSGSIZE; -+ if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST_MAX, -+ prop->phase_range.max)) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_pin_phase_adjust(msg, pin, ref, extack); - if (ret) - return ret; - if (xa_empty(&pin->parent_refs)) -@@ -416,7 +475,7 @@ dpll_device_get_one(struct dpll_device *dpll, struct sk_buff *msg, - if (nla_put_u32(msg, DPLL_A_TYPE, dpll->type)) - return -EMSGSIZE; - -- return ret; -+ return 0; - } - - static int -@@ -705,6 +764,78 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, - return 0; - } - -+static int -+dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, -+ struct netlink_ext_ack *extack) -+{ -+ struct dpll_pin_ref *ref, *failed; -+ const struct dpll_pin_ops *ops; -+ s32 phase_adj, old_phase_adj; -+ struct dpll_device *dpll; -+ unsigned long i; -+ int ret; -+ -+ phase_adj = nla_get_s32(phase_adj_attr); -+ if (phase_adj > pin->prop->phase_range.max || -+ phase_adj < pin->prop->phase_range.min) { -+ NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr, -+ "phase adjust value not supported"); -+ return -EINVAL; -+ } -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ ops = dpll_pin_ops(ref); -+ if (!ops->phase_adjust_set || !ops->phase_adjust_get) { -+ NL_SET_ERR_MSG(extack, "phase adjust not supported"); -+ return -EOPNOTSUPP; -+ } -+ } -+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), &old_phase_adj, -+ extack); -+ if (ret) { -+ NL_SET_ERR_MSG(extack, "unable to get old phase adjust value"); -+ return ret; -+ } -+ if (phase_adj == old_phase_adj) -+ return 0; -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ ret = ops->phase_adjust_set(pin, -+ dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), phase_adj, -+ extack); -+ if (ret) { -+ failed = ref; -+ NL_SET_ERR_MSG_FMT(extack, -+ "phase adjust set failed for dpll_id:%u", -+ dpll->id); -+ goto rollback; -+ } -+ } -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+ -+rollback: -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ if (ref == failed) -+ break; -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ if (ops->phase_adjust_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), old_phase_adj, -+ extack)) -+ NL_SET_ERR_MSG(extack, "set phase adjust rollback failed"); -+ } -+ return ret; -+} -+ - static int - dpll_pin_parent_device_set(struct dpll_pin *pin, struct nlattr *parent_nest, - struct netlink_ext_ack *extack) -@@ -793,6 +924,11 @@ dpll_pin_set_from_nlattr(struct dpll_pin *pin, struct genl_info *info) - if (ret) - return ret; - break; -+ case DPLL_A_PIN_PHASE_ADJUST: -+ ret = dpll_pin_phase_adj_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; - case DPLL_A_PIN_PARENT_DEVICE: - ret = dpll_pin_parent_device_set(pin, a, info->extack); - if (ret) -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -index bbc480cd2932..578fc5fa3750 100644 ---- a/include/linux/dpll.h -+++ b/include/linux/dpll.h -@@ -68,6 +68,18 @@ struct dpll_pin_ops { - int (*prio_set)(const struct dpll_pin *pin, void *pin_priv, - const struct dpll_device *dpll, void *dpll_priv, - const u32 prio, struct netlink_ext_ack *extack); -+ int (*phase_offset_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s64 *phase_offset, -+ struct netlink_ext_ack *extack); -+ int (*phase_adjust_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 *phase_adjust, -+ struct netlink_ext_ack *extack); -+ int (*phase_adjust_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const s32 phase_adjust, -+ struct netlink_ext_ack *extack); - }; - - struct dpll_pin_frequency { -@@ -91,6 +103,11 @@ struct dpll_pin_frequency { - #define DPLL_PIN_FREQUENCY_DCF77 \ - DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ) - -+struct dpll_pin_phase_adjust_range { -+ s32 min; -+ s32 max; -+}; -+ - struct dpll_pin_properties { - const char *board_label; - const char *panel_label; -@@ -99,6 +116,7 @@ struct dpll_pin_properties { - unsigned long capabilities; - u32 freq_supported_num; - struct dpll_pin_frequency *freq_supported; -+ struct dpll_pin_phase_adjust_range phase_range; - }; - - #if IS_ENABLED(CONFIG_DPLL) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch b/kernel-rt/debian/patches/ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch deleted file mode 100644 index 892fd7bb..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch +++ /dev/null @@ -1,342 +0,0 @@ -From 2cad1ea959a38a58726855eeda1d618d99226774 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:35 +0200 -Subject: [PATCH 24/46] ice: dpll: implement phase related callbacks - -Implement new callback ops related to measurement and adjustment of -signal phase for pin-dpll in ice driver. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 90e1c90750d773fc991833f317b439236e13fc25) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 220 +++++++++++++++++++++- - drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +- - 2 files changed, 226 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 1faee9cb944d..835c419ccc74 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -878,6 +878,199 @@ ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, - return 0; - } - -+/** -+ * ice_dpll_pin_phase_adjust_get - callback for get pin phase adjust value -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: on success holds pin phase_adjust value -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting phase adjust value of a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_phase_adjust_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 *phase_adjust, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_pf *pf = p->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *phase_adjust = p->phase_adjust; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_pin_phase_adjust_set - helper for setting a pin phase adjust value -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: phase_adjust to be set -+ * @extack: error reporting -+ * @type: type of a pin -+ * -+ * Helper for dpll subsystem callback. Handler for setting phase adjust value -+ * of a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 phase_adjust, -+ struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ u8 flag, flags_en = 0; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ switch (type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ flag = ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY; -+ if (p->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) -+ flags_en |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; -+ if (p->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN) -+ flags_en |= ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN; -+ ret = ice_aq_set_input_pin_cfg(&pf->hw, p->idx, flag, flags_en, -+ 0, phase_adjust); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ flag = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_PHASE; -+ if (p->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_OUT_EN) -+ flag |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; -+ if (p->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) -+ flag |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; -+ ret = ice_aq_set_output_pin_cfg(&pf->hw, p->idx, flag, 0, 0, -+ phase_adjust); -+ break; -+ default: -+ ret = -EINVAL; -+ } -+ if (!ret) -+ p->phase_adjust = phase_adjust; -+ mutex_unlock(&pf->dplls.lock); -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin phase_adjust:%d for pin:%u on dpll:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ phase_adjust, p->idx, d->dpll_idx); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_input_phase_adjust_set - callback for set input pin phase adjust -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: phase_adjust to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Wraps a handler for setting phase adjust on input -+ * pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_input_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 phase_adjust, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_phase_adjust_set(pin, pin_priv, dpll, dpll_priv, -+ phase_adjust, extack, -+ ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_output_phase_adjust_set - callback for set output pin phase adjust -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: phase_adjust to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Wraps a handler for setting phase adjust on output -+ * pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_output_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 phase_adjust, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_phase_adjust_set(pin, pin_priv, dpll, dpll_priv, -+ phase_adjust, extack, -+ ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+#define ICE_DPLL_PHASE_OFFSET_DIVIDER 100 -+#define ICE_DPLL_PHASE_OFFSET_FACTOR \ -+ (DPLL_PHASE_OFFSET_DIVIDER / ICE_DPLL_PHASE_OFFSET_DIVIDER) -+/** -+ * ice_dpll_phase_offset_get - callback for get dpll phase shift value -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_offset: on success holds pin phase_offset value -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting phase shift value between -+ * dpll's input and output. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s64 *phase_offset, struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ if (d->active_input == pin) -+ *phase_offset = d->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR; -+ else -+ *phase_offset = 0; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ - /** - * ice_dpll_rclk_state_on_pin_set - set a state on rclk pin - * @pin: pointer to a pin -@@ -993,6 +1186,9 @@ static const struct dpll_pin_ops ice_dpll_input_ops = { - .prio_get = ice_dpll_input_prio_get, - .prio_set = ice_dpll_input_prio_set, - .direction_get = ice_dpll_input_direction, -+ .phase_adjust_get = ice_dpll_pin_phase_adjust_get, -+ .phase_adjust_set = ice_dpll_input_phase_adjust_set, -+ .phase_offset_get = ice_dpll_phase_offset_get, - }; - - static const struct dpll_pin_ops ice_dpll_output_ops = { -@@ -1001,6 +1197,8 @@ static const struct dpll_pin_ops ice_dpll_output_ops = { - .state_on_dpll_get = ice_dpll_output_state_get, - .state_on_dpll_set = ice_dpll_output_state_set, - .direction_get = ice_dpll_output_direction, -+ .phase_adjust_get = ice_dpll_pin_phase_adjust_get, -+ .phase_adjust_set = ice_dpll_output_phase_adjust_set, - }; - - static const struct dpll_device_ops ice_dpll_ops = { -@@ -1031,6 +1229,8 @@ static u64 ice_generate_clock_id(struct ice_pf *pf) - */ - static void ice_dpll_notify_changes(struct ice_dpll *d) - { -+ bool pin_notified = false; -+ - if (d->prev_dpll_state != d->dpll_state) { - d->prev_dpll_state = d->dpll_state; - dpll_device_change_ntf(d->dpll); -@@ -1039,7 +1239,14 @@ static void ice_dpll_notify_changes(struct ice_dpll *d) - if (d->prev_input) - dpll_pin_change_ntf(d->prev_input); - d->prev_input = d->active_input; -- if (d->active_input) -+ if (d->active_input) { -+ dpll_pin_change_ntf(d->active_input); -+ pin_notified = true; -+ } -+ } -+ if (d->prev_phase_offset != d->phase_offset) { -+ d->prev_phase_offset = d->phase_offset; -+ if (!pin_notified && d->active_input) - dpll_pin_change_ntf(d->active_input); - } - } -@@ -1065,7 +1272,7 @@ ice_dpll_update_state(struct ice_pf *pf, struct ice_dpll *d, bool init) - - ret = ice_get_cgu_state(&pf->hw, d->dpll_idx, d->prev_dpll_state, - &d->input_idx, &d->ref_state, &d->eec_mode, -- &d->phase_shift, &d->dpll_state); -+ &d->phase_offset, &d->dpll_state); - - dev_dbg(ice_pf_to_dev(pf), - "update dpll=%d, prev_src_idx:%u, src_idx:%u, state:%d, prev:%d mode:%d\n", -@@ -1656,6 +1863,15 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - return ret; - pins[i].prop.capabilities |= - DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE; -+ pins[i].prop.phase_range.min = -+ pf->dplls.input_phase_adj_max; -+ pins[i].prop.phase_range.max = -+ -pf->dplls.input_phase_adj_max; -+ } else { -+ pins[i].prop.phase_range.min = -+ pf->dplls.output_phase_adj_max; -+ pins[i].prop.phase_range.max = -+ -pf->dplls.output_phase_adj_max; - } - pins[i].prop.capabilities |= - DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -index 2dfe764b81e1..bb32b6d88373 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.h -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -19,6 +19,7 @@ - * @state: state of a pin - * @prop: pin properties - * @freq: current frequency of a pin -+ * @phase_adjust: current phase adjust value - */ - struct ice_dpll_pin { - struct dpll_pin *pin; -@@ -30,6 +31,7 @@ struct ice_dpll_pin { - u8 state[ICE_DPLL_RCLK_NUM_MAX]; - struct dpll_pin_properties prop; - u32 freq; -+ s32 phase_adjust; - }; - - /** ice_dpll - store info required for DPLL control -@@ -40,7 +42,8 @@ struct ice_dpll_pin { - * @prev_input_idx: previously selected input index - * @ref_state: state of dpll reference signals - * @eec_mode: eec_mode dpll is configured for -- * @phase_shift: phase shift delay of a dpll -+ * @phase_offset: phase offset of active pin vs dpll signal -+ * @prev_phase_offset: previous phase offset of active pin vs dpll signal - * @input_prio: priorities of each input - * @dpll_state: current dpll sync state - * @prev_dpll_state: last dpll sync state -@@ -55,7 +58,8 @@ struct ice_dpll { - u8 prev_input_idx; - u8 ref_state; - u8 eec_mode; -- s64 phase_shift; -+ s64 phase_offset; -+ s64 prev_phase_offset; - u8 *input_prio; - enum dpll_lock_status dpll_state; - enum dpll_lock_status prev_dpll_state; -@@ -78,6 +82,8 @@ struct ice_dpll { - * @cgu_state_acq_err_num: number of errors returned during periodic work - * @base_rclk_idx: idx of first pin used for clock revocery pins - * @clock_id: clock_id of dplls -+ * @input_phase_adj_max: max phase adjust value for an input pins -+ * @output_phase_adj_max: max phase adjust value for an output pins - */ - struct ice_dplls { - struct kthread_worker *kworker; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch b/kernel-rt/debian/patches/ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch deleted file mode 100644 index 0e3887b7..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 48ea8a9833e381a05157086ab0dd8ee56246b7d5 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:36 +0200 -Subject: [PATCH 25/46] dpll: netlink/core: change pin frequency set behavior - -Align the approach of pin frequency set behavior with the approach -introduced with pin phase adjust set. -Fail the request if any of devices did not registered the callback ops. -If callback op on any pin's registered device fails, return error and -rollback the value to previous one. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 20f6677234d8105e55beca355135e94bb10fbf74) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 50 +++++++++++++++++++++++++++++++------ - 1 file changed, 42 insertions(+), 8 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 09a6c2a1ea92..a6dc3997bf5c 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -615,8 +615,10 @@ static int - dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, - struct netlink_ext_ack *extack) - { -- u64 freq = nla_get_u64(a); -- struct dpll_pin_ref *ref; -+ u64 freq = nla_get_u64(a), old_freq; -+ struct dpll_pin_ref *ref, *failed; -+ const struct dpll_pin_ops *ops; -+ struct dpll_device *dpll; - unsigned long i; - int ret; - -@@ -626,19 +628,51 @@ dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, - } - - xa_for_each(&pin->dpll_refs, i, ref) { -- const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -- struct dpll_device *dpll = ref->dpll; -- -- if (!ops->frequency_set) -+ ops = dpll_pin_ops(ref); -+ if (!ops->frequency_set || !ops->frequency_get) { -+ NL_SET_ERR_MSG(extack, "frequency set not supported by the device"); - return -EOPNOTSUPP; -+ } -+ } -+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ ret = ops->frequency_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &old_freq, extack); -+ if (ret) { -+ NL_SET_ERR_MSG(extack, "unable to get old frequency value"); -+ return ret; -+ } -+ if (freq == old_freq) -+ return 0; -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; - ret = ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin), - dpll, dpll_priv(dpll), freq, extack); -- if (ret) -- return ret; -+ if (ret) { -+ failed = ref; -+ NL_SET_ERR_MSG_FMT(extack, "frequency set failed for dpll_id:%u", -+ dpll->id); -+ goto rollback; -+ } - } - __dpll_pin_change_ntf(pin); - - return 0; -+ -+rollback: -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ if (ref == failed) -+ break; -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ if (ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), old_freq, extack)) -+ NL_SET_ERR_MSG(extack, "set frequency rollback failed"); -+ } -+ return ret; - } - - static int --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch b/kernel-rt/debian/patches/ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch deleted file mode 100644 index ea67a594..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 1db547235552584bc7a2f1bacc43cc55c4db50aa Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 13 Oct 2023 12:25:10 +0200 -Subject: [PATCH 26/46] ice: dpll: fix initial lock status of dpll - -When dpll device is registered and dpll subsystem performs notify of a -new device, the lock state value provided to dpll subsystem equals 0 -which is invalid value for the `enum dpll_lock_status`. -Provide correct value by obtaining it from firmware before registering -the dpll device. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Signed-off-by: Aleksandr Loktionov -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 7a1aba89ac54ccf6cad23a91a34c0ab24b1d7997) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 835c419ccc74..607f534055b6 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -1756,6 +1756,7 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu, - } - d->pf = pf; - if (cgu) { -+ ice_dpll_update_state(pf, d, true); - ret = dpll_device_register(d->dpll, type, &ice_dpll_ops, d); - if (ret) { - dpll_device_put(d->dpll); -@@ -1796,8 +1797,6 @@ static int ice_dpll_init_worker(struct ice_pf *pf) - struct ice_dplls *d = &pf->dplls; - struct kthread_worker *kworker; - -- ice_dpll_update_state(pf, &d->eec, true); -- ice_dpll_update_state(pf, &d->pps, true); - kthread_init_delayed_work(&d->work, ice_dpll_periodic_work); - kworker = kthread_create_worker(0, "ice-dplls-%s", - dev_name(ice_pf_to_dev(pf))); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch b/kernel-rt/debian/patches/ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch deleted file mode 100644 index e23253fa..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 2f2ca7f272758284fb9c15ed5f513cdeaefee46c Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Tue, 31 Oct 2023 18:06:54 +0100 -Subject: [PATCH 27/46] ice: dpll: fix check for dpll input priority range - -Supported priority value for input pins may differ with regard of NIC -firmware version. E810T NICs with 3.20/4.00 FW versions would accept -priority range 0-31, where firmware 4.10+ would support the range 0-9 -and extra value of 255. -Remove the in-range check as the driver has no information on supported -values from the running firmware, let firmware decide if given value is -correct and return extack error if the value is not supported. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Przemek Kitszel -Reviewed-by: Jacob Keller -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 4a4027f25dc3f39c2aafb3bf8926125c5378c9dc) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 6 ------ - drivers/net/ethernet/intel/ice/ice_dpll.h | 1 - - 2 files changed, 7 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 607f534055b6..831ba6683962 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -815,12 +815,6 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -- if (prio > ICE_DPLL_PRIO_MAX) { -- NL_SET_ERR_MSG_FMT(extack, "prio out of supported range 0-%d", -- ICE_DPLL_PRIO_MAX); -- return -EINVAL; -- } -- - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); - mutex_unlock(&pf->dplls.lock); -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -index bb32b6d88373..93172e93995b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.h -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -6,7 +6,6 @@ - - #include "ice.h" - --#define ICE_DPLL_PRIO_MAX 0xF - #define ICE_DPLL_RCLK_NUM_MAX 4 - - /** ice_dpll_pin - store info about pins --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch b/kernel-rt/debian/patches/ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch deleted file mode 100644 index f7a44ebf..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch +++ /dev/null @@ -1,346 +0,0 @@ -From 6add02878183b5256a0b01ee820f3e0cc878e15d Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 17 Jul 2023 15:17:13 -0700 -Subject: [PATCH 28/46] ice: introduce hw->phy_model for handling PTP PHY - differences - -The ice driver has PTP support which works across a couple of different -device families. The device families each have different PHY hardware which -have unique requirements for programming. - -Today, there is E810-based hardware, and E822-based hardware. To handle -this, the driver checks the ice_is_e810() function to separate between the -two existing families of hardware. - -Future development is going to add new hardware designs which have further -unique requirements. To make this easier, introduce a phy_model field to -the HW structure. This field represents what PHY model the current device -has, and is used to allow distinguishing which logic a particular device -needs. - -This will make supporting future upcoming hardware easier, by providing an -obvious place to initialize the PHY model, and by already using switch/case -statements instead of the previous if statements. - -Astute reviewers may notice that there are a handful of remaining checks -for ice_is_e810() left in ice_ptp.c These conflict with some other -cleanup patches in development, and will be fixed in the near future. - -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit be16574609f14c67efd89d5d8f9f19ab7724bfc9) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 32 ++++-- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 102 ++++++++++++++++---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 + - drivers/net/ethernet/intel/ice/ice_type.h | 8 ++ - 4 files changed, 117 insertions(+), 27 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index c4270708a769..3648d3cccacc 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1366,6 +1366,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - { - struct ice_ptp_port *ptp_port; -+ struct ice_hw *hw = &pf->hw; - - if (!test_bit(ICE_FLAG_PTP, pf->flags)) - return; -@@ -1380,11 +1381,16 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - /* Update cached link status for this port immediately */ - ptp_port->link_up = linkup; - -- /* E810 devices do not need to reconfigure the PHY */ -- if (ice_is_e810(&pf->hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: -+ /* Do not reconfigure E810 PHY */ - return; -- -- ice_ptp_port_phy_restart(ptp_port); -+ case ICE_PHY_E822: -+ ice_ptp_port_phy_restart(ptp_port); -+ return; -+ default: -+ dev_warn(ice_pf_to_dev(pf), "%s: Unknown PHY type\n", __func__); -+ } - } - - /** -@@ -2687,14 +2693,22 @@ static int ice_ptp_init_work(struct ice_pf *pf, struct ice_ptp *ptp) - */ - static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - { -+ struct ice_hw *hw = &pf->hw; -+ - mutex_init(&ptp_port->ps_lock); - -- if (ice_is_e810(&pf->hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); -+ case ICE_PHY_E822: -+ kthread_init_delayed_work(&ptp_port->ov_work, -+ ice_ptp_wait_for_offsets); - -- kthread_init_delayed_work(&ptp_port->ov_work, -- ice_ptp_wait_for_offsets); -- return ice_ptp_init_tx_e822(pf, &ptp_port->tx, ptp_port->port_num); -+ return ice_ptp_init_tx_e822(pf, &ptp_port->tx, -+ ptp_port->port_num); -+ default: -+ return -ENODEV; -+ } - } - - /** -@@ -2715,6 +2729,8 @@ void ice_ptp_init(struct ice_pf *pf) - struct ice_hw *hw = &pf->hw; - int err; - -+ ice_ptp_init_phy_model(hw); -+ - /* If this function owns the clock hardware, it must allocate and - * configure the PTP clock device to represent it. - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 8ccd633d9c2e..9aef80ad5100 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -3275,6 +3275,21 @@ void ice_ptp_unlock(struct ice_hw *hw) - wr32(hw, PFTSYN_SEM + (PFTSYN_SEM_BYTES * hw->pf_id), 0); - } - -+/** -+ * ice_ptp_init_phy_model - Initialize hw->phy_model based on device type -+ * @hw: pointer to the HW structure -+ * -+ * Determine the PHY model for the device, and initialize hw->phy_model -+ * for use by other functions. -+ */ -+void ice_ptp_init_phy_model(struct ice_hw *hw) -+{ -+ if (ice_is_e810(hw)) -+ hw->phy_model = ICE_PHY_E810; -+ else -+ hw->phy_model = ICE_PHY_E822; -+} -+ - /** - * ice_ptp_tmr_cmd - Prepare and trigger a timer sync command - * @hw: pointer to HW struct -@@ -3293,10 +3308,17 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - ice_ptp_src_cmd(hw, cmd); - - /* Next, prepare the ports */ -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_port_cmd_e810(hw, cmd); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_port_cmd_e822(hw, cmd); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY ports for timer command %u, err %d\n", - cmd, err); -@@ -3338,10 +3360,17 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time) - - /* PHY timers */ - /* Fill Rx and Tx ports and send msg to PHY */ -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_prep_phy_time_e822(hw, time & 0xFFFFFFFF); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) - return err; - -@@ -3373,10 +3402,17 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval)); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval)); - -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_prep_phy_incval_e810(hw, incval); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_prep_phy_incval_e822(hw, incval); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) - return err; - -@@ -3432,10 +3468,17 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj); - -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_prep_phy_adj_e810(hw, adj); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_prep_phy_adj_e822(hw, adj); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) - return err; - -@@ -3455,10 +3498,14 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - */ - int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_read_phy_tstamp_e810(hw, block, idx, tstamp); -- else -+ case ICE_PHY_E822: - return ice_read_phy_tstamp_e822(hw, block, idx, tstamp); -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -@@ -3473,10 +3520,14 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - */ - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_clear_phy_tstamp_e810(hw, block, idx); -- else -+ case ICE_PHY_E822: - return ice_clear_phy_tstamp_e822(hw, block, idx); -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -@@ -3530,10 +3581,14 @@ int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) - */ - void ice_ptp_reset_ts_memory(struct ice_hw *hw) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E822: -+ ice_ptp_reset_ts_memory_e822(hw); -+ break; -+ case ICE_PHY_E810: -+ default: - return; -- -- ice_ptp_reset_ts_memory_e822(hw); -+ } - } - - /** -@@ -3552,10 +3607,14 @@ int ice_ptp_init_phc(struct ice_hw *hw) - /* Clear event err indications for auxiliary pins */ - (void)rd32(hw, GLTSYN_STAT(src_idx)); - -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_ptp_init_phc_e810(hw); -- else -+ case ICE_PHY_E822: - return ice_ptp_init_phc_e822(hw); -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -@@ -3571,12 +3630,17 @@ int ice_ptp_init_phc(struct ice_hw *hw) - */ - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_get_phy_tx_tstamp_ready_e810(hw, block, - tstamp_ready); -- else -+ case ICE_PHY_E822: - return ice_get_phy_tx_tstamp_ready_e822(hw, block, - tstamp_ready); -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index d81e77386b54..4f71d4bfeadf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -281,6 +281,8 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, - enum dpll_lock_status *dpll_state); - int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - -+void ice_ptp_init_phy_model(struct ice_hw *hw); -+ - #define PFTSYN_SEM_BYTES 4 - - #define ICE_PTP_CLOCK_INDEX_0 0x00 -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 5eb778d9ae64..4cd131546aa9 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -822,6 +822,13 @@ struct ice_mbx_data { - u16 async_watermark_val; - }; - -+/* PHY model */ -+enum ice_phy_model { -+ ICE_PHY_UNSUP = -1, -+ ICE_PHY_E810 = 1, -+ ICE_PHY_E822, -+}; -+ - /* Port hardware description */ - struct ice_hw { - u8 __iomem *hw_addr; -@@ -843,6 +850,7 @@ struct ice_hw { - u8 revision_id; - - u8 pf_id; /* device profile info */ -+ enum ice_phy_model phy_model; - - u16 max_burst_size; /* driver sets this value */ - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch b/kernel-rt/debian/patches/ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch deleted file mode 100644 index ca5bd8a8..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 4014377612cd199b2488074dbd6865cd1a1a835e Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Tue, 31 Oct 2023 18:08:00 +0100 -Subject: [PATCH 29/46] ice: dpll: fix output pin capabilities - -The dpll output pins which are used to feed clock signal of PHY and MAC -circuits cannot be disconnected, those integrated circuits require clock -signal for operation. -By stopping assignment of DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE pin -capability, prevent the user from invoking the state set callback on -those pins, setting the state on those pins already returns error, as -firmware doesn't allow the change of their state. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") -Reviewed-by: Andrii Staikov -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 6db5f2cd9ebb12e930a82c01714a6589576cd50f) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 12 +++-- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 54 +++++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 + - 3 files changed, 64 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 831ba6683962..86b180cb32a0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -1823,6 +1823,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - int num_pins, i, ret = -EINVAL; - struct ice_hw *hw = &pf->hw; - struct ice_dpll_pin *pins; -+ unsigned long caps; - u8 freq_supp_num; - bool input; - -@@ -1842,6 +1843,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - } - - for (i = 0; i < num_pins; i++) { -+ caps = 0; - pins[i].idx = i; - pins[i].prop.board_label = ice_cgu_get_pin_name(hw, i, input); - pins[i].prop.type = ice_cgu_get_pin_type(hw, i, input); -@@ -1854,8 +1856,8 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - &dp->input_prio[i]); - if (ret) - return ret; -- pins[i].prop.capabilities |= -- DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE; -+ caps |= (DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE | -+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE); - pins[i].prop.phase_range.min = - pf->dplls.input_phase_adj_max; - pins[i].prop.phase_range.max = -@@ -1865,9 +1867,11 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - pf->dplls.output_phase_adj_max; - pins[i].prop.phase_range.max = - -pf->dplls.output_phase_adj_max; -+ ret = ice_cgu_get_output_pin_state_caps(hw, i, &caps); -+ if (ret) -+ return ret; - } -- pins[i].prop.capabilities |= -- DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ pins[i].prop.capabilities = caps; - ret = ice_dpll_pin_state_update(pf, &pins[i], pin_type, NULL); - if (ret) - return ret; -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 9aef80ad5100..a299af39a7c4 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -3935,3 +3935,57 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) - - return ret; - } -+ -+/** -+ * ice_cgu_get_output_pin_state_caps - get output pin state capabilities -+ * @hw: pointer to the hw struct -+ * @pin_id: id of a pin -+ * @caps: capabilities to modify -+ * -+ * Return: -+ * * 0 - success, state capabilities were modified -+ * * negative - failure, capabilities were not modified -+ */ -+int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, -+ unsigned long *caps) -+{ -+ bool can_change = true; -+ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E810C_SFP: -+ if (pin_id == ZL_OUT2 || pin_id == ZL_OUT3) -+ can_change = false; -+ break; -+ case ICE_DEV_ID_E810C_QSFP: -+ if (pin_id == ZL_OUT2 || pin_id == ZL_OUT3 || pin_id == ZL_OUT4) -+ can_change = false; -+ break; -+ case ICE_DEV_ID_E823L_10G_BASE_T: -+ case ICE_DEV_ID_E823L_1GBE: -+ case ICE_DEV_ID_E823L_BACKPLANE: -+ case ICE_DEV_ID_E823L_QSFP: -+ case ICE_DEV_ID_E823L_SFP: -+ case ICE_DEV_ID_E823C_10G_BASE_T: -+ case ICE_DEV_ID_E823C_BACKPLANE: -+ case ICE_DEV_ID_E823C_QSFP: -+ case ICE_DEV_ID_E823C_SFP: -+ case ICE_DEV_ID_E823C_SGMII: -+ if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 && -+ pin_id == ZL_OUT2) -+ can_change = false; -+ else if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 && -+ pin_id == SI_OUT1) -+ can_change = false; -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (can_change) -+ *caps |= DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ else -+ *caps &= ~DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ -+ return 0; -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 4f71d4bfeadf..9dc30918f044 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -282,6 +282,8 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, - int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - - void ice_ptp_init_phy_model(struct ice_hw *hw); -+int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, -+ unsigned long *caps); - - #define PFTSYN_SEM_BYTES 4 - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch b/kernel-rt/debian/patches/ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch deleted file mode 100644 index a9ec21bf..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch +++ /dev/null @@ -1,75 +0,0 @@ -From f29c2ce39b0b42b323163a29fb1e0366f75b3e91 Mon Sep 17 00:00:00 2001 -From: Hao Ge -Date: Tue, 21 Nov 2023 09:37:09 +0800 -Subject: [PATCH 30/46] dpll: Fix potential msg memleak when genlmsg_put_reply - failed - -We should clean the skb resource if genlmsg_put_reply failed. - -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Signed-off-by: Hao Ge -Reviewed-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20231121013709.73323-1-gehao@kylinos.cn -Signed-off-by: Jakub Kicinski -(cherry picked from commit b6fe6f03716da246b453369f98a553d4ab21447c) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 17 ++++++++++++----- - 1 file changed, 12 insertions(+), 5 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index a6dc3997bf5c..442a0ebeb953 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -1093,9 +1093,10 @@ int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_PIN_ID_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -- -+ } - pin = dpll_pin_find_from_nlattr(info); - if (!IS_ERR(pin)) { - ret = dpll_msg_add_pin_handle(msg, pin); -@@ -1123,8 +1124,10 @@ int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_PIN_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -+ } - ret = dpll_cmd_pin_get_one(msg, pin, info->extack); - if (ret) { - nlmsg_free(msg); -@@ -1256,8 +1259,10 @@ int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_DEVICE_ID_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -+ } - - dpll = dpll_device_find_from_nlattr(info); - if (!IS_ERR(dpll)) { -@@ -1284,8 +1289,10 @@ int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_DEVICE_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -+ } - - ret = dpll_device_get_one(dpll, msg, info->extack); - if (ret) { --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch b/kernel-rt/debian/patches/ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch deleted file mode 100644 index 3a9882f3..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch +++ /dev/null @@ -1,102 +0,0 @@ -From a13fb6033eb54791b67f6a62c2328baf1b3ed85a Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 1 Dec 2023 10:08:40 -0800 -Subject: [PATCH 31/46] ice: add CGU info to devlink info callback - -If Clock Generation Unit is present on NIC board user shall know its -details. -Provide the devlink info callback with a new: -- fixed type object (cgu.id) indicating hardware variant of onboard CGU, -- running type object (fw.cgu) consisting of CGU id, config and firmware -versions. -These information shall be known for debugging purposes. - -Test (on NIC board with CGU) -$ devlink dev info / | grep cgu - cgu.id 36 - fw.cgu 8032.16973825.6021 - -Test (on NIC board without CGU) -$ devlink dev info / | grep cgu -c -0 - -Reviewed-by: Larysa Zaremba -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit b86455a1cbef6829e8da3f93d37a233be2616569) -Signed-off-by: Jiping Ma ---- - Documentation/networking/devlink/ice.rst | 9 +++++++++ - drivers/net/ethernet/intel/ice/ice_devlink.c | 20 ++++++++++++++++++++ - 2 files changed, 29 insertions(+) - -diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst -index 2f60e34ab926..7f30ebd5debb 100644 ---- a/Documentation/networking/devlink/ice.rst -+++ b/Documentation/networking/devlink/ice.rst -@@ -38,6 +38,10 @@ The ``ice`` driver reports the following versions - - fixed - - K65390-000 - - The Product Board Assembly (PBA) identifier of the board. -+ * - ``cgu.id`` -+ - fixed -+ - 36 -+ - The Clock Generation Unit (CGU) hardware revision identifier. - * - ``fw.mgmt`` - - running - - 2.1.7 -@@ -104,6 +108,11 @@ The ``ice`` driver reports the following versions - - running - - 0xee16ced7 - - The first 4 bytes of the hash of the netlist module contents. -+ * - ``fw.cgu`` -+ - running -+ - 8032.16973825.6021 -+ - The version of Clock Generation Unit (CGU). Format: -+ ... - - Flash Update - ============ -diff --git a/drivers/net/ethernet/intel/ice/ice_devlink.c b/drivers/net/ethernet/intel/ice/ice_devlink.c -index 80dc5445b50d..3a2261823d93 100644 ---- a/drivers/net/ethernet/intel/ice/ice_devlink.c -+++ b/drivers/net/ethernet/intel/ice/ice_devlink.c -@@ -193,6 +193,24 @@ ice_info_pending_netlist_build(struct ice_pf __always_unused *pf, - snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", netlist->hash); - } - -+static void ice_info_cgu_fw_build(struct ice_pf *pf, struct ice_info_ctx *ctx) -+{ -+ u32 id, cfg_ver, fw_ver; -+ -+ if (!ice_is_feature_supported(pf, ICE_F_CGU)) -+ return; -+ if (ice_aq_get_cgu_info(&pf->hw, &id, &cfg_ver, &fw_ver)) -+ return; -+ snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", id, cfg_ver, fw_ver); -+} -+ -+static void ice_info_cgu_id(struct ice_pf *pf, struct ice_info_ctx *ctx) -+{ -+ if (!ice_is_feature_supported(pf, ICE_F_CGU)) -+ return; -+ snprintf(ctx->buf, sizeof(ctx->buf), "%u", pf->hw.cgu_part_number); -+} -+ - #define fixed(key, getter) { ICE_VERSION_FIXED, key, getter, NULL } - #define running(key, getter) { ICE_VERSION_RUNNING, key, getter, NULL } - #define stored(key, getter, fallback) { ICE_VERSION_STORED, key, getter, fallback } -@@ -235,6 +253,8 @@ static const struct ice_devlink_version { - running("fw.app.bundle_id", ice_info_ddp_pkg_bundle_id), - combined("fw.netlist", ice_info_netlist_ver, ice_info_pending_netlist_ver), - combined("fw.netlist.build", ice_info_netlist_build, ice_info_pending_netlist_build), -+ fixed("cgu.id", ice_info_cgu_id), -+ running("fw.cgu", ice_info_cgu_fw_build), - }; - - /** --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch b/kernel-rt/debian/patches/ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch deleted file mode 100644 index 51a3fc66..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 0fe793ace5580801d48d93b3670f84506c336d6f Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Mon, 11 Dec 2023 09:37:58 +0100 -Subject: [PATCH 32/46] dpll: sanitize possible null pointer dereference in - dpll_pin_parent_pin_set() - -User may not pass DPLL_A_PIN_STATE attribute in the pin set operation -message. Sanitize that by checking if the attr pointer is not null -and process the passed state attribute value only in that case. - -Reported-by: Xingyuan Mo -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Signed-off-by: Jiri Pirko -Acked-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20231211083758.1082853-1-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 65c95f78917ea6fa7ff189a2c19879c4fe161873) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 13 ++++++++----- - 1 file changed, 8 insertions(+), 5 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 442a0ebeb953..ce7cf736f020 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -925,7 +925,6 @@ dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, - struct netlink_ext_ack *extack) - { - struct nlattr *tb[DPLL_A_PIN_MAX + 1]; -- enum dpll_pin_state state; - u32 ppin_idx; - int ret; - -@@ -936,10 +935,14 @@ dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, - return -EINVAL; - } - ppin_idx = nla_get_u32(tb[DPLL_A_PIN_PARENT_ID]); -- state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -- ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); -- if (ret) -- return ret; -+ -+ if (tb[DPLL_A_PIN_STATE]) { -+ enum dpll_pin_state state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -+ -+ ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); -+ if (ret) -+ return ret; -+ } - - return 0; - } --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch b/kernel-rt/debian/patches/ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch deleted file mode 100644 index 1ce44caa..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 6bfe9392d6a26b04b24d310fc0e6342f139842eb Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Tue, 12 Dec 2023 16:06:05 +0100 -Subject: [PATCH 33/46] dpll: allocate pin ids in cycle - -Pin ID is just a number. Nobody should rely on a certain value, instead, -user should use either pin-id-get op or RTNetlink to get it. - -Unify the pin ID allocation behavior with what there is already -implemented for dpll devices. - -Signed-off-by: Jiri Pirko -Link: https://lore.kernel.org/r/20231212150605.1141261-1-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 97f265ef7f5b526b33d6030b2a1fc69a2259bf4a) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 3568149b9562..1eca8cc271f8 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -22,7 +22,8 @@ DEFINE_MUTEX(dpll_lock); - DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC); - DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC); - --static u32 dpll_xa_id; -+static u32 dpll_device_xa_id; -+static u32 dpll_pin_xa_id; - - #define ASSERT_DPLL_REGISTERED(d) \ - WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -@@ -246,7 +247,7 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module) - dpll->clock_id = clock_id; - dpll->module = module; - ret = xa_alloc_cyclic(&dpll_device_xa, &dpll->id, dpll, xa_limit_32b, -- &dpll_xa_id, GFP_KERNEL); -+ &dpll_device_xa_id, GFP_KERNEL); - if (ret < 0) { - kfree(dpll); - return ERR_PTR(ret); -@@ -446,7 +447,8 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - refcount_set(&pin->refcount, 1); - xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); - xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); -- ret = xa_alloc(&dpll_pin_xa, &pin->id, pin, xa_limit_16b, GFP_KERNEL); -+ ret = xa_alloc_cyclic(&dpll_pin_xa, &pin->id, pin, xa_limit_32b, -+ &dpll_pin_xa_id, GFP_KERNEL); - if (ret) - goto err; - return pin; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch b/kernel-rt/debian/patches/ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch deleted file mode 100644 index ffe318fe..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch +++ /dev/null @@ -1,105 +0,0 @@ -From aebb7cbbcfce883a276aebfd7840d5297a471204 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Mon, 18 Dec 2023 15:58:55 +0100 -Subject: [PATCH 34/46] ice: dpll: fix phase offset value - -Stop dividing the phase_offset value received from firmware. This fault -is present since the initial implementation. -The phase_offset value received from firmware is in 0.01ps resolution. -Dpll subsystem is using the value in 0.001ps, raw value is adjusted -before providing it to the user. - -The user can observe the value of phase offset with response to -`pin-get` netlink message of dpll subsystem for an active pin: -$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ - --do pin-get --json '{"id":2}' - -Where example of correct response would be: -{'board-label': 'C827_0-RCLKA', - 'capabilities': 6, - 'clock-id': 4658613174691613800, - 'frequency': 1953125, - 'id': 2, - 'module-name': 'ice', - 'parent-device': [{'direction': 'input', - 'parent-id': 6, - 'phase-offset': -216839550, - 'prio': 9, - 'state': 'connected'}, - {'direction': 'input', - 'parent-id': 7, - 'phase-offset': -42930, - 'prio': 8, - 'state': 'connected'}], - 'phase-adjust': 0, - 'phase-adjust-max': 16723, - 'phase-adjust-min': -16723, - 'type': 'mux'} - -Provided phase-offset value (-42930) shall be divided by the user with -DPLL_PHASE_OFFSET_DIVIDER to get actual value of -42.930 ps. - -Before the fix, the response was not correct: -{'board-label': 'C827_0-RCLKA', - 'capabilities': 6, - 'clock-id': 4658613174691613800, - 'frequency': 1953125, - 'id': 2, - 'module-name': 'ice', - 'parent-device': [{'direction': 'input', - 'parent-id': 6, - 'phase-offset': -216839, - 'prio': 9, - 'state': 'connected'}, - {'direction': 'input', - 'parent-id': 7, - 'phase-offset': -42, - 'prio': 8, - 'state': 'connected'}], - 'phase-adjust': 0, - 'phase-adjust-max': 16723, - 'phase-adjust-min': -16723, - 'type': 'mux'} - -Where phase-offset value (-42), after division -(DPLL_PHASE_OFFSET_DIVIDER) would be: -0.042 ps. - -Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") -Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") -Reviewed-by: Aleksandr Loktionov -Reviewed-by: Przemek Kitszel -Signed-off-by: Arkadiusz Kubalewski -Reviewed-by: Paul Menzel -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 8278a6a43d030a3aa8d7768148e74844331e39e3) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index a1f1f037f327..7674267a2d90 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -5303,7 +5303,6 @@ ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, - u8 *eec_mode) - { - struct ice_aqc_get_cgu_dpll_status *cmd; -- const s64 nsec_per_psec = 1000LL; - struct ice_aq_desc desc; - int status; - -@@ -5319,8 +5318,7 @@ ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, - *phase_offset = le32_to_cpu(cmd->phase_offset_h); - *phase_offset <<= 32; - *phase_offset += le32_to_cpu(cmd->phase_offset_l); -- *phase_offset = div64_s64(sign_extend64(*phase_offset, 47), -- nsec_per_psec); -+ *phase_offset = sign_extend64(*phase_offset, 47); - *eec_mode = cmd->eec_mode; - } - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch b/kernel-rt/debian/patches/ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch deleted file mode 100644 index a235c301..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 34cbb064beb22a19c3c69fcefbc0c84eaa14d076 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:01 +0100 -Subject: [PATCH 35/46] dpll: fix broken error path in dpll_pin_alloc(..) - -If pin type is not expected, or pin properities failed to allocate -memory, the unwind error path shall not destroy pin's xarrays, which -were not yet initialized. -Add new goto label and use it to fix broken error path. - -Reviewed-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit b6a11a7fc4d6337f7ea720b9287d1b9749c4eae0) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 1eca8cc271f8..c08772ee9fd6 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -441,7 +441,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX || - prop->type > DPLL_PIN_TYPE_MAX)) { - ret = -EINVAL; -- goto err; -+ goto err_pin_prop; - } - pin->prop = prop; - refcount_set(&pin->refcount, 1); -@@ -450,11 +450,12 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - ret = xa_alloc_cyclic(&dpll_pin_xa, &pin->id, pin, xa_limit_32b, - &dpll_pin_xa_id, GFP_KERNEL); - if (ret) -- goto err; -+ goto err_xa_alloc; - return pin; --err: -+err_xa_alloc: - xa_destroy(&pin->dpll_refs); - xa_destroy(&pin->parent_refs); -+err_pin_prop: - kfree(pin); - return ERR_PTR(ret); - } --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch b/kernel-rt/debian/patches/ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch deleted file mode 100644 index d8bcd0fc..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch +++ /dev/null @@ -1,255 +0,0 @@ -From 0d3ade390857fb44333de60cadc255a92011d46f Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:02 +0100 -Subject: [PATCH 36/46] dpll: fix pin dump crash for rebound module - -When a kernel module is unbound but the pin resources were not entirely -freed (other kernel module instance of the same PCI device have had kept -the reference to that pin), and kernel module is again bound, the pin -properties would not be updated (the properties are only assigned when -memory for the pin is allocated), prop pointer still points to the -kernel module memory of the kernel module which was deallocated on the -unbind. - -If the pin dump is invoked in this state, the result is a kernel crash. -Prevent the crash by storing persistent pin properties in dpll subsystem, -copy the content from the kernel module when pin is allocated, instead of -using memory of the kernel module. - -Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Reviewed-by: Jan Glaza -Reviewed-by: Przemek Kitszel -Signed-off-by: Arkadiusz Kubalewski -Reviewed-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 830ead5fb0c5855ce4d70ba2ed4a673b5f1e7d9b) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 55 +++++++++++++++++++++++++++++++++++-- - drivers/dpll/dpll_core.h | 4 +-- - drivers/dpll/dpll_netlink.c | 28 +++++++++---------- - 3 files changed, 69 insertions(+), 18 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index c08772ee9fd6..cb62696467d1 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -425,6 +425,53 @@ void dpll_device_unregister(struct dpll_device *dpll, - } - EXPORT_SYMBOL_GPL(dpll_device_unregister); - -+static void dpll_pin_prop_free(struct dpll_pin_properties *prop) -+{ -+ kfree(prop->package_label); -+ kfree(prop->panel_label); -+ kfree(prop->board_label); -+ kfree(prop->freq_supported); -+} -+ -+static int dpll_pin_prop_dup(const struct dpll_pin_properties *src, -+ struct dpll_pin_properties *dst) -+{ -+ memcpy(dst, src, sizeof(*dst)); -+ if (src->freq_supported && src->freq_supported_num) { -+ size_t freq_size = src->freq_supported_num * -+ sizeof(*src->freq_supported); -+ dst->freq_supported = kmemdup(src->freq_supported, -+ freq_size, GFP_KERNEL); -+ if (!src->freq_supported) -+ return -ENOMEM; -+ } -+ if (src->board_label) { -+ dst->board_label = kstrdup(src->board_label, GFP_KERNEL); -+ if (!dst->board_label) -+ goto err_board_label; -+ } -+ if (src->panel_label) { -+ dst->panel_label = kstrdup(src->panel_label, GFP_KERNEL); -+ if (!dst->panel_label) -+ goto err_panel_label; -+ } -+ if (src->package_label) { -+ dst->package_label = kstrdup(src->package_label, GFP_KERNEL); -+ if (!dst->package_label) -+ goto err_package_label; -+ } -+ -+ return 0; -+ -+err_package_label: -+ kfree(dst->panel_label); -+err_panel_label: -+ kfree(dst->board_label); -+err_board_label: -+ kfree(dst->freq_supported); -+ return -ENOMEM; -+} -+ - static struct dpll_pin * - dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - const struct dpll_pin_properties *prop) -@@ -443,7 +490,9 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - ret = -EINVAL; - goto err_pin_prop; - } -- pin->prop = prop; -+ ret = dpll_pin_prop_dup(prop, &pin->prop); -+ if (ret) -+ goto err_pin_prop; - refcount_set(&pin->refcount, 1); - xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); - xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); -@@ -455,6 +504,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - err_xa_alloc: - xa_destroy(&pin->dpll_refs); - xa_destroy(&pin->parent_refs); -+ dpll_pin_prop_free(&pin->prop); - err_pin_prop: - kfree(pin); - return ERR_PTR(ret); -@@ -515,6 +565,7 @@ void dpll_pin_put(struct dpll_pin *pin) - xa_destroy(&pin->dpll_refs); - xa_destroy(&pin->parent_refs); - xa_erase(&dpll_pin_xa, pin->id); -+ dpll_pin_prop_free(&pin->prop); - kfree(pin); - } - mutex_unlock(&dpll_lock); -@@ -637,7 +688,7 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - unsigned long i, stop; - int ret; - -- if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX)) -+ if (WARN_ON(parent->prop.type != DPLL_PIN_TYPE_MUX)) - return -EINVAL; - - if (WARN_ON(!ops) || -diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h -index 5585873c5c1b..717f715015c7 100644 ---- a/drivers/dpll/dpll_core.h -+++ b/drivers/dpll/dpll_core.h -@@ -44,7 +44,7 @@ struct dpll_device { - * @module: module of creator - * @dpll_refs: hold referencees to dplls pin was registered with - * @parent_refs: hold references to parent pins pin was registered with -- * @prop: pointer to pin properties given by registerer -+ * @prop: pin properties copied from the registerer - * @rclk_dev_name: holds name of device when pin can recover clock from it - * @refcount: refcount - **/ -@@ -55,7 +55,7 @@ struct dpll_pin { - struct module *module; - struct xarray dpll_refs; - struct xarray parent_refs; -- const struct dpll_pin_properties *prop; -+ struct dpll_pin_properties prop; - refcount_t refcount; - }; - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index ce7cf736f020..4c64611d32ac 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -278,17 +278,17 @@ dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, - if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY, sizeof(freq), &freq, - DPLL_A_PIN_PAD)) - return -EMSGSIZE; -- for (fs = 0; fs < pin->prop->freq_supported_num; fs++) { -+ for (fs = 0; fs < pin->prop.freq_supported_num; fs++) { - nest = nla_nest_start(msg, DPLL_A_PIN_FREQUENCY_SUPPORTED); - if (!nest) - return -EMSGSIZE; -- freq = pin->prop->freq_supported[fs].min; -+ freq = pin->prop.freq_supported[fs].min; - if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, sizeof(freq), - &freq, DPLL_A_PIN_PAD)) { - nla_nest_cancel(msg, nest); - return -EMSGSIZE; - } -- freq = pin->prop->freq_supported[fs].max; -+ freq = pin->prop.freq_supported[fs].max; - if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, sizeof(freq), - &freq, DPLL_A_PIN_PAD)) { - nla_nest_cancel(msg, nest); -@@ -304,9 +304,9 @@ static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) - { - int fs; - -- for (fs = 0; fs < pin->prop->freq_supported_num; fs++) -- if (freq >= pin->prop->freq_supported[fs].min && -- freq <= pin->prop->freq_supported[fs].max) -+ for (fs = 0; fs < pin->prop.freq_supported_num; fs++) -+ if (freq >= pin->prop.freq_supported[fs].min && -+ freq <= pin->prop.freq_supported[fs].max) - return true; - return false; - } -@@ -396,7 +396,7 @@ static int - dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, - struct netlink_ext_ack *extack) - { -- const struct dpll_pin_properties *prop = pin->prop; -+ const struct dpll_pin_properties *prop = &pin->prop; - struct dpll_pin_ref *ref; - int ret; - -@@ -689,7 +689,7 @@ dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "state changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -725,7 +725,7 @@ dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "state changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -752,7 +752,7 @@ dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "prio changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -780,7 +780,7 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "direction changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -810,8 +810,8 @@ dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, - int ret; - - phase_adj = nla_get_s32(phase_adj_attr); -- if (phase_adj > pin->prop->phase_range.max || -- phase_adj < pin->prop->phase_range.min) { -+ if (phase_adj > pin->prop.phase_range.max || -+ phase_adj < pin->prop.phase_range.min) { - NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr, - "phase adjust value not supported"); - return -EINVAL; -@@ -995,7 +995,7 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, - unsigned long i; - - xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) { -- prop = pin->prop; -+ prop = &pin->prop; - cid_match = clock_id ? pin->clock_id == clock_id : true; - mod_match = mod_name_attr && module_name(pin->module) ? - !nla_strcmp(mod_name_attr, --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch b/kernel-rt/debian/patches/ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch deleted file mode 100644 index 3b3a1f93..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch +++ /dev/null @@ -1,95 +0,0 @@ -From f4e9960be23f4982fc11fff1e5c78539254f0819 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:03 +0100 -Subject: [PATCH 37/46] dpll: fix userspace availability of pins - -If parent pin was unregistered but child pin was not, the userspace -would see the "zombie" pins - the ones that were registered with -a parent pin (dpll_pin_on_pin_register(..)). -Technically those are not available - as there is no dpll device in the -system. Do not dump those pins and prevent userspace from any -interaction with them. Provide a unified function to determine if the -pin is available and use it before acting/responding for user requests. - -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Reviewed-by: Jan Glaza -Reviewed-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit db2ec3c94667eaeecc6a74d96594fab6baf80fdc) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 29 +++++++++++++++++++++++++++-- - 1 file changed, 27 insertions(+), 2 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 4c64611d32ac..7cc99d627942 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -525,6 +525,24 @@ __dpll_device_change_ntf(struct dpll_device *dpll) - return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll); - } - -+static bool dpll_pin_available(struct dpll_pin *pin) -+{ -+ struct dpll_pin_ref *par_ref; -+ unsigned long i; -+ -+ if (!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED)) -+ return false; -+ xa_for_each(&pin->parent_refs, i, par_ref) -+ if (xa_get_mark(&dpll_pin_xa, par_ref->pin->id, -+ DPLL_REGISTERED)) -+ return true; -+ xa_for_each(&pin->dpll_refs, i, par_ref) -+ if (xa_get_mark(&dpll_device_xa, par_ref->dpll->id, -+ DPLL_REGISTERED)) -+ return true; -+ return false; -+} -+ - /** - * dpll_device_change_ntf - notify that the dpll device has been changed - * @dpll: registered dpll pointer -@@ -551,7 +569,7 @@ dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) - int ret = -ENOMEM; - void *hdr; - -- if (WARN_ON(!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))) -+ if (!dpll_pin_available(pin)) - return -ENODEV; - - msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -@@ -1102,6 +1120,10 @@ int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) - } - pin = dpll_pin_find_from_nlattr(info); - if (!IS_ERR(pin)) { -+ if (!dpll_pin_available(pin)) { -+ nlmsg_free(msg); -+ return -ENODEV; -+ } - ret = dpll_msg_add_pin_handle(msg, pin); - if (ret) { - nlmsg_free(msg); -@@ -1151,6 +1173,8 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - - xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, - ctx->idx) { -+ if (!dpll_pin_available(pin)) -+ continue; - hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, - cb->nlh->nlmsg_seq, - &dpll_nl_family, NLM_F_MULTI, -@@ -1413,7 +1437,8 @@ int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - } - info->user_ptr[0] = xa_load(&dpll_pin_xa, - nla_get_u32(info->attrs[DPLL_A_PIN_ID])); -- if (!info->user_ptr[0]) { -+ if (!info->user_ptr[0] || -+ !dpll_pin_available(info->user_ptr[0])) { - NL_SET_ERR_MSG(info->extack, "pin not found"); - ret = -ENODEV; - goto unlock_dev; --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch b/kernel-rt/debian/patches/ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch deleted file mode 100644 index 51abb96e..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 9066d8d88ced7a53f57c8511bac4e40df4ff288b Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:04 +0100 -Subject: [PATCH 38/46] dpll: fix register pin with unregistered parent pin - -In case of multiple kernel module instances using the same dpll device: -if only one registers dpll device, then only that one can register -directly connected pins with a dpll device. When unregistered parent is -responsible for determining if the muxed pin can be registered with it -or not, the drivers need to be loaded in serialized order to work -correctly - first the driver instance which registers the direct pins -needs to be loaded, then the other instances could register muxed type -pins. - -Allow registration of a pin with a parent even if the parent was not -yet registered, thus allow ability for unserialized driver instance -load order. -Do not WARN_ON notification for unregistered pin, which can be invoked -for described case, instead just return error. - -Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Reviewed-by: Jan Glaza -Reviewed-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 7dc5b18ff71bd6f948810ab8a08b6a6ff8b315c5) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index cb62696467d1..5152bd1b0daf 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -29,8 +29,6 @@ static u32 dpll_pin_xa_id; - WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) - #define ASSERT_DPLL_NOT_REGISTERED(d) \ - WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) --#define ASSERT_PIN_REGISTERED(p) \ -- WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED)) - - struct dpll_device_registration { - struct list_head list; -@@ -616,8 +614,6 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, - WARN_ON(!ops->state_on_dpll_get) || - WARN_ON(!ops->direction_get)) - return -EINVAL; -- if (ASSERT_DPLL_REGISTERED(dpll)) -- return -EINVAL; - - mutex_lock(&dpll_lock); - if (WARN_ON(!(dpll->module == pin->module && -@@ -695,8 +691,6 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - WARN_ON(!ops->state_on_pin_get) || - WARN_ON(!ops->direction_get)) - return -EINVAL; -- if (ASSERT_PIN_REGISTERED(parent)) -- return -EINVAL; - - mutex_lock(&dpll_lock); - ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch b/kernel-rt/debian/patches/ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch deleted file mode 100644 index 7b0c9c09..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch +++ /dev/null @@ -1,144 +0,0 @@ -From 0b98cc67efc4404adc805e1a4a7166a8401ddbd1 Mon Sep 17 00:00:00 2001 -From: Yochai Hagvi -Date: Thu, 25 Jan 2024 15:40:55 +0200 -Subject: [PATCH 39/46] ice: fix connection state of DPLL and out pin - -Fix the connection state between source DPLL and output pin, updating the -attribute 'state' of 'parent_device'. Previously, the connection state -was broken, and didn't reflect the correct state. - -When 'state_on_dpll_set' is called with the value -'DPLL_PIN_STATE_CONNECTED' (1), the output pin will switch to the given -DPLL, and the state of the given DPLL will be set to connected. -E.g.: - --do pin-set --json '{"id":2, "parent-device":{"parent-id":1, - "state": 1 }}' -This command will connect DPLL device with id 1 to output pin with id 2. - -When 'state_on_dpll_set' is called with the value -'DPLL_PIN_STATE_DISCONNECTED' (2) and the given DPLL is currently -connected, then the output pin will be disabled. -E.g: - --do pin-set --json '{"id":2, "parent-device":{"parent-id":1, - "state": 2 }}' -This command will disable output pin with id 2 if DPLL device with ID 1 is -connected to it; otherwise, the command is ignored. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Wojciech Drewek -Reviewed-by: Arkadiusz Kubalewski -Signed-off-by: Yochai Hagvi -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit e8335ef57c6816d81b24173ba88cc9b3f043687f) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 43 +++++++++++++++++------ - 1 file changed, 32 insertions(+), 11 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 86b180cb32a0..0f836adc0e58 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -254,6 +254,7 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, - * ice_dpll_pin_enable - enable a pin on dplls - * @hw: board private hw structure - * @pin: pointer to a pin -+ * @dpll_idx: dpll index to connect to output pin - * @pin_type: type of pin being enabled - * @extack: error reporting - * -@@ -266,7 +267,7 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, - */ - static int - ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, -- enum ice_dpll_pin_type pin_type, -+ u8 dpll_idx, enum ice_dpll_pin_type pin_type, - struct netlink_ext_ack *extack) - { - u8 flags = 0; -@@ -280,10 +281,12 @@ ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, - ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0); - break; - case ICE_DPLL_PIN_TYPE_OUTPUT: -+ flags = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_SRC_SEL; - if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) - flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; - flags |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; -- ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0); -+ ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, dpll_idx, -+ 0, 0); - break; - default: - return -EINVAL; -@@ -398,14 +401,27 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, - break; - case ICE_DPLL_PIN_TYPE_OUTPUT: - ret = ice_aq_get_output_pin_cfg(&pf->hw, pin->idx, -- &pin->flags[0], NULL, -+ &pin->flags[0], &parent, - &pin->freq, NULL); - if (ret) - goto err; -- if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) -- pin->state[0] = DPLL_PIN_STATE_CONNECTED; -- else -- pin->state[0] = DPLL_PIN_STATE_DISCONNECTED; -+ -+ parent &= ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL; -+ if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ parent == pf->dplls.eec.dpll_idx ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_DISCONNECTED; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ parent == pf->dplls.pps.dpll_idx ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_DISCONNECTED; -+ } else { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ } - break; - case ICE_DPLL_PIN_TYPE_RCLK_INPUT: - for (parent = 0; parent < pf->dplls.rclk.num_parents; -@@ -595,7 +611,8 @@ ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, - - mutex_lock(&pf->dplls.lock); - if (enable) -- ret = ice_dpll_pin_enable(&pf->hw, p, pin_type, extack); -+ ret = ice_dpll_pin_enable(&pf->hw, p, d->dpll_idx, pin_type, -+ extack); - else - ret = ice_dpll_pin_disable(&pf->hw, p, pin_type, extack); - if (!ret) -@@ -628,6 +645,11 @@ ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv, - struct netlink_ext_ack *extack) - { - bool enable = state == DPLL_PIN_STATE_CONNECTED; -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ -+ if (!enable && p->state[d->dpll_idx] == DPLL_PIN_STATE_DISCONNECTED) -+ return 0; - - return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable, - extack, ICE_DPLL_PIN_TYPE_OUTPUT); -@@ -694,10 +716,9 @@ ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, - ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); - if (ret) - goto unlock; -- if (pin_type == ICE_DPLL_PIN_TYPE_INPUT) -+ if (pin_type == ICE_DPLL_PIN_TYPE_INPUT || -+ pin_type == ICE_DPLL_PIN_TYPE_OUTPUT) - *state = p->state[d->dpll_idx]; -- else if (pin_type == ICE_DPLL_PIN_TYPE_OUTPUT) -- *state = p->state[0]; - ret = 0; - unlock: - mutex_unlock(&pf->dplls.lock); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch b/kernel-rt/debian/patches/ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch deleted file mode 100644 index ebfdb97e..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch +++ /dev/null @@ -1,217 +0,0 @@ -From e01f5b5e574aca4688e649ae69d7a00b37f95b87 Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 7 Feb 2024 12:59:02 +0100 -Subject: [PATCH 40/46] dpll: fix possible deadlock during netlink dump - operation - -Recently, I've been hitting following deadlock warning during dpll pin -dump: - -[52804.637962] ====================================================== -[52804.638536] WARNING: possible circular locking dependency detected -[52804.639111] 6.8.0-rc2jiri+ #1 Not tainted -[52804.639529] ------------------------------------------------------ -[52804.640104] python3/2984 is trying to acquire lock: -[52804.640581] ffff88810e642678 (nlk_cb_mutex-GENERIC){+.+.}-{3:3}, at: netlink_dump+0xb3/0x780 -[52804.641417] - but task is already holding lock: -[52804.642010] ffffffff83bde4c8 (dpll_lock){+.+.}-{3:3}, at: dpll_lock_dumpit+0x13/0x20 -[52804.642747] - which lock already depends on the new lock. - -[52804.643551] - the existing dependency chain (in reverse order) is: -[52804.644259] - -> #1 (dpll_lock){+.+.}-{3:3}: -[52804.644836] lock_acquire+0x174/0x3e0 -[52804.645271] __mutex_lock+0x119/0x1150 -[52804.645723] dpll_lock_dumpit+0x13/0x20 -[52804.646169] genl_start+0x266/0x320 -[52804.646578] __netlink_dump_start+0x321/0x450 -[52804.647056] genl_family_rcv_msg_dumpit+0x155/0x1e0 -[52804.647575] genl_rcv_msg+0x1ed/0x3b0 -[52804.648001] netlink_rcv_skb+0xdc/0x210 -[52804.648440] genl_rcv+0x24/0x40 -[52804.648831] netlink_unicast+0x2f1/0x490 -[52804.649290] netlink_sendmsg+0x36d/0x660 -[52804.649742] __sock_sendmsg+0x73/0xc0 -[52804.650165] __sys_sendto+0x184/0x210 -[52804.650597] __x64_sys_sendto+0x72/0x80 -[52804.651045] do_syscall_64+0x6f/0x140 -[52804.651474] entry_SYSCALL_64_after_hwframe+0x46/0x4e -[52804.652001] - -> #0 (nlk_cb_mutex-GENERIC){+.+.}-{3:3}: -[52804.652650] check_prev_add+0x1ae/0x1280 -[52804.653107] __lock_acquire+0x1ed3/0x29a0 -[52804.653559] lock_acquire+0x174/0x3e0 -[52804.653984] __mutex_lock+0x119/0x1150 -[52804.654423] netlink_dump+0xb3/0x780 -[52804.654845] __netlink_dump_start+0x389/0x450 -[52804.655321] genl_family_rcv_msg_dumpit+0x155/0x1e0 -[52804.655842] genl_rcv_msg+0x1ed/0x3b0 -[52804.656272] netlink_rcv_skb+0xdc/0x210 -[52804.656721] genl_rcv+0x24/0x40 -[52804.657119] netlink_unicast+0x2f1/0x490 -[52804.657570] netlink_sendmsg+0x36d/0x660 -[52804.658022] __sock_sendmsg+0x73/0xc0 -[52804.658450] __sys_sendto+0x184/0x210 -[52804.658877] __x64_sys_sendto+0x72/0x80 -[52804.659322] do_syscall_64+0x6f/0x140 -[52804.659752] entry_SYSCALL_64_after_hwframe+0x46/0x4e -[52804.660281] - other info that might help us debug this: - -[52804.661077] Possible unsafe locking scenario: - -[52804.661671] CPU0 CPU1 -[52804.662129] ---- ---- -[52804.662577] lock(dpll_lock); -[52804.662924] lock(nlk_cb_mutex-GENERIC); -[52804.663538] lock(dpll_lock); -[52804.664073] lock(nlk_cb_mutex-GENERIC); -[52804.664490] - -The issue as follows: __netlink_dump_start() calls control->start(cb) -with nlk->cb_mutex held. In control->start(cb) the dpll_lock is taken. -Then nlk->cb_mutex is released and taken again in netlink_dump(), while -dpll_lock still being held. That leads to ABBA deadlock when another -CPU races with the same operation. - -Fix this by moving dpll_lock taking into dumpit() callback which ensures -correct lock taking order. - -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Signed-off-by: Jiri Pirko -Reviewed-by: Arkadiusz Kubalewski -Link: https://lore.kernel.org/r/20240207115902.371649-1-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 53c0441dd2c44ee93fddb5473885fd41e4bc2361) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/dpll.yaml | 4 ---- - drivers/dpll/dpll_netlink.c | 20 ++++++-------------- - drivers/dpll/dpll_nl.c | 4 ---- - drivers/dpll/dpll_nl.h | 2 -- - 4 files changed, 6 insertions(+), 24 deletions(-) - -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -index cf8abe1c0550..2b4c4bcd8361 100644 ---- a/Documentation/netlink/specs/dpll.yaml -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -374,8 +374,6 @@ operations: - - type - - dump: -- pre: dpll-lock-dumpit -- post: dpll-unlock-dumpit - reply: *dev-attrs - - - -@@ -462,8 +460,6 @@ operations: - - phase-adjust - - dump: -- pre: dpll-lock-dumpit -- post: dpll-unlock-dumpit - request: - attributes: - - id -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 7cc99d627942..c8c2e836193a 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -1171,6 +1171,7 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - unsigned long i; - int ret = 0; - -+ mutex_lock(&dpll_lock); - xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, - ctx->idx) { - if (!dpll_pin_available(pin)) -@@ -1190,6 +1191,8 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - } - genlmsg_end(skb, hdr); - } -+ mutex_unlock(&dpll_lock); -+ - if (ret == -EMSGSIZE) { - ctx->idx = i; - return skb->len; -@@ -1345,6 +1348,7 @@ int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - unsigned long i; - int ret = 0; - -+ mutex_lock(&dpll_lock); - xa_for_each_marked_start(&dpll_device_xa, i, dpll, DPLL_REGISTERED, - ctx->idx) { - hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, -@@ -1361,6 +1365,8 @@ int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - } - genlmsg_end(skb, hdr); - } -+ mutex_unlock(&dpll_lock); -+ - if (ret == -EMSGSIZE) { - ctx->idx = i; - return skb->len; -@@ -1411,20 +1417,6 @@ dpll_unlock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - mutex_unlock(&dpll_lock); - } - --int dpll_lock_dumpit(struct netlink_callback *cb) --{ -- mutex_lock(&dpll_lock); -- -- return 0; --} -- --int dpll_unlock_dumpit(struct netlink_callback *cb) --{ -- mutex_unlock(&dpll_lock); -- -- return 0; --} -- - int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - struct genl_info *info) - { -diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c -index eaee5be7aa64..1e95f5397cfc 100644 ---- a/drivers/dpll/dpll_nl.c -+++ b/drivers/dpll/dpll_nl.c -@@ -95,9 +95,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { - }, - { - .cmd = DPLL_CMD_DEVICE_GET, -- .start = dpll_lock_dumpit, - .dumpit = dpll_nl_device_get_dumpit, -- .done = dpll_unlock_dumpit, - .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, - }, - { -@@ -129,9 +127,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { - }, - { - .cmd = DPLL_CMD_PIN_GET, -- .start = dpll_lock_dumpit, - .dumpit = dpll_nl_pin_get_dumpit, -- .done = dpll_unlock_dumpit, - .policy = dpll_pin_get_dump_nl_policy, - .maxattr = DPLL_A_PIN_ID, - .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, -diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h -index 92d4c9c4f788..f491262bee4f 100644 ---- a/drivers/dpll/dpll_nl.h -+++ b/drivers/dpll/dpll_nl.h -@@ -30,8 +30,6 @@ dpll_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - void - dpll_pin_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - struct genl_info *info); --int dpll_lock_dumpit(struct netlink_callback *cb); --int dpll_unlock_dumpit(struct netlink_callback *cb); - - int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info); - int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch b/kernel-rt/debian/patches/ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch deleted file mode 100644 index 6e63d913..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch +++ /dev/null @@ -1,42 +0,0 @@ -From ee4551cc0066fdd14d58353a8b7d290fe56ea863 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Thu, 8 Feb 2024 23:56:31 +0100 -Subject: [PATCH 41/46] ice: fix dpll input pin phase_adjust value updates - -The value of phase_adjust for input pin shall be updated in -ice_dpll_pin_state_update(..). Fix by adding proper argument to the -firmware query function call - a pin's struct field pointer where the -phase_adjust value during driver runtime is stored. - -Previously the phase_adjust used to misinform user about actual -phase_adjust value. I.e., if phase_adjust was set to a non zero value and -if driver was reloaded, the user would see the value equal 0, which is -not correct - the actual value is equal to value set before driver reload. - -Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") -Reviewed-by: Alan Brady -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 3b14430c65b4f510b2a310ca4f18ed6ca7184b00) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 0f836adc0e58..10a469060d32 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -373,7 +373,7 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, - case ICE_DPLL_PIN_TYPE_INPUT: - ret = ice_aq_get_input_pin_cfg(&pf->hw, pin->idx, NULL, NULL, - NULL, &pin->flags[0], -- &pin->freq, NULL); -+ &pin->freq, &pin->phase_adjust); - if (ret) - goto err; - if (ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN & pin->flags[0]) { --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch b/kernel-rt/debian/patches/ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch deleted file mode 100644 index 38a7f490..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch +++ /dev/null @@ -1,137 +0,0 @@ -From 1a24c78b6c536e74432a58be216fec85d9c34dc2 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 9 Feb 2024 22:24:30 +0100 -Subject: [PATCH 42/46] ice: fix dpll and dpll_pin data access on PF reset - -Do not allow to acquire data or alter configuration of dpll and pins -through firmware if PF reset is in progress, this would cause confusing -netlink extack errors as the firmware cannot respond or process the -request properly during the reset time. - -Return (-EBUSY) and extack error for the user who tries access/modify -the config of dpll/pin through firmware during the reset time. - -The PF reset and kernel access to dpll data are both asynchronous. It is -not possible to guard all the possible reset paths with any determinictic -approach. I.e., it is possible that reset starts after reset check is -performed (or if the reset would be checked after mutex is locked), but at -the same time it is not possible to wait for dpll mutex unlock in the -reset flow. -This is best effort solution to at least give a clue to the user -what is happening in most of the cases, knowing that there are possible -race conditions where the user could see a different error received -from firmware due to reset unexpectedly starting. - -Test by looping execution of below steps until netlink error appears: -- perform PF reset -$ echo 1 > /sys/class/net//device/reset -- i.e. try to alter/read dpll/pin config: -$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ - --dump pin-get - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Aleksandr Loktionov -Reviewed-by: Przemek Kitszel -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit fc7fd1a10a9d2d38378b42e9a508da4c68018453) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 38 +++++++++++++++++++++++ - 1 file changed, 38 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 10a469060d32..9c8be237c7e5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -30,6 +30,26 @@ static const char * const pin_type_name[] = { - [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input", - }; - -+/** -+ * ice_dpll_is_reset - check if reset is in progress -+ * @pf: private board structure -+ * @extack: error reporting -+ * -+ * If reset is in progress, fill extack with error. -+ * -+ * Return: -+ * * false - no reset in progress -+ * * true - reset in progress -+ */ -+static bool ice_dpll_is_reset(struct ice_pf *pf, struct netlink_ext_ack *extack) -+{ -+ if (ice_is_reset_in_progress(pf->state)) { -+ NL_SET_ERR_MSG(extack, "PF reset in progress"); -+ return true; -+ } -+ return false; -+} -+ - /** - * ice_dpll_pin_freq_set - set pin's frequency - * @pf: private board structure -@@ -109,6 +129,9 @@ ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_pin_freq_set(pf, p, pin_type, frequency, extack); - mutex_unlock(&pf->dplls.lock); -@@ -609,6 +632,9 @@ ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - if (enable) - ret = ice_dpll_pin_enable(&pf->hw, p, d->dpll_idx, pin_type, -@@ -712,6 +738,9 @@ ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); - if (ret) -@@ -836,6 +865,9 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); - mutex_unlock(&pf->dplls.lock); -@@ -1115,6 +1147,9 @@ ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv, - int ret = -EINVAL; - u32 hw_idx; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - hw_idx = parent->idx - pf->dplls.base_rclk_idx; - if (hw_idx >= pf->dplls.num_inputs) -@@ -1169,6 +1204,9 @@ ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv, - int ret = -EINVAL; - u32 hw_idx; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - hw_idx = parent->idx - pf->dplls.base_rclk_idx; - if (hw_idx >= pf->dplls.num_inputs) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch b/kernel-rt/debian/patches/ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch deleted file mode 100644 index fac7344e..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch +++ /dev/null @@ -1,52 +0,0 @@ -From d5d13ad1b0bc3df914a17b874d659a0295688ef6 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 9 Feb 2024 22:24:31 +0100 -Subject: [PATCH 43/46] ice: fix dpll periodic work data updates on PF reset - -Do not allow dpll periodic work function to acquire data from firmware -if PF reset is in progress. Acquiring data will cause dmesg errors as the -firmware cannot respond or process the request properly during the reset -time. - -Test by looping execution of below step until dmesg error appears: -- perform PF reset -$ echo 1 > /sys/class/net//device/reset - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Igor Bagnucki -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 9a8385fe14bcb250a3889e744dc54e9c411d8400) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 9c8be237c7e5..bcb9b9c13aab 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -1390,8 +1390,10 @@ static void ice_dpll_periodic_work(struct kthread_work *work) - struct ice_pf *pf = container_of(d, struct ice_pf, dplls); - struct ice_dpll *de = &pf->dplls.eec; - struct ice_dpll *dp = &pf->dplls.pps; -- int ret; -+ int ret = 0; - -+ if (ice_is_reset_in_progress(pf->state)) -+ goto resched; - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_update_state(pf, de, false); - if (!ret) -@@ -1411,6 +1413,7 @@ static void ice_dpll_periodic_work(struct kthread_work *work) - ice_dpll_notify_changes(de); - ice_dpll_notify_changes(dp); - -+resched: - /* Run twice a second or reschedule if update failed */ - kthread_queue_delayed_work(d->kworker, &d->work, - ret ? msecs_to_jiffies(10) : --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch b/kernel-rt/debian/patches/ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch deleted file mode 100644 index 1ca397d5..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 68e3016c20d27468ffecfc77674f8722f28e09dd Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 9 Feb 2024 22:24:32 +0100 -Subject: [PATCH 44/46] ice: fix pin phase adjust updates on PF reset - -Do not allow to set phase adjust value for a pin if PF reset is in -progress, this would cause confusing netlink extack errors as the firmware -cannot process the request properly during the reset time. - -Return (-EBUSY) and report extack error for the user who tries configure -pin phase adjust during the reset time. - -Test by looping execution of below steps until netlink error appears: -- perform PF reset -$ echo 1 > /sys/class/net//device/reset -- change pin phase adjust value: -$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ - --do pin-set --json '{"id":0, "phase-adjust":1000}' - -Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") -Reviewed-by: Igor Bagnucki -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit ee89921da471edcb4b1e67f5bbfedddf39749782) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index bcb9b9c13aab..2b657d43c769 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -988,6 +988,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, - u8 flag, flags_en = 0; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - switch (type) { - case ICE_DPLL_PIN_TYPE_INPUT: --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch b/kernel-rt/debian/patches/ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch deleted file mode 100644 index e85230a2..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 2f27891def7f2f5cdba668d9eefa6a9652475f23 Mon Sep 17 00:00:00 2001 -From: Michal Schmidt -Date: Fri, 1 Mar 2024 14:37:08 +0100 -Subject: [PATCH 45/46] ice: fix uninitialized dplls mutex usage - -The pf->dplls.lock mutex is initialized too late, after its first use. -Move it to the top of ice_dpll_init. -Note that the "err_exit" error path destroys the mutex. And the mutex is -the last thing destroyed in ice_dpll_deinit. -This fixes the following warning with CONFIG_DEBUG_MUTEXES: - - ice 0000:10:00.0: The DDP package was successfully loaded: ICE OS Default Package version 1.3.36.0 - ice 0000:10:00.0: 252.048 Gb/s available PCIe bandwidth (16.0 GT/s PCIe x16 link) - ice 0000:10:00.0: PTP init successful - ------------[ cut here ]------------ - DEBUG_LOCKS_WARN_ON(lock->magic != lock) - WARNING: CPU: 0 PID: 410 at kernel/locking/mutex.c:587 __mutex_lock+0x773/0xd40 - Modules linked in: crct10dif_pclmul crc32_pclmul crc32c_intel polyval_clmulni polyval_generic ice(+) nvme nvme_c> - CPU: 0 PID: 410 Comm: kworker/0:4 Not tainted 6.8.0-rc5+ #3 - Hardware name: HPE ProLiant DL110 Gen10 Plus/ProLiant DL110 Gen10 Plus, BIOS U56 10/19/2023 - Workqueue: events work_for_cpu_fn - RIP: 0010:__mutex_lock+0x773/0xd40 - Code: c0 0f 84 1d f9 ff ff 44 8b 35 0d 9c 69 01 45 85 f6 0f 85 0d f9 ff ff 48 c7 c6 12 a2 a9 85 48 c7 c7 12 f1 a> - RSP: 0018:ff7eb1a3417a7ae0 EFLAGS: 00010286 - RAX: 0000000000000000 RBX: 0000000000000002 RCX: 0000000000000000 - RDX: 0000000000000002 RSI: ffffffff85ac2bff RDI: 00000000ffffffff - RBP: ff7eb1a3417a7b80 R08: 0000000000000000 R09: 00000000ffffbfff - R10: ff7eb1a3417a7978 R11: ff32b80f7fd2e568 R12: 0000000000000000 - R13: 0000000000000000 R14: 0000000000000000 R15: ff32b7f02c50e0d8 - FS: 0000000000000000(0000) GS:ff32b80efe800000(0000) knlGS:0000000000000000 - CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 - CR2: 000055b5852cc000 CR3: 000000003c43a004 CR4: 0000000000771ef0 - DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 - DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 - PKRU: 55555554 - Call Trace: - - ? __warn+0x84/0x170 - ? __mutex_lock+0x773/0xd40 - ? report_bug+0x1c7/0x1d0 - ? prb_read_valid+0x1b/0x30 - ? handle_bug+0x42/0x70 - ? exc_invalid_op+0x18/0x70 - ? asm_exc_invalid_op+0x1a/0x20 - ? __mutex_lock+0x773/0xd40 - ? rcu_is_watching+0x11/0x50 - ? __kmalloc_node_track_caller+0x346/0x490 - ? ice_dpll_lock_status_get+0x28/0x50 [ice] - ? __pfx_ice_dpll_lock_status_get+0x10/0x10 [ice] - ? ice_dpll_lock_status_get+0x28/0x50 [ice] - ice_dpll_lock_status_get+0x28/0x50 [ice] - dpll_device_get_one+0x14f/0x2e0 - dpll_device_event_send+0x7d/0x150 - dpll_device_register+0x124/0x180 - ice_dpll_init_dpll+0x7b/0xd0 [ice] - ice_dpll_init+0x224/0xa40 [ice] - ? _dev_info+0x70/0x90 - ice_load+0x468/0x690 [ice] - ice_probe+0x75b/0xa10 [ice] - ? _raw_spin_unlock_irqrestore+0x4f/0x80 - ? process_one_work+0x1a3/0x500 - local_pci_probe+0x47/0xa0 - work_for_cpu_fn+0x17/0x30 - process_one_work+0x20d/0x500 - worker_thread+0x1df/0x3e0 - ? __pfx_worker_thread+0x10/0x10 - kthread+0x103/0x140 - ? __pfx_kthread+0x10/0x10 - ret_from_fork+0x31/0x50 - ? __pfx_kthread+0x10/0x10 - ret_from_fork_asm+0x1b/0x30 - - irq event stamp: 125197 - hardirqs last enabled at (125197): [] finish_task_switch.isra.0+0x12d/0x3d0 - hardirqs last disabled at (125196): [] __schedule+0xea4/0x19f0 - softirqs last enabled at (105334): [] napi_get_frags_check+0x1a/0x60 - softirqs last disabled at (105332): [] napi_get_frags_check+0x1a/0x60 - ---[ end trace 0000000000000000 ]--- - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Signed-off-by: Michal Schmidt -Reviewed-by: Maciej Fijalkowski -Signed-off-by: Tony Nguyen -(cherry picked from commit 9224fc86f1776193650a33a275cac628952f80a9) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 2b657d43c769..68b894bb68fe 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -2146,6 +2146,7 @@ void ice_dpll_init(struct ice_pf *pf) - struct ice_dplls *d = &pf->dplls; - int err = 0; - -+ mutex_init(&d->lock); - err = ice_dpll_init_info(pf, cgu); - if (err) - goto err_exit; -@@ -2158,7 +2159,6 @@ void ice_dpll_init(struct ice_pf *pf) - err = ice_dpll_init_pins(pf, cgu); - if (err) - goto deinit_pps; -- mutex_init(&d->lock); - if (cgu) { - err = ice_dpll_init_worker(pf); - if (err) --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch b/kernel-rt/debian/patches/ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch deleted file mode 100644 index 20051b96..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch +++ /dev/null @@ -1,61 +0,0 @@ -From d07be637791f946437f99e73b1de32f0d2edb2d3 Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 6 Mar 2024 16:12:40 +0100 -Subject: [PATCH 46/46] dpll: fix dpll_xa_ref_*_del() for multiple - registrations - -Currently, if there are multiple registrations of the same pin on the -same dpll device, following warnings are observed: -WARNING: CPU: 5 PID: 2212 at drivers/dpll/dpll_core.c:143 dpll_xa_ref_pin_del.isra.0+0x21e/0x230 -WARNING: CPU: 5 PID: 2212 at drivers/dpll/dpll_core.c:223 __dpll_pin_unregister+0x2b3/0x2c0 - -The problem is, that in both dpll_xa_ref_dpll_del() and -dpll_xa_ref_pin_del() registration is only removed from list in case the -reference count drops to zero. That is wrong, the registration has to -be removed always. - -To fix this, remove the registration from the list and free -it unconditionally, instead of doing it only when the ref reference -counter reaches zero. - -Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") -Signed-off-by: Jiri Pirko -Reviewed-by: Rahul Rameshbabu -Signed-off-by: David S. Miller -(cherry picked from commit b446631f355ece73b13c311dd712c47381a23172) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 5152bd1b0daf..04c4640db115 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -129,9 +129,9 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin, - reg = dpll_pin_registration_find(ref, ops, priv); - if (WARN_ON(!reg)) - return -EINVAL; -+ list_del(®->list); -+ kfree(reg); - if (refcount_dec_and_test(&ref->refcount)) { -- list_del(®->list); -- kfree(reg); - xa_erase(xa_pins, i); - WARN_ON(!list_empty(&ref->registration_list)); - kfree(ref); -@@ -209,9 +209,9 @@ dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll, - reg = dpll_pin_registration_find(ref, ops, priv); - if (WARN_ON(!reg)) - return; -+ list_del(®->list); -+ kfree(reg); - if (refcount_dec_and_test(&ref->refcount)) { -- list_del(®->list); -- kfree(reg); - xa_erase(xa_dplls, i); - WARN_ON(!list_empty(&ref->registration_list)); - kfree(ref); --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch b/kernel-rt/debian/patches/ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch deleted file mode 100644 index 92438458..00000000 --- a/kernel-rt/debian/patches/ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 08d5dda0bdd0582db906670d6960d2438ddf234a Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Wed, 7 Aug 2024 07:59:00 +0000 -Subject: [PATCH] ice: modify the ice driver min version to "stx.2" - -Change the ice driver min version to stx.2 because we back ported -some dpll related commits from kernel-6.7, kernel-6.8 and kernel-6.9. - -The ice driver version should be ice-6.6.40-stx.2. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index e87916981b5d..6fb76ccb9dd3 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.1" -+ICE_STX = "-stx.2" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch b/kernel-rt/debian/patches/ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch deleted file mode 100644 index d0440e3e..00000000 --- a/kernel-rt/debian/patches/ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch +++ /dev/null @@ -1,214 +0,0 @@ -From 9176c0a850a8f57213c298d6030f4ac1a511570a Mon Sep 17 00:00:00 2001 -From: Marcin Szycik -Date: Thu, 4 Apr 2024 16:04:51 +0200 -Subject: [PATCH 1/2] ice: Add automatic VF reset on Tx MDD events - -In cases when VF sends malformed packets that are classified as malicious, -it can cause Tx queue to freeze as a result of Malicious Driver Detection -event. Such malformed packets can appear as a result of a faulty userspace -app running on VF. This frozen queue can be stuck for several minutes being -unusable. - -User might prefer to immediately bring the VF back to operational state -after such event, which can be done by automatically resetting the VF which -caused MDD. This is already implemented for Rx events (mdd-auto-reset-vf -flag private flag needs to be set). - -Extend the VF auto reset to also cover Tx MDD events. When any MDD event -occurs on VF (Tx or Rx) and the mdd-auto-reset-vf private flag is set, -perform a graceful VF reset to quickly bring it back to operational state. - -Reviewed-by: Wojciech Drewek -Reviewed-by: Przemek Kitszel -Co-developed-by: Liang-Min Wang -Signed-off-by: Liang-Min Wang -Signed-off-by: Marcin Szycik -Reviewed-by: Simon Horman -Tested-by: Rafal Romanowski -Signed-off-by: Tony Nguyen -(cherry picked from commit cc2a9d6c03b804c301447326aff4cf2359867f9c) -[jma: Adjust the patch for the content changes.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 57 +++++++++++++++++----- - drivers/net/ethernet/intel/ice/ice_sriov.c | 25 +++++++--- - drivers/net/ethernet/intel/ice/ice_sriov.h | 2 + - 3 files changed, 67 insertions(+), 17 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 6d75284301cc..8a6acb5a722e 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -1718,6 +1718,39 @@ static void ice_service_timer(struct timer_list *t) - ice_service_task_schedule(pf); - } - -+/** -+ * ice_mdd_maybe_reset_vf - reset VF after MDD event -+ * @pf: pointer to the PF structure -+ * @vf: pointer to the VF structure -+ * @reset_vf_tx: whether Tx MDD has occurred -+ * @reset_vf_rx: whether Rx MDD has occurred -+ * -+ * Since the queue can get stuck on VF MDD events, the PF can be configured to -+ * automatically reset the VF by enabling the private ethtool flag -+ * mdd-auto-reset-vf. -+ */ -+static void ice_mdd_maybe_reset_vf(struct ice_pf *pf, struct ice_vf *vf, -+ bool reset_vf_tx, bool reset_vf_rx) -+{ -+ struct device *dev = ice_pf_to_dev(pf); -+ -+ if (!test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)) -+ return; -+ -+ /* VF MDD event counters will be cleared by reset, so print the event -+ * prior to reset. -+ */ -+ if (reset_vf_tx) -+ ice_print_vf_tx_mdd_event(vf); -+ -+ if (reset_vf_rx) -+ ice_print_vf_rx_mdd_event(vf); -+ -+ dev_info(dev, "PF-to-VF reset on PF %d VF %d due to MDD event\n", -+ pf->hw.pf_id, vf->vf_id); -+ ice_reset_vf(vf, ICE_VF_RESET_NOTIFY | ICE_VF_RESET_LOCK); -+} -+ - /** - * ice_handle_mdd_event - handle malicious driver detect event - * @pf: pointer to the PF structure -@@ -1823,6 +1856,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - */ - mutex_lock(&pf->vfs.table_lock); - ice_for_each_vf(pf, bkt, vf) { -+ bool reset_vf_tx = false, reset_vf_rx = false; -+ - reg = rd32(hw, VP_MDET_TX_PQM(vf->vf_id)); - if (reg & VP_MDET_TX_PQM_VALID_M) { - wr32(hw, VP_MDET_TX_PQM(vf->vf_id), 0xFFFF); -@@ -1831,6 +1866,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - if (netif_msg_tx_err(pf)) - dev_info(dev, "Malicious Driver Detection event TX_PQM detected on VF %d\n", - vf->vf_id); -+ -+ reset_vf_tx = true; - } - - reg = rd32(hw, VP_MDET_TX_TCLAN(vf->vf_id)); -@@ -1841,6 +1878,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - if (netif_msg_tx_err(pf)) - dev_info(dev, "Malicious Driver Detection event TX_TCLAN detected on VF %d\n", - vf->vf_id); -+ -+ reset_vf_tx = true; - } - - reg = rd32(hw, VP_MDET_TX_TDPU(vf->vf_id)); -@@ -1851,6 +1890,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - if (netif_msg_tx_err(pf)) - dev_info(dev, "Malicious Driver Detection event TX_TDPU detected on VF %d\n", - vf->vf_id); -+ -+ reset_vf_tx = true; - } - - reg = rd32(hw, VP_MDET_RX(vf->vf_id)); -@@ -1862,18 +1903,12 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - dev_info(dev, "Malicious Driver Detection event RX detected on VF %d\n", - vf->vf_id); - -- /* Since the queue is disabled on VF Rx MDD events, the -- * PF can be configured to reset the VF through ethtool -- * private flag mdd-auto-reset-vf. -- */ -- if (test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)) { -- /* VF MDD event counters will be cleared by -- * reset, so print the event prior to reset. -- */ -- ice_print_vf_rx_mdd_event(vf); -- ice_reset_vf(vf, ICE_VF_RESET_LOCK); -- } -+ reset_vf_rx = true; - } -+ -+ if (reset_vf_tx || reset_vf_rx) -+ ice_mdd_maybe_reset_vf(pf, vf, reset_vf_tx, -+ reset_vf_rx); - } - mutex_unlock(&pf->vfs.table_lock); - -diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.c b/drivers/net/ethernet/intel/ice/ice_sriov.c -index 31314e7540f8..442162be23ea 100644 ---- a/drivers/net/ethernet/intel/ice/ice_sriov.c -+++ b/drivers/net/ethernet/intel/ice/ice_sriov.c -@@ -1662,6 +1662,24 @@ void ice_print_vf_rx_mdd_event(struct ice_vf *vf) - ? "on" : "off"); - } - -+/** -+ * ice_print_vf_tx_mdd_event - print VF Tx malicious driver detect event -+ * @vf: pointer to the VF structure -+ */ -+void ice_print_vf_tx_mdd_event(struct ice_vf *vf) -+{ -+ struct ice_pf *pf = vf->pf; -+ struct device *dev; -+ -+ dev = ice_pf_to_dev(pf); -+ -+ dev_info(dev, "%d Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pM. mdd-auto-reset-vfs=%s\n", -+ vf->mdd_tx_events.count, pf->hw.pf_id, vf->vf_id, -+ vf->dev_lan_addr, -+ test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags) -+ ? "on" : "off"); -+} -+ - /** - * ice_print_vfs_mdd_events - print VFs malicious driver detect event - * @pf: pointer to the PF structure -@@ -1670,8 +1688,6 @@ void ice_print_vf_rx_mdd_event(struct ice_vf *vf) - */ - void ice_print_vfs_mdd_events(struct ice_pf *pf) - { -- struct device *dev = ice_pf_to_dev(pf); -- struct ice_hw *hw = &pf->hw; - struct ice_vf *vf; - unsigned int bkt; - -@@ -1698,10 +1714,7 @@ void ice_print_vfs_mdd_events(struct ice_pf *pf) - if (vf->mdd_tx_events.count != vf->mdd_tx_events.last_printed) { - vf->mdd_tx_events.last_printed = - vf->mdd_tx_events.count; -- -- dev_info(dev, "%d Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pM.\n", -- vf->mdd_tx_events.count, hw->pf_id, vf->vf_id, -- vf->dev_lan_addr); -+ ice_print_vf_tx_mdd_event(vf); - } - } - mutex_unlock(&pf->vfs.table_lock); -diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.h b/drivers/net/ethernet/intel/ice/ice_sriov.h -index 346cb2666f3a..7f733208d402 100644 ---- a/drivers/net/ethernet/intel/ice/ice_sriov.h -+++ b/drivers/net/ethernet/intel/ice/ice_sriov.h -@@ -58,6 +58,7 @@ void - ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event); - void ice_print_vfs_mdd_events(struct ice_pf *pf); - void ice_print_vf_rx_mdd_event(struct ice_vf *vf); -+void ice_print_vf_tx_mdd_event(struct ice_vf *vf); - bool - ice_vc_validate_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto); - #else /* CONFIG_PCI_IOV */ -@@ -67,6 +68,7 @@ static inline - void ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event) { } - static inline void ice_print_vfs_mdd_events(struct ice_pf *pf) { } - static inline void ice_print_vf_rx_mdd_event(struct ice_vf *vf) { } -+static inline void ice_print_vf_tx_mdd_event(struct ice_vf *vf) { } - static inline void ice_restore_all_vfs_msi_state(struct pci_dev *pdev) { } - - static inline int --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch b/kernel-rt/debian/patches/ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch deleted file mode 100644 index 9bc17ddd..00000000 --- a/kernel-rt/debian/patches/ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 7bd9084525e4174cbb3ea5af07589c0851f77c62 Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Tue, 13 Aug 2024 01:42:23 +0000 -Subject: [PATCH 2/2] ice: modify the ice driver min version to stx.3 - -Change the ice driver min version to stx.3 because we back ported -https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git -/commit/?id=cc2a9d6c03b804c301447326aff4cf2359867f9c (ice: Add -automatic VF reset on Tx MDD events) from linux-6.10.y. - -The ice driver version should be ice-6.6.40-stx.3. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 6fb76ccb9dd3..5807b310bdca 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.2" -+ICE_STX = "-stx.3" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch b/kernel-rt/debian/patches/ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch deleted file mode 100644 index 72fc21c3..00000000 --- a/kernel-rt/debian/patches/ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 2df80b59509ec642cc2e075a6bb3dbb6d4a1fdde Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Thu, 12 Sep 2024 00:30:57 +0000 -Subject: [PATCH] ice:modify the ice driver version to stx.5 - -Change the ice driver min version to stx.5 because we back ported -the upstream commit https://git.kernel.org/pub/scm/linux/kernel/git -/netdev/net.git/commit/?id=d2940002b0aa to fix "subcloud crashes -with sriov_config.sh". - -The ice driver version should be ice-6.6.40-stx.5. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 7163d25405f8..6da58d35c2c0 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.4" -+ICE_STX = "-stx.5" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch b/kernel-rt/debian/patches/ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch deleted file mode 100644 index a2d833a0..00000000 --- a/kernel-rt/debian/patches/ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch +++ /dev/null @@ -1,258 +0,0 @@ -From d3330a6882510c725c417f295112080802d70de8 Mon Sep 17 00:00:00 2001 -From: Michal Schmidt -Date: Tue, 26 Mar 2024 00:20:37 +0100 -Subject: [PATCH 1/2] ice: add ice_adapter for shared data across PFs on the - same NIC - -There is a need for synchronization between ice PFs on the same physical -adapter. - -Add a "struct ice_adapter" for holding data shared between PFs of the -same multifunction PCI device. The struct is refcounted - each ice_pf -holds a reference to it. - -Its first use will be for PTP. I expect it will be useful also to -improve the ugliness that is ice_prot_id_tbl. - -Reviewed-by: Przemek Kitszel -Signed-off-by: Michal Schmidt -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 0e2bddf9e5f926ce32ed635012d0f8a0b54075d5) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/Makefile | 3 +- - drivers/net/ethernet/intel/ice/ice.h | 2 + - drivers/net/ethernet/intel/ice/ice_adapter.c | 114 +++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_adapter.h | 22 ++++ - drivers/net/ethernet/intel/ice/ice_main.c | 8 ++ - 5 files changed, 148 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/intel/ice/ice_adapter.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_adapter.h - -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 8757bec23fb3..487e8f95e152 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -36,7 +36,8 @@ ice-y := ice_main.o \ - ice_repr.o \ - ice_tc_lib.o \ - ice_fwlog.o \ -- ice_debugfs.o -+ ice_debugfs.o \ -+ ice_adapter.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index ed1c6cdedeff..03e5655938a7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -77,6 +77,7 @@ - #include "ice_gnss.h" - #include "ice_irq.h" - #include "ice_dpll.h" -+#include "ice_adapter.h" - - extern const char ice_drv_ver[]; - #define ICE_BAR0 0 -@@ -536,6 +537,7 @@ struct ice_agg_node { - - struct ice_pf { - struct pci_dev *pdev; -+ struct ice_adapter *adapter; - - struct devlink_region *nvm_region; - struct devlink_region *sram_region; -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.c b/drivers/net/ethernet/intel/ice/ice_adapter.c -new file mode 100644 -index 000000000000..f00ab998e853 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.c -@@ -0,0 +1,114 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+// SPDX-FileCopyrightText: Copyright Red Hat -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "ice_adapter.h" -+ -+static DEFINE_XARRAY(ice_adapters); -+ -+/* PCI bus number is 8 bits. Slot is 5 bits. Domain can have the rest. */ -+#define INDEX_FIELD_DOMAIN GENMASK(BITS_PER_LONG - 1, 13) -+#define INDEX_FIELD_BUS GENMASK(12, 5) -+#define INDEX_FIELD_SLOT GENMASK(4, 0) -+ -+static unsigned long ice_adapter_index(const struct pci_dev *pdev) -+{ -+ unsigned int domain = pci_domain_nr(pdev->bus); -+ -+ WARN_ON(domain > FIELD_MAX(INDEX_FIELD_DOMAIN)); -+ -+ return FIELD_PREP(INDEX_FIELD_DOMAIN, domain) | -+ FIELD_PREP(INDEX_FIELD_BUS, pdev->bus->number) | -+ FIELD_PREP(INDEX_FIELD_SLOT, PCI_SLOT(pdev->devfn)); -+} -+ -+static struct ice_adapter *ice_adapter_new(void) -+{ -+ struct ice_adapter *adapter; -+ -+ adapter = kzalloc(sizeof(*adapter), GFP_KERNEL); -+ if (!adapter) -+ return NULL; -+ -+ refcount_set(&adapter->refcount, 1); -+ -+ return adapter; -+} -+ -+static void ice_adapter_free(struct ice_adapter *adapter) -+{ -+ kfree(adapter); -+} -+ -+DEFINE_FREE(ice_adapter_free, struct ice_adapter*, if (_T) ice_adapter_free(_T)) -+ -+/** -+ * ice_adapter_get - Get a shared ice_adapter structure. -+ * @pdev: Pointer to the pci_dev whose driver is getting the ice_adapter. -+ * -+ * Gets a pointer to a shared ice_adapter structure. Physical functions (PFs) -+ * of the same multi-function PCI device share one ice_adapter structure. -+ * The ice_adapter is reference-counted. The PF driver must use ice_adapter_put -+ * to release its reference. -+ * -+ * Context: Process, may sleep. -+ * Return: Pointer to ice_adapter on success. -+ * ERR_PTR() on error. -ENOMEM is the only possible error. -+ */ -+struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev) -+{ -+ struct ice_adapter *ret, __free(ice_adapter_free) *adapter = NULL; -+ unsigned long index = ice_adapter_index(pdev); -+ -+ adapter = ice_adapter_new(); -+ if (!adapter) -+ return ERR_PTR(-ENOMEM); -+ -+ xa_lock(&ice_adapters); -+ ret = __xa_cmpxchg(&ice_adapters, index, NULL, adapter, GFP_KERNEL); -+ if (xa_is_err(ret)) { -+ ret = ERR_PTR(xa_err(ret)); -+ goto unlock; -+ } -+ if (ret) { -+ refcount_inc(&ret->refcount); -+ goto unlock; -+ } -+ ret = no_free_ptr(adapter); -+unlock: -+ xa_unlock(&ice_adapters); -+ return ret; -+} -+ -+/** -+ * ice_adapter_put - Release a reference to the shared ice_adapter structure. -+ * @pdev: Pointer to the pci_dev whose driver is releasing the ice_adapter. -+ * -+ * Releases the reference to ice_adapter previously obtained with -+ * ice_adapter_get. -+ * -+ * Context: Any. -+ */ -+void ice_adapter_put(const struct pci_dev *pdev) -+{ -+ unsigned long index = ice_adapter_index(pdev); -+ struct ice_adapter *adapter; -+ -+ xa_lock(&ice_adapters); -+ adapter = xa_load(&ice_adapters, index); -+ if (WARN_ON(!adapter)) -+ goto unlock; -+ -+ if (!refcount_dec_and_test(&adapter->refcount)) -+ goto unlock; -+ -+ WARN_ON(__xa_erase(&ice_adapters, index) != adapter); -+ ice_adapter_free(adapter); -+unlock: -+ xa_unlock(&ice_adapters); -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.h b/drivers/net/ethernet/intel/ice/ice_adapter.h -new file mode 100644 -index 000000000000..cb5a02eb24c1 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.h -@@ -0,0 +1,22 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+/* SPDX-FileCopyrightText: Copyright Red Hat */ -+ -+#ifndef _ICE_ADAPTER_H_ -+#define _ICE_ADAPTER_H_ -+ -+#include -+ -+struct pci_dev; -+ -+/** -+ * struct ice_adapter - PCI adapter resources shared across PFs -+ * @refcount: Reference count. struct ice_pf objects hold the references. -+ */ -+struct ice_adapter { -+ refcount_t refcount; -+}; -+ -+struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev); -+void ice_adapter_put(const struct pci_dev *pdev); -+ -+#endif /* _ICE_ADAPTER_H */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 685635a22616..b95d6b1f05e0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -5142,6 +5142,7 @@ static int - ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - { - struct device *dev = &pdev->dev; -+ struct ice_adapter *adapter; - struct ice_pf *pf; - struct ice_hw *hw; - int err; -@@ -5194,7 +5195,12 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - - pci_set_master(pdev); - -+ adapter = ice_adapter_get(pdev); -+ if (IS_ERR(adapter)) -+ return PTR_ERR(adapter); -+ - pf->pdev = pdev; -+ pf->adapter = adapter; - pci_set_drvdata(pdev, pf); - set_bit(ICE_DOWN, pf->state); - /* Disable service task until DOWN bit is cleared */ -@@ -5245,6 +5251,7 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - err_load: - ice_deinit(pf); - err_init: -+ ice_adapter_put(pdev); - pci_disable_device(pdev); - return err; - } -@@ -5349,6 +5356,7 @@ static void ice_remove(struct pci_dev *pdev) - ice_setup_mc_magic_wake(pf); - ice_set_wake(pf); - -+ ice_adapter_put(pdev); - pci_disable_device(pdev); - } - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch b/kernel-rt/debian/patches/ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch deleted file mode 100644 index bb979876..00000000 --- a/kernel-rt/debian/patches/ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch +++ /dev/null @@ -1,151 +0,0 @@ -From 72628177274c4993ebc3e36f183f97cb44f08234 Mon Sep 17 00:00:00 2001 -From: Michal Schmidt -Date: Tue, 26 Mar 2024 00:20:38 +0100 -Subject: [PATCH 2/2] ice: avoid the PTP hardware semaphore in gettimex64 path - -The PTP hardware semaphore (PFTSYN_SEM) is used to synchronize -operations that program the PTP timers. The operations involve issuing -commands to the sideband queue. The E810 does not have a hardware -sideband queue, so the admin queue is used. The admin queue is slow. -I have observed delays in hundreds of milliseconds waiting for -ice_sq_done. - -When phc2sys reads the time from the ice PTP clock and PFTSYN_SEM is -held by a task performing one of the slow operations, ice_ptp_lock can -easily time out. phc2sys gets -EBUSY and the kernel prints: - ice 0000:XX:YY.0: PTP failed to get time -These messages appear once every few seconds, causing log spam. - -The E810 datasheet recommends an algorithm for reading the upper 64 bits -of the GLTSYN_TIME register. It matches what's implemented in -ice_ptp_read_src_clk_reg. It is robust against wrap-around, but not -necessarily against the concurrent setting of the register (with -GLTSYN_CMD_{INIT,ADJ}_TIME commands). Perhaps that's why -ice_ptp_gettimex64 also takes PFTSYN_SEM. - -The race with time setters can be prevented without relying on the PTP -hardware semaphore. Using the "ice_adapter" from the previous patch, -we can have a common spinlock for the PFs that share the clock hardware. -It will protect the reading and writing to the GLTSYN_TIME register. -The writing is performed indirectly, by the hardware, as a result of -the driver writing GLTSYN_CMD_SYNC in ice_ptp_exec_tmr_cmd. I wasn't -sure if the ice_flush there is enough to make sure GLTSYN_TIME has been -updated, but it works well in my testing. - -My test code can be seen here: -https://gitlab.com/mschmidt2/linux/-/commits/ice-ptp-host-side-lock-10 -It consists of: - - kernel threads reading the time in a busy loop and looking at the - deltas between consecutive values, reporting new maxima. - - a shell script that sets the time repeatedly; - - a bpftrace probe to produce a histogram of the measured deltas. -Without the spinlock ptp_gltsyn_time_lock, it is easy to see tearing. -Deltas in the [2G, 4G) range appear in the histograms. -With the spinlock added, there is no tearing and the biggest delta I saw -was in the range [1M, 2M), that is under 2 ms. - -Reviewed-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Michal Schmidt -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit d29a8134c78232213fb88f20d7ae865ec364e367) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_adapter.c | 2 ++ - drivers/net/ethernet/intel/ice/ice_adapter.h | 6 ++++++ - drivers/net/ethernet/intel/ice/ice_ptp.c | 8 +------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 3 +++ - 4 files changed, 12 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.c b/drivers/net/ethernet/intel/ice/ice_adapter.c -index f00ab998e853..52d15ef7f4b1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adapter.c -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include "ice_adapter.h" - -@@ -35,6 +36,7 @@ static struct ice_adapter *ice_adapter_new(void) - if (!adapter) - return NULL; - -+ spin_lock_init(&adapter->ptp_gltsyn_time_lock); - refcount_set(&adapter->refcount, 1); - - return adapter; -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.h b/drivers/net/ethernet/intel/ice/ice_adapter.h -index cb5a02eb24c1..9d11014ec02f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adapter.h -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.h -@@ -4,15 +4,21 @@ - #ifndef _ICE_ADAPTER_H_ - #define _ICE_ADAPTER_H_ - -+#include - #include - - struct pci_dev; - - /** - * struct ice_adapter - PCI adapter resources shared across PFs -+ * @ptp_gltsyn_time_lock: Spinlock protecting access to the GLTSYN_TIME -+ * register of the PTP clock. - * @refcount: Reference count. struct ice_pf objects hold the references. - */ - struct ice_adapter { -+ /* For access to the GLTSYN_TIME register */ -+ spinlock_t ptp_gltsyn_time_lock; -+ - refcount_t refcount; - }; - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 44b8fc8021cd..307d2cc023e1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -372,6 +372,7 @@ ice_ptp_read_src_clk_reg(struct ice_pf *pf, struct ptp_system_timestamp *sts) - u8 tmr_idx; - - tmr_idx = ice_get_ptp_src_clock_index(hw); -+ guard(spinlock)(&pf->adapter->ptp_gltsyn_time_lock); - /* Read the system timestamp pre PHC read */ - ptp_read_system_prets(sts); - -@@ -1978,15 +1979,8 @@ ice_ptp_gettimex64(struct ptp_clock_info *info, struct timespec64 *ts, - struct ptp_system_timestamp *sts) - { - struct ice_pf *pf = ptp_info_to_pf(info); -- struct ice_hw *hw = &pf->hw; -- -- if (!ice_ptp_lock(hw)) { -- dev_err(ice_pf_to_dev(pf), "PTP failed to get time\n"); -- return -EBUSY; -- } - - ice_ptp_read_time(pf, ts, sts); -- ice_ptp_unlock(hw); - - return 0; - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 313a72dad813..72f080011364 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -274,6 +274,9 @@ static void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - */ - static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw) - { -+ struct ice_pf *pf = container_of(hw, struct ice_pf, hw); -+ -+ guard(spinlock)(&pf->adapter->ptp_gltsyn_time_lock); - wr32(hw, GLTSYN_CMD_SYNC, SYNC_EXEC_CMD); - ice_flush(hw); - } --- -2.43.0 - diff --git a/kernel-rt/debian/patches/ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch b/kernel-rt/debian/patches/ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch deleted file mode 100644 index 06ed85ed..00000000 --- a/kernel-rt/debian/patches/ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 3229486de73d93dde2a355e73c31d815ab8a7576 Mon Sep 17 00:00:00 2001 -From: Kent Overstreet -Date: Mon, 11 Dec 2023 15:15:38 -0500 -Subject: [PATCH] refcount: Split out refcount_types.h - -More trimming of sched.h dependencies. - -Signed-off-by: Kent Overstreet -(cherry picked from commit f9d6966b7f4182f612208f9dad9e2cfaaf667ba3) -[Added "ice.h" in ice_comm.h to fix the ice_pf not defined issue.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.h | 1 + - include/linux/refcount.h | 13 +------------ - include/linux/refcount_types.h | 19 +++++++++++++++++++ - include/linux/sched.h | 2 +- - include/linux/sched/task.h | 1 + - 5 files changed, 23 insertions(+), 13 deletions(-) - create mode 100644 include/linux/refcount_types.h - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 9d38777310e5..1cc4be304d9c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -6,6 +6,7 @@ - - #include - -+#include "ice.h" - #include "ice_type.h" - #include "ice_nvm.h" - #include "ice_flex_pipe.h" -diff --git a/include/linux/refcount.h b/include/linux/refcount.h -index a62fcca97486..85c6df0d1bef 100644 ---- a/include/linux/refcount.h -+++ b/include/linux/refcount.h -@@ -96,22 +96,11 @@ - #include - #include - #include -+#include - #include - - struct mutex; - --/** -- * typedef refcount_t - variant of atomic_t specialized for reference counts -- * @refs: atomic_t counter field -- * -- * The counter saturates at REFCOUNT_SATURATED and will not move once -- * there. This avoids wrapping the counter and causing 'spurious' -- * use-after-free bugs. -- */ --typedef struct refcount_struct { -- atomic_t refs; --} refcount_t; -- - #define REFCOUNT_INIT(n) { .refs = ATOMIC_INIT(n), } - #define REFCOUNT_MAX INT_MAX - #define REFCOUNT_SATURATED (INT_MIN / 2) -diff --git a/include/linux/refcount_types.h b/include/linux/refcount_types.h -new file mode 100644 -index 000000000000..162004f06edf ---- /dev/null -+++ b/include/linux/refcount_types.h -@@ -0,0 +1,19 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+#ifndef _LINUX_REFCOUNT_TYPES_H -+#define _LINUX_REFCOUNT_TYPES_H -+ -+#include -+ -+/** -+ * typedef refcount_t - variant of atomic_t specialized for reference counts -+ * @refs: atomic_t counter field -+ * -+ * The counter saturates at REFCOUNT_SATURATED and will not move once -+ * there. This avoids wrapping the counter and causing 'spurious' -+ * use-after-free bugs. -+ */ -+typedef struct refcount_struct { -+ atomic_t refs; -+} refcount_t; -+ -+#endif /* _LINUX_REFCOUNT_TYPES_H */ -diff --git a/include/linux/sched.h b/include/linux/sched.h -index 7b92c4d35ddd..3f85c80c5d44 100644 ---- a/include/linux/sched.h -+++ b/include/linux/sched.h -@@ -22,7 +22,7 @@ - #include - #include - #include --#include -+#include - #include - #include - #include -diff --git a/include/linux/sched/task.h b/include/linux/sched/task.h -index a23af225c898..1880ae21a9cb 100644 ---- a/include/linux/sched/task.h -+++ b/include/linux/sched/task.h -@@ -7,6 +7,7 @@ - * functionality: - */ - -+#include - #include - #include - --- -2.43.0 - diff --git a/kernel-rt/debian/patches/series b/kernel-rt/debian/patches/series index 29b6a2c0..7f016a86 100644 --- a/kernel-rt/debian/patches/series +++ b/kernel-rt/debian/patches/series @@ -13,97 +13,4 @@ 0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch 0014-Port-negative-dentries-limit-feature-from-3.10.patch 0015-Add-the-pci-reboot-quirk-in-DMI-table-for-Dell-Power.patch -0016-Add-driver-versions-for-ice-i40e-and-iavf.patch -0017-ice-Use-irq_update_affinity_hint.patch -0018-sched-debug-Fix-the-runnable-tasks-output.patch -ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch -ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch -ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch -ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch -ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch -ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch -ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch -ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch -ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch -ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch -ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch -ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch -ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch -ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch -ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch -ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch -ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch -ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch -ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch -ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch -ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch -ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch -ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch -ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch -ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch -ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch -ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch -ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch -ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch -ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch -ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch -ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch -ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch -ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch -ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch -ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch -ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch -ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch -ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch -ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch -ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch -ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch -ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch -ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch -ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch -ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch -ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch -ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch -ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch -ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch -ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch -ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch -ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch -ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch -ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch -ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch -ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch -ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch -ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch -ice-VDF/0011-ice-Rename-E822-to-E82X.patch -ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch -ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch -ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch -ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch -ice-VDF/0016-ice-introduce-PTP-state-machine.patch -ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch -ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch -ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch -ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch -ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch -ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch -ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch -ice-VDF/0024-ice-remove-FW-logging-code.patch -ice-VDF/0025-ice-configure-FW-logging.patch -ice-VDF/0026-ice-enable-FW-logging.patch -ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch -ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch -ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch -ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch -ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch -ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch -ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch -ice-VDF/0034-ice-Fix-improper-extts-handling.patch -ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch -ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch -ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch -ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch -ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch -ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch -ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch -ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch +0016-tools-Fix-the-build-errors.patch diff --git a/kernel-rt/debian/source/changelog b/kernel-rt/debian/source/changelog index 2b68d7f4..6c843e16 100644 --- a/kernel-rt/debian/source/changelog +++ b/kernel-rt/debian/source/changelog @@ -1,3 +1,8 @@ +linux-rt (6.12.18-1) unstable; urgency=medium + * New upstream update: + https://git.yoctoproject.org/linux-yocto/commit/?h=v6.12/standard/preempt-rt/base&id=7c2d49c69f3f7e59a598fa8f618b37836fd56404 + -- Jiping Ma Mon, 10 Mar 2025 14:33:21 +0800 + linux-rt (6.6.71-1) unstable; urgency=medium * New upstream update: diff --git a/kernel-rt/debian/source/config b/kernel-rt/debian/source/config index f2a006eb..294c7df1 100644 --- a/kernel-rt/debian/source/config +++ b/kernel-rt/debian/source/config @@ -7,6 +7,7 @@ CONFIG_IRQ_WORK=y # CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set +# CONFIG_WERROR is not set CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_HAVE_KERNEL_GZIP=y @@ -25,9 +26,9 @@ CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSVIPC_COMPAT=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y # CONFIG_WATCH_QUEUE is not set @@ -49,7 +50,6 @@ CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y @@ -60,14 +60,16 @@ CONFIG_SPARSE_IRQ=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y -CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST_IDLE=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y # # Timers subsystem @@ -77,20 +79,36 @@ CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set # CONFIG_NO_HZ_IDLE is not set CONFIG_NO_HZ_FULL=y -CONFIG_CONTEXT_TRACKING=y -# CONFIG_CONTEXT_TRACKING_FORCE is not set +CONFIG_CONTEXT_TRACKING_USER=y +# CONFIG_CONTEXT_TRACKING_USER_FORCE is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125 # end of Timers subsystem -CONFIG_HAVE_PREEMPT_LAZY=y -CONFIG_PREEMPT_LAZY=y -# CONFIG_PREEMPT_NONE is not set -# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_BPF=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y + +# +# BPF subsystem +# +CONFIG_BPF_SYSCALL=y +# CONFIG_BPF_JIT is not set +CONFIG_BPF_UNPRIV_DEFAULT_OFF=y +# CONFIG_BPF_PRELOAD is not set +# end of BPF subsystem + +CONFIG_PREEMPT_BUILD=y +CONFIG_ARCH_HAS_PREEMPT_LAZY=y # CONFIG_PREEMPT is not set +CONFIG_PREEMPT_LAZY=y +# CONFIG_PREEMPT_LAZIEST is not set CONFIG_PREEMPT_RT=y CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y +CONFIG_PREEMPT_DYNAMIC=y +# CONFIG_SCHED_CORE is not set # # CPU/Task time and stats accounting @@ -117,9 +135,9 @@ CONFIG_CPU_ISOLATION=y CONFIG_TREE_RCU=y CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_RUDE_RCU=y CONFIG_TASKS_TRACE_RCU=y @@ -128,14 +146,16 @@ CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_BOOST=y CONFIG_RCU_BOOST_DELAY=500 CONFIG_RCU_NOCB_CPU=y +# CONFIG_RCU_NOCB_CPU_DEFAULT_ALL is not set +CONFIG_RCU_NOCB_CPU_CB_BOOST=y +# CONFIG_RCU_LAZY is not set # end of RCU Subsystem -CONFIG_BUILD_BIN2C=y # CONFIG_IKCONFIG is not set # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +# CONFIG_PRINTK_INDEX is not set CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # @@ -147,28 +167,38 @@ CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC10_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y -# CONFIG_NUMA_BALANCING is not set +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y +CONFIG_MEMCG_V1=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y +CONFIG_CPUSETS_V1=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_MISC=y # CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y @@ -180,7 +210,6 @@ CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" @@ -192,14 +221,15 @@ CONFIG_RD_LZO=y CONFIG_RD_LZ4=y CONFIG_RD_ZSTD=y # CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y +CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y -CONFIG_BPF=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y @@ -208,11 +238,10 @@ CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -223,23 +252,19 @@ CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y -CONFIG_HAVE_ARCH_USERFAULTFD_WP=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -CONFIG_BPF_SYSCALL=y -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -# CONFIG_BPF_PRELOAD is not set -CONFIG_USERFAULTFD=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y # CONFIG_DEBUG_RSEQ is not set -# CONFIG_EMBEDDED is not set -CONFIG_HAVE_PERF_EVENTS=y +CONFIG_CACHESTAT_SYSCALL=y # CONFIG_PC104 is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_GUEST_PERF_EVENTS=y # # Kernel Performance Events And Counters @@ -248,19 +273,26 @@ CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters -CONFIG_VM_EVENT_COUNTERS=y CONFIG_SIGEXIT=y -CONFIG_SLUB_DEBUG=y -# CONFIG_SLUB_MEMCG_SYSFS_ON is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -CONFIG_SLAB_FREELIST_RANDOM=y -# CONFIG_SLAB_FREELIST_HARDENED is not set -CONFIG_SHUFFLE_PAGE_ALLOCATOR=y CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y + +# +# Kexec and crash features +# +CONFIG_CRASH_RESERVE=y +CONFIG_VMCORE_INFO=y +CONFIG_KEXEC_CORE=y +CONFIG_HAVE_IMA_KEXEC=y +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_KEXEC_JUMP=y +CONFIG_CRASH_DUMP=y +CONFIG_CRASH_HOTPLUG=y +CONFIG_CRASH_MAX_MEMORY_RANGES=8192 +# end of Kexec and crash features # end of General setup CONFIG_64BIT=y @@ -281,17 +313,9 @@ CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FILTER_PGPROT=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ZONE_DMA32=y CONFIG_AUDIT_ARCH=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_HAVE_INTEL_TXT=y CONFIG_X86_64_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y @@ -303,15 +327,12 @@ CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # -CONFIG_ZONE_DMA=y CONFIG_SMP=y -CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_X2APIC=y +# CONFIG_X86_POSTED_MSI is not set CONFIG_X86_MPPARSE=y -# CONFIG_GOLDFISH is not set -CONFIG_RETPOLINE=y # CONFIG_X86_CPU_RESCTRL is not set -# CONFIG_QEMUX86 is not set +# CONFIG_X86_FRED is not set CONFIG_X86_EXTENDED_PLATFORM=y # CONFIG_X86_NUMACHIP is not set # CONFIG_X86_VSMP is not set @@ -337,6 +358,7 @@ CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set # CONFIG_ACRN_GUEST is not set +# CONFIG_INTEL_TDX_GUEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set # CONFIG_MCORE2 is not set @@ -345,6 +367,7 @@ CONFIG_GENERIC_CPU=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_TSC=y +CONFIG_X86_HAVE_PAE=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 @@ -361,15 +384,18 @@ CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y # CONFIG_GART_IOMMU is not set +CONFIG_BOOT_VESA_SUPPORT=y # CONFIG_MAXSMP is not set CONFIG_NR_CPUS_RANGE_BEGIN=2 CONFIG_NR_CPUS_RANGE_END=512 CONFIG_NR_CPUS_DEFAULT=64 CONFIG_NR_CPUS=256 +CONFIG_SCHED_CLUSTER=y CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y +CONFIG_ACPI_MADT_WAKEUP=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y @@ -378,7 +404,6 @@ CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_AMD=y CONFIG_X86_MCE_THRESHOLD=y CONFIG_X86_MCE_INJECT=m -CONFIG_X86_THERMAL_VECTOR=y # # Performance monitoring @@ -387,67 +412,74 @@ CONFIG_PERF_EVENTS_INTEL_UNCORE=m CONFIG_PERF_EVENTS_INTEL_RAPL=m CONFIG_PERF_EVENTS_INTEL_CSTATE=m CONFIG_PERF_EVENTS_AMD_POWER=m +CONFIG_PERF_EVENTS_AMD_UNCORE=y +# CONFIG_PERF_EVENTS_AMD_BRS is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y CONFIG_X86_IOPL_IOPERM=y -# CONFIG_I8K is not set CONFIG_MICROCODE=y -CONFIG_MICROCODE_INTEL=y -# CONFIG_MICROCODE_AMD is not set -# CONFIG_MICROCODE_OLD_INTERFACE is not set +# CONFIG_MICROCODE_LATE_LOADING is not set CONFIG_X86_MSR=y CONFIG_X86_CPUID=y CONFIG_X86_5LEVEL=y CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_X86_CPA_STATISTICS is not set +CONFIG_X86_MEM_ENCRYPT=y CONFIG_AMD_MEM_ENCRYPT=y -# CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set CONFIG_NUMA=y CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y -# CONFIG_NUMA_EMU is not set CONFIG_NODES_SHIFT=10 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_X86_PMEM_LEGACY_DEVICE=y CONFIG_X86_PMEM_LEGACY=m CONFIG_X86_CHECK_BIOS_CORRUPTION=y # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set -CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=1 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y -CONFIG_ARCH_USES_PG_UNCACHED=y -CONFIG_ARCH_RANDOM=y -CONFIG_X86_SMAP=y CONFIG_X86_UMIP=y +CONFIG_CC_HAS_IBT=y +CONFIG_X86_CET=y +CONFIG_X86_KERNEL_IBT=y CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y +CONFIG_ARCH_PKEY_BITS=4 CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set +CONFIG_X86_SGX=y +# CONFIG_X86_USER_SHADOW_STACK is not set CONFIG_EFI=y CONFIG_EFI_STUB=y +CONFIG_EFI_HANDOVER_PROTOCOL=y CONFIG_EFI_MIXED=y +CONFIG_EFI_RUNTIME_MAP=y # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set CONFIG_HZ_1000=y CONFIG_HZ=1000 CONFIG_SCHED_HRTICK=y -CONFIG_KEXEC=y -CONFIG_KEXEC_FILE=y -CONFIG_ARCH_HAS_KEXEC_PURGATORY=y -# CONFIG_KEXEC_SIG is not set -CONFIG_CRASH_DUMP=y -CONFIG_KEXEC_JUMP=y +CONFIG_ARCH_SUPPORTS_KEXEC=y +CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y +CONFIG_ARCH_SELECTS_KEXEC_FILE=y +CONFIG_ARCH_SUPPORTS_KEXEC_PURGATORY=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG_FORCE=y +CONFIG_ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_JUMP=y +CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y +CONFIG_ARCH_SUPPORTS_CRASH_HOTPLUG=y +CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y @@ -457,24 +489,51 @@ CONFIG_DYNAMIC_MEMORY_LAYOUT=y CONFIG_RANDOMIZE_MEMORY=y CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0x0 CONFIG_HOTPLUG_CPU=y -# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set -# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set -CONFIG_LEGACY_VSYSCALL_EMULATE=y # CONFIG_LEGACY_VSYSCALL_XONLY is not set -# CONFIG_LEGACY_VSYSCALL_NONE is not set +CONFIG_LEGACY_VSYSCALL_NONE=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="net.naming-scheme=vSTX7_0" +# CONFIG_CMDLINE_OVERRIDE is not set CONFIG_MODIFY_LDT_SYSCALL=y +# CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y CONFIG_LIVEPATCH=y # end of Processor type and features +CONFIG_CC_HAS_NAMED_AS=y +CONFIG_USE_X86_SEG_SUPPORT=y +CONFIG_CC_HAS_RETURN_THUNK=y +CONFIG_CC_HAS_ENTRY_PADDING=y +CONFIG_FUNCTION_PADDING_CFI=11 +CONFIG_FUNCTION_PADDING_BYTES=16 +CONFIG_CALL_PADDING=y +CONFIG_HAVE_CALL_THUNKS=y +CONFIG_CALL_THUNKS=y +CONFIG_PREFIX_SYMBOLS=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_MITIGATION_PAGE_TABLE_ISOLATION=y +CONFIG_MITIGATION_RETPOLINE=y +CONFIG_MITIGATION_RETHUNK=y +CONFIG_MITIGATION_UNRET_ENTRY=y +CONFIG_MITIGATION_CALL_DEPTH_TRACKING=y +# CONFIG_CALL_THUNKS_DEBUG is not set +CONFIG_MITIGATION_IBPB_ENTRY=y +CONFIG_MITIGATION_IBRS_ENTRY=y +CONFIG_MITIGATION_SRSO=y +CONFIG_MITIGATION_GDS=y +CONFIG_MITIGATION_RFDS=y +CONFIG_MITIGATION_SPECTRE_BHI=y +CONFIG_MITIGATION_MDS=y +CONFIG_MITIGATION_TAA=y +CONFIG_MITIGATION_MMIO_STALE_DATA=y +CONFIG_MITIGATION_L1TF=y +CONFIG_MITIGATION_RETBLEED=y +CONFIG_MITIGATION_SPECTRE_V1=y +CONFIG_MITIGATION_SPECTRE_V2=y +CONFIG_MITIGATION_SRBDS=y +CONFIG_MITIGATION_SSB=y CONFIG_ARCH_HAS_ADD_PAGES=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y # # Power management and ACPI options @@ -486,10 +545,13 @@ CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_HIBERNATION_COMP_LZO=y +CONFIG_HIBERNATION_DEF_COMP="lzo" CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_USERSPACE_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y CONFIG_PM_DEBUG=y @@ -506,8 +568,11 @@ CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_TABLE_LIB=y +CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_FPDT is not set CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y @@ -528,6 +593,7 @@ CONFIG_ACPI_IPMI=m CONFIG_ACPI_HOTPLUG_CPU=y # CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_PLATFORM_PROFILE=m CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_DEBUG is not set @@ -536,13 +602,12 @@ CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_IOAPIC=y CONFIG_ACPI_SBS=m CONFIG_ACPI_HED=y -# CONFIG_ACPI_CUSTOM_METHOD is not set CONFIG_ACPI_BGRT=y # CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set CONFIG_ACPI_NFIT=m # CONFIG_NFIT_SECURITY_DEBUG is not set CONFIG_ACPI_NUMA=y -# CONFIG_ACPI_HMAT is not set +CONFIG_ACPI_HMAT=y CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_ACPI_APEI=y @@ -554,9 +619,12 @@ CONFIG_ACPI_APEI_EINJ=m # CONFIG_ACPI_DPTF is not set CONFIG_ACPI_WATCHDOG=y # CONFIG_ACPI_CONFIGFS is not set +# CONFIG_ACPI_PFRUT is not set +CONFIG_ACPI_PCC=y +# CONFIG_ACPI_FFH is not set CONFIG_PMIC_OPREGION=y +CONFIG_ACPI_PRMT=y CONFIG_X86_PM_TIMER=y -CONFIG_SFI=y # # CPU Frequency scaling @@ -581,6 +649,9 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CONFIG_X86_INTEL_PSTATE=y # CONFIG_X86_PCC_CPUFREQ is not set +CONFIG_X86_AMD_PSTATE=y +CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 +# CONFIG_X86_AMD_PSTATE_UT is not set CONFIG_X86_ACPI_CPUFREQ=m CONFIG_X86_ACPI_CPUFREQ_CPB=y # CONFIG_X86_POWERNOW_K8 is not set @@ -616,102 +687,84 @@ CONFIG_MMCONF_FAM10H=y # CONFIG_PCI_CNB20LE_QUIRK is not set # CONFIG_ISA_BUS is not set CONFIG_ISA_DMA_API=y +# CONFIG_QEMUX86 is not set CONFIG_AMD_NB=y -# CONFIG_X86_SYSFB is not set # end of Bus options (PCI etc.) # # Binary Emulations # CONFIG_IA32_EMULATION=y -# CONFIG_X86_X32 is not set +# CONFIG_IA32_EMULATION_DEFAULT_DISABLED is not set +CONFIG_X86_X32_ABI=y CONFIG_COMPAT_32=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y -CONFIG_SYSVIPC_COMPAT=y # end of Binary Emulations -# -# Firmware Drivers -# -# CONFIG_EDD is not set -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_DMIID=y -CONFIG_DMI_SYSFS=y -CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y -CONFIG_ISCSI_IBFT_FIND=y -CONFIG_ISCSI_IBFT=m -CONFIG_FW_CFG_SYSFS=y -# CONFIG_FW_CFG_SYSFS_CMDLINE is not set -# CONFIG_GOOGLE_FIRMWARE is not set - -# -# EFI (Extensible Firmware Interface) Support -# -CONFIG_EFI_VARS=y -CONFIG_EFI_ESRT=y -CONFIG_EFI_VARS_PSTORE=y -CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y -CONFIG_EFI_RUNTIME_MAP=y -# CONFIG_EFI_FAKE_MEMMAP is not set -CONFIG_EFI_RUNTIME_WRAPPERS=y -CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y -# CONFIG_EFI_BOOTLOADER_CONTROL is not set -# CONFIG_EFI_CAPSULE_LOADER is not set -# CONFIG_EFI_TEST is not set -# CONFIG_APPLE_PROPERTIES is not set -# CONFIG_RESET_ATTACK_MITIGATION is not set -# CONFIG_EFI_RCI2_TABLE is not set -# CONFIG_EFI_DISABLE_PCI_DMA is not set -# CONFIG_EFI_DISABLE_RUNTIME is not set -# end of EFI (Extensible Firmware Interface) Support - -CONFIG_UEFI_CPER=y -CONFIG_UEFI_CPER_X86=y -CONFIG_EFI_EARLYCON=y -CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -CONFIG_HAVE_KVM=y +CONFIG_KVM_COMMON=y +CONFIG_HAVE_KVM_PFNCACHE=y CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y -CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_HAVE_KVM_DIRTY_RING=y +CONFIG_HAVE_KVM_DIRTY_RING_TSO=y +CONFIG_HAVE_KVM_DIRTY_RING_ACQ_REL=y CONFIG_KVM_MMIO=y CONFIG_KVM_ASYNC_PF=y CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_READONLY_MEM=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_GENERIC_PRE_FAULT_MEMORY=y CONFIG_KVM_COMPAT=y CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_NO_POLL=y CONFIG_KVM_XFER_TO_GUEST_WORK=y +CONFIG_HAVE_KVM_PM_NOTIFIER=y +CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y +CONFIG_KVM_GENERIC_MMU_NOTIFIER=y +CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES=y +CONFIG_KVM_PRIVATE_MEM=y +CONFIG_KVM_GENERIC_PRIVATE_MEM=y +CONFIG_HAVE_KVM_ARCH_GMEM_PREPARE=y +CONFIG_HAVE_KVM_ARCH_GMEM_INVALIDATE=y CONFIG_VIRTUALIZATION=y +CONFIG_KVM_X86=m CONFIG_KVM=m # CONFIG_KVM_WERROR is not set +# CONFIG_KVM_SW_PROTECTED_VM is not set CONFIG_KVM_INTEL=m +# CONFIG_KVM_INTEL_PROVE_VE is not set +CONFIG_X86_SGX_KVM=y CONFIG_KVM_AMD=m CONFIG_KVM_AMD_SEV=y -CONFIG_KVM_MMU_AUDIT=y +CONFIG_KVM_SMM=y +CONFIG_KVM_HYPERV=y +# CONFIG_KVM_XEN is not set +# CONFIG_KVM_PROVE_MMU is not set +CONFIG_KVM_EXTERNAL_WRITE_TRACKING=y +CONFIG_KVM_MAX_NR_VCPUS=1024 CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y +CONFIG_AS_TPAUSE=y +CONFIG_AS_GFNI=y +CONFIG_AS_VAES=y +CONFIG_AS_VPCLMULQDQ=y +CONFIG_AS_WRUSS=y +CONFIG_ARCH_CONFIGURES_CPU_MITIGATIONS=y # # General architecture-dependent options # -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y CONFIG_HOTPLUG_SMT=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_HOTPLUG_CORE_SYNC_FULL=y +CONFIG_HOTPLUG_SPLIT_STARTUP=y +CONFIG_HOTPLUG_PARALLEL=y CONFIG_GENERIC_ENTRY=y -CONFIG_HAVE_OPROFILE=y -CONFIG_OPROFILE_NMI_TIMER=y # CONFIG_KPROBES is not set CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set @@ -725,19 +778,26 @@ CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y +CONFIG_ARCH_HAS_CPU_PASID=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y +CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y @@ -750,7 +810,11 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_MMU_GATHER_MERGE_VMAS=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_ARCH_HAVE_EXTRA_ELF_NOTES=y +CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y @@ -760,22 +824,32 @@ CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y +CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y -CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y +CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y @@ -783,6 +857,16 @@ CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 +CONFIG_HAVE_OBJTOOL=y +CONFIG_HAVE_JUMP_LABEL_HACK=y +CONFIG_HAVE_NOINSTR_HACK=y +CONFIG_HAVE_NOINSTR_VALIDATION=y +CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y CONFIG_OLD_SIGSUSPEND3=y @@ -791,6 +875,9 @@ CONFIG_COMPAT_32BIT_TIME=y CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=y CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y @@ -799,9 +886,21 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_STATIC_CALL_INLINE=y +CONFIG_HAVE_PREEMPT_DYNAMIC=y +CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y +CONFIG_ARCH_HAS_ELFCORE_COMPAT=y +CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y +CONFIG_DYNAMIC_SIGFRAME=y +CONFIG_HAVE_ARCH_NODE_DEV_GROUP=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -811,44 +910,54 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_FUNCTION_ALIGNMENT_4B=y +CONFIG_FUNCTION_ALIGNMENT_16B=y +CONFIG_FUNCTION_ALIGNMENT=16 # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULE_SIG_FORMAT=y CONFIG_MODULES=y +# CONFIG_MODULE_DEBUG is not set CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set CONFIG_MODVERSIONS=y CONFIG_ASM_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_SIG=y +# CONFIG_MODULE_SIG_FORCE is not set +CONFIG_MODULE_SIG_ALL=y # CONFIG_MODULE_SIG_SHA1 is not set -# CONFIG_MODULE_SIG_SHA224 is not set CONFIG_MODULE_SIG_SHA256=y # CONFIG_MODULE_SIG_SHA384 is not set # CONFIG_MODULE_SIG_SHA512 is not set +# CONFIG_MODULE_SIG_SHA3_256 is not set +# CONFIG_MODULE_SIG_SHA3_384 is not set +# CONFIG_MODULE_SIG_SHA3_512 is not set CONFIG_MODULE_SIG_HASH="sha256" # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_LEGACY_AUTOLOAD=y CONFIG_BLK_CGROUP_RWSTAT=y -CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSG_COMMON=y +CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=m +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set -# CONFIG_BLK_CMDLINE_PARSER is not set CONFIG_BLK_WBT=y -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_WBT_MQ=y +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_FC_APPID is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_CGROUP_IOPRIO is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set @@ -878,11 +987,11 @@ CONFIG_EFI_PARTITION=y # CONFIG_CMDLINE_PARTITION is not set # end of Partition Types -CONFIG_BLOCK_COMPAT=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_VIRTIO=y -CONFIG_BLK_MQ_RDMA=y CONFIG_BLK_PM=y +CONFIG_BLOCK_HOLDER_DEPRECATED=y +CONFIG_BLK_MQ_STACKING=y # # IO Schedulers @@ -897,6 +1006,7 @@ CONFIG_BFQ_GROUP_IOSCHED=y CONFIG_PREEMPT_NOTIFIERS=y CONFIG_PADATA=y CONFIG_ASN1=y +CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y @@ -924,39 +1034,11 @@ CONFIG_COREDUMP=y # # Memory Management options # -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_NUMA_KEEP_MEMINFO=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_MEMORY_BALLOON=y -CONFIG_BALLOON_COMPACTION=y -CONFIG_COMPACTION=y -CONFIG_PAGE_REPORTING=y -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -CONFIG_MMU_NOTIFIER=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -CONFIG_HWPOISON_INJECT=m -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y -# CONFIG_CMA is not set -CONFIG_MEM_SOFT_DIRTY=y +CONFIG_ZPOOL=y +CONFIG_SWAP=y CONFIG_ZSWAP=y +# CONFIG_ZSWAP_DEFAULT_ON is not set +# CONFIG_ZSWAP_SHRINKER_DEFAULT_ON is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set @@ -965,32 +1047,125 @@ CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD_DEPRECATED is not set # CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y CONFIG_ZBUD=y -# CONFIG_Z3FOLD is not set +# CONFIG_Z3FOLD_DEPRECATED is not set CONFIG_ZSMALLOC=y # CONFIG_ZSMALLOC_STAT is not set +CONFIG_ZSMALLOC_CHAIN_SIZE=8 + +# +# Slab allocator options +# +CONFIG_SLUB=y +# CONFIG_SLUB_TINY is not set +CONFIG_SLAB_MERGE_DEFAULT=y +CONFIG_SLAB_FREELIST_RANDOM=y +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLAB_BUCKETS is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_RANDOM_KMALLOC_CACHES is not set +# end of Slab allocator options + +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y +CONFIG_HAVE_GUP_FAST=y +CONFIG_NUMA_KEEP_MEMINFO=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_SPLIT_PTE_PTLOCKS=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=0 +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PCP_BATCH_SCALE_MAX=5 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +CONFIG_HWPOISON_INJECT=m +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANTS_THP_SWAP=y +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +# CONFIG_CMA is not set +CONFIG_MEM_SOFT_DIRTY=y CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_ARCH_HAS_ZONE_DMA_SET=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_HMM_MIRROR=y +CONFIG_GET_FREE_REGION=y CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y +CONFIG_ARCH_USES_PG_ARCH_2=y +CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_BENCHMARK is not set +# CONFIG_GUP_TEST is not set +# CONFIG_DMAPOOL_TEST is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_MEMFD_CREATE=y +CONFIG_SECRETMEM=y +# CONFIG_ANON_VMA_NAME is not set +CONFIG_HAVE_ARCH_USERFAULTFD_WP=y +CONFIG_HAVE_ARCH_USERFAULTFD_MINOR=y +CONFIG_USERFAULTFD=y +CONFIG_PTE_MARKER_UFFD_WP=y +CONFIG_LRU_GEN=y +# CONFIG_LRU_GEN_ENABLED is not set +# CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y +CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_IOMMU_MM_DATA=y +CONFIG_EXECMEM=y +CONFIG_NUMA_MEMBLKS=y +# CONFIG_NUMA_EMU is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring # end of Memory Management options CONFIG_NET=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y +CONFIG_NET_XGRESS=y CONFIG_NET_REDIRECT=y +CONFIG_SKB_DECRYPTED=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -998,7 +1173,7 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y -CONFIG_UNIX_SCM=y +CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=m CONFIG_TLS=m CONFIG_TLS_DEVICE=y @@ -1020,6 +1195,7 @@ CONFIG_NET_KEY_MIGRATE=y # CONFIG_SMC is not set CONFIG_XDP_SOCKETS=y # CONFIG_XDP_SOCKETS_DIAG is not set +CONFIG_NET_HANDSHAKE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y @@ -1049,6 +1225,7 @@ CONFIG_INET_ESP=m CONFIG_INET_ESP_OFFLOAD=m # CONFIG_INET_ESPINTCP is not set CONFIG_INET_IPCOMP=m +CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_XFRM_TUNNEL=m CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=m @@ -1076,6 +1253,8 @@ CONFIG_TCP_CONG_BBR=m CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_SIGPOOL=y +# CONFIG_TCP_AO is not set CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y @@ -1103,7 +1282,9 @@ CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y CONFIG_IPV6_PIMSM_V2=y CONFIG_IPV6_SEG6_LWTUNNEL=y # CONFIG_IPV6_SEG6_HMAC is not set +CONFIG_IPV6_SEG6_BPF=y # CONFIG_IPV6_RPL_LWTUNNEL is not set +# CONFIG_IPV6_IOAM6_LWTUNNEL is not set CONFIG_NETLABEL=y # CONFIG_MPTCP is not set CONFIG_NETWORK_SECMARK=y @@ -1117,16 +1298,19 @@ CONFIG_BRIDGE_NETFILTER=m # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_SKIP_EGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_BPF_LINK=y +# CONFIG_NETFILTER_NETLINK_HOOK is not set # CONFIG_NETFILTER_NETLINK_ACCT is not set CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_NETLINK_OSF=m CONFIG_NF_CONNTRACK=m -CONFIG_NF_LOG_COMMON=m -CONFIG_NF_LOG_NETDEV=m +CONFIG_NF_LOG_SYSLOG=m CONFIG_NETFILTER_CONNCOUNT=m CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y @@ -1136,6 +1320,7 @@ CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CONNTRACK_OVS=y CONFIG_NF_CT_PROTO_DCCP=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y @@ -1163,13 +1348,13 @@ CONFIG_NF_NAT_SIP=m CONFIG_NF_NAT_TFTP=m CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NF_NAT_OVS=y CONFIG_NETFILTER_SYNPROXY=m CONFIG_NF_TABLES=m CONFIG_NF_TABLES_INET=y CONFIG_NF_TABLES_NETDEV=y CONFIG_NFT_NUMGEN=m CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m CONFIG_NFT_CONNLIMIT=m CONFIG_NFT_LOG=m CONFIG_NFT_LIMIT=m @@ -1177,7 +1362,6 @@ CONFIG_NFT_MASQ=m CONFIG_NFT_REDIR=m CONFIG_NFT_NAT=m # CONFIG_NFT_TUNNEL is not set -CONFIG_NFT_OBJREF=m CONFIG_NFT_QUEUE=m CONFIG_NFT_QUOTA=m CONFIG_NFT_REJECT=m @@ -1195,8 +1379,10 @@ CONFIG_NF_DUP_NETDEV=m CONFIG_NFT_DUP_NETDEV=m CONFIG_NFT_FWD_NETDEV=m CONFIG_NFT_FIB_NETDEV=m +# CONFIG_NFT_REJECT_NETDEV is not set # CONFIG_NF_FLOW_TABLE is not set CONFIG_NETFILTER_XTABLES=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules @@ -1336,6 +1522,7 @@ CONFIG_IP_VS_SH=m # CONFIG_IP_VS_MH is not set CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m +# CONFIG_IP_VS_TWOS is not set # # IPVS SH scheduler @@ -1358,6 +1545,7 @@ CONFIG_IP_VS_PE_SIP=m # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV4=m CONFIG_NF_TPROXY_IPV4=m CONFIG_NF_TABLES_IPV4=y @@ -1385,12 +1573,12 @@ CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_IP_NF_TARGET_NETMAP=m CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m +CONFIG_NFT_COMPAT_ARP=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # end of IP: Netfilter Configuration @@ -1398,6 +1586,7 @@ CONFIG_IP_NF_ARP_MANGLE=m # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV6=m CONFIG_NF_TPROXY_IPV6=m CONFIG_NF_TABLES_IPV6=y @@ -1434,8 +1623,8 @@ CONFIG_NF_DEFRAG_IPV6=m CONFIG_NF_TABLES_BRIDGE=m CONFIG_NFT_BRIDGE_META=m CONFIG_NFT_BRIDGE_REJECT=m -CONFIG_NF_LOG_BRIDGE=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m @@ -1457,7 +1646,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m -# CONFIG_BPFILTER is not set CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_OBJCNT is not set # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set @@ -1490,12 +1678,11 @@ CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y # CONFIG_BRIDGE_MRP is not set -CONFIG_HAVE_NET_DSA=y +# CONFIG_BRIDGE_CFM is not set # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y -# CONFIG_DECNET is not set CONFIG_LLC=m # CONFIG_LLC2 is not set # CONFIG_ATALK is not set @@ -1515,10 +1702,8 @@ CONFIG_NET_SCHED=y # # Queueing/Scheduling # -CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m CONFIG_NET_SCH_PRIO=m CONFIG_NET_SCH_MULTIQ=m CONFIG_NET_SCH_RED=m @@ -1528,9 +1713,9 @@ CONFIG_NET_SCH_TEQL=m CONFIG_NET_SCH_TBF=m # CONFIG_NET_SCH_CBS is not set CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_MQPRIO_LIB=m CONFIG_NET_SCH_TAPRIO=m CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_NETEM=m CONFIG_NET_SCH_DRR=m CONFIG_NET_SCH_MQPRIO=m @@ -1559,14 +1744,11 @@ CONFIG_DEFAULT_NET_SCH="fq_codel" # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m CONFIG_NET_CLS_ROUTE4=m CONFIG_NET_CLS_FW=m CONFIG_NET_CLS_U32=m CONFIG_CLS_U32_PERF=y CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m CONFIG_NET_CLS_FLOW=m CONFIG_NET_CLS_CGROUP=y CONFIG_NET_CLS_BPF=m @@ -1588,7 +1770,6 @@ CONFIG_NET_ACT_GACT=m CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=m CONFIG_NET_ACT_SAMPLE=m -# CONFIG_NET_ACT_IPT is not set CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m @@ -1627,13 +1808,16 @@ CONFIG_NET_SWITCHDEV=y CONFIG_NET_L3_MASTER_DEV=y # CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set +CONFIG_PCPU_DEV_REFCNT=y +CONFIG_MAX_SKB_FRAGS=17 CONFIG_RPS=y CONFIG_RFS_ACCEL=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_XPS=y CONFIG_CGROUP_NET_PRIO=y CONFIG_CGROUP_NET_CLASSID=y +CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y -# CONFIG_BPF_JIT is not set CONFIG_BPF_STREAM_PARSER=y CONFIG_NET_FLOW_LIMIT=y @@ -1652,64 +1836,11 @@ CONFIG_CAN_BCM=m CONFIG_CAN_GW=m # CONFIG_CAN_J1939 is not set # CONFIG_CAN_ISOTP is not set - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_VXCAN is not set -CONFIG_CAN_SLCAN=m -CONFIG_CAN_DEV=m -CONFIG_CAN_CALC_BITTIMING=y -# CONFIG_CAN_KVASER_PCIEFD is not set -CONFIG_CAN_C_CAN=m -CONFIG_CAN_C_CAN_PLATFORM=m -CONFIG_CAN_C_CAN_PCI=m -CONFIG_CAN_CC770=m -# CONFIG_CAN_CC770_ISA is not set -CONFIG_CAN_CC770_PLATFORM=m -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_PEAK_PCIEFD is not set -CONFIG_CAN_SJA1000=m -CONFIG_CAN_EMS_PCI=m -# CONFIG_CAN_F81601 is not set -CONFIG_CAN_KVASER_PCI=m -CONFIG_CAN_PEAK_PCI=m -CONFIG_CAN_PEAK_PCIEC=y -CONFIG_CAN_PLX_PCI=m -# CONFIG_CAN_SJA1000_ISA is not set -CONFIG_CAN_SJA1000_PLATFORM=m -CONFIG_CAN_SOFTING=m - -# -# CAN SPI interfaces -# -# CONFIG_CAN_HI311X is not set -# CONFIG_CAN_MCP251X is not set -# CONFIG_CAN_MCP251XFD is not set -# end of CAN SPI interfaces - -# -# CAN USB interfaces -# -CONFIG_CAN_8DEV_USB=m -CONFIG_CAN_EMS_USB=m -CONFIG_CAN_ESD_USB2=m -# CONFIG_CAN_GS_USB is not set -CONFIG_CAN_KVASER_USB=m -# CONFIG_CAN_MCBA_USB is not set -CONFIG_CAN_PEAK_USB=m -# CONFIG_CAN_UCAN is not set -# end of CAN USB interfaces - -# CONFIG_CAN_DEBUG_DEVICES is not set -# end of CAN Device Drivers - # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set # CONFIG_AF_KCM is not set CONFIG_STREAM_PARSER=y +# CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y # CONFIG_CFG80211 is not set @@ -1718,7 +1849,6 @@ CONFIG_WIRELESS=y # CFG80211 needs to be enabled for MAC80211 # CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_WIMAX is not set CONFIG_RFKILL=m CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y @@ -1736,12 +1866,13 @@ CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_SOCK_VALIDATE_XMIT=y +CONFIG_NET_SELFTESTS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y CONFIG_PAGE_POOL=y +# CONFIG_PAGE_POOL_STATS is not set CONFIG_FAILOVER=m CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y # # Device Drivers @@ -1749,12 +1880,14 @@ CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EISA=y # CONFIG_EISA is not set CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y CONFIG_HOTPLUG_PCI_PCIE=y CONFIG_PCIEAER=y # CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEAER_CXL=y # CONFIG_PCIE_ECRC is not set CONFIG_PCIEASPM=y CONFIG_PCIEASPM_DEFAULT=y @@ -1766,15 +1899,16 @@ CONFIG_PCIE_DPC=y # CONFIG_PCIE_PTM is not set # CONFIG_PCIE_EDR is not set CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set CONFIG_PCI_REALLOC_ENABLE_AUTO=y CONFIG_PCI_STUB=y CONFIG_PCI_PF_STUB=m CONFIG_PCI_ATS=y +CONFIG_PCI_DOE=y CONFIG_PCI_LOCKLESS_CONFIG=y CONFIG_PCI_IOV=y +# CONFIG_PCI_NPEM is not set CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y CONFIG_PCI_LABEL=y @@ -1783,6 +1917,8 @@ CONFIG_PCIE_BUS_DEFAULT=y # CONFIG_PCIE_BUS_SAFE is not set # CONFIG_PCIE_BUS_PERFORMANCE is not set # CONFIG_PCIE_BUS_PEER2PEER is not set +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=64 CONFIG_HOTPLUG_PCI=y CONFIG_HOTPLUG_PCI_ACPI=y # CONFIG_HOTPLUG_PCI_ACPI_IBM is not set @@ -1795,21 +1931,26 @@ CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_VMD=y # -# DesignWare PCI Core Support +# Cadence-based PCIe controllers +# +# end of Cadence-based PCIe controllers + +# +# DesignWare-based PCIe controllers # -# CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCI_MESON is not set -# end of DesignWare PCI Core Support +# CONFIG_PCIE_DW_PLAT_HOST is not set +# end of DesignWare-based PCIe controllers # -# Mobiveil PCIe Core Support +# Mobiveil-based PCIe controllers # -# end of Mobiveil PCIe Core Support +# end of Mobiveil-based PCIe controllers # -# Cadence PCIe controllers support +# PLDA-based PCIe controllers # -# end of Cadence PCIe controllers support +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1824,6 +1965,16 @@ CONFIG_VMD=y # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +CONFIG_CXL_BUS=y +CONFIG_CXL_PCI=m +# CONFIG_CXL_MEM_RAW_COMMANDS is not set +CONFIG_CXL_ACPI=m +CONFIG_CXL_PMEM=m +CONFIG_CXL_MEM=m +CONFIG_CXL_PORT=y +CONFIG_CXL_SUSPEND=y +CONFIG_CXL_REGION=y +# CONFIG_CXL_REGION_INVALIDATION_TEST is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1834,6 +1985,7 @@ CONFIG_AUXILIARY_BUS=y # CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_DEVTMPFS_SAFE is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y @@ -1841,17 +1993,23 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # Firmware loader # CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_DEBUG=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y +CONFIG_FW_UPLOAD=y # end of Firmware loader CONFIG_ALLOW_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +CONFIG_HMEM_REPORTING=y # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y @@ -1860,24 +2018,91 @@ CONFIG_REGMAP_SPI=m CONFIG_REGMAP_MMIO=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set +# CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set # end of Generic Driver Options # # Bus devices # # CONFIG_MHI_BUS is not set +# CONFIG_MHI_BUS_EP is not set # end of Bus devices +# +# Cache Drivers +# +# end of Cache Drivers + CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y + +# +# Firmware Drivers +# + +# +# ARM System Control and Management Interface Protocol +# +# end of ARM System Control and Management Interface Protocol + +# CONFIG_EDD is not set +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_DMIID=y +CONFIG_DMI_SYSFS=y +CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y +CONFIG_ISCSI_IBFT_FIND=y +CONFIG_ISCSI_IBFT=m +CONFIG_FW_CFG_SYSFS=y +# CONFIG_FW_CFG_SYSFS_CMDLINE is not set +CONFIG_SYSFB=y +# CONFIG_SYSFB_SIMPLEFB is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y +CONFIG_EFI_SOFT_RESERVE=y +CONFIG_EFI_DXE_MEM_ATTRIBUTES=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_APPLE_PROPERTIES is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_RCI2_TABLE is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +# CONFIG_EFI_DISABLE_RUNTIME is not set +# CONFIG_EFI_COCO_SECRET is not set +CONFIG_UNACCEPTED_MEMORY=y +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_X86=y + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + CONFIG_GNSS=y +# CONFIG_GNSS_USB is not set CONFIG_MTD=m # CONFIG_MTD_TESTS is not set # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set # end of Partition parsers @@ -1888,6 +2113,10 @@ CONFIG_MTD=m CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set + +# +# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. +# # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set @@ -1895,6 +2124,7 @@ CONFIG_MTD_BLOCK=m # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set +# CONFIG_MTD_PSTORE is not set # CONFIG_MTD_SWAP is not set # CONFIG_MTD_PARTITIONED_MASTER is not set @@ -1917,7 +2147,6 @@ CONFIG_MTD_CFI_I2=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -1927,6 +2156,7 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_PMC551 is not set # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_MCHP48L640 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set @@ -1942,6 +2172,7 @@ CONFIG_MTD_CFI_I2=y # # NAND # +# CONFIG_MTD_NAND_CORE is not set # CONFIG_MTD_ONENAND is not set # CONFIG_MTD_RAW_NAND is not set # CONFIG_MTD_SPI_NAND is not set @@ -1949,6 +2180,10 @@ CONFIG_MTD_CFI_I2=y # # ECC engine support # +# CONFIG_MTD_NAND_ECC is not set +# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set +# CONFIG_MTD_NAND_ECC_SW_BCH is not set +# CONFIG_MTD_NAND_ECC_MXIC is not set # end of ECC engine support # end of NAND @@ -1965,6 +2200,7 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_MTD_UBI_FASTMAP is not set # CONFIG_MTD_UBI_GLUEBI is not set # CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_UBI_NVMEM is not set # CONFIG_MTD_HYPERBUS is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y @@ -1982,17 +2218,25 @@ CONFIG_BLK_DEV=y CONFIG_CDROM=y # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set CONFIG_ZRAM=m +# CONFIG_ZRAM_BACKEND_LZ4 is not set +# CONFIG_ZRAM_BACKEND_LZ4HC is not set +# CONFIG_ZRAM_BACKEND_ZSTD is not set +# CONFIG_ZRAM_BACKEND_DEFLATE is not set +# CONFIG_ZRAM_BACKEND_842 is not set +CONFIG_ZRAM_BACKEND_FORCE_LZO=y +CONFIG_ZRAM_BACKEND_LZO=y +CONFIG_ZRAM_DEF_COMP_LZORLE=y +# CONFIG_ZRAM_DEF_COMP_LZO is not set +CONFIG_ZRAM_DEF_COMP="lzo-rle" CONFIG_ZRAM_WRITEBACK=y +# CONFIG_ZRAM_TRACK_ENTRY_ACTIME is not set # CONFIG_ZRAM_MEMORY_TRACKING is not set -# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_ZRAM_MULTI_COMP is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_DRBD=m CONFIG_DRBD_FAULT_INJECTION=y CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_SKD is not set -# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_RAM=m CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=16384 @@ -2000,7 +2244,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 # CONFIG_ATA_OVER_ETH is not set CONFIG_VIRTIO_BLK=m CONFIG_BLK_DEV_RBD=m -# CONFIG_BLK_DEV_RSXX is not set +# CONFIG_BLK_DEV_UBLK is not set # # NVME Support @@ -2008,16 +2252,22 @@ CONFIG_BLK_DEV_RBD=m CONFIG_NVME_CORE=m CONFIG_BLK_DEV_NVME=m # CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_VERBOSE_ERRORS is not set # CONFIG_NVME_HWMON is not set CONFIG_NVME_FABRICS=m CONFIG_NVME_FC=m CONFIG_NVME_TCP=m +# CONFIG_NVME_TCP_TLS is not set +# CONFIG_NVME_HOST_AUTH is not set CONFIG_NVME_TARGET=m +# CONFIG_NVME_TARGET_DEBUGFS is not set # CONFIG_NVME_TARGET_PASSTHRU is not set CONFIG_NVME_TARGET_LOOP=m CONFIG_NVME_TARGET_FC=m CONFIG_NVME_TARGET_FCLOOP=m CONFIG_NVME_TARGET_TCP=m +# CONFIG_NVME_TARGET_TCP_TLS is not set +# CONFIG_NVME_TARGET_AUTH is not set # end of NVME Support # @@ -2027,6 +2277,7 @@ CONFIG_NVME_TARGET_TCP=m # CONFIG_DUMMY_IRQ is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -2041,10 +2292,11 @@ CONFIG_HP_ILO=m # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set +# CONFIG_DW_XDATA_PCIE is not set # CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set CONFIG_MISC_RTSX=m -# CONFIG_PVPANIC is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -2052,7 +2304,6 @@ CONFIG_MISC_RTSX=m # CONFIG_EEPROM_AT24=m # CONFIG_EEPROM_AT25 is not set -CONFIG_EEPROM_LEGACY=m # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set @@ -2073,25 +2324,30 @@ CONFIG_EEPROM_LEGACY=m CONFIG_INTEL_MEI=m CONFIG_INTEL_MEI_ME=m # CONFIG_INTEL_MEI_TXE is not set +# CONFIG_INTEL_MEI_GSC is not set +# CONFIG_INTEL_MEI_VSC_HW is not set # CONFIG_INTEL_MEI_HDCP is not set +# CONFIG_INTEL_MEI_PXP is not set +# CONFIG_INTEL_MEI_GSC_PROXY is not set # CONFIG_VMWARE_VMCI is not set # CONFIG_GENWQE is not set # CONFIG_ECHO is not set +# CONFIG_BCM_VK is not set # CONFIG_MISC_ALCOR_PCI is not set CONFIG_MISC_RTSX_PCI=m CONFIG_MISC_RTSX_USB=m -# CONFIG_HABANA_AI is not set # CONFIG_UACCE is not set +# CONFIG_PVPANIC is not set +# CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - # # SCSI device support # CONFIG_SCSI_MOD=y CONFIG_RAID_ATTRS=y +CONFIG_SCSI_COMMON=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y @@ -2104,6 +2360,7 @@ CONFIG_BLK_DEV_SD=m # CONFIG_CHR_DEV_ST is not set CONFIG_BLK_DEV_SR=y # CONFIG_CHR_DEV_SG is not set +CONFIG_BLK_DEV_BSG=y # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -2144,7 +2401,6 @@ CONFIG_SCSI_MVSAS=y CONFIG_SCSI_MVSAS_DEBUG=y # CONFIG_SCSI_MVSAS_TASKLET is not set # CONFIG_SCSI_MVUMI is not set -CONFIG_SCSI_DPT_I2O=y # CONFIG_SCSI_ADVANSYS is not set CONFIG_SCSI_ARCMSR=y # CONFIG_SCSI_ESAS2R is not set @@ -2155,8 +2411,8 @@ CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT3SAS_MAX_SGE=128 CONFIG_SCSI_MPT2SAS=m +CONFIG_SCSI_MPI3MR=m CONFIG_SCSI_SMARTPQI=y -# CONFIG_SCSI_UFSHCD is not set CONFIG_SCSI_HPTIOP=y # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_MYRB is not set @@ -2169,7 +2425,6 @@ CONFIG_LIBFCOE=m # CONFIG_SCSI_SNIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FDOMAIN_PCI is not set -CONFIG_SCSI_GDTH=y CONFIG_SCSI_ISCI=y CONFIG_SCSI_IPS=y # CONFIG_SCSI_INITIO is not set @@ -2185,6 +2440,7 @@ CONFIG_QEDI=m CONFIG_QEDF=m CONFIG_SCSI_LPFC=m # CONFIG_SCSI_LPFC_DEBUG_FS is not set +# CONFIG_SCSI_EFCT is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_WD719X is not set @@ -2216,6 +2472,7 @@ CONFIG_SATA_PMP=y CONFIG_SATA_AHCI=m CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=m +# CONFIG_AHCI_DWC is not set # CONFIG_SATA_INIC162X is not set # CONFIG_SATA_ACARD_AHCI is not set # CONFIG_SATA_SIL24 is not set @@ -2288,7 +2545,6 @@ CONFIG_ATA_PIIX=m # CONFIG_PATA_MPIIX is not set # CONFIG_PATA_NS87410 is not set # CONFIG_PATA_OPTI is not set -# CONFIG_PATA_PLATFORM is not set # CONFIG_PATA_RZ1000 is not set # @@ -2300,13 +2556,12 @@ CONFIG_ATA_GENERIC=m CONFIG_MD=y CONFIG_BLK_DEV_MD=y CONFIG_MD_AUTODETECT=y +CONFIG_MD_BITMAP_FILE=y CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -# CONFIG_MD_MULTIPATH is not set -CONFIG_MD_FAULTY=m # CONFIG_MD_CLUSTER is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y @@ -2334,6 +2589,7 @@ CONFIG_DM_MULTIPATH=m CONFIG_DM_MULTIPATH_QL=m CONFIG_DM_MULTIPATH_ST=m # CONFIG_DM_MULTIPATH_HST is not set +# CONFIG_DM_MULTIPATH_IOA is not set CONFIG_DM_DELAY=m # CONFIG_DM_DUST is not set CONFIG_DM_UEVENT=y @@ -2344,6 +2600,8 @@ CONFIG_DM_VERITY=m # CONFIG_DM_SWITCH is not set CONFIG_DM_LOG_WRITES=m CONFIG_DM_INTEGRITY=m +CONFIG_DM_AUDIT=y +# CONFIG_DM_VDO is not set CONFIG_TARGET_CORE=m CONFIG_TCM_IBLOCK=m CONFIG_TCM_FILEIO=m @@ -2352,6 +2610,7 @@ CONFIG_TCM_USER2=m CONFIG_LOOPBACK_TARGET=m # CONFIG_TCM_FC is not set CONFIG_ISCSI_TARGET=m +# CONFIG_REMOTE_TARGET is not set CONFIG_FUSION=y CONFIG_FUSION_SPI=m # CONFIG_FUSION_FC is not set @@ -2388,9 +2647,12 @@ CONFIG_VXLAN=m # CONFIG_BAREUDP is not set # CONFIG_GTP is not set CONFIG_GENEVE=m +# CONFIG_PFCP is not set +# CONFIG_AMT is not set CONFIG_MACSEC=m CONFIG_NETCONSOLE=m CONFIG_NETCONSOLE_DYNAMIC=y +# CONFIG_NETCONSOLE_EXTENDED_LOG is not set CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_TUN=m @@ -2399,16 +2661,11 @@ CONFIG_TAP=m CONFIG_VETH=m CONFIG_VIRTIO_NET=m # CONFIG_NLMON is not set +# CONFIG_NETKIT is not set CONFIG_NET_VRF=m CONFIG_VSOCKMON=m # CONFIG_ARCNET is not set # CONFIG_ATM_DRIVERS is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - CONFIG_ETHERNET=y CONFIG_MDIO=m # CONFIG_NET_VENDOR_3COM is not set @@ -2425,16 +2682,19 @@ CONFIG_NET_VENDOR_AMD=y CONFIG_AMD_XGBE=m # CONFIG_AMD_XGBE_DCB is not set CONFIG_AMD_XGBE_HAVE_ECC=y +# CONFIG_PDS_CORE is not set CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_AQTION=m # CONFIG_NET_VENDOR_ARC is not set +CONFIG_NET_VENDOR_ASIX=y +# CONFIG_SPI_AX88796C is not set CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL2 is not set # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set # CONFIG_ATL1C is not set # CONFIG_ALX is not set -# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_CX_ECAT is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BCMGENET is not set @@ -2446,12 +2706,6 @@ CONFIG_BNX2X=m CONFIG_BNX2X_SRIOV=y # CONFIG_SYSTEMPORT is not set # CONFIG_BNXT is not set -# CONFIG_BNXT_SRIOV is not set -# CONFIG_BNXT_FLOWER_OFFLOAD is not set -# CONFIG_BNXT_DCB is not set -# CONFIG_BNXT_HWMON is not set -CONFIG_NET_VENDOR_BROCADE=y -# CONFIG_BNA is not set CONFIG_NET_VENDOR_CADENCE=y # CONFIG_MACB is not set CONFIG_NET_VENDOR_CAVIUM=y @@ -2460,6 +2714,7 @@ CONFIG_NET_VENDOR_CAVIUM=y # CONFIG_THUNDER_NIC_BGX is not set # CONFIG_THUNDER_NIC_RGX is not set CONFIG_CAVIUM_PTP=y +CONFIG_LIQUIDIO_CORE=m CONFIG_LIQUIDIO=m CONFIG_LIQUIDIO_VF=m CONFIG_NET_VENDOR_CHELSIO=y @@ -2470,7 +2725,8 @@ CONFIG_NET_VENDOR_CHELSIO=y CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=m # CONFIG_NET_VENDOR_CORTINA is not set -# CONFIG_CX_ECAT is not set +CONFIG_NET_VENDOR_DAVICOM=y +# CONFIG_DM9051 is not set CONFIG_DNET=m CONFIG_NET_VENDOR_DEC=y # CONFIG_NET_TULIP is not set @@ -2484,13 +2740,19 @@ CONFIG_BE2NET_HWMON=y # CONFIG_BE2NET_BE3 is not set CONFIG_BE2NET_LANCER=y CONFIG_BE2NET_SKYHAWK=y +CONFIG_NET_VENDOR_ENGLEDER=y +# CONFIG_TSNEP is not set # CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_FUNGIBLE=y +# CONFIG_FUN_ETH is not set CONFIG_NET_VENDOR_GOOGLE=y CONFIG_GVE=m CONFIG_NET_VENDOR_HUAWEI=y CONFIG_HINIC=m # CONFIG_NET_VENDOR_I825XX is not set CONFIG_NET_VENDOR_INTEL=y +CONFIG_LIBETH=m +CONFIG_LIBIE=m # CONFIG_E100 is not set CONFIG_E1000=m CONFIG_E1000E=m @@ -2499,7 +2761,6 @@ CONFIG_IGB=m CONFIG_IGB_HWMON=y CONFIG_IGB_DCA=y CONFIG_IGBVF=m -# CONFIG_IXGB is not set CONFIG_IXGBE=m CONFIG_IXGBE_HWMON=y CONFIG_IXGBE_DCA=y @@ -2508,13 +2769,24 @@ CONFIG_IXGBE_IPSEC=y CONFIG_IXGBEVF=m CONFIG_IXGBEVF_IPSEC=y CONFIG_I40E=m +CONFIG_I40E_DCB=y CONFIG_IAVF=m +CONFIG_I40EVF=m CONFIG_ICE=m +CONFIG_ICE_HWMON=y +CONFIG_ICE_SWITCHDEV=y +CONFIG_ICE_HWTS=y # CONFIG_FM10K is not set CONFIG_IGC=m +# CONFIG_IDPF is not set # CONFIG_JME is not set +CONFIG_NET_VENDOR_ADI=y +# CONFIG_ADIN1110 is not set +CONFIG_NET_VENDOR_LITEX=y # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +CONFIG_NET_VENDOR_META=y +# CONFIG_FBNIC is not set CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set @@ -2522,22 +2794,24 @@ CONFIG_NET_VENDOR_MICREL=y # CONFIG_KSZ884X_PCI is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set +CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MYRI=y # CONFIG_MYRI10GE is not set # CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NATSEMI is not set CONFIG_NET_VENDOR_NETERION=y # CONFIG_S2IO is not set -# CONFIG_VXGE is not set CONFIG_NET_VENDOR_NETRONOME=y CONFIG_NFP=m CONFIG_NFP_APP_FLOWER=y CONFIG_NFP_APP_ABM_NIC=y +CONFIG_NFP_NET_IPSEC=y # CONFIG_NFP_DEBUG is not set -# CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NVIDIA is not set CONFIG_NET_VENDOR_OKI=y # CONFIG_ETHOC is not set +# CONFIG_OA_TC6 is not set CONFIG_NET_VENDOR_PACKET_ENGINES=y # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set @@ -2554,6 +2828,8 @@ CONFIG_QEDE=m CONFIG_QED_ISCSI=y CONFIG_QED_FCOE=y CONFIG_QED_OOO=y +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set # CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_RDC is not set CONFIG_NET_VENDOR_REALTEK=y @@ -2564,16 +2840,27 @@ CONFIG_8139TOO=m CONFIG_8139TOO_8129=y # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=m +# CONFIG_RTASE is not set # CONFIG_NET_VENDOR_RENESAS is not set CONFIG_NET_VENDOR_ROCKER=y CONFIG_ROCKER=m # CONFIG_NET_VENDOR_SAMSUNG is not set # CONFIG_NET_VENDOR_SEEQ is not set -CONFIG_NET_VENDOR_SOLARFLARE=y -CONFIG_SFC=m -CONFIG_SFC_FALCON=m # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +CONFIG_SFC=m +CONFIG_SFC_MTD=y +CONFIG_SFC_MCDI_MON=y +CONFIG_SFC_SRIOV=y +CONFIG_SFC_MCDI_LOGGING=y +CONFIG_SFC_FALCON=m +CONFIG_SFC_FALCON_MTD=y +CONFIG_SFC_SIENA=m +CONFIG_SFC_SIENA_MTD=y +CONFIG_SFC_SIENA_MCDI_MON=y +CONFIG_SFC_SIENA_SRIOV=y +CONFIG_SFC_SIENA_MCDI_LOGGING=y # CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SOCIONEXT is not set # CONFIG_NET_VENDOR_STMICRO is not set @@ -2581,15 +2868,18 @@ CONFIG_SFC_FALCON=m # CONFIG_NET_VENDOR_SYNOPSYS is not set # CONFIG_NET_VENDOR_TEHUTI is not set # CONFIG_NET_VENDOR_TI is not set +CONFIG_NET_VENDOR_VERTEXCOM=y +# CONFIG_MSE102X is not set # CONFIG_NET_VENDOR_VIA is not set +CONFIG_NET_VENDOR_WANGXUN=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_NET_SB1000 is not set CONFIG_PHYLIB=y CONFIG_SWPHY=y CONFIG_LED_TRIGGER_PHY=y @@ -2598,8 +2888,10 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set CONFIG_AMD_PHY=m # CONFIG_ADIN_PHY is not set +# CONFIG_ADIN1100_PHY is not set CONFIG_AQUANTIA_PHY=m # CONFIG_AX88796B_PHY is not set CONFIG_BROADCOM_PHY=m @@ -2608,6 +2900,7 @@ CONFIG_BCM7XXX_PHY=m # CONFIG_BCM84881_PHY is not set # CONFIG_BCM87XX_PHY is not set CONFIG_BCM_NET_PHYLIB=m +CONFIG_BCM_NET_PHYPTP=m # CONFIG_CICADA_PHY is not set CONFIG_CORTINA_PHY=m # CONFIG_DAVICOM_PHY is not set @@ -2617,12 +2910,23 @@ CONFIG_INTEL_XWAY_PHY=m # CONFIG_LSI_ET1011C_PHY is not set CONFIG_MARVELL_PHY=m CONFIG_MARVELL_10G_PHY=m +# CONFIG_MARVELL_88Q2XXX_PHY is not set +# CONFIG_MARVELL_88X2222_PHY is not set +# CONFIG_MAXLINEAR_GPHY is not set +# CONFIG_MEDIATEK_GE_PHY is not set # CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_T1S_PHY is not set CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_T1_PHY=m CONFIG_MICROSEMI_PHY=m +# CONFIG_MOTORCOMM_PHY is not set # CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_CBTX_PHY is not set +# CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_NCN26000_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y CONFIG_RENESAS_PHY=m @@ -2635,11 +2939,69 @@ CONFIG_DP83822_PHY=m CONFIG_DP83848_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set +# CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set CONFIG_XILINX_GMII2RGMII=m CONFIG_MICREL_KS8995MA=m +CONFIG_CAN_DEV=m +CONFIG_CAN_VCAN=m +# CONFIG_CAN_VXCAN is not set +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_CAN327 is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +CONFIG_CAN_SLCAN=m +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +CONFIG_CAN_C_CAN_PCI=m +CONFIG_CAN_CC770=m +# CONFIG_CAN_CC770_ISA is not set +CONFIG_CAN_CC770_PLATFORM=m +# CONFIG_CAN_CTUCANFD_PCI is not set +# CONFIG_CAN_ESD_402_PCI is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +CONFIG_CAN_SJA1000=m +CONFIG_CAN_EMS_PCI=m +# CONFIG_CAN_F81601 is not set +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_PEAK_PCI=m +CONFIG_CAN_PEAK_PCIEC=y +CONFIG_CAN_PLX_PCI=m +# CONFIG_CAN_SJA1000_ISA is not set +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_SOFTING=m + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB=m +# CONFIG_CAN_ETAS_ES58X is not set +# CONFIG_CAN_F81604 is not set +# CONFIG_CAN_GS_USB is not set +CONFIG_CAN_KVASER_USB=m +# CONFIG_CAN_MCBA_USB is not set +CONFIG_CAN_PEAK_USB=m +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y +CONFIG_FWNODE_MDIO=y +CONFIG_ACPI_MDIO=y CONFIG_MDIO_DEVRES=y # CONFIG_MDIO_BITBANG is not set CONFIG_MDIO_BCM_UNIMAC=m @@ -2665,6 +3027,11 @@ CONFIG_PPP_FILTER=y CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=m CONFIG_PPPOE=m +# CONFIG_PPPOE_HASH_BITS_1 is not set +# CONFIG_PPPOE_HASH_BITS_2 is not set +CONFIG_PPPOE_HASH_BITS_4=y +# CONFIG_PPPOE_HASH_BITS_8 is not set +CONFIG_PPPOE_HASH_BITS=4 CONFIG_PPTP=m CONFIG_PPPOL2TP=m CONFIG_PPP_ASYNC=m @@ -2685,30 +3052,26 @@ CONFIG_USB_LAN78XX=m # CONFIG_USB_HSO is not set # CONFIG_USB_IPHETH is not set CONFIG_WLAN=y -# CONFIG_WIRELESS_WDS is not set # CONFIG_WLAN_VENDOR_ADMTEK is not set CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH_DEBUG is not set # CONFIG_ATH5K_PCI is not set # CONFIG_WLAN_VENDOR_ATMEL is not set CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_WLAN_VENDOR_CISCO is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_WLAN_VENDOR_INTERSIL is not set CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_WLAN_VENDOR_MICROCHIP=y +CONFIG_WLAN_VENDOR_PURELIFI=y CONFIG_WLAN_VENDOR_RALINK=y CONFIG_WLAN_VENDOR_REALTEK=y # CONFIG_WLAN_VENDOR_RSI is not set +CONFIG_WLAN_VENDOR_SILABS=y # CONFIG_WLAN_VENDOR_ST is not set # CONFIG_WLAN_VENDOR_TI is not set # CONFIG_WLAN_VENDOR_ZYDAS is not set CONFIG_WLAN_VENDOR_QUANTENNA=y - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# # CONFIG_WAN is not set CONFIG_IEEE802154_DRIVERS=m CONFIG_IEEE802154_FAKELB=m @@ -2720,12 +3083,22 @@ CONFIG_IEEE802154_FAKELB=m # CONFIG_IEEE802154_CA8210 is not set # CONFIG_IEEE802154_MCR20A is not set # CONFIG_IEEE802154_HWSIM is not set + +# +# Wireless WAN +# +CONFIG_WWAN=m +CONFIG_WWAN_DEBUGFS=y +# CONFIG_WWAN_HWSIM is not set +CONFIG_IOSM=m +# CONFIG_MTK_T7XX is not set +# end of Wireless WAN + CONFIG_VMXNET3=m CONFIG_FUJITSU_ES=m CONFIG_NETDEVSIM=m CONFIG_NET_FAILOVER=m # CONFIG_ISDN is not set -# CONFIG_NVM is not set # # Input device support @@ -2733,9 +3106,9 @@ CONFIG_NET_FAILOVER=m CONFIG_INPUT=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=m -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_SPARSEKMAP=m # CONFIG_INPUT_MATRIXKMAP is not set +CONFIG_INPUT_VIVALDIFMAP=y # # Userland interfaces @@ -2770,7 +3143,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2779,6 +3151,7 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CYPRESS_SF is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y @@ -2831,9 +3204,12 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_PWM_BEEPER is not set # CONFIG_INPUT_PWM_VIBRA is not set CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +# CONFIG_INPUT_DA7280_HAPTICS is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set # CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_IQS626A is not set +# CONFIG_INPUT_IQS7222 is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set @@ -2881,10 +3257,10 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set +CONFIG_LEGACY_TIOCSTI=y CONFIG_LDISC_AUTOLOAD=y # @@ -2898,12 +3274,14 @@ CONFIG_SERIAL_8250_PNP=y # CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCILIB=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_PCI1XXXX is not set CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set CONFIG_SERIAL_8250_RSA=y @@ -2912,6 +3290,7 @@ CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_8250_LPSS=y CONFIG_SERIAL_8250_MID=y +CONFIG_SERIAL_8250_PERICOM=y # # Non-8250 serial port support @@ -2927,7 +3306,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set @@ -2937,20 +3315,12 @@ CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_NONSTANDARD=y -# CONFIG_ROCKETPORT is not set -CONFIG_CYCLADES=m -# CONFIG_CYZ_INTR is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set -CONFIG_SYNCLINK=m -CONFIG_SYNCLINKMP=m -CONFIG_SYNCLINK_GT=m -# CONFIG_ISI is not set CONFIG_N_HDLC=m # CONFIG_N_GSM is not set # CONFIG_NOZOMI is not set # CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set CONFIG_HVC_DRIVER=y # CONFIG_SERIAL_DEV_BUS is not set # CONFIG_TTY_PRINTK is not set @@ -2976,44 +3346,41 @@ CONFIG_HW_RANDOM_VIRTIO=y # CONFIG_APPLICOM is not set # CONFIG_MWAVE is not set CONFIG_DEVMEM=y -# CONFIG_DEVKMEM is not set CONFIG_NVRAM=y -CONFIG_RAW_DRIVER=y -CONFIG_MAX_RAW_DEVS=8192 CONFIG_DEVPORT=y CONFIG_HPET=y CONFIG_HPET_MMAP=y # CONFIG_HPET_MMAP_DEFAULT is not set # CONFIG_HANGCHECK_TIMER is not set -CONFIG_TCG_TPM=m +CONFIG_TCG_TPM=y +CONFIG_TCG_TPM2_HMAC=y CONFIG_HW_RANDOM_TPM=y -CONFIG_TCG_TIS_CORE=m -CONFIG_TCG_TIS=m +CONFIG_TCG_TIS_CORE=y +CONFIG_TCG_TIS=y # CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C is not set +CONFIG_TCG_TIS_I2C_CR50=m CONFIG_TCG_TIS_I2C_ATMEL=m CONFIG_TCG_TIS_I2C_INFINEON=m CONFIG_TCG_TIS_I2C_NUVOTON=m CONFIG_TCG_NSC=m CONFIG_TCG_ATMEL=m CONFIG_TCG_INFINEON=m -CONFIG_TCG_CRB=m +CONFIG_TCG_CRB=y # CONFIG_TCG_VTPM_PROXY is not set # CONFIG_TCG_TIS_ST33ZP24_I2C is not set # CONFIG_TCG_TIS_ST33ZP24_SPI is not set # CONFIG_TELCLOCK is not set # CONFIG_XILLYBUS is not set +# CONFIG_XILLYUSB is not set # end of Character devices -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m CONFIG_I2C_MUX=m @@ -3056,6 +3423,7 @@ CONFIG_I2C_ISMT=m # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_ZHAOXIN is not set # # ACPI drivers @@ -3069,6 +3437,7 @@ CONFIG_I2C_SCMI=m CONFIG_I2C_DESIGNWARE_CORE=m # CONFIG_I2C_DESIGNWARE_SLAVE is not set CONFIG_I2C_DESIGNWARE_PLATFORM=m +# CONFIG_I2C_DESIGNWARE_AMDPSP is not set CONFIG_I2C_DESIGNWARE_BAYTRAIL=y # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set @@ -3082,6 +3451,8 @@ CONFIG_I2C_DESIGNWARE_BAYTRAIL=y # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_CP2615 is not set +# CONFIG_I2C_PCI1XXXX is not set # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set CONFIG_I2C_TINY_USB=m @@ -3090,6 +3461,7 @@ CONFIG_I2C_TINY_USB=m # Other I2C/SMBus bus drivers # CONFIG_I2C_MLXCPLD=m +# CONFIG_I2C_VIRTIO is not set # end of I2C Hardware Bus support CONFIG_I2C_STUB=m @@ -3112,19 +3484,20 @@ CONFIG_SPI_MASTER=y # CONFIG_SPI_AXI_SPI_ENGINE is not set CONFIG_SPI_BITBANG=m # CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set -# CONFIG_SPI_NXP_FLEXSPI is not set # CONFIG_SPI_GPIO is not set +# CONFIG_SPI_MICROCHIP_CORE is not set +# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set # CONFIG_SPI_LANTIQ_SSC is not set # CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PCI1XXXX is not set # CONFIG_SPI_PXA2XX is not set -# CONFIG_SPI_ROCKCHIP is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_MXIC is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set # CONFIG_SPI_AMD is not set # @@ -3160,12 +3533,16 @@ CONFIG_PPS=y # PTP clock support # CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_DP83640_PHY=y # CONFIG_PTP_1588_CLOCK_INES is not set CONFIG_PTP_1588_CLOCK_KVM=y # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set +# CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_VMW is not set +CONFIG_PTP_1588_CLOCK_OCP=m # end of PTP clock support CONFIG_PINCTRL=y @@ -3173,24 +3550,36 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set -CONFIG_PINCTRL_AMD=m +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SX150X is not set + +# +# Intel pinctrl drivers +# CONFIG_PINCTRL_BAYTRAIL=y # CONFIG_PINCTRL_CHERRYVIEW is not set # CONFIG_PINCTRL_LYNXPOINT is not set CONFIG_PINCTRL_INTEL=y +# CONFIG_PINCTRL_INTEL_PLATFORM is not set +CONFIG_PINCTRL_ALDERLAKE=m CONFIG_PINCTRL_BROXTON=m CONFIG_PINCTRL_CANNONLAKE=m CONFIG_PINCTRL_CEDARFORK=m CONFIG_PINCTRL_DENVERTON=m +CONFIG_PINCTRL_ELKHARTLAKE=m # CONFIG_PINCTRL_EMMITSBURG is not set CONFIG_PINCTRL_GEMINILAKE=m CONFIG_PINCTRL_ICELAKE=m # CONFIG_PINCTRL_JASPERLAKE is not set +CONFIG_PINCTRL_LAKEFIELD=m CONFIG_PINCTRL_LEWISBURG=m +# CONFIG_PINCTRL_METEORLAKE is not set +# CONFIG_PINCTRL_METEORPOINT is not set CONFIG_PINCTRL_SUNRISEPOINT=m # CONFIG_PINCTRL_TIGERLAKE is not set +# end of Intel pinctrl drivers # # Renesas pinctrl drivers @@ -3214,16 +3603,16 @@ CONFIG_GPIO_AMDPT=m # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_EXAR is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRANITERAPIDS is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_MB86S7X is not set -# CONFIG_GPIO_VX855 is not set -# CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # +# CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_F7188X is not set # CONFIG_GPIO_IT87 is not set # CONFIG_GPIO_SCH is not set @@ -3235,7 +3624,8 @@ CONFIG_GPIO_ICH=m # # I2C GPIO expanders # -# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_FXL6408 is not set +# CONFIG_GPIO_DS4520 is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set @@ -3247,6 +3637,7 @@ CONFIG_GPIO_ICH=m # # MFD GPIO expanders # +# CONFIG_GPIO_ELKHARTLAKE is not set # end of MFD GPIO expanders # @@ -3275,43 +3666,66 @@ CONFIG_GPIO_ICH=m # # end of USB GPIO expanders +# +# Virtual GPIO drivers +# # CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_LATCH is not set # CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_VIRTIO is not set +# CONFIG_GPIO_SIM is not set +# end of Virtual GPIO drivers + +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set # CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_IP5XXX_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SAMSUNG_SDI is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_LTC4162L is not set +# CONFIG_CHARGER_MAX77976 is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ2515X is not set # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set +# CONFIG_CHARGER_BQ256XX is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_GOLDFISH is not set # CONFIG_BATTERY_RT5033 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_BD99954 is not set +# CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -3323,7 +3737,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -3336,33 +3749,39 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AHT10 is not set +CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_K8TEMP is not set # CONFIG_SENSORS_K10TEMP is not set # CONFIG_SENSORS_FAM15H_POWER is not set -# CONFIG_SENSORS_AMD_ENERGY is not set # CONFIG_SENSORS_APPLESMC is not set # CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set +CONFIG_SENSORS_CORSAIR_PSU=m # CONFIG_SENSORS_DRIVETEMP is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set CONFIG_SENSORS_DELL_SMM=m +# CONFIG_I8K is not set # CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FSCHMD is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_HS3001 is not set # CONFIG_SENSORS_IBMAEM is not set # CONFIG_SENSORS_IBMPEX is not set # CONFIG_SENSORS_IIO_HWMON is not set @@ -3370,34 +3789,44 @@ CONFIG_SENSORS_I5500=m CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_IT87 is not set CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LENOVO_EC is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set +# CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4222 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX1668 is not set # CONFIG_SENSORS_MAX197 is not set # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX31760 is not set +# CONFIG_MAX31827 is not set +# CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MC34VR500 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_MLXREG_FAN is not set # CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_TPS23861 is not set # CONFIG_SENSORS_MR75203 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_LM63 is not set @@ -3421,24 +3850,40 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT6775_I2C is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set +# CONFIG_SENSORS_NZXT_SMART2 is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_OXP is not set # CONFIG_SENSORS_PCF8591 is not set CONFIG_PMBUS=m # CONFIG_SENSORS_PMBUS is not set +# CONFIG_SENSORS_ACBEL_FSG032 is not set # CONFIG_SENSORS_ADM1266 is not set # CONFIG_SENSORS_ADM1275 is not set +# CONFIG_SENSORS_ADP1050 is not set # CONFIG_SENSORS_BEL_PFE is not set +# CONFIG_SENSORS_BPA_RS600 is not set +# CONFIG_SENSORS_DELTA_AHE50DC_FAN is not set +# CONFIG_SENSORS_FSP_3Y is not set # CONFIG_SENSORS_IBM_CFFPS is not set +# CONFIG_SENSORS_DPS920AB is not set # CONFIG_SENSORS_INSPUR_IPSPS is not set # CONFIG_SENSORS_IR35221 is not set +# CONFIG_SENSORS_IR36021 is not set # CONFIG_SENSORS_IR38064 is not set # CONFIG_SENSORS_IRPS5401 is not set # CONFIG_SENSORS_ISL68137 is not set # CONFIG_SENSORS_LM25066 is not set +# CONFIG_SENSORS_LT7182S is not set # CONFIG_SENSORS_LTC2978 is not set # CONFIG_SENSORS_LTC3815 is not set +# CONFIG_SENSORS_LTC4286 is not set +# CONFIG_SENSORS_MAX15301 is not set # CONFIG_SENSORS_MAX16064 is not set # CONFIG_SENSORS_MAX16601 is not set # CONFIG_SENSORS_MAX20730 is not set @@ -3446,22 +3891,47 @@ CONFIG_PMBUS=m # CONFIG_SENSORS_MAX31785 is not set # CONFIG_SENSORS_MAX34440 is not set # CONFIG_SENSORS_MAX8688 is not set +# CONFIG_SENSORS_MP2856 is not set +# CONFIG_SENSORS_MP2888 is not set +# CONFIG_SENSORS_MP2891 is not set # CONFIG_SENSORS_MP2975 is not set +# CONFIG_SENSORS_MP2993 is not set +# CONFIG_SENSORS_MP5023 is not set +# CONFIG_SENSORS_MP5920 is not set +# CONFIG_SENSORS_MP5990 is not set +# CONFIG_SENSORS_MP9941 is not set +# CONFIG_SENSORS_MPQ7932 is not set +# CONFIG_SENSORS_MPQ8785 is not set +# CONFIG_SENSORS_PIM4328 is not set +# CONFIG_SENSORS_PLI1209BC is not set +# CONFIG_SENSORS_PM6764TR is not set # CONFIG_SENSORS_PXE1610 is not set +# CONFIG_SENSORS_Q54SJ108A2 is not set +# CONFIG_SENSORS_STPDDC60 is not set +# CONFIG_SENSORS_TDA38640 is not set # CONFIG_SENSORS_TPS40422 is not set # CONFIG_SENSORS_TPS53679 is not set +# CONFIG_SENSORS_TPS546D24 is not set # CONFIG_SENSORS_UCD9000 is not set # CONFIG_SENSORS_UCD9200 is not set +# CONFIG_SENSORS_XDP710 is not set +# CONFIG_SENSORS_XDPE152 is not set # CONFIG_SENSORS_XDPE122 is not set # CONFIG_SENSORS_ZL6100 is not set +# CONFIG_SENSORS_PT5161L is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SBTSI is not set +# CONFIG_SENSORS_SBRMI is not set CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SHT3x is not set +CONFIG_SENSORS_SHT4x=m # CONFIG_SENSORS_SHTC1 is not set # CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC2305 is not set # CONFIG_SENSORS_EMC6W201 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set @@ -3469,14 +3939,15 @@ CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_SCH5636 is not set # CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_ADC128D818 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA209 is not set # CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3484,6 +3955,7 @@ CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_TMP108 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP464 is not set # CONFIG_SENSORS_TMP513 is not set # CONFIG_SENSORS_VIA_CPUTEMP is not set # CONFIG_SENSORS_VIA686A is not set @@ -3506,12 +3978,16 @@ CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_ACPI_POWER=m # CONFIG_SENSORS_ATK0110 is not set +CONFIG_SENSORS_ASUS_WMI=m +CONFIG_SENSORS_ASUS_EC=m +# CONFIG_SENSORS_HP_WMI is not set CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set +CONFIG_THERMAL_NETLINK=y # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3525,6 +4001,8 @@ CONFIG_THERMAL_GOV_USER_SPACE=y # Intel thermal drivers # CONFIG_INTEL_POWERCLAMP=m +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_INTEL_TCC=y CONFIG_X86_PKG_TEMP_THERMAL=m CONFIG_INTEL_SOC_DTS_IOSF_CORE=m # CONFIG_INTEL_SOC_DTS_THERMAL is not set @@ -3535,9 +4013,12 @@ CONFIG_INTEL_SOC_DTS_IOSF_CORE=m CONFIG_INT340X_THERMAL=m CONFIG_ACPI_THERMAL_REL=m # CONFIG_INT3406_THERMAL is not set +CONFIG_PROC_THERMAL_MMIO_RAPL=m # end of ACPI INT340X thermal drivers CONFIG_INTEL_PCH_THERMAL=m +# CONFIG_INTEL_TCC_COOLING is not set +CONFIG_INTEL_HFI_THERMAL=y # end of Intel thermal drivers # CONFIG_GENERIC_ADC_THERMAL is not set @@ -3547,6 +4028,7 @@ CONFIG_WATCHDOG_CORE=y CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_SYSFS=y +CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT=y # # Watchdog Pretimeout Governors @@ -3557,6 +4039,7 @@ CONFIG_WATCHDOG_SYSFS=y # Watchdog Device Drivers # CONFIG_SOFT_WATCHDOG=y +# CONFIG_LENOVO_SE10_WDT is not set CONFIG_WDAT_WDT=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set @@ -3566,9 +4049,11 @@ CONFIG_WDAT_WDT=m # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set +# CONFIG_ADVANTECH_EC_WDT is not set # CONFIG_ALIM1535_WDT is not set # CONFIG_ALIM7101_WDT is not set # CONFIG_EBC_C384_WDT is not set +# CONFIG_EXAR_WDT is not set # CONFIG_F71808E_WDT is not set # CONFIG_SP5100_TCO is not set # CONFIG_SBC_FITPC2_WATCHDOG is not set @@ -3601,6 +4086,7 @@ CONFIG_HPWDT_NMI_DECODING=y CONFIG_INTEL_MEI_WDT=m # CONFIG_NI903X_WDT is not set # CONFIG_NIC7018_WDT is not set +CONFIG_SIEMENS_SIMATIC_IPC_WDT=m # CONFIG_MEN_A21_WDT is not set # @@ -3623,11 +4109,13 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_CORE=y # CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_SMPRO is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CS42L43_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set @@ -3640,12 +4128,9 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_MP2629 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set CONFIG_LPC_ICH=m CONFIG_LPC_SCH=m -# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set CONFIG_MFD_INTEL_LPSS=y CONFIG_MFD_INTEL_LPSS_ACPI=y CONFIG_MFD_INTEL_LPSS_PCI=y @@ -3657,6 +4142,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3664,22 +4150,24 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6370 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set +# CONFIG_MFD_OCELOT is not set # CONFIG_EZX_PCAP is not set # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RT5120 is not set # CONFIG_MFD_RC5T583 is not set -# CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_LP3943 is not set # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set @@ -3694,7 +4182,8 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS80031 is not set +# CONFIG_MFD_TPS6594_I2C is not set +# CONFIG_MFD_TPS6594_SPI is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_WL1273_CORE is not set @@ -3708,43 +4197,62 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_INTEL_M10_BMC is not set +# CONFIG_MFD_ATC260X_I2C is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set +# CONFIG_MFD_INTEL_M10_BMC_SPI is not set # end of Multifunction device drivers # CONFIG_REGULATOR is not set # CONFIG_RC_CORE is not set CONFIG_CEC_CORE=m + +# +# CEC support +# CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set # CONFIG_CEC_GPIO is not set # CONFIG_CEC_SECO is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m +# end of CEC support + # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # +CONFIG_APERTURE_HELPERS=y +CONFIG_SCREEN_INFO=y +CONFIG_VIDEO=y +# CONFIG_AUXDISPLAY is not set # CONFIG_AGP is not set CONFIG_INTEL_GTT=m -CONFIG_VGA_ARB=y -CONFIG_VGA_ARB_MAX_GPUS=64 # CONFIG_VGA_SWITCHEROO is not set CONFIG_DRM=m CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_DP_AUX_CHARDEV=y -# CONFIG_DRM_DEBUG_SELFTEST is not set +# CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=m -CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_PANIC is not set # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +# CONFIG_DRM_DEBUG_MODESET_LOCK is not set CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -CONFIG_DRM_DP_CEC=y +CONFIG_DRM_DISPLAY_HELPER=m +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y CONFIG_DRM_TTM=m -CONFIG_DRM_TTM_DMA_PAGE_POOL=y -CONFIG_DRM_GEM_SHMEM_HELPER=y +CONFIG_DRM_EXEC=m +CONFIG_DRM_BUDDY=m +CONFIG_DRM_TTM_HELPER=m +CONFIG_DRM_GEM_SHMEM_HELPER=m +CONFIG_DRM_SUBALLOC_HELPER=m CONFIG_DRM_SCHED=m # @@ -3765,8 +4273,9 @@ CONFIG_DRM_SCHED=m CONFIG_DRM_AMDGPU=m # CONFIG_DRM_AMDGPU_SI is not set # CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set +CONFIG_DRM_AMDGPU_USERPTR=y +# CONFIG_DRM_AMD_ISP is not set +# CONFIG_DRM_AMDGPU_WERROR is not set # # ACP (Audio CoProcessor) Configuration @@ -3778,10 +4287,8 @@ CONFIG_DRM_AMDGPU=m # Display Engine Configuration # CONFIG_DRM_AMD_DC=y -CONFIG_DRM_AMD_DC_DCN=y -# CONFIG_DRM_AMD_DC_DCN3_0 is not set -# CONFIG_DRM_AMD_DC_HDCP is not set -# CONFIG_DRM_AMD_DC_SI is not set +CONFIG_DRM_AMD_DC_FP=y +# CONFIG_DRM_AMD_SECURE_DISPLAY is not set # end of Display Engine Configuration CONFIG_HSA_AMD=y @@ -3791,13 +4298,13 @@ CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y -CONFIG_DRM_I915_GVT=y CONFIG_DRM_I915_GVT_KVMGT=m # # drm/i915 Debugging # # CONFIG_DRM_I915_WERROR is not set +# CONFIG_DRM_I915_REPLAY_GPU_HANGS_API is not set # CONFIG_DRM_I915_DEBUG is not set # CONFIG_DRM_I915_DEBUG_MMIO is not set # CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS is not set @@ -3807,20 +4314,25 @@ CONFIG_DRM_I915_GVT_KVMGT=m # CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS is not set # CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set # CONFIG_DRM_I915_DEBUG_RUNTIME_PM is not set +# CONFIG_DRM_I915_DEBUG_WAKEREF is not set # end of drm/i915 Debugging # # drm/i915 Profile Guided Optimisation # +CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 CONFIG_DRM_I915_FENCE_TIMEOUT=10000 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 +CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 # end of drm/i915 Profile Guided Optimisation +CONFIG_DRM_I915_GVT=y +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set CONFIG_DRM_VKMS=m # CONFIG_DRM_VMWGFX is not set @@ -3829,14 +4341,18 @@ CONFIG_DRM_VKMS=m # CONFIG_DRM_AST is not set # CONFIG_DRM_MGAG200 is not set # CONFIG_DRM_QXL is not set -# CONFIG_DRM_BOCHS is not set CONFIG_DRM_VIRTIO_GPU=m +CONFIG_DRM_VIRTIO_GPU_KMS=y CONFIG_DRM_PANEL=y # # Display Panels # +# CONFIG_DRM_PANEL_AUO_A030JTN01 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y @@ -3849,9 +4365,13 @@ CONFIG_DRM_PANEL_BRIDGE=y # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_BOCHS is not set # CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_GM12U320 is not set +# CONFIG_DRM_PANEL_MIPI_DBI is not set +# CONFIG_DRM_SIMPLEDRM is not set # CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9163 is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set # CONFIG_TINYDRM_ILI9486 is not set @@ -3860,32 +4380,15 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_VBOXVIDEO is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_GUD is not set +# CONFIG_DRM_SSD130X is not set +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_BOOT_VESA_SUPPORT=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_MODE_HELPERS is not set -CONFIG_FB_TILEBLITTING=y - -# -# Frame buffer hardware drivers -# # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set @@ -3903,7 +4406,6 @@ CONFIG_FB_EFI=y # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set -# CONFIG_FB_LE80578 is not set # CONFIG_FB_MATROX is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set @@ -3928,7 +4430,27 @@ CONFIG_FB_EFI=y # CONFIG_FB_METRONOME is not set # CONFIG_FB_MB862XX is not set # CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set # CONFIG_FB_SM712 is not set +CONFIG_FB_CORE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DEVICE=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYSMEM_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +# CONFIG_FB_MODE_HELPERS is not set +CONFIG_FB_TILEBLITTING=y # end of Frame buffer Devices # @@ -3949,15 +4471,19 @@ CONFIG_LCD_CLASS_DEVICE=m # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set +# CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_APPLE is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -3974,6 +4500,7 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set # CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set @@ -3982,11 +4509,9 @@ CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # CONFIG_LOGO is not set # end of Graphics support +# CONFIG_DRM_ACCEL is not set # CONFIG_SOUND is not set - -# -# HID support -# +CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_BATTERY_STRENGTH is not set # CONFIG_HIDRAW is not set @@ -4019,11 +4544,14 @@ CONFIG_HID_CYPRESS=m CONFIG_HID_ELAN=m # CONFIG_HID_ELECOM is not set CONFIG_HID_ELO=m +# CONFIG_HID_EVISION is not set CONFIG_HID_EZKEY=m CONFIG_HID_GEMBIRD=m CONFIG_HID_GFRM=m # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set +# CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set CONFIG_HID_GT683R=m # CONFIG_HID_KEYTOUCH is not set @@ -4031,6 +4559,8 @@ CONFIG_HID_GT683R=m # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_VRC2 is not set +# CONFIG_HID_XIAOMI is not set # CONFIG_HID_GYRATION is not set # CONFIG_HID_ICADE is not set CONFIG_HID_ITE=m @@ -4040,6 +4570,7 @@ CONFIG_HID_KENSINGTON=m # CONFIG_HID_LCPOWER is not set CONFIG_HID_LED=m CONFIG_HID_LENOVO=m +# CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=m CONFIG_HID_LOGITECH_HIDPP=m # CONFIG_LOGITECH_FF is not set @@ -4049,10 +4580,13 @@ CONFIG_HID_LOGITECH_HIDPP=m # CONFIG_HID_MAGICMOUSE is not set # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MEGAWORLD_FF is not set # CONFIG_HID_REDRAGON is not set CONFIG_HID_MICROSOFT=m CONFIG_HID_MONTEREY=m CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NINTENDO=m +CONFIG_NINTENDO_FF=y CONFIG_HID_NTI=m # CONFIG_HID_NTRIG is not set # CONFIG_HID_ORTEK is not set @@ -4061,11 +4595,15 @@ CONFIG_HID_PENMOUNT=m # CONFIG_HID_PETALYNX is not set # CONFIG_HID_PICOLCD is not set CONFIG_HID_PLANTRONICS=m +# CONFIG_HID_PXRC is not set +# CONFIG_HID_RAZER is not set # CONFIG_HID_PRIMAX is not set # CONFIG_HID_RETRODE is not set # CONFIG_HID_ROCCAT is not set # CONFIG_HID_SAITEK is not set # CONFIG_HID_SAMSUNG is not set +CONFIG_HID_SEMITEK=m +# CONFIG_HID_SIGMAMICRO is not set # CONFIG_HID_SONY is not set # CONFIG_HID_SPEEDLINK is not set # CONFIG_HID_STEAM is not set @@ -4076,21 +4614,29 @@ CONFIG_HID_PLANTRONICS=m # CONFIG_HID_SMARTJOYPLUS is not set # CONFIG_HID_TIVO is not set # CONFIG_HID_TOPSEED is not set +# CONFIG_HID_TOPRE is not set # CONFIG_HID_THINGM is not set # CONFIG_HID_THRUSTMASTER is not set # CONFIG_HID_UDRAW_PS3 is not set # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=m # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set CONFIG_HID_SENSOR_HUB=y CONFIG_HID_SENSOR_CUSTOM_SENSOR=m CONFIG_HID_ALPS=m +# CONFIG_HID_MCP2200 is not set # CONFIG_HID_MCP2221 is not set # end of Special HID drivers +# +# HID-BPF support +# +# end of HID-BPF support + # # USB HID support # @@ -4099,11 +4645,10 @@ CONFIG_USB_HID=y # CONFIG_USB_HIDDEV is not set # end of USB HID support -# -# I2C HID support -# CONFIG_I2C_HID=m -# end of I2C HID support +CONFIG_I2C_HID_ACPI=m +CONFIG_I2C_HID_OF=m +CONFIG_I2C_HID_CORE=m # # Intel ISH HID support @@ -4111,7 +4656,12 @@ CONFIG_I2C_HID=m CONFIG_INTEL_ISH_HID=m # CONFIG_INTEL_ISH_FIRMWARE_DOWNLOADER is not set # end of Intel ISH HID support -# end of HID support + +# +# AMD SFH HID Support +# +CONFIG_AMD_SFH_HID=m +# end of AMD SFH HID Support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y @@ -4122,6 +4672,7 @@ CONFIG_USB_LED_TRIG=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +CONFIG_USB_PCI_AMD=y # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # @@ -4135,6 +4686,7 @@ CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=m CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4154,7 +4706,6 @@ CONFIG_USB_EHCI_PCI=y # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set # CONFIG_USB_MAX3421_HCD is not set # CONFIG_USB_OHCI_HCD is not set CONFIG_USB_UHCI_HCD=y @@ -4200,7 +4751,11 @@ CONFIG_USB_UAS=m # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set + +# +# USB dual-mode controller drivers +# +# CONFIG_USB_CDNS_SUPPORT is not set # CONFIG_USB_MUSB_HDRC is not set # CONFIG_USB_DWC3 is not set # CONFIG_USB_DWC2 is not set @@ -4254,7 +4809,6 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_SERIAL_SYMBOL is not set # CONFIG_USB_SERIAL_TI is not set # CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OPTION is not set # CONFIG_USB_SERIAL_OMNINET is not set # CONFIG_USB_SERIAL_OPTICON is not set @@ -4263,6 +4817,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_SERIAL_SSU100 is not set # CONFIG_USB_SERIAL_QT2 is not set CONFIG_USB_SERIAL_UPD78F0730=m +CONFIG_USB_SERIAL_XR=m # CONFIG_USB_SERIAL_DEBUG is not set # @@ -4277,9 +4832,9 @@ CONFIG_USB_SERIAL_UPD78F0730=m # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_LJCA is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -4314,20 +4869,30 @@ CONFIG_TYPEC_FUSB302=m CONFIG_TYPEC_UCSI=y # CONFIG_UCSI_CCG is not set CONFIG_UCSI_ACPI=y -# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_UCSI_STM32G0 is not set CONFIG_TYPEC_TPS6598X=m +# CONFIG_TYPEC_ANX7411 is not set +# CONFIG_TYPEC_RT1719 is not set +# CONFIG_TYPEC_HD3SS3220 is not set # CONFIG_TYPEC_STUSB160X is not set +# CONFIG_TYPEC_WUSB3801 is not set # # USB Type-C Multiplexer/DeMultiplexer Switch support # +# CONFIG_TYPEC_MUX_FSA4480 is not set +# CONFIG_TYPEC_MUX_GPIO_SBU is not set CONFIG_TYPEC_MUX_PI3USB30532=m +# CONFIG_TYPEC_MUX_IT5205 is not set +# CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # -CONFIG_TYPEC_DP_ALTMODE=y +CONFIG_TYPEC_DP_ALTMODE=m # CONFIG_TYPEC_NVIDIA_ALTMODE is not set # end of USB Type-C Alternate Mode drivers @@ -4365,6 +4930,7 @@ CONFIG_MMC_CQHCI=m # CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_SCSI_UFSHCD is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -4376,6 +4942,7 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_APU is not set +# CONFIG_LEDS_AW200XX is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set @@ -4383,17 +4950,19 @@ CONFIG_LEDS_CLASS=y # CONFIG_LEDS_GPIO is not set # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_CLEVO_MAIL is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_PCA995X is not set # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_BD2606MVV is not set # CONFIG_LEDS_BD2802 is not set # CONFIG_LEDS_INTEL_SS4200 is not set +# CONFIG_LEDS_LT3593 is not set # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) @@ -4403,7 +4972,15 @@ CONFIG_LEDS_MLXCPLD=m # CONFIG_LEDS_MLXREG is not set # CONFIG_LEDS_USER is not set # CONFIG_LEDS_NIC78BX is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set +# CONFIG_LEDS_SPI_BYTE is not set + +# +# Flash and Torch LED drivers +# + +# +# RGB LED drivers +# # # LED Triggers @@ -4427,19 +5004,25 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=m # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -CONFIG_LEDS_TRIGGER_AUDIO=m +# CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set + +# +# Simple LED drivers +# +CONFIG_LEDS_SIEMENS_SIMATIC_IPC=m # CONFIG_ACCESSIBILITY is not set CONFIG_INFINIBAND=m # CONFIG_INFINIBAND_USER_MAD is not set # CONFIG_INFINIBAND_USER_ACCESS is not set # CONFIG_INFINIBAND_ADDR_TRANS is not set CONFIG_INFINIBAND_VIRT_DMA=y -# CONFIG_INFINIBAND_MTHCA is not set +CONFIG_INFINIBAND_IRDMA=m # CONFIG_MLX4_INFINIBAND is not set +# CONFIG_INFINIBAND_MTHCA is not set # CONFIG_INFINIBAND_OCRDMA is not set -# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set -# CONFIG_INFINIBAND_BNXT_RE is not set # CONFIG_INFINIBAND_QEDR is not set +# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set # CONFIG_INFINIBAND_RDMAVT is not set # CONFIG_RDMA_RXE is not set # CONFIG_RDMA_SIW is not set @@ -4478,6 +5061,7 @@ CONFIG_RTC_DRV_DS1374=m # CONFIG_RTC_DRV_DS1374_WDT is not set CONFIG_RTC_DRV_DS1672=m CONFIG_RTC_DRV_MAX6900=m +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_RS5C372=m CONFIG_RTC_DRV_ISL1208=m CONFIG_RTC_DRV_ISL12022=m @@ -4493,12 +5077,14 @@ CONFIG_RTC_DRV_BQ32K=m # CONFIG_RTC_DRV_S35390A is not set CONFIG_RTC_DRV_FM3130=m # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set CONFIG_RTC_DRV_RX8581=m CONFIG_RTC_DRV_RX8025=m CONFIG_RTC_DRV_EM3027=m # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -4514,7 +5100,6 @@ CONFIG_RTC_DRV_EM3027=m # CONFIG_RTC_DRV_MAX6916 is not set # CONFIG_RTC_DRV_R9701 is not set CONFIG_RTC_DRV_RX4581=m -# CONFIG_RTC_DRV_RX6110 is not set # CONFIG_RTC_DRV_RS5C348 is not set # CONFIG_RTC_DRV_MAX6902 is not set # CONFIG_RTC_DRV_PCF2123 is not set @@ -4529,6 +5114,7 @@ CONFIG_RTC_DRV_DS3232_HWMON=y # CONFIG_RTC_DRV_PCF2127 is not set CONFIG_RTC_DRV_RV3029C2=m # CONFIG_RTC_DRV_RV3029_HWMON is not set +# CONFIG_RTC_DRV_RX6110 is not set # # Platform RTC drivers @@ -4545,9 +5131,7 @@ CONFIG_RTC_DRV_STK17TA8=m CONFIG_RTC_DRV_M48T35=m CONFIG_RTC_DRV_M48T59=m CONFIG_RTC_DRV_MSM6242=m -CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_RP5C01=m -CONFIG_RTC_DRV_V3020=m # # on-CPU RTC drivers @@ -4558,6 +5142,7 @@ CONFIG_RTC_DRV_V3020=m # HID Sensor RTC drivers # # CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +# CONFIG_RTC_DRV_GOLDFISH is not set CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set @@ -4569,20 +5154,26 @@ CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y # CONFIG_ALTERA_MSGDMA is not set CONFIG_INTEL_IDMA64=m +CONFIG_INTEL_IDXD_BUS=m CONFIG_INTEL_IDXD=m -CONFIG_INTEL_IDXD_PERFMON=y +# CONFIG_INTEL_IDXD_COMPAT is not set CONFIG_INTEL_IDXD_SVM=y +CONFIG_INTEL_IDXD_PERFMON=y CONFIG_INTEL_IOATDMA=m # CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_XDMA is not set +# CONFIG_AMD_QDMA is not set +# CONFIG_AMD_PTDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y CONFIG_DW_DMAC=m CONFIG_DW_DMAC_PCI=y # CONFIG_DW_EDMA is not set -# CONFIG_DW_EDMA_PCIE is not set CONFIG_HSU_DMA=y # CONFIG_SF_PDMA is not set +# CONFIG_INTEL_LDMA is not set # # DMA Clients @@ -4598,12 +5189,13 @@ CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set # CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set +# CONFIG_DMABUF_SYSFS_STATS is not set # end of DMABUF options CONFIG_DCA=m -# CONFIG_AUXDISPLAY is not set CONFIG_UIO=m # CONFIG_UIO_CIF is not set CONFIG_UIO_PDRV_GENIRQ=m @@ -4612,24 +5204,37 @@ CONFIG_UIO_PDRV_GENIRQ=m # CONFIG_UIO_SERCOS3 is not set CONFIG_UIO_PCI_GENERIC=m # CONFIG_UIO_NETX is not set -# CONFIG_UIO_PRUSS is not set # CONFIG_UIO_MF624 is not set -CONFIG_VFIO_IOMMU_TYPE1=m -CONFIG_VFIO_VIRQFD=m CONFIG_VFIO=m +CONFIG_VFIO_GROUP=y +CONFIG_VFIO_CONTAINER=y +CONFIG_VFIO_IOMMU_TYPE1=m CONFIG_VFIO_NOIOMMU=y -CONFIG_VFIO_PCI=m -# CONFIG_VFIO_PCI_VGA is not set +CONFIG_VFIO_VIRQFD=y +# CONFIG_VFIO_DEBUGFS is not set + +# +# VFIO support for PCI devices +# +CONFIG_VFIO_PCI_CORE=m CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y +CONFIG_VFIO_PCI=m +# CONFIG_VFIO_PCI_VGA is not set # CONFIG_VFIO_PCI_IGD is not set +# CONFIG_VIRTIO_VFIO_PCI is not set +# end of VFIO support for PCI devices + CONFIG_VFIO_MDEV=m -CONFIG_VFIO_MDEV_DEVICE=m -CONFIG_IRQ_BYPASS_MANAGER=m +CONFIG_IRQ_BYPASS_MANAGER=y # CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_PCI_LIB_LEGACY=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_ADMIN_LEGACY=y CONFIG_VIRTIO_PCI_LEGACY=y # CONFIG_VIRTIO_PMEM is not set CONFIG_VIRTIO_BALLOON=m @@ -4637,8 +5242,10 @@ CONFIG_VIRTIO_INPUT=m CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set CONFIG_VIRTIO_DMA_SHARED_BUFFER=m +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=m +CONFIG_VHOST_TASK=y CONFIG_VHOST=m CONFIG_VHOST_MENU=y CONFIG_VHOST_NET=m @@ -4653,56 +5260,164 @@ CONFIG_VHOST_VSOCK=m # end of Microsoft Hyper-V guest support # CONFIG_GREYBUS is not set +CONFIG_COMEDI=m +# CONFIG_COMEDI_DEBUG is not set +CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 +CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 +CONFIG_COMEDI_MISC_DRIVERS=y +CONFIG_COMEDI_BOND=m +CONFIG_COMEDI_TEST=m +CONFIG_COMEDI_PARPORT=m +CONFIG_COMEDI_PCI_DRIVERS=m +CONFIG_COMEDI_8255_PCI=m +CONFIG_COMEDI_ADDI_WATCHDOG=m +CONFIG_COMEDI_ADDI_APCI_1032=m +CONFIG_COMEDI_ADDI_APCI_1500=m +CONFIG_COMEDI_ADDI_APCI_1516=m +CONFIG_COMEDI_ADDI_APCI_1564=m +CONFIG_COMEDI_ADDI_APCI_16XX=m +CONFIG_COMEDI_ADDI_APCI_2032=m +CONFIG_COMEDI_ADDI_APCI_2200=m +CONFIG_COMEDI_ADDI_APCI_3120=m +CONFIG_COMEDI_ADDI_APCI_3501=m +CONFIG_COMEDI_ADDI_APCI_3XXX=m +CONFIG_COMEDI_ADL_PCI6208=m +CONFIG_COMEDI_ADL_PCI7X3X=m +CONFIG_COMEDI_ADL_PCI8164=m +CONFIG_COMEDI_ADL_PCI9111=m +CONFIG_COMEDI_ADL_PCI9118=m +CONFIG_COMEDI_ADV_PCI1710=m +CONFIG_COMEDI_ADV_PCI1720=m +CONFIG_COMEDI_ADV_PCI1723=m +CONFIG_COMEDI_ADV_PCI1724=m +CONFIG_COMEDI_ADV_PCI1760=m +CONFIG_COMEDI_ADV_PCI_DIO=m +CONFIG_COMEDI_AMPLC_DIO200_PCI=m +CONFIG_COMEDI_AMPLC_PC236_PCI=m +CONFIG_COMEDI_AMPLC_PC263_PCI=m +CONFIG_COMEDI_AMPLC_PCI224=m +CONFIG_COMEDI_AMPLC_PCI230=m +CONFIG_COMEDI_CONTEC_PCI_DIO=m +CONFIG_COMEDI_DAS08_PCI=m +CONFIG_COMEDI_DT3000=m +CONFIG_COMEDI_DYNA_PCI10XX=m +CONFIG_COMEDI_GSC_HPDI=m +CONFIG_COMEDI_MF6X4=m +CONFIG_COMEDI_ICP_MULTI=m +CONFIG_COMEDI_DAQBOARD2000=m +CONFIG_COMEDI_JR3_PCI=m +CONFIG_COMEDI_KE_COUNTER=m +CONFIG_COMEDI_CB_PCIDAS64=m +CONFIG_COMEDI_CB_PCIDAS=m +CONFIG_COMEDI_CB_PCIDDA=m +CONFIG_COMEDI_CB_PCIMDAS=m +CONFIG_COMEDI_CB_PCIMDDA=m +CONFIG_COMEDI_ME4000=m +CONFIG_COMEDI_ME_DAQ=m +CONFIG_COMEDI_NI_6527=m +CONFIG_COMEDI_NI_65XX=m +CONFIG_COMEDI_NI_660X=m +CONFIG_COMEDI_NI_670X=m +CONFIG_COMEDI_NI_LABPC_PCI=m +CONFIG_COMEDI_NI_PCIDIO=m +CONFIG_COMEDI_NI_PCIMIO=m +CONFIG_COMEDI_RTD520=m +CONFIG_COMEDI_S626=m +CONFIG_COMEDI_MITE=m +CONFIG_COMEDI_NI_TIOCMD=m +CONFIG_COMEDI_USB_DRIVERS=m +CONFIG_COMEDI_DT9812=m +CONFIG_COMEDI_NI_USB6501=m +CONFIG_COMEDI_USBDUX=m +CONFIG_COMEDI_USBDUXFAST=m +CONFIG_COMEDI_USBDUXSIGMA=m +CONFIG_COMEDI_VMK80XX=m +CONFIG_COMEDI_8254=m +CONFIG_COMEDI_8255=m +CONFIG_COMEDI_8255_SA=m +CONFIG_COMEDI_KCOMEDILIB=m +CONFIG_COMEDI_AMPLC_DIO200=m +CONFIG_COMEDI_AMPLC_PC236=m +CONFIG_COMEDI_DAS08=m +CONFIG_COMEDI_NI_LABPC=m +CONFIG_COMEDI_NI_TIO=m +CONFIG_COMEDI_NI_ROUTING=m +# CONFIG_COMEDI_TESTS is not set # CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +CONFIG_MELLANOX_PLATFORM=y +CONFIG_MLXREG_HOTPLUG=m +# CONFIG_MLXREG_IO is not set +# CONFIG_MLXREG_LC is not set +# CONFIG_NVSW_SN2201 is not set +CONFIG_SURFACE_PLATFORMS=y +CONFIG_SURFACE3_WMI=m +# CONFIG_SURFACE_3_POWER_OPREGION is not set +CONFIG_SURFACE_GPE=m +CONFIG_SURFACE_HOTPLUG=m +# CONFIG_SURFACE_PRO3_BUTTON is not set CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_ACPI_WMI is not set +CONFIG_ACPI_WMI=m +CONFIG_WMI_BMOF=m +CONFIG_HUAWEI_WMI=m +# CONFIG_MXM_WMI is not set +CONFIG_NVIDIA_WMI_EC_BACKLIGHT=m +CONFIG_XIAOMI_WMI=m +CONFIG_GIGABYTE_WMI=m +# CONFIG_YOGABOOK is not set # CONFIG_ACERHDF is not set # CONFIG_ACER_WIRELESS is not set +CONFIG_ACER_WMI=m +CONFIG_AMD_PMC=m +CONFIG_AMD_MP2_STB=y +# CONFIG_AMD_HSMP is not set +# CONFIG_AMD_WBRF is not set +# CONFIG_ADV_SWBUTTON is not set # CONFIG_APPLE_GMUX is not set # CONFIG_ASUS_LAPTOP is not set # CONFIG_ASUS_WIRELESS is not set +CONFIG_ASUS_WMI=m +CONFIG_ASUS_NB_WMI=m +# CONFIG_ASUS_TF103C_DOCK is not set +# CONFIG_MERAKI_MX100 is not set # CONFIG_EEEPC_LAPTOP is not set +CONFIG_EEEPC_WMI=m +CONFIG_X86_PLATFORM_DRIVERS_DELL=y +CONFIG_ALIENWARE_WMI=m # CONFIG_DCDBAS is not set -CONFIG_DELL_SMBIOS=m CONFIG_DELL_LAPTOP=m -CONFIG_DELL_RBTN=m # CONFIG_DELL_RBU is not set +CONFIG_DELL_RBTN=m +CONFIG_DELL_PC=m +CONFIG_DELL_SMBIOS=m +CONFIG_DELL_SMBIOS_WMI=y CONFIG_DELL_SMO8800=m +CONFIG_DELL_WMI=m +# CONFIG_DELL_WMI_PRIVACY is not set +CONFIG_DELL_WMI_AIO=m +CONFIG_DELL_WMI_DESCRIPTOR=m +CONFIG_DELL_WMI_DDV=m +CONFIG_DELL_WMI_LED=m +CONFIG_DELL_WMI_SYSMAN=m # CONFIG_AMILO_RFKILL is not set # CONFIG_FUJITSU_LAPTOP is not set # CONFIG_FUJITSU_TABLET is not set # CONFIG_GPD_POCKET_FAN is not set -# CONFIG_HP_ACCEL is not set -# CONFIG_HP_WIRELESS is not set +# CONFIG_X86_PLATFORM_DRIVERS_HP is not set +# CONFIG_WIRELESS_HOTKEY is not set # CONFIG_IBM_RTL is not set # CONFIG_IDEAPAD_LAPTOP is not set # CONFIG_SENSORS_HDAPS is not set # CONFIG_THINKPAD_ACPI is not set +CONFIG_THINKPAD_LMI=m # CONFIG_INTEL_ATOMISP2_PM is not set -# CONFIG_INTEL_HID_EVENT is not set -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_MENLOW is not set -# CONFIG_INTEL_OAKTRAIL is not set -# CONFIG_INTEL_VBTN is not set -# CONFIG_SURFACE_3_POWER_OPREGION is not set -# CONFIG_SURFACE_PRO3_BUTTON is not set -# CONFIG_MSI_LAPTOP is not set -# CONFIG_PCENGINES_APU2 is not set -# CONFIG_SAMSUNG_LAPTOP is not set -# CONFIG_SAMSUNG_Q10 is not set -# CONFIG_TOSHIBA_BT_RFKILL is not set -# CONFIG_TOSHIBA_HAPS is not set -# CONFIG_ACPI_CMPC is not set -# CONFIG_COMPAL_LAPTOP is not set -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_SONY_LAPTOP is not set -# CONFIG_SYSTEM76_ACPI is not set -# CONFIG_TOPSTAR_LAPTOP is not set -# CONFIG_I2C_MULTI_INSTANTIATE is not set -CONFIG_MLX_PLATFORM=m -CONFIG_INTEL_IPS=m -CONFIG_INTEL_RST=m -# CONFIG_INTEL_SMARTCONNECT is not set +# CONFIG_INTEL_IFS is not set +# CONFIG_INTEL_SAR_INT1092 is not set +CONFIG_INTEL_PMC_CORE=m +CONFIG_INTEL_PMT_CLASS=m +CONFIG_INTEL_PMT_TELEMETRY=m +CONFIG_INTEL_PMT_CRASHLOG=m # # Intel Speed Select Technology interface support @@ -4710,21 +5425,68 @@ CONFIG_INTEL_RST=m # CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set # end of Intel Speed Select Technology interface support -CONFIG_INTEL_TURBO_MAX_3=y +CONFIG_INTEL_WMI=y +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +CONFIG_INTEL_WMI_THUNDERBOLT=m + +# +# Intel Uncore Frequency Control +# CONFIG_INTEL_UNCORE_FREQ_CONTROL=m -CONFIG_INTEL_PMC_CORE=m +# end of Intel Uncore Frequency Control + +# CONFIG_INTEL_HID_EVENT is not set +# CONFIG_INTEL_VBTN is not set +# CONFIG_INTEL_INT0002_VGPIO is not set +# CONFIG_INTEL_OAKTRAIL is not set +# CONFIG_INTEL_ISHTP_ECLITE is not set # CONFIG_INTEL_PUNIT_IPC is not set +CONFIG_INTEL_RST=m +CONFIG_INTEL_SDSI=m +# CONFIG_INTEL_SMARTCONNECT is not set +# CONFIG_INTEL_TPMI is not set +CONFIG_INTEL_TURBO_MAX_3=y +CONFIG_INTEL_VSEC=m +# CONFIG_ACPI_QUICKSTART is not set +# CONFIG_MEEGOPAD_ANX7428 is not set +# CONFIG_MSI_EC is not set +# CONFIG_MSI_LAPTOP is not set +CONFIG_MSI_WMI=m +# CONFIG_MSI_WMI_PLATFORM is not set +# CONFIG_PCENGINES_APU2 is not set +# CONFIG_BARCO_P50_GPIO is not set +# CONFIG_SAMSUNG_LAPTOP is not set +# CONFIG_SAMSUNG_Q10 is not set +CONFIG_ACPI_TOSHIBA=m +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_TOSHIBA_HAPS is not set +CONFIG_TOSHIBA_WMI=m +# CONFIG_ACPI_CMPC is not set +# CONFIG_COMPAL_LAPTOP is not set +CONFIG_LG_LAPTOP=m +# CONFIG_PANASONIC_LAPTOP is not set +# CONFIG_SONY_LAPTOP is not set +# CONFIG_SYSTEM76_ACPI is not set +# CONFIG_TOPSTAR_LAPTOP is not set +CONFIG_SERIAL_MULTI_INSTANTIATE=m +CONFIG_MLX_PLATFORM=m +# CONFIG_INSPUR_PLATFORM_PROFILE is not set +# CONFIG_LENOVO_WMI_CAMERA is not set +CONFIG_FW_ATTR_CLASS=m +CONFIG_INTEL_IPS=m # CONFIG_INTEL_SCU_PCI is not set # CONFIG_INTEL_SCU_PLATFORM is not set -CONFIG_PMC_ATOM=y -# CONFIG_CHROME_PLATFORMS is not set -CONFIG_MELLANOX_PLATFORM=y -CONFIG_MLXREG_HOTPLUG=m -# CONFIG_MLXREG_IO is not set +CONFIG_SIEMENS_SIMATIC_IPC=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_APOLLOLAKE=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_ELKHARTLAKE=m +# CONFIG_WINMATE_FM07_KEYS is not set +# CONFIG_SEL3350_PLATFORM is not set +CONFIG_P2SB=y CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y +# CONFIG_LMK04832 is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set @@ -4732,6 +5494,7 @@ CONFIG_COMMON_CLK=y # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_PWM is not set +# CONFIG_XILINX_VCU is not set CONFIG_HWSPINLOCK=y # @@ -4746,27 +5509,33 @@ CONFIG_MAILBOX=y CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set CONFIG_IOMMU_IOVA=y -CONFIG_IOASID=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # +CONFIG_IOMMU_IO_PGTABLE=y # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set +# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_SVA=y +CONFIG_IOMMU_IOPF=y CONFIG_AMD_IOMMU=y -CONFIG_AMD_IOMMU_V2=m CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y CONFIG_INTEL_IOMMU_SVM=y CONFIG_INTEL_IOMMU_DEFAULT_ON=y CONFIG_INTEL_IOMMU_FLOPPY_WA=y CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y +CONFIG_INTEL_IOMMU_PERF_EVENTS=y +# CONFIG_IOMMUFD is not set CONFIG_IRQ_REMAP=y +# CONFIG_VIRTIO_IOMMU is not set # # Remoteproc drivers @@ -4792,11 +5561,6 @@ CONFIG_IRQ_REMAP=y # # end of Amlogic SoC drivers -# -# Aspeed SoC drivers -# -# end of Aspeed SoC drivers - # # Broadcom SoC drivers # @@ -4807,11 +5571,23 @@ CONFIG_IRQ_REMAP=y # # end of NXP/Freescale QorIQ SoC drivers +# +# fujitsu SoC drivers +# +# end of fujitsu SoC drivers + # # i.MX SoC drivers # # end of i.MX SoC drivers +# +# Enable LiteX SoC Builder specific drivers +# +# end of Enable LiteX SoC Builder specific drivers + +# CONFIG_WPCM450_SOC is not set + # # Qualcomm SoC drivers # @@ -4822,10 +5598,34 @@ CONFIG_IRQ_REMAP=y # # Xilinx SoC drivers # -# CONFIG_XILINX_VCU is not set # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains +# end of PM Domains + # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set @@ -4843,26 +5643,41 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set # CONFIG_IIO_TRIGGERED_EVENT is not set +CONFIG_IIO_BACKEND=m # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set +# CONFIG_ADXL313_I2C is not set +# CONFIG_ADXL313_SPI is not set # CONFIG_ADXL345_I2C is not set # CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL355_I2C is not set +# CONFIG_ADXL355_SPI is not set +# CONFIG_ADXL367_SPI is not set +# CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set # CONFIG_BMC150_ACCEL is not set +# CONFIG_BMI088_ACCEL is not set # CONFIG_DA280 is not set # CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set # CONFIG_DMARD09 is not set # CONFIG_DMARD10 is not set +# CONFIG_FXLS8962AF_I2C is not set +# CONFIG_FXLS8962AF_SPI is not set CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_IIO_KX022A_SPI is not set +# CONFIG_IIO_KX022A_I2C is not set # CONFIG_KXSD9 is not set # CONFIG_KXCJK1013 is not set # CONFIG_MC3230 is not set @@ -4872,9 +5687,11 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set +# CONFIG_MSA311 is not set # CONFIG_MXC4005 is not set # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set +# CONFIG_SCA3300 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # end of Accelerometers @@ -4882,13 +5699,20 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set +# CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set @@ -4899,11 +5723,15 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +CONFIG_AD9467=m +# CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -4911,13 +5739,21 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX11205 is not set +# CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set +# CONFIG_RICHTEK_RTQ6056 is not set +# CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set @@ -4926,34 +5762,66 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7924 is not set +# CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_ADS131E08 is not set +# CONFIG_TI_LMP92064 is not set # CONFIG_TI_TLC4541 is not set +# CONFIG_TI_TSC2046 is not set +# CONFIG_VF610_ADC is not set # CONFIG_XILINX_XADC is not set # end of Analog to digital converters +# +# Analog to digital and digital to analog converters +# +# CONFIG_AD74115 is not set +# CONFIG_AD74413R is not set +# end of Analog to digital and digital to analog converters + # # Analog Front Ends # +# CONFIG_IIO_RESCALE is not set # end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set +# CONFIG_ADA4250 is not set # CONFIG_HMC425 is not set # end of Amplifiers +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_SCD30_CORE is not set +# CONFIG_SCD4X is not set # CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set +# CONFIG_SENSIRION_SGP40 is not set +# CONFIG_SPS30_I2C is not set +# CONFIG_SENSEAIR_SUNRISE_CO2 is not set # CONFIG_VZ89X is not set # end of Chemical Sensors @@ -4964,6 +5832,11 @@ CONFIG_HID_SENSOR_IIO_COMMON=m CONFIG_HID_SENSOR_IIO_TRIGGER=m # end of Hid Sensor IIO Common +# +# IIO SCMI Sensors +# +# end of IIO SCMI Sensors + # # SSP Sensor Common # @@ -4973,6 +5846,7 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # # Digital to analog converters # +# CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set # CONFIG_AD5380 is not set @@ -4983,27 +5857,38 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set +# CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set +# CONFIG_AD5766 is not set # CONFIG_AD5770R is not set # CONFIG_AD5791 is not set +# CONFIG_AD7293 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set +# CONFIG_MAX5522 is not set +# CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set +# CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set # CONFIG_TI_DAC7311 is not set # CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set # end of Digital to analog converters # @@ -5011,6 +5896,12 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # # end of IIO dummy driver +# +# Filters +# +# CONFIG_ADMV8818 is not set +# end of Filters + # # Frequency Synthesizers DDS/PLL # @@ -5026,6 +5917,12 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set +# CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set +# CONFIG_ADMV1013 is not set +# CONFIG_ADMV1014 is not set +# CONFIG_ADMV4420 is not set +# CONFIG_ADRF6780 is not set # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL @@ -5065,8 +5962,10 @@ CONFIG_HID_SENSOR_GYRO_3D=m # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set @@ -5083,6 +5982,9 @@ CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set +# CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set @@ -5091,6 +5993,7 @@ CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set # CONFIG_IIO_ST_LSM6DSX is not set +# CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units # @@ -5102,29 +6005,38 @@ CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set # CONFIG_CM36651 is not set # CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m # CONFIG_JSA1212 is not set +# CONFIG_ROHM_BU27008 is not set +# CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set +# CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set # CONFIG_MAX44009 is not set # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set +# CONFIG_OPT4001 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -5134,13 +6046,16 @@ CONFIG_HID_SENSOR_PROX=m # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set # CONFIG_TSL2583 is not set +# CONFIG_TSL2591 is not set # CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -5148,6 +6063,7 @@ CONFIG_HID_SENSOR_PROX=m # # Magnetometer sensors # +# CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set # CONFIG_BMC150_MAGN_I2C is not set @@ -5160,11 +6076,14 @@ CONFIG_HID_SENSOR_MAGNETOMETER_3D=m # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_TI_TMAG5273 is not set +# CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors # # Multiplexers # +# CONFIG_IIO_MUX is not set # end of Multiplexers # @@ -5184,11 +6103,13 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # # Linear and angular position sensors # +# CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE is not set # end of Linear and angular position sensors # # Digital potentiometers # +# CONFIG_AD5110 is not set # CONFIG_AD5272 is not set # CONFIG_DS1803 is not set # CONFIG_MAX5432 is not set @@ -5199,6 +6120,7 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # CONFIG_MCP4531 is not set # CONFIG_MCP41010 is not set # CONFIG_TPL0102 is not set +# CONFIG_X9250 is not set # end of Digital potentiometers # @@ -5211,17 +6133,21 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set CONFIG_HID_SENSOR_PRESS=m # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set +# CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -5237,6 +6163,8 @@ CONFIG_HID_SENSOR_PRESS=m # # Proximity and distance sensors # +# CONFIG_HX9023S is not set +# CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set # CONFIG_MB1232 is not set @@ -5244,10 +6172,13 @@ CONFIG_HID_SENSOR_PRESS=m # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set # CONFIG_SX9310 is not set +# CONFIG_SX9324 is not set +# CONFIG_SX9360 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -5255,6 +6186,7 @@ CONFIG_HID_SENSOR_PRESS=m # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -5265,11 +6197,16 @@ CONFIG_HID_SENSOR_PRESS=m CONFIG_HID_SENSOR_TEMP=m # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set +# CONFIG_TMP117 is not set # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set +# CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set +# CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_NTB=m @@ -5277,15 +6214,17 @@ CONFIG_NTB=m # CONFIG_NTB_AMD is not set # CONFIG_NTB_IDT is not set # CONFIG_NTB_INTEL is not set +# CONFIG_NTB_EPF is not set # CONFIG_NTB_SWITCHTEC is not set # CONFIG_NTB_PINGPONG is not set # CONFIG_NTB_TOOL is not set # CONFIG_NTB_PERF is not set # CONFIG_NTB_TRANSPORT is not set -# CONFIG_VME_BUS is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_CLK is not set +# CONFIG_PWM_DWC is not set +# CONFIG_PWM_GPIO is not set CONFIG_PWM_LPSS=m CONFIG_PWM_LPSS_PCI=m CONFIG_PWM_LPSS_PLATFORM=m @@ -5304,7 +6243,14 @@ CONFIG_PWM_LPSS_PLATFORM=m # # CONFIG_GENERIC_PHY is not set # CONFIG_USB_LGM_PHY is not set +# CONFIG_PHY_CAN_TRANSCEIVER is not set + +# +# PHY drivers for Broadcom platforms +# # CONFIG_BCM_KONA_USB2_PHY is not set +# end of PHY drivers for Broadcom platforms + # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_CPCAP_USB is not set @@ -5312,36 +6258,42 @@ CONFIG_PWM_LPSS_PLATFORM=m # end of PHY Subsystem CONFIG_POWERCAP=y -CONFIG_INTEL_RAPL=y CONFIG_INTEL_RAPL_CORE=y +CONFIG_INTEL_RAPL=y +CONFIG_IDLE_INJECT=y # CONFIG_MCB is not set # # Performance monitor support # +# CONFIG_DWC_PCIE_PMU is not set +# CONFIG_CXL_PMU is not set # end of Performance monitor support CONFIG_RAS=y # CONFIG_RAS_CEC is not set +# CONFIG_AMD_ATL is not set # CONFIG_USB4 is not set # # Android # -# CONFIG_ANDROID is not set +# CONFIG_ANDROID_BINDER_IPC is not set # end of Android CONFIG_LIBNVDIMM=m CONFIG_BLK_DEV_PMEM=m -CONFIG_ND_BLK=m CONFIG_ND_CLAIM=y CONFIG_ND_BTT=m CONFIG_BTT=y CONFIG_NVDIMM_KEYS=y -CONFIG_DAX_DRIVER=y +# CONFIG_NVDIMM_SECURITY_TEST is not set CONFIG_DAX=y +# CONFIG_DEV_DAX_HMEM is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_LAYOUTS is not set +# CONFIG_NVMEM_RMEM is not set # # HW tracing support @@ -5352,12 +6304,14 @@ CONFIG_NVMEM_SYSFS=y # CONFIG_FPGA is not set # CONFIG_TEE is not set -# CONFIG_UNISYS_VISORBUS is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # CONFIG_MOST is not set +# CONFIG_PECI is not set +# CONFIG_HTE is not set +CONFIG_DPLL=y # end of Device Drivers # @@ -5366,6 +6320,9 @@ CONFIG_NVMEM_SYSFS=y CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y +CONFIG_BUFFER_HEAD=y +CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=m @@ -5380,6 +6337,7 @@ CONFIG_FS_MBCACHE=m # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_SUPPORT_V4=y +CONFIG_XFS_SUPPORT_ASCII_CI=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y # CONFIG_XFS_RT is not set @@ -5392,49 +6350,50 @@ CONFIG_GFS2_FS_LOCKING_DLM=y # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set -CONFIG_FS_DAX=y +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y -# CONFIG_MANDATORY_FILE_LOCKING is not set # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y -CONFIG_PRINT_QUOTA_WARNING=y # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set # CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set # CONFIG_OVERLAY_FS_INDEX is not set # CONFIG_OVERLAY_FS_XINO_AUTO is not set # CONFIG_OVERLAY_FS_METACOPY is not set +# CONFIG_OVERLAY_FS_DEBUG is not set # # Caches # -CONFIG_FSCACHE=m +CONFIG_NETFS_SUPPORT=m +CONFIG_NETFS_STATS=y +# CONFIG_NETFS_DEBUG is not set +CONFIG_FSCACHE=y CONFIG_FSCACHE_STATS=y -# CONFIG_FSCACHE_HISTOGRAM is not set -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set CONFIG_CACHEFILES=m # CONFIG_CACHEFILES_DEBUG is not set -# CONFIG_CACHEFILES_HISTOGRAM is not set +# CONFIG_CACHEFILES_ERROR_INJECTION is not set +# CONFIG_CACHEFILES_ONDEMAND is not set # end of Caches # @@ -5458,6 +6417,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="ascii" # CONFIG_VFAT_NO_CREATE_WITH_LONGNAMES is not set # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_EXFAT_FS is not set +# CONFIG_NTFS3_FS is not set # CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems @@ -5478,11 +6438,15 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y # CONFIG_TMPFS_INODE64 is not set +# CONFIG_TMPFS_QUOTA is not set CONFIG_HUGETLBFS=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_HUGETLB_PMD_PAGE_TABLE_SHARING=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=m # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y @@ -5508,19 +6472,17 @@ CONFIG_MISC_FILESYSTEMS=y # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y -CONFIG_PSTORE_DEFLATE_COMPRESS=y -# CONFIG_PSTORE_LZO_COMPRESS is not set -# CONFIG_PSTORE_LZ4_COMPRESS is not set -# CONFIG_PSTORE_LZ4HC_COMPRESS is not set -# CONFIG_PSTORE_842_COMPRESS is not set -# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 CONFIG_PSTORE_COMPRESS=y -CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y -CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_CONSOLE is not set # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_FTRACE is not set CONFIG_PSTORE_RAM=m +CONFIG_PSTORE_ZONE=m +CONFIG_PSTORE_BLK=m +CONFIG_PSTORE_BLK_BLKDEV="" +CONFIG_PSTORE_BLK_KMSG_SIZE=64 +CONFIG_PSTORE_BLK_MAX_REASON=2 # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5547,8 +6509,7 @@ CONFIG_NFS_USE_KERNEL_DNS=y # CONFIG_NFS_DISABLE_UDP_SUPPORT is not set # CONFIG_NFS_V4_2_READ_PLUS is not set CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y +# CONFIG_NFSD_V2 is not set CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y @@ -5557,17 +6518,21 @@ CONFIG_NFSD_SCSILAYOUT=y # CONFIG_NFSD_FLEXFILELAYOUT is not set # CONFIG_NFSD_V4_2_INTER_SSC is not set # CONFIG_NFSD_V4_SECURITY_LABEL is not set +CONFIG_NFSD_LEGACY_CLIENT_TRACKING=y CONFIG_GRACE_PERIOD=m CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=m CONFIG_NFS_COMMON=y +# CONFIG_NFS_LOCALIO is not set +CONFIG_NFS_V4_2_SSC_HELPER=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m CONFIG_SUNRPC_BACKCHANNEL=y -CONFIG_SUNRPC_XPRT_RDMA=m CONFIG_RPCSEC_GSS_KRB5=m -# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set +CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA1=y +# CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA is not set +# CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2 is not set # CONFIG_SUNRPC_DEBUG is not set CONFIG_CEPH_FS=m # CONFIG_CEPH_FSCACHE is not set @@ -5576,7 +6541,6 @@ CONFIG_CEPH_FS_POSIX_ACL=y CONFIG_CIFS=m # CONFIG_CIFS_STATS2 is not set CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -CONFIG_CIFS_WEAK_PW_HASH=y CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y @@ -5584,7 +6548,13 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DEBUG2 is not set # CONFIG_CIFS_DEBUG_DUMP_KEYS is not set CONFIG_CIFS_DFS_UPCALL=y +# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_FSCACHE is not set +# CONFIG_CIFS_COMPRESSION is not set +CONFIG_SMB_SERVER=m +CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y +# CONFIG_SMB_SERVER_KERBEROS5 is not set +CONFIG_SMBFS=m # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_NLS=y @@ -5638,6 +6608,7 @@ CONFIG_NLS_KOI8_U=m # CONFIG_NLS_MAC_ROMANIAN is not set # CONFIG_NLS_MAC_TURKISH is not set CONFIG_NLS_UTF8=m +CONFIG_NLS_UCS2_UTILS=m CONFIG_DLM=m CONFIG_DLM_DEBUG=y # CONFIG_UNICODE is not set @@ -5651,45 +6622,90 @@ CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set CONFIG_TRUSTED_KEYS=m +CONFIG_HAVE_TRUSTED_KEYS=y +CONFIG_TRUSTED_KEYS_TPM=y CONFIG_ENCRYPTED_KEYS=y +# CONFIG_USER_DECRYPTED_DATA is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_PROC_MEM_ALWAYS_FORCE=y +# CONFIG_PROC_MEM_FORCE_PTRACE is not set +# CONFIG_PROC_MEM_NO_FORCE is not set CONFIG_SECURITY=y -CONFIG_SECURITY_WRITABLE_HOOKS=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y -CONFIG_PAGE_TABLE_ISOLATION=y # CONFIG_SECURITY_INFINIBAND is not set CONFIG_SECURITY_NETWORK_XFRM=y CONFIG_SECURITY_PATH=y CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=65536 -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y CONFIG_HARDENED_USERCOPY=y -CONFIG_HARDENED_USERCOPY_FALLBACK=y -# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set CONFIG_FORTIFY_SOURCE=y # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y -CONFIG_SECURITY_SELINUX_DISABLE=y CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y -CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0 CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +# CONFIG_SECURITY_SELINUX_DEBUG is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y +# CONFIG_SECURITY_APPARMOR_DEBUG is not set +CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y +CONFIG_SECURITY_APPARMOR_HASH=y +CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y +CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y +CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y # CONFIG_SECURITY_LOADPIN is not set CONFIG_SECURITY_YAMA=y # CONFIG_SECURITY_SAFESETID is not set -CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y CONFIG_SECURITY_LOCKDOWN_LSM=y +CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y +CONFIG_LOCK_DOWN_KERNEL_FORCE_NONE=y +# CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY is not set +# CONFIG_LOCK_DOWN_KERNEL_FORCE_CONFIDENTIALITY is not set +# CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT is not set +CONFIG_SECURITY_LANDLOCK=y +# CONFIG_SECURITY_IPE is not set CONFIG_INTEGRITY=y +CONFIG_INTEGRITY_SIGNATURE=y +CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y +# CONFIG_INTEGRITY_TRUSTED_KEYRING is not set +CONFIG_INTEGRITY_PLATFORM_KEYRING=y +CONFIG_INTEGRITY_MACHINE_KEYRING=y +# CONFIG_INTEGRITY_CA_MACHINE_KEYRING is not set +CONFIG_LOAD_UEFI_KEYS=y CONFIG_INTEGRITY_AUDIT=y -# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set +CONFIG_IMA=y +# CONFIG_IMA_KEXEC is not set +CONFIG_IMA_MEASURE_PCR_IDX=10 +CONFIG_IMA_LSM_RULES=y +# CONFIG_IMA_NG_TEMPLATE is not set +CONFIG_IMA_SIG_TEMPLATE=y +CONFIG_IMA_DEFAULT_TEMPLATE="ima-sig" +# CONFIG_IMA_DEFAULT_HASH_SHA1 is not set +CONFIG_IMA_DEFAULT_HASH_SHA256=y +# CONFIG_IMA_DEFAULT_HASH_SHA512 is not set +CONFIG_IMA_DEFAULT_HASH="sha256" +# CONFIG_IMA_WRITE_POLICY is not set +# CONFIG_IMA_READ_POLICY is not set +CONFIG_IMA_APPRAISE=y +CONFIG_IMA_ARCH_POLICY=y +# CONFIG_IMA_APPRAISE_BUILD_POLICY is not set +CONFIG_IMA_APPRAISE_BOOTPARAM=y +# CONFIG_IMA_APPRAISE_MODSIG is not set +# CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY is not set +CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y +CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y +CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT=y +# CONFIG_IMA_DISABLE_HTABLE is not set +CONFIG_EVM=y +CONFIG_EVM_ATTR_FSUUID=y +# CONFIG_EVM_ADD_XATTRS is not set CONFIG_DEFAULT_SECURITY_SELINUX=y +# CONFIG_DEFAULT_SECURITY_APPARMOR is not set # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor,bpf" @@ -5704,6 +6720,15 @@ CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization + +# +# Hardening of kernel data structures +# +CONFIG_LIST_HARDENED=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Hardening of kernel data structures + +CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options @@ -5719,10 +6744,14 @@ CONFIG_CRYPTO=y # Crypto core or helper # CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_FIPS_NAME="Linux Kernel Cryptographic API" +# CONFIG_CRYPTO_FIPS_CUSTOM_VERSION is not set CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG=y +CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y @@ -5733,14 +6762,13 @@ CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_KPP=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=m # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set # CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set -CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=m @@ -5748,127 +6776,102 @@ CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_GLUE_HELPER_X86=y +# end of Crypto core or helper # # Public-key cryptography # CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_DH=m -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m +# CONFIG_CRYPTO_DH_RFC7919_GROUPS is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set -CONFIG_CRYPTO_CURVE25519_X86=m +# end of Public-key cryptography # -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_CHACHA20POLY1305=m -# CONFIG_CRYPTO_AEGIS128 is not set -# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CFB=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -# CONFIG_CRYPTO_OFB is not set -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set -# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=m - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_VMAC=m - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32C_INTEL=m -CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_CRC32_PCLMUL=m -# CONFIG_CRYPTO_XXHASH is not set -# CONFIG_CRYPTO_BLAKE2B is not set -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_BLAKE2S_X86=m -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m -CONFIG_CRYPTO_GHASH=y -CONFIG_CRYPTO_POLY1305=m -CONFIG_CRYPTO_POLY1305_X86_64=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_SSSE3=y -CONFIG_CRYPTO_SHA256_SSSE3=y -CONFIG_CRYPTO_SHA512_SSSE3=m -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -# CONFIG_CRYPTO_SM3 is not set -# CONFIG_CRYPTO_STREEBOG is not set -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m - -# -# Ciphers +# Block ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set -CONFIG_CRYPTO_AES_NI_INTEL=y +# CONFIG_CRYPTO_ARIA is not set CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH_COMMON=m -# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set CONFIG_CRYPTO_CAMELLIA=m -# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set CONFIG_CRYPTO_CAST_COMMON=m CONFIG_CRYPTO_CAST5=m -# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set CONFIG_CRYPTO_CAST6=m -# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_DES3_EDE_X86_64=m CONFIG_CRYPTO_FCRYPT=m -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -CONFIG_CRYPTO_CHACHA20_X86_64=m CONFIG_CRYPTO_SERPENT=m -# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_TWOFISH_COMMON=m -# CONFIG_CRYPTO_TWOFISH_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set -# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +# CONFIG_CRYPTO_ADIANTUM is not set +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_HCTR2 is not set +# CONFIG_CRYPTO_KEYWRAP is not set +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_GENIV=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m +CONFIG_CRYPTO_ESSIV=m +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +# CONFIG_CRYPTO_BLAKE2B is not set +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_POLY1305=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=y +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +# CONFIG_CRYPTO_XXHASH is not set +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +# end of CRCs (cyclic redundancy checks) # # Compression @@ -5879,9 +6882,10 @@ CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set # CONFIG_CRYPTO_ZSTD is not set +# end of Compression # -# Random Number Generation +# Random number generation # CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_DRBG_MENU=y @@ -5890,6 +6894,19 @@ CONFIG_CRYPTO_DRBG_HASH=y CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_JITTERENTROPY_MEMSIZE_2=y +# CONFIG_CRYPTO_JITTERENTROPY_MEMSIZE_128 is not set +# CONFIG_CRYPTO_JITTERENTROPY_MEMSIZE_1024 is not set +# CONFIG_CRYPTO_JITTERENTROPY_MEMSIZE_8192 is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=3 +# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +# end of Random number generation + +# +# Userspace interface +# CONFIG_CRYPTO_USER_API=y # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set @@ -5897,30 +6914,50 @@ CONFIG_CRYPTO_USER_API_RNG=y # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set CONFIG_CRYPTO_USER_API_AEAD=y # CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set -# CONFIG_CRYPTO_STATS is not set +# end of Userspace interface + CONFIG_CRYPTO_HASH_INFO=y # -# Crypto library routines +# Accelerated Cryptographic Algorithms for CPU (x86) # -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_CURVE25519_X86=m +CONFIG_CRYPTO_AES_NI_INTEL=y +# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set +CONFIG_CRYPTO_DES3_EDE_X86_64=m +# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set +# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set +# CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64 is not set +CONFIG_CRYPTO_CHACHA20_X86_64=m +# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set +# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set +# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set +CONFIG_CRYPTO_BLAKE2S_X86=y +# CONFIG_CRYPTO_POLYVAL_CLMUL_NI is not set +CONFIG_CRYPTO_POLY1305_X86_64=m +CONFIG_CRYPTO_SHA1_SSSE3=y +CONFIG_CRYPTO_SHA256_SSSE3=y +CONFIG_CRYPTO_SHA512_SSSE3=m +# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set +CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m +CONFIG_CRYPTO_CRC32C_INTEL=m +CONFIG_CRYPTO_CRC32_PCLMUL=m +CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m +# end of Accelerated Cryptographic Algorithms for CPU (x86) + CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_PADLOCK is not set # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set @@ -5931,25 +6968,44 @@ CONFIG_CRYPTO_DEV_SP_CCP=y CONFIG_CRYPTO_DEV_CCP_CRYPTO=m CONFIG_CRYPTO_DEV_SP_PSP=y # CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set +CONFIG_CRYPTO_DEV_NITROX=m +CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m # CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set +# CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set -CONFIG_CRYPTO_DEV_NITROX=m -CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m +# CONFIG_CRYPTO_DEV_IAA_CRYPTO is not set # CONFIG_CRYPTO_DEV_VIRTIO is not set # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -# CONFIG_ASYMMETRIC_TPM_KEY_SUBTYPE is not set CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set CONFIG_SIGNED_PE_FILE_VERIFICATION=y +# CONFIG_FIPS_SIGNATURE_SELFTEST is not set + +# +# Certificates for signature checking +# +CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" +CONFIG_MODULE_SIG_KEY_TYPE_RSA=y +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="/build/linux-rt-2gqpIp/linux-rt-6.12.18/debian/certs/debian-uefi-certs.pem" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_SECONDARY_TRUSTED_KEYRING=y +# CONFIG_SECONDARY_TRUSTED_KEYRING_SIGNED_BY_BUILTIN is not set +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" +# CONFIG_SYSTEM_REVOCATION_LIST is not set +# CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE is not set +# end of Certificates for signature checking CONFIG_BINARY_PRINTF=y @@ -5963,18 +7019,43 @@ CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y -CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_AESCFB=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 +CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y +CONFIG_CRC64_ROCKSOFT=y CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set @@ -5982,7 +7063,7 @@ CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set +CONFIG_CRC64=y # CONFIG_CRC4 is not set CONFIG_CRC7=m CONFIG_LIBCRC32C=m @@ -5994,14 +7075,18 @@ CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y +# CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y @@ -6015,24 +7100,31 @@ CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=m CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y +CONFIG_BCH=m CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m CONFIG_BTREE=y CONFIG_INTERVAL_TREE=y +CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y +CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y +# CONFIG_SWIOTLB_DYNAMIC is not set +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_COHERENT_POOL=y # CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPU_RMAP=y @@ -6044,12 +7136,15 @@ CONFIG_LRU_CACHE=m CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y +CONFIG_SIGNATURE=y CONFIG_DIMLIB=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT=y +CONFIG_VDSO_GETRANDOM=y CONFIG_FONT_SUPPORT=y # CONFIG_FONTS is not set CONFIG_FONT_8x8=y @@ -6057,13 +7152,20 @@ CONFIG_FONT_8x16=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_MEMREGION=y +CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set +# CONFIG_LWQ_TEST is not set # end of Library routines +CONFIG_PLDMFW=y +CONFIG_ASN1_ENCODER=m +CONFIG_FIRMWARE_TABLE=y + # # Kernel hacking # @@ -6073,6 +7175,7 @@ CONFIG_SBITMAP=y # CONFIG_PRINTK_TIME=y # CONFIG_PRINTK_CALLER is not set +# CONFIG_STACKTRACE_BUILD_ID is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 @@ -6083,25 +7186,34 @@ CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_MISC is not set + # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -# CONFIG_DEBUG_INFO_COMPRESSED is not set -# CONFIG_DEBUG_INFO_SPLIT is not set +CONFIG_AS_HAS_NON_CONST_ULEB128=y +# CONFIG_DEBUG_INFO_NONE is not set +# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set CONFIG_DEBUG_INFO_DWARF4=y +# CONFIG_DEBUG_INFO_DWARF5 is not set +# CONFIG_DEBUG_INFO_REDUCED is not set +CONFIG_DEBUG_INFO_COMPRESSED_NONE=y +# CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set +# CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_BTF is not set +CONFIG_PAHOLE_HAS_SPLIT_BTF=y # CONFIG_GDB_SCRIPTS is not set -CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_STRIP_ASM_SYMS=y # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y -# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_32B is not set -CONFIG_STACK_VALIDATION=y +# CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B is not set +CONFIG_OBJTOOL=y +# CONFIG_VMLINUX_MAP is not set # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options @@ -6118,19 +7230,26 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y # end of Generic Kernel Debugging Instruments -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_MISC is not set +# +# Networking Debugging +# +# CONFIG_NET_DEV_REFCNT_TRACKER is not set +# CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set +# end of Networking Debugging # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set @@ -6139,11 +7258,11 @@ CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SHRINKER_DEBUG is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y @@ -6153,11 +7272,17 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y +# CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +CONFIG_HAVE_ARCH_KMSAN=y # end of Memory Debugging # CONFIG_DEBUG_SHIRQ is not set @@ -6171,17 +7296,20 @@ CONFIG_PANIC_TIMEOUT=0 CONFIG_LOCKUP_DETECTOR=y CONFIG_SOFTLOCKUP_DETECTOR=y # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_HARDLOCKUP_DETECTOR_PERF=y -CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y +CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_HARDLOCKUP_DETECTOR_PREFER_BUDDY is not set +CONFIG_HARDLOCKUP_DETECTOR_PERF=y +# CONFIG_HARDLOCKUP_DETECTOR_BUDDY is not set +# CONFIG_HARDLOCKUP_DETECTOR_ARCH is not set +CONFIG_HARDLOCKUP_DETECTOR_COUNTS_HRTIMER=y +CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y -CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 # CONFIG_WQ_WATCHDOG is not set +# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs @@ -6193,7 +7321,6 @@ CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set # CONFIG_DEBUG_PREEMPT is not set # @@ -6204,17 +7331,18 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_RWSEMS is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_DEBUG_ATOMIC_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set # CONFIG_SCF_TORTURE_TEST is not set # CONFIG_CSD_LOCK_WAIT_DEBUG is not set # end of Lock Debugging (spinlocks, mutexes, etc...) +# CONFIG_NMI_CHECK_CPU is not set +# CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set @@ -6226,11 +7354,9 @@ CONFIG_DEBUG_LIST=y # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_DEBUG_MAPLE_TREE is not set # end of Debug kernel data structures -# CONFIG_DEBUG_CREDENTIALS is not set - # # RCU Debugging # @@ -6238,25 +7364,35 @@ CONFIG_DEBUG_LIST=y # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y +CONFIG_HAVE_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y +CONFIG_HAVE_OBJTOOL_MCOUNT=y +CONFIG_HAVE_OBJTOOL_NOP_MCOUNT=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y +CONFIG_BUILDTIME_MCOUNT_SORT=y +CONFIG_TRACER_MAX_TRACE=y CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y @@ -6268,15 +7404,20 @@ CONFIG_FTRACE=y # CONFIG_BOOTTIME_TRACING is not set CONFIG_FUNCTION_TRACER=y CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_FUNCTION_GRAPH_RETVAL is not set CONFIG_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_DYNAMIC_FTRACE_WITH_ARGS=y +# CONFIG_FPROBE is not set # CONFIG_FUNCTION_PROFILER is not set CONFIG_STACK_TRACER=y # CONFIG_IRQSOFF_TRACER is not set # CONFIG_PREEMPT_TRACER is not set # CONFIG_SCHED_TRACER is not set CONFIG_HWLAT_TRACER=y +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set # CONFIG_MMIOTRACE is not set CONFIG_FTRACE_SYSCALLS=y # CONFIG_TRACER_SNAPSHOT is not set @@ -6288,28 +7429,35 @@ CONFIG_BPF_EVENTS=y CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y CONFIG_FTRACE_MCOUNT_RECORD=y +CONFIG_FTRACE_MCOUNT_USE_CC=y CONFIG_TRACING_MAP=y CONFIG_SYNTH_EVENTS=y +# CONFIG_USER_EVENTS is not set CONFIG_HIST_TRIGGERS=y # CONFIG_TRACE_EVENT_INJECT is not set # CONFIG_TRACEPOINT_BENCHMARK is not set # CONFIG_RING_BUFFER_BENCHMARK is not set # CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_RECORD_RECURSION is not set +# CONFIG_FTRACE_VALIDATE_RCU_IS_WATCHING is not set # CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_FTRACE_SORT_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set # CONFIG_PREEMPTIRQ_DELAY_TEST is not set # CONFIG_SYNTH_EVENT_GEN_TEST is not set # CONFIG_HIST_TRIGGERS_DEBUG is not set +# CONFIG_RV is not set CONFIG_PROVIDE_OHCI1394_DMA_INIT=y # CONFIG_SAMPLES is not set +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # CONFIG_STRICT_DEVMEM is not set # # x86 Debugging # -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_EARLY_PRINTK_USB=y # CONFIG_X86_VERBOSE_BOOTUP is not set CONFIG_EARLY_PRINTK=y @@ -6331,7 +7479,6 @@ CONFIG_DEBUG_BOOT_PARAMS=y # CONFIG_PUNIT_ATOM_DEBUG is not set CONFIG_UNWINDER_ORC=y # CONFIG_UNWINDER_FRAME_POINTER is not set -# CONFIG_UNWINDER_GUESS is not set # end of x86 Debugging # @@ -6344,11 +7491,13 @@ CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_TEST_DHRY is not set # CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set # CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_SORT is not set +# CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set @@ -6356,21 +7505,18 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set -# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_MAPLE_TREE is not set # CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set # CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set @@ -6378,30 +7524,20 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set # CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_LIVEPATCH is not set -# CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set # CONFIG_TEST_FPU is not set +# CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set +# CONFIG_TEST_OBJPOOL is not set +CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking # end of Kernel hacking - -## -## file: init/Kconfig -## -CONFIG_MODULE_SIG_ALL=y -# CONFIG_MODULE_SIG_FORCE is not set - -## -## file: certs/Kconfig -## -CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" - -# -# Upgrade to 5.10.99 -# -CONFIG_BPF_UNPRIV_DEFAULT_OFF=y -# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set diff --git a/kernel-std/debian/deb_patches/0013-Correct-the-patches-for-the-linux-kernel-6.12.x.patch b/kernel-std/debian/deb_patches/0013-Correct-the-patches-for-the-linux-kernel-6.12.x.patch new file mode 100644 index 00000000..2aa6b718 --- /dev/null +++ b/kernel-std/debian/deb_patches/0013-Correct-the-patches-for-the-linux-kernel-6.12.x.patch @@ -0,0 +1,479 @@ +From bc68f1325d88d333af7953908536957ac1851601 Mon Sep 17 00:00:00 2001 +From: Jiping Ma +Date: Sun, 16 Mar 2025 10:41:37 +0000 +Subject: [PATCH 13/19] Correct the patches for the linux kernel 6.12.x + +Signed-off-by: Jiping Ma +--- + ...-module.lds-under-arch-directory-too.patch | 29 +++--- + debian/patches/debian/kernelvariables.patch | 4 +- + ...support-asciidoctor-for-documentatio.patch | 3 +- + debian/patches/debian/version.patch | 95 ++++++------------- + ...ecure_boot-flag-to-indicate-secure-b.patch | 12 +-- + ...e-kernel-if-booted-in-secure-boot-mo.patch | 71 ++++++-------- + 6 files changed, 84 insertions(+), 130 deletions(-) + +diff --git a/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch b/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch +index eea69e4558..9f550a1cfa 100644 +--- a/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch ++++ b/debian/patches/debian/kbuild-look-for-module.lds-under-arch-directory-too.patch +@@ -22,31 +22,32 @@ Therefore, we move module.lds under the arch build directory in + rules.real and change Makefile.modfinal to look for it in both places. + + --- +-Index: linux/scripts/Makefile.modfinal +-=================================================================== +---- linux.orig/scripts/Makefile.modfinal +-+++ linux/scripts/Makefile.modfinal +-@@ -29,12 +29,13 @@ quiet_cmd_cc_o_c = CC [M] $@ ++ scripts/Makefile.modfinal | 6 ++++-- ++ 1 file changed, 4 insertions(+), 2 deletions(-) ++ ++--- a/scripts/Makefile.modfinal +++++ b/scripts/Makefile.modfinal ++@@ -33,11 +33,13 @@ quiet_cmd_cc_o_c = CC [M] $@ ++ $(extmod_prefix).module-common.o: $(srctree)/scripts/module-common.c FORCE + $(call if_changed_dep,cc_o_c) + +- ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(SRCARCH)/Makefile.postlink) + +ARCH_MODULE_LDS := $(word 1,$(wildcard scripts/module.lds arch/$(SRCARCH)/module.lds)) +- +++ + quiet_cmd_ld_ko_o = LD [M] $@ +- cmd_ld_ko_o += \ ++ cmd_ld_ko_o = \ + $(LD) -r $(KBUILD_LDFLAGS) \ + $(KBUILD_LDFLAGS_MODULE) $(LDFLAGS_MODULE) \ +-- -T scripts/module.lds -o $@ $(filter %.o, $^); \ +-+ -T $(ARCH_MODULE_LDS) -o $@ $(filter %.o, $^); \ +- $(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true) ++- -T scripts/module.lds -o $@ $(filter %.o, $^) +++ -T $(ARCH_MODULE_LDS) -o $@ $(filter %.o, $^) + + quiet_cmd_btf_ko = BTF [M] $@ +-@@ -57,7 +58,7 @@ if_changed_except = $(if $(call newer_pr ++ cmd_btf_ko = \ ++@@ -57,7 +59,7 @@ if_changed_except = $(if $(call newer_pr + printf '%s\n' 'savedcmd_$@ := $(make-cmd)' > $(dot-target).cmd, @:) + + # Re-generate module BTFs if either module's .ko or vmlinux changed +--%.ko: %.o %.mod.o scripts/module.lds $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE +-+%.ko: %.o %.mod.o $(ARCH_MODULE_LDS) $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE ++-%.ko: %.o %.mod.o $(extmod_prefix).module-common.o scripts/module.lds $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE +++%.ko: %.o %.mod.o $(extmod_prefix).module-common.o $(ARCH_MODULE_LDS) $(and $(CONFIG_DEBUG_INFO_BTF_MODULES),$(KBUILD_BUILTIN),vmlinux) FORCE + +$(call if_changed_except,ld_ko_o,vmlinux) + ifdef CONFIG_DEBUG_INFO_BTF_MODULES + +$(if $(newer-prereqs),$(call cmd,btf_ko)) +diff --git a/debian/patches/debian/kernelvariables.patch b/debian/patches/debian/kernelvariables.patch +index 2196c8a435..ef427ab195 100644 +--- a/debian/patches/debian/kernelvariables.patch ++++ b/debian/patches/debian/kernelvariables.patch +@@ -17,7 +17,7 @@ use of $(ARCH) needs to be moved after this. + --- + --- a/Makefile + +++ b/Makefile +-@@ -395,36 +395,6 @@ include $(srctree)/scripts/subarch.inclu ++@@ -406,36 +406,6 @@ include $(srctree)/scripts/subarch.inclu + # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile + ARCH ?= $(SUBARCH) + +@@ -54,7 +54,7 @@ use of $(ARCH) needs to be moved after this. + KCONFIG_CONFIG ?= .config + export KCONFIG_CONFIG + +-@@ -540,6 +510,35 @@ RUSTFLAGS_KERNEL = ++@@ -551,6 +521,35 @@ RUSTFLAGS_KERNEL = + AFLAGS_KERNEL = + LDFLAGS_vmlinux = + +diff --git a/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch b/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch +index 3971218b68..a1cbb2c0bd 100644 +--- a/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch ++++ b/debian/patches/debian/perf-traceevent-support-asciidoctor-for-documentatio.patch +@@ -6,9 +6,8 @@ Forwarded: not-needed + + --- + tools/lib/perf/Documentation/Makefile | 2 +- +- tools/lib/traceevent/Documentation/Makefile | 2 +- + tools/perf/Documentation/Makefile | 2 +- +- 3 files changed, 3 insertions(+), 3 deletions(-) ++ 2 files changed, 2 insertions(+), 2 deletions(-) + + diff --git a/tools/lib/perf/Documentation/Makefile b/tools/lib/perf/Documentation/Makefile + index 972754082a85..272d06173a3e 100644 +diff --git a/debian/patches/debian/version.patch b/debian/patches/debian/version.patch +index 47fc6c0dce..7093df77ae 100644 +--- a/debian/patches/debian/version.patch ++++ b/debian/patches/debian/version.patch +@@ -7,19 +7,16 @@ For distribution binary packages we assume + $DISTRIBUTION_OFFICIAL_BUILD, $DISTRIBUTOR and $DISTRIBUTION_VERSION + are set. + --- +- Makefile | 15 ++++++++++++++- +- arch/ia64/kernel/process.c | 5 +++-- ++ Makefile | 16 +++++++++++++++- + arch/powerpc/kernel/process.c | 6 ++++-- + arch/x86/um/sysrq_64.c | 6 ++++-- + kernel/hung_task.c | 6 ++++-- +- lib/dump_stack.c | 6 ++++-- +- 6 files changed, 33 insertions(+), 11 deletions(-) ++ lib/dump_stack.c | 7 +++++-- ++ 5 files changed, 32 insertions(+), 9 deletions(-) + +-Index: linux/Makefile +-=================================================================== +---- linux.orig/Makefile +-+++ linux/Makefile +-@@ -1263,7 +1263,8 @@ PHONY += prepare archprepare ++--- a/Makefile +++++ b/Makefile ++@@ -1196,7 +1196,8 @@ PHONY += prepare archprepare + + archprepare: outputmakefile archheaders archscripts scripts include/config/kernel.release \ + asm-generic $(version_h) include/generated/utsrelease.h \ +@@ -29,7 +26,7 @@ Index: linux/Makefile + + prepare0: archprepare + $(Q)$(MAKE) $(build)=scripts/mod +-@@ -1321,6 +1322,16 @@ define filechk_version.h ++@@ -1254,6 +1255,16 @@ define filechk_version.h + echo \#define LINUX_VERSION_SUBLEVEL $(SUBLEVEL) + endef + +@@ -43,10 +40,10 @@ Index: linux/Makefile + +endef + +endif + + +- $(version_h): PATCHLEVEL := $(or $(PATCHLEVEL), 0) +- $(version_h): SUBLEVEL := $(or $(SUBLEVEL), 0) ++ $(version_h): private PATCHLEVEL := $(or $(PATCHLEVEL), 0) ++ $(version_h): private SUBLEVEL := $(or $(SUBLEVEL), 0) + $(version_h): FORCE +-@@ -1335,6 +1346,9 @@ filechk_compile.h = $(srctree)/scripts/m ++@@ -1268,6 +1279,9 @@ filechk_compile.h = $(srctree)/scripts/m + include/generated/compile.h: FORCE + $(call filechk,compile.h) + +@@ -56,34 +53,8 @@ Index: linux/Makefile + PHONY += headerdep + headerdep: + $(Q)find $(srctree)/include/ -name '*.h' | xargs --max-args 1 \ +-Index: linux/arch/ia64/kernel/process.c +-=================================================================== +---- linux.orig/arch/ia64/kernel/process.c +-+++ linux/arch/ia64/kernel/process.c +-@@ -35,6 +35,7 @@ +- #include +- #include +- #include +-+#include +- +- #include +- #include +-@@ -102,9 +103,9 @@ show_regs (struct pt_regs *regs) +- print_modules(); +- printk("\n"); +- show_regs_print_info(KERN_DEFAULT); +-- printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n", +-+ printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s%s)\n", +- regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(), +-- init_utsname()->release); +-+ init_utsname()->release, LINUX_PACKAGE_ID); +- printk("ip is at %pS\n", (void *)ip); +- printk("unat: %016lx pfs : %016lx rsc : %016lx\n", +- regs->ar_unat, regs->ar_pfs, regs->ar_rsc); +-Index: linux/arch/powerpc/kernel/process.c +-=================================================================== +---- linux.orig/arch/powerpc/kernel/process.c +-+++ linux/arch/powerpc/kernel/process.c ++--- a/arch/powerpc/kernel/process.c +++++ b/arch/powerpc/kernel/process.c + @@ -38,6 +38,7 @@ + #include + #include +@@ -92,7 +63,7 @@ Index: linux/arch/powerpc/kernel/process.c + + #include + #include +-@@ -1520,8 +1521,9 @@ static void __show_regs(struct pt_regs * ++@@ -1560,8 +1561,9 @@ static void __show_regs(struct pt_regs * + + printk("NIP: "REG" LR: "REG" CTR: "REG"\n", + regs->nip, regs->link, regs->ctr); +@@ -104,18 +75,16 @@ Index: linux/arch/powerpc/kernel/process.c + printk("MSR: "REG" ", regs->msr); + print_msr_bits(regs->msr); + pr_cont(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); +-Index: linux/arch/x86/um/sysrq_64.c +-=================================================================== +---- linux.orig/arch/x86/um/sysrq_64.c +-+++ linux/arch/x86/um/sysrq_64.c +-@@ -9,6 +9,7 @@ ++--- a/arch/x86/um/sysrq_64.c +++++ b/arch/x86/um/sysrq_64.c ++@@ -10,6 +10,7 @@ + #include + #include + #include + +#include + #include + #include +- #include ++ + @@ -17,8 +18,9 @@ void show_regs(struct pt_regs *regs) + { + printk("\n"); +@@ -128,10 +97,8 @@ Index: linux/arch/x86/um/sysrq_64.c + printk(KERN_INFO "RIP: %04lx:%pS\n", PT_REGS_CS(regs) & 0xffff, + (void *)PT_REGS_IP(regs)); + printk(KERN_INFO "RSP: %016lx EFLAGS: %08lx\n", PT_REGS_SP(regs), +-Index: linux/kernel/hung_task.c +-=================================================================== +---- linux.orig/kernel/hung_task.c +-+++ linux/kernel/hung_task.c ++--- a/kernel/hung_task.c +++++ b/kernel/hung_task.c + @@ -24,6 +24,7 @@ + #include + +@@ -140,7 +107,7 @@ Index: linux/kernel/hung_task.c + + /* + * The number of tasks checked: +-@@ -131,10 +132,11 @@ static void check_hung_task(struct task_ ++@@ -132,10 +133,11 @@ static void check_hung_task(struct task_ + sysctl_hung_task_warnings--; + pr_err("INFO: task %s:%d blocked for more than %ld seconds.\n", + t->comm, t->pid, (jiffies - t->last_switch_time) / HZ); +@@ -154,10 +121,8 @@ Index: linux/kernel/hung_task.c + pr_err("\"echo 0 > /proc/sys/kernel/hung_task_timeout_secs\"" + " disables this message.\n"); + sched_show_task(t); +-Index: linux/lib/dump_stack.c +-=================================================================== +---- linux.orig/lib/dump_stack.c +-+++ linux/lib/dump_stack.c ++--- a/lib/dump_stack.c +++++ b/lib/dump_stack.c + @@ -14,6 +14,7 @@ + #include + #include +@@ -166,14 +131,16 @@ Index: linux/lib/dump_stack.c + + static char dump_stack_arch_desc_str[128]; + +-@@ -54,13 +55,15 @@ void __init dump_stack_set_arch_desc(con ++@@ -54,7 +55,7 @@ void __init dump_stack_set_arch_desc(con + */ + void dump_stack_print_info(const char *log_lvl) + { +-- printk("%sCPU: %d PID: %d Comm: %.20s %s%s %s %.*s" BUILD_ID_FMT "\n", +-+ printk("%sCPU: %d PID: %d Comm: %.20s %s%s %s %.*s %s" BUILD_ID_FMT "\n", +- log_lvl, raw_smp_processor_id(), current->pid, current->comm, +- kexec_crash_loaded() ? "Kdump: loaded " : "", ++- printk("%sCPU: %d UID: %u PID: %d Comm: %.20s %s%s %s %.*s" BUILD_ID_FMT "\n", +++ printk("%sCPU: %d UID: %u PID: %d Comm: %.20s %s%s %s %.*s %s" BUILD_ID_FMT "\n", ++ log_lvl, raw_smp_processor_id(), ++ __kuid_val(current_real_cred()->euid), ++ current->pid, current->comm, ++@@ -62,7 +63,9 @@ void dump_stack_print_info(const char *l + print_tainted(), + init_utsname()->release, + (int)strcspn(init_utsname()->version, " "), +@@ -182,5 +149,5 @@ Index: linux/lib/dump_stack.c + + LINUX_PACKAGE_ID, + + BUILD_ID_VAL); + +- if (dump_stack_arch_desc_str[0] != '\0') +- printk("%sHardware name: %s\n", ++ if (get_taint()) ++ printk("%s%s\n", log_lvl, print_tainted_verbose()); +diff --git a/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch b/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch +index 6a8940da52..822beab21c 100644 +--- a/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch ++++ b/debian/patches/features/all/lockdown/efi-add-an-efi_secure_boot-flag-to-indicate-secure-b.patch +@@ -31,7 +31,7 @@ cc: linux-efi@vger.kernel.org + + --- a/arch/x86/kernel/setup.c + +++ b/arch/x86/kernel/setup.c +-@@ -1205,19 +1205,7 @@ void __init setup_arch(char **cmdline_p) ++@@ -1193,19 +1193,7 @@ void __init setup_arch(char **cmdline_p) + /* Allocate bigger log buffer */ + setup_log_buf(1); + +@@ -54,7 +54,7 @@ cc: linux-efi@vger.kernel.org + + --- a/drivers/firmware/efi/Makefile + +++ b/drivers/firmware/efi/Makefile +-@@ -27,6 +27,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_m ++@@ -25,6 +25,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_m + obj-$(CONFIG_EFI_BOOTLOADER_CONTROL) += efibc.o + obj-$(CONFIG_EFI_TEST) += test/ + obj-$(CONFIG_EFI_DEV_PATH_PARSER) += dev-path-parser.o +@@ -106,7 +106,7 @@ cc: linux-efi@vger.kernel.org + +} + --- a/include/linux/efi.h + +++ b/include/linux/efi.h +-@@ -849,6 +849,14 @@ extern int __init efi_setup_pcdp_console ++@@ -871,6 +871,14 @@ extern int __init efi_setup_pcdp_console + #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ + #define EFI_MEM_NO_SOFT_RESERVE 11 /* Is the kernel configured to ignore soft reservations? */ + #define EFI_PRESERVE_BS_REGIONS 12 /* Are EFI boot-services memory segments available? */ +@@ -121,7 +121,7 @@ cc: linux-efi@vger.kernel.org + + #ifdef CONFIG_EFI + /* +-@@ -873,6 +881,7 @@ static inline bool efi_rt_services_suppo ++@@ -895,6 +903,7 @@ static inline bool efi_rt_services_suppo + return (efi.runtime_supported_mask & mask) == mask; + } + extern void efi_find_mirror(void); +@@ -129,7 +129,7 @@ cc: linux-efi@vger.kernel.org + #else + static inline bool efi_enabled(int feature) + { +-@@ -892,6 +901,7 @@ static inline bool efi_rt_services_suppo ++@@ -914,6 +923,7 @@ static inline bool efi_rt_services_suppo + } + + static inline void efi_find_mirror(void) {} +@@ -137,7 +137,7 @@ cc: linux-efi@vger.kernel.org + #endif + + extern int efi_status_to_err(efi_status_t status); +-@@ -1107,13 +1117,6 @@ static inline bool efi_runtime_disabled( ++@@ -1133,13 +1143,6 @@ static inline bool efi_runtime_disabled( + extern void efi_call_virt_check_flags(unsigned long flags, const void *caller); + extern unsigned long efi_call_virt_save_flags(void); + +diff --git a/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch b/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch +index 0ab4db9957..6fff3f8967 100644 +--- a/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch ++++ b/debian/patches/features/all/lockdown/efi-lock-down-the-kernel-if-booted-in-secure-boot-mo.patch +@@ -13,22 +13,20 @@ description: + + Signed-off-by: Ben Hutchings + [Salvatore Bonaccorso: After fixing https://bugs.debian.org/956197 the +-help text for LOCK_DOWN_IN_EFI_SECURE_BOOT needs to be adjusted to +-mention that lockdown is triggered in integrity mode] ++help text for LOCK_DOWN_IN_EFI_SECURE_BOOT was adjusted to mention that ++lockdown is triggered in integrity mode (https://bugs.debian.org/1025417)] + Signed-off-by: Salvatore Bonaccorso + --- +- arch/x86/kernel/setup.c | 4 ++-- +- drivers/firmware/efi/secureboot.c | 5 +++++ +- include/linux/security.h | 6 ++++++ +- security/lockdown/Kconfig | 15 +++++++++++++++ +- security/lockdown/lockdown.c | 2 +- +- 5 files changed, 29 insertions(+), 3 deletions(-) ++ arch/x86/kernel/setup.c | 4 ++-- ++ drivers/firmware/efi/secureboot.c | 3 +++ ++ include/linux/security.h | 6 ++++++ ++ security/lockdown/Kconfig | 15 +++++++++++++++ ++ security/lockdown/lockdown.c | 2 +- ++ 5 files changed, 27 insertions(+), 3 deletions(-) + +-Index: debian-kernel/arch/x86/kernel/setup.c +-=================================================================== +---- debian-kernel.orig/arch/x86/kernel/setup.c +-+++ debian-kernel/arch/x86/kernel/setup.c +-@@ -1028,6 +1028,8 @@ void __init setup_arch(char **cmdline_p) ++--- a/arch/x86/kernel/setup.c +++++ b/arch/x86/kernel/setup.c ++@@ -904,6 +904,8 @@ void __init setup_arch(char **cmdline_p) + if (efi_enabled(EFI_BOOT)) + efi_init(); + +@@ -37,7 +35,7 @@ Index: debian-kernel/arch/x86/kernel/setup.c + reserve_ibft_region(); + x86_init.resources.dmi_setup(); + +-@@ -1190,8 +1192,6 @@ void __init setup_arch(char **cmdline_p) ++@@ -1070,8 +1072,6 @@ void __init setup_arch(char **cmdline_p) + /* Allocate bigger log buffer */ + setup_log_buf(1); + +@@ -46,10 +44,8 @@ Index: debian-kernel/arch/x86/kernel/setup.c + reserve_initrd(); + + acpi_table_upgrade(); +-Index: debian-kernel/drivers/firmware/efi/secureboot.c +-=================================================================== +---- debian-kernel.orig/drivers/firmware/efi/secureboot.c +-+++ debian-kernel/drivers/firmware/efi/secureboot.c ++--- a/drivers/firmware/efi/secureboot.c +++++ b/drivers/firmware/efi/secureboot.c + @@ -15,6 +15,7 @@ + #include + #include +@@ -69,19 +65,17 @@ Index: debian-kernel/drivers/firmware/efi/secureboot.c + pr_info("Secure boot enabled\n"); + break; + default: +-Index: debian-kernel/include/linux/security.h +-=================================================================== +---- debian-kernel.orig/include/linux/security.h +-+++ debian-kernel/include/linux/security.h +-@@ -486,6 +486,7 @@ int security_inode_notifysecctx(struct inode *inode, void *ctx, u32 ctxlen); ++--- a/include/linux/security.h +++++ b/include/linux/security.h ++@@ -522,6 +522,7 @@ int security_inode_notifysecctx(struct i + int security_inode_setsecctx(struct dentry *dentry, void *ctx, u32 ctxlen); + int security_inode_getsecctx(struct inode *inode, void **ctx, u32 *ctxlen); + int security_locked_down(enum lockdown_reason what); + +int lock_kernel_down(const char *where, enum lockdown_reason level); +- #else /* CONFIG_SECURITY */ +- +- static inline int call_blocking_lsm_notifier(enum lsm_event event, void *data) +-@@ -1404,6 +1405,11 @@ static inline int security_locked_down(enum lockdown_reason what) ++ int lsm_fill_user_ctx(struct lsm_ctx __user *uctx, u32 *uctx_len, ++ void *val, size_t val_len, u64 id, u64 flags); ++ int security_bdev_alloc(struct block_device *bdev); ++@@ -1504,6 +1505,11 @@ static inline int security_locked_down(e + { + return 0; + } +@@ -90,13 +84,11 @@ Index: debian-kernel/include/linux/security.h + +{ + + return -EOPNOTSUPP; + +} +- #endif /* CONFIG_SECURITY */ +- +- #if defined(CONFIG_SECURITY) && defined(CONFIG_WATCH_QUEUE) +-Index: debian-kernel/security/lockdown/Kconfig +-=================================================================== +---- debian-kernel.orig/security/lockdown/Kconfig +-+++ debian-kernel/security/lockdown/Kconfig ++ static inline int lsm_fill_user_ctx(struct lsm_ctx __user *uctx, ++ u32 *uctx_len, void *val, size_t val_len, ++ u64 id, u64 flags) ++--- a/security/lockdown/Kconfig +++++ b/security/lockdown/Kconfig + @@ -45,3 +45,18 @@ config LOCK_DOWN_KERNEL_FORCE_CONFIDENTI + disabled. + +@@ -116,11 +108,9 @@ Index: debian-kernel/security/lockdown/Kconfig + + + + Enabling this option results in kernel lockdown being + + triggered in integrity mode if EFI Secure Boot is set. +-Index: debian-kernel/security/lockdown/lockdown.c +-=================================================================== +---- debian-kernel.orig/security/lockdown/lockdown.c +-+++ debian-kernel/security/lockdown/lockdown.c +-@@ -23,7 +23,7 @@ static const enum lockdown_reason lockdo ++--- a/security/lockdown/lockdown.c +++++ b/security/lockdown/lockdown.c ++@@ -24,7 +24,7 @@ static const enum lockdown_reason lockdo + /* + * Put the kernel into lock-down mode. + */ +@@ -129,6 +119,3 @@ Index: debian-kernel/security/lockdown/lockdown.c + { + if (kernel_locked_down >= level) + return -EPERM; +--- +-2.43.0 +- +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0014-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch b/kernel-std/debian/deb_patches/0014-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch new file mode 100644 index 00000000..9c143c87 --- /dev/null +++ b/kernel-std/debian/deb_patches/0014-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch @@ -0,0 +1,44 @@ +From a0a2a37b2d391ca63cbb49f5b80b959617746ab1 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 5 Aug 2024 04:30:36 +0200 +Subject: [PATCH 14/19] d/rules.real: Unset KBUILD_HOSTCFLAGS etc. instead of + overriding to be empty + +The upstream Makefile tries to add some flags to KBUILD_HOSTCFLAGS, +and now fails to build anything if we override it to be empty: + + .../scripts/kconfig/util.c:11:10: fatal error: hashtable.h: No such file or directory + 11 | #include + | ^~~~~~~~~~~~~ + compilation terminated. + +Instead of overriding these flags variables to be empty, unset them in +the environment. + +(cherry picked from commit f77deecbb5d46f1f5034f348952152b0c2d584f7) +Signed-off-by: Jiping Ma +--- + debian/rules.real | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/debian/rules.real b/debian/rules.real +index f2ea3ea49b..0825bf3009 100644 +--- a/debian/rules.real ++++ b/debian/rules.real +@@ -42,10 +42,12 @@ undefine LANGUAGE + stamp = [ -d $(dir $@) ] || mkdir $(dir $@); touch $@ + + setup_env := env -u ABINAME -u ARCH -u FEATURESET -u FLAVOUR -u VERSION -u LOCALVERSION ++# XXX: All the tools leak flags between host and build all the time, just don't care. See #1050991. ++setup_env += -u KBUILD_HOSTCFLAGS -u HOSTCFLAGS -u KBUILD_HOSTLDFLAGS + setup_env += DISTRIBUTION_OFFICIAL_BUILD=1 DISTRIBUTOR="$(DISTRIBUTOR)" DISTRIBUTION_VERSION="$(SOURCEVERSION)" KBUILD_BUILD_TIMESTAMP="$(SOURCE_DATE)" KBUILD_BUILD_VERSION_TIMESTAMP="StarlingX $(DISTRIBUTOR) $(SOURCEVERSION) ($(SOURCE_DATE_UTC_ISO))" + setup_env += KBUILD_VERBOSE=$(if $(filter terse,$(DEB_BUILD_OPTIONS)),0,1) + +-MAKE_CLEAN = $(setup_env) $(MAKE) KCFLAGS=-fdebug-prefix-map=$(CURDIR)/= KBUILD_HOSTCFLAGS='$(CFLAGS) $(CPPFLAGS)' HOSTCFLAGS='$(CFLAGS) $(CPPFLAGS)' KBUILD_HOSTLDFLAGS='$(LDFLAGS)' ++MAKE_CLEAN = $(setup_env) $(MAKE) KCFLAGS=-fdebug-prefix-map=$(CURDIR)/= + MAKE_SELF := $(MAKE) -f debian/rules.real $(MAKEOVERRIDES) + MAKEOVERRIDES = + +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0015-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch b/kernel-std/debian/deb_patches/0015-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch new file mode 100644 index 00000000..efae0928 --- /dev/null +++ b/kernel-std/debian/deb_patches/0015-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch @@ -0,0 +1,31 @@ +From bf9c5008280e9df941eb712b7d037de99d57cb4f Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 5 Aug 2024 04:40:27 +0200 +Subject: [PATCH 15/19] d/rules.d/Makefile.inc: Add scripts/include to header + include path + +In 6.11 some headers used by user-space tools have been moved under +scripts/include, and the upstream Makefile now adds scripts/include to +the header include path for these tools. We need to do the same. + +(cherry picked from commit 0d0d62b7d1cc23f87e921629ca51d2989392d8fb) +Signed-off-by: Jiping Ma +--- + debian/rules.d/Makefile.inc | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/debian/rules.d/Makefile.inc b/debian/rules.d/Makefile.inc +index 55eae14f85..386217b6bd 100644 +--- a/debian/rules.d/Makefile.inc ++++ b/debian/rules.d/Makefile.inc +@@ -12,6 +12,7 @@ CFLAGS := $(shell dpkg-buildflags --get CFLAGS) -Wall + CPPFLAGS := $(shell dpkg-buildflags --get CPPFLAGS) \ + -I$(top_srcdir)/$(OUTDIR) \ + -I$(top_srcdir)/debian/build/build-tools/$(OUTDIR) \ ++ -I$(top_srcdir)/scripts/include \ + -isystem $(top_srcdir)/debian/build/build-tools/include + CXXFLAGS := $(shell dpkg-buildflags --get CXXFLAGS) -Wall + LDFLAGS := $(shell dpkg-buildflags --get LDFLAGS) +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0016-x86-linux-cpupower-Update-turbostat-Makefile-to-defi.patch b/kernel-std/debian/deb_patches/0016-x86-linux-cpupower-Update-turbostat-Makefile-to-defi.patch new file mode 100644 index 00000000..455f34b6 --- /dev/null +++ b/kernel-std/debian/deb_patches/0016-x86-linux-cpupower-Update-turbostat-Makefile-to-defi.patch @@ -0,0 +1,31 @@ +From 2ce8c8aa1aae79c02125fce21f15e22e7f3fb22a Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Sat, 6 Jul 2024 06:32:05 +0200 +Subject: [PATCH 16/19] [x86] linux-cpupower: Update turbostat Makefile to + define BUILD_BUG_HEADER + +turbostat continues to abuse headers not meant for-user-space, now +including . Define the necessary macro so it can +find that. + +(cherry picked from commit 4ad01663251dc89c2290aa29aef5917b4c9f1cb9) +Signed-off-by: Jiping Ma +--- + debian/rules.d/tools/power/x86/turbostat/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/debian/rules.d/tools/power/x86/turbostat/Makefile b/debian/rules.d/tools/power/x86/turbostat/Makefile +index eb5124d3a5..9f5275c580 100644 +--- a/debian/rules.d/tools/power/x86/turbostat/Makefile ++++ b/debian/rules.d/tools/power/x86/turbostat/Makefile +@@ -4,6 +4,6 @@ installdir = /usr/sbin + + include $(top_rulesdir)/Makefile.inc + +-CPPFLAGS += -I"$(top_srcdir)/tools/include" -DMSRHEADER='"$(top_srcdir)/arch/x86/include/asm/msr-index.h"' -DINTEL_FAMILY_HEADER='"$(top_srcdir)/arch/x86/include/asm/intel-family.h"' ++CPPFLAGS += -I"$(top_srcdir)/tools/include" -DMSRHEADER='"$(top_srcdir)/arch/x86/include/asm/msr-index.h"' -DINTEL_FAMILY_HEADER='"$(top_srcdir)/arch/x86/include/asm/intel-family.h"' -DBUILD_BUG_HEADER='"$(top_srcdir)/include/linux/build_bug.h"' + + LDLIBS += -lcap -lrt +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0017-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch b/kernel-std/debian/deb_patches/0017-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch new file mode 100644 index 00000000..6a012da3 --- /dev/null +++ b/kernel-std/debian/deb_patches/0017-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch @@ -0,0 +1,252 @@ +From 9f262b353d0461abc9e42fa70d3e4329d66df3f7 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Sat, 6 Jul 2024 06:28:03 +0200 +Subject: [PATCH 17/19] hyperv-daemons: Update for upstream removal of + hv_fcopy_daemon + +- Don't try to build it. +- Remove the init script, service file, and udev rule. +- Use dpkg-maintscript rm_conffile to remove the init script on + upgrade. +- In preinst, stop the service only if upgrading from an older + version. In postinst do nothing with it. +- Remove it from the package description. + +(cherry picked from commit fced95b415be4c1fbeec29e02a667168f00ee8e4) +Signed-off-by: Jiping Ma +--- + debian/hyperv-daemons.hv-fcopy-daemon.init | 109 ------------------ + debian/hyperv-daemons.hv-fcopy-daemon.service | 10 -- + debian/hyperv-daemons.maintscript | 1 + + debian/hyperv-daemons.postinst | 2 +- + debian/hyperv-daemons.preinst | 6 +- + debian/hyperv-daemons.udev | 1 - + debian/rules.d/tools/hv/Makefile | 1 - + debian/rules.real | 2 +- + debian/templates/tools-unversioned.control.in | 5 +- + 9 files changed, 9 insertions(+), 128 deletions(-) + delete mode 100644 debian/hyperv-daemons.hv-fcopy-daemon.init + delete mode 100644 debian/hyperv-daemons.hv-fcopy-daemon.service + +diff --git a/debian/hyperv-daemons.hv-fcopy-daemon.init b/debian/hyperv-daemons.hv-fcopy-daemon.init +deleted file mode 100644 +index 5866dc60ed..0000000000 +--- a/debian/hyperv-daemons.hv-fcopy-daemon.init ++++ /dev/null +@@ -1,109 +0,0 @@ +-#! /bin/sh +-### BEGIN INIT INFO +-# Provides: hv-fcopy-daemon +-# Required-Start: $remote_fs $syslog +-# Required-Stop: $remote_fs $syslog +-# Default-Start: 2 3 4 5 +-# Default-Stop: 0 1 6 +-# Short-Description: Hyper-V file copy service (FCOPY) daemon +-### END INIT INFO +- +-PATH=/sbin:/usr/sbin:/bin:/usr/bin +-DESC="Hyper-V file copy service (FCOPY) daemon" +-NAME=hv_fcopy_daemon +-DAEMON=/usr/sbin/$NAME +-PIDFILE=/run/$NAME.pid +-SCRIPTNAME=/etc/init.d/hv-fcopy-daemon +- +-# Exit if the package is not installed +-[ -x "$DAEMON" ] || exit 0 +- +-# Exit if the kernel device does not exist +-[ -e "/dev/vmbus/hv_fcopy" ] || exit 0 +- +-# Load the VERBOSE setting and other rcS variables +-. /lib/init/vars.sh +- +-# Define LSB log_* functions. +-. /lib/lsb/init-functions +- +-# +-# Function that starts the daemon/service +-# +-do_start() +-{ +- # Return +- # 0 if daemon has been started +- # 1 if daemon was already running +- # 2 if daemon could not be started +- start-stop-daemon --start --quiet --pidfile $PIDFILE --exec $DAEMON --test > /dev/null \ +- || return 1 +- start-stop-daemon --start --quiet --pidfile $PIDFILE --exec $DAEMON --background --make-pidfile -- -n \ +- || return 2 +-} +- +-# +-# Function that stops the daemon/service +-# +-do_stop() +-{ +- # Return +- # 0 if daemon has been stopped +- # 1 if daemon was already stopped +- # 2 if daemon could not be stopped +- # other if a failure occurred +- start-stop-daemon --stop --quiet --retry=TERM/30/KILL/5 --pidfile $PIDFILE --name $NAME +- [ "$?" = 2 ] && return 2 +- start-stop-daemon --stop --quiet --oknodo --retry=0/30/KILL/5 --exec $DAEMON +- RETVAL=$? +- [ "$RETVAL" = 2 ] && return 2 +- # Many daemons don't delete their pidfiles when they exit. +- rm -f $PIDFILE +- return "$RETVAL" +-} +- +-case "$1" in +- start) +- [ "$VERBOSE" != no ] && log_daemon_msg "Starting $DESC" "$NAME" +- do_start +- case "$?" in +- 0|1) [ "$VERBOSE" != no ] && log_end_msg 0 ;; +- 2) [ "$VERBOSE" != no ] && log_end_msg 1 ;; +- esac +- ;; +- stop) +- [ "$VERBOSE" != no ] && log_daemon_msg "Stopping $DESC" "$NAME" +- do_stop +- case "$?" in +- 0|1) [ "$VERBOSE" != no ] && log_end_msg 0 ;; +- 2) [ "$VERBOSE" != no ] && log_end_msg 1 ;; +- esac +- ;; +- status) +- status_of_proc -p "$PIDFILE" "$DAEMON" "$NAME" +- ;; +- restart|force-reload) +- log_daemon_msg "Restarting $DESC" "$NAME" +- do_stop +- case "$?" in +- 0|1) +- do_start +- case "$?" in +- 0) log_end_msg 0 ;; +- 1) log_end_msg 1 ;; # Old process is still running +- *) log_end_msg 1 ;; # Failed to start +- esac +- ;; +- *) +- # Failed to stop +- log_end_msg 1 +- ;; +- esac +- ;; +- *) +- echo "Usage: $SCRIPTNAME {start|stop|status|restart|force-reload}" >&2 +- exit 3 +- ;; +-esac +- +-: +diff --git a/debian/hyperv-daemons.hv-fcopy-daemon.service b/debian/hyperv-daemons.hv-fcopy-daemon.service +deleted file mode 100644 +index d8e4d3b8a3..0000000000 +--- a/debian/hyperv-daemons.hv-fcopy-daemon.service ++++ /dev/null +@@ -1,10 +0,0 @@ +-[Unit] +-Description=Hyper-V file copy service (FCOPY) daemon +-Conflicts=hyperv-daemons.hv-fcopy-daemon.service +-BindsTo=sys-devices-virtual-misc-vmbus\x21hv_fcopy.device +- +-[Service] +-ExecStart=/usr/sbin/hv_fcopy_daemon -n +- +-[Install] +-WantedBy=multi-user.target +diff --git a/debian/hyperv-daemons.maintscript b/debian/hyperv-daemons.maintscript +index a2f28e4677..96ed55fb27 100644 +--- a/debian/hyperv-daemons.maintscript ++++ b/debian/hyperv-daemons.maintscript +@@ -1,3 +1,4 @@ + mv_conffile /etc/init.d/hyperv-daemons.hv-fcopy-daemon /etc/init.d/hv-fcopy-daemon 5.8~rc7-1~exp1 ++rm_conffile /etc/init.d/hv-fcopy-daemon 6.10~rc6-1~exp1 + mv_conffile /etc/init.d/hyperv-daemons.hv-kvp-daemon /etc/init.d/hv-kvp-daemon 5.8~rc7-1~exp1 + mv_conffile /etc/init.d/hyperv-daemons.hv-vss-daemon /etc/init.d/hv-vss-daemon 5.8~rc7-1~exp1 +diff --git a/debian/hyperv-daemons.postinst b/debian/hyperv-daemons.postinst +index 3573c9c2ed..9bee3f6b8c 100644 +--- a/debian/hyperv-daemons.postinst ++++ b/debian/hyperv-daemons.postinst +@@ -8,7 +8,7 @@ if [ "$1" = "configure" ]; then + udevadm trigger || true + else + # On upgrade make sure running daemons are restarted +- systemctl try-restart hv-fcopy-daemon.service hv-kvp-daemon.service hv-vss-daemon.service ++ systemctl try-restart hv-kvp-daemon.service hv-vss-daemon.service + fi + fi + fi +diff --git a/debian/hyperv-daemons.preinst b/debian/hyperv-daemons.preinst +index 5810d29468..fc13e5116c 100644 +--- a/debian/hyperv-daemons.preinst ++++ b/debian/hyperv-daemons.preinst +@@ -2,7 +2,11 @@ + set -e + + if [ "$1" = "upgrade" ]; then +- for i in fcopy kvp vss; do ++ services='kvp vss' ++ if dpkg --compare-versions "$2" lt 6.10~rc6-1~exp1; then ++ services="fcopy $services" ++ fi ++ for i in $services; do + if [ -d /run/systemd/system ]; then + systemctl stop hyperv-daemons.hv-$i-daemon.service 2>/dev/null || true + fi +diff --git a/debian/hyperv-daemons.udev b/debian/hyperv-daemons.udev +index 1daacac696..60e9102a68 100644 +--- a/debian/hyperv-daemons.udev ++++ b/debian/hyperv-daemons.udev +@@ -1,3 +1,2 @@ +-KERNEL=="vmbus/hv_fcopy", TAG+="systemd", ENV{SYSTEMD_WANTS}+="hv-fcopy-daemon.service" + KERNEL=="vmbus/hv_kvp", TAG+="systemd", ENV{SYSTEMD_WANTS}+="hv-kvp-daemon.service" + KERNEL=="vmbus/hv_vss", TAG+="systemd", ENV{SYSTEMD_WANTS}+="hv-vss-daemon.service" +diff --git a/debian/rules.d/tools/hv/Makefile b/debian/rules.d/tools/hv/Makefile +index 5f00f55136..8e4c3052b6 100644 +--- a/debian/rules.d/tools/hv/Makefile ++++ b/debian/rules.d/tools/hv/Makefile +@@ -6,7 +6,6 @@ include $(top_rulesdir)/Makefile.inc + else + + PROGS = \ +- hv_fcopy_daemon \ + hv_kvp_daemon \ + hv_vss_daemon + +diff --git a/debian/rules.real b/debian/rules.real +index 0825bf3009..07b468c773 100644 +--- a/debian/rules.real ++++ b/debian/rules.real +@@ -714,7 +714,7 @@ binary_hyperv-daemons: build_hyperv-daemons + ifeq (,$(filter nodoc,$(DEB_BUILD_PROFILES))) + dh_installdocs + endif +- for service in fcopy kvp vss; do \ ++ for service in kvp vss; do \ + dh_installsystemd --name hv-$$service-daemon --no-enable --no-start \ + || break; \ + dh_installinit --name hv-$$service-daemon \ +diff --git a/debian/templates/tools-unversioned.control.in b/debian/templates/tools-unversioned.control.in +index c71b7e9c03..e0be592ce4 100644 +--- a/debian/templates/tools-unversioned.control.in ++++ b/debian/templates/tools-unversioned.control.in +@@ -124,10 +124,7 @@ Depends: ${shlibs:Depends}, ${misc:Depends} + Section: admin + Description: Support daemons for Linux running on Hyper-V + Suite of daemons for Linux guests running on Hyper-V, consisting of +- hv_fcopy_daemon, hv_kvp_daemon and hv_vss_daemon. +- . +- hv_fcopy_daemon provides the file copy service, allowing the host to +- copy files into the guest. ++ hv_kvp_daemon and hv_vss_daemon. + . + hv_kvp_daemon provides the key-value pair (KVP) service, allowing the + host to get and set the IP networking configuration of the guest. +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0018-d-rules.d-certs-Add-newly-required-include-directory.patch b/kernel-std/debian/deb_patches/0018-d-rules.d-certs-Add-newly-required-include-directory.patch new file mode 100644 index 00000000..672f5caa --- /dev/null +++ b/kernel-std/debian/deb_patches/0018-d-rules.d-certs-Add-newly-required-include-directory.patch @@ -0,0 +1,26 @@ +From b24c6b70305d9810f166fce87b6ab3e59681a560 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 7 Oct 2024 16:45:27 +0200 +Subject: [PATCH 18/19] d/rules.d/certs: Add newly required include directory + to CPPFLAGS + +(cherry picked from commit 3a17dcbfe0be6bf2b8f5e79692decb8fe26153b3) +Signed-off-by: Jiping Ma +--- + debian/rules.d/certs/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/debian/rules.d/certs/Makefile b/debian/rules.d/certs/Makefile +index 7ff7baeba4..12f01ef4dc 100644 +--- a/debian/rules.d/certs/Makefile ++++ b/debian/rules.d/certs/Makefile +@@ -3,5 +3,5 @@ PROGS = \ + + include $(top_rulesdir)/Makefile.inc + +-CPPFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 ++CPPFLAGS += -D_LARGEFILE64_SOURCE -D_FILE_OFFSET_BITS=64 -I$(top_srcdir)/scripts + extract-cert: LDLIBS += -lcrypto +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0019-Disable-building-rtla-since-bullseye-s-libtraceevent.patch b/kernel-std/debian/deb_patches/0019-Disable-building-rtla-since-bullseye-s-libtraceevent.patch new file mode 100644 index 00000000..625ede38 --- /dev/null +++ b/kernel-std/debian/deb_patches/0019-Disable-building-rtla-since-bullseye-s-libtraceevent.patch @@ -0,0 +1,55 @@ +From fcef6e45b681d30d7375004798274e452355cba9 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Mon, 3 Oct 2022 03:06:12 +0200 +Subject: [PATCH 19/19] Disable building rtla, since bullseye's libtraceevent + and libtracefs are too old + +The build-dependencies for rtla aren't currently versioned, but the +upstream Makefile checks for libtraceevent >= 1.5 and libtracefs >= +1.3 which are not satisfiable in bullseye. For now, disable building +rtla. This can be reverted if newer versions of those libraries are +added to bullseye-backports. + +See discussion at merge request kernel-team/linux!539. + +(cherry picked from commit 15b6859742d404abdcd68bcb589f8a8e2dfb6ce4) +Signed-off-by: Jiping Ma +--- + debian/templates/tools-unversioned.control.in | 24 +++++++++---------- + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/debian/templates/tools-unversioned.control.in b/debian/templates/tools-unversioned.control.in +index e0be592ce4..5424d4efca 100644 +--- a/debian/templates/tools-unversioned.control.in ++++ b/debian/templates/tools-unversioned.control.in +@@ -133,15 +133,15 @@ Description: Support daemons for Linux running on Hyper-V + hv_vss_daemon provides the volume shadow copy service (VSS), allowing + the host to freeze the guest filesystems while taking a snapshot. + +-Package: rtla +-Meta-Rules-Target: rtla +-Build-Profiles: +-Architecture: amd64 arm64 armhf i386 x32 +-Build-Depends: libtracefs-dev (>= 1.3), libtraceevent-dev (>= 1:1.5), python3-docutils +-Depends: ${shlibs:Depends} +-Section: devel +-Description: Real-Time Linux Analysis tools +- rtla provides a set of commands for analysing the real-time +- properties of Linux. rtla uses kernel tracing capabilities to +- provide precise information about the properties and root causes of +- unexpected results. ++#Package: rtla ++#Meta-Rules-Target: rtla ++#Build-Profiles: ++#Architecture: amd64 arm64 armhf i386 x32 ++#Build-Depends: libtracefs-dev (>= 1.3), libtraceevent-dev (>= 1:1.5), python3-docutils ++#Depends: ${shlibs:Depends} ++#Section: devel ++#Description: Real-Time Linux Analysis tools ++# rtla provides a set of commands for analysing the real-time ++# properties of Linux. rtla uses kernel tracing capabilities to ++# provide precise information about the properties and root causes of ++# unexpected results. +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0020-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch b/kernel-std/debian/deb_patches/0020-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch new file mode 100644 index 00000000..972bc603 --- /dev/null +++ b/kernel-std/debian/deb_patches/0020-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch @@ -0,0 +1,32 @@ +From 8bc2473648336f67c62ccf1564fa1187333cfe45 Mon Sep 17 00:00:00 2001 +From: Jiping Ma +Date: Tue, 18 Mar 2025 05:48:02 +0000 +Subject: [PATCH 20/20] Drop all ia64 configs due to upstream dropping IA64 + arch + +In upstream commit cf8e8658100d4eae80ce9b21f7a81cb024dd5057 the whole +IA64 architecture was dropped, so remove Debian's configuration files +wrt IA64 as well. + +(cherry picked from commit b4b93560d441770b1bfe2429d17ac5bbde17f237) +[jm: Remove ia64 in debian/config/defines.] +Signed-off-by: Jiping Ma +--- + debian/config/defines | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/debian/config/defines b/debian/config/defines +index 6e38cd8c89..ba4065091a 100644 +--- a/debian/config/defines ++++ b/debian/config/defines +@@ -117,7 +117,6 @@ arches: + armhf + hppa + i386 +- ia64 + m68k + mips + mips64 +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/0021-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch b/kernel-std/debian/deb_patches/0021-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch new file mode 100644 index 00000000..0c0cac5e --- /dev/null +++ b/kernel-std/debian/deb_patches/0021-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch @@ -0,0 +1,34 @@ +From f2ba48fc0e28bdba0f80473f960763a4cdac1708 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Sat, 16 Nov 2024 23:50:11 +0100 +Subject: [PATCH] linux-kbuild: Add scripts/module-common.c (Closes: #1087495) + +Since upstream commit fdf94e4403ec "kbuild: compile constant module +information only once", some module information is compiled from +scripts/module-common.c and this needs to be available to out-of-tree +module builds. + +This was previously not noticed due to the accidentally disabled +headers-kbuild tests. + +(cherry picked from commit b93faa99519d9788617b7d73f8334190e53442a3) +Signed-off-by: Jiping Ma +--- + debian/rules.d/scripts/Makefile | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/debian/rules.d/scripts/Makefile b/debian/rules.d/scripts/Makefile +index c913e25e9c..a858eeb17e 100644 +--- a/debian/rules.d/scripts/Makefile ++++ b/debian/rules.d/scripts/Makefile +@@ -8,6 +8,7 @@ DATA = \ + Kbuild.include \ + Makefile.* \ + mkversion \ ++ module-common.c \ + module-common.lds \ + subarch.include + +-- +2.47.1 + diff --git a/kernel-std/debian/deb_patches/series b/kernel-std/debian/deb_patches/series index e204d52d..0aab2b3c 100644 --- a/kernel-std/debian/deb_patches/series +++ b/kernel-std/debian/deb_patches/series @@ -10,3 +10,12 @@ 0010-Update-the-patch-for-kernel-6.6.40.patch 0011-mod-fix-the-undefined-errors.patch 0012-build-size.patch +0013-Correct-the-patches-for-the-linux-kernel-6.12.x.patch +0014-d-rules.real-Unset-KBUILD_HOSTCFLAGS-etc.-instead-of.patch +0015-d-rules.d-Makefile.inc-Add-scripts-include-to-header.patch +0016-x86-linux-cpupower-Update-turbostat-Makefile-to-defi.patch +0017-hyperv-daemons-Update-for-upstream-removal-of-hv_fco.patch +0018-d-rules.d-certs-Add-newly-required-include-directory.patch +0019-Disable-building-rtla-since-bullseye-s-libtraceevent.patch +0020-Drop-all-ia64-configs-due-to-upstream-dropping-IA64-.patch +0021-linux-kbuild-Add-scripts-module-common.c-Closes-1087.patch diff --git a/kernel-std/debian/dl_hook b/kernel-std/debian/dl_hook index 3e0e4fff..a496acc4 100755 --- a/kernel-std/debian/dl_hook +++ b/kernel-std/debian/dl_hook @@ -5,7 +5,7 @@ # be put at the same path where this script is located. # Tools needed: tar -KERNEL_HEAD_COMMIT=b51e4ee5e3c342d2035ff50e24e438810bb51b02 +KERNEL_HEAD_COMMIT=5fb23ddafcdc46eaf87f7e4f50e416ac9114cbf7 DEBIAN_FILE=linux_6.1.27-1~bpo11%2B1.debian.tar.xz tar xvf linux-yocto-${KERNEL_HEAD_COMMIT}.tar.gz diff --git a/kernel-std/debian/meta_data.yaml b/kernel-std/debian/meta_data.yaml index 3c6befe4..f44dbb01 100644 --- a/kernel-std/debian/meta_data.yaml +++ b/kernel-std/debian/meta_data.yaml @@ -1,14 +1,14 @@ --- -debver: 6.6.71 +debver: 6.12.18 debname: linux dl_hook: dl_hook dl_files: - linux-yocto-b51e4ee5e3c342d2035ff50e24e438810bb51b02.tar.gz: + linux-yocto-5fb23ddafcdc46eaf87f7e4f50e416ac9114cbf7.tar.gz: topdir: null url: "https://git.yoctoproject.org/linux-yocto/snapshot/\ - linux-yocto-b51e4ee5e3c342d2035ff50e24e438810bb51b02.tar.gz" - sha256sum: d92297a89b71f8258760d56c9849c8cce17329a663564088a67f2f77934a5ab5 + linux-yocto-5fb23ddafcdc46eaf87f7e4f50e416ac9114cbf7.tar.gz" + sha256sum: 674b7d8cb7e162027b4a192517fe60e476294f5cde49e69cd61770c7efb06779 linux_6.1.27-1~bpo11%2B1.debian.tar.xz: topdir: null url: diff --git a/kernel-std/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch b/kernel-std/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch index aa3aa70b..089026b4 100644 --- a/kernel-std/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch +++ b/kernel-std/debian/patches/0001-Notification-of-death-of-arbitrary-processes.patch @@ -1,7 +1,7 @@ -From 52de1a7c4bcaf87293a85cc80324bb23ca6c1508 Mon Sep 17 00:00:00 2001 +From 4642b81ace18e84ce74a4389f8ef0b771431f3f5 Mon Sep 17 00:00:00 2001 From: Chris Friesen Date: Thu, 17 Jun 2021 07:44:04 +0000 -Subject: [PATCH 01/17] Notification of death of arbitrary processes +Subject: [PATCH 01/16] Notification of death of arbitrary processes Note: this commit was copied from Titanium Cloud Rel2 @@ -28,6 +28,8 @@ Signed-off-by: Peng Zhang Signed-off-by: Li Zhou [jm: Adapted the patch for context changes.] Signed-off-by: Jiping Ma +[jm: Adapted the patch for context changes.] +Signed-off-by: Jiping Ma --- include/linux/init_task.h | 9 ++ include/linux/sched.h | 6 + @@ -38,15 +40,15 @@ Signed-off-by: Jiping Ma kernel/death_notify.c | 228 +++++++++++++++++++++++++++++++++++++ kernel/death_notify.h | 46 ++++++++ kernel/exit.c | 6 + - kernel/fork.c | 4 + - kernel/signal.c | 11 ++ + kernel/fork.c | 5 +- + kernel/signal.c | 9 ++ kernel/sys.c | 8 ++ - 12 files changed, 351 insertions(+) + 12 files changed, 349 insertions(+), 1 deletion(-) create mode 100644 kernel/death_notify.c create mode 100644 kernel/death_notify.h diff --git a/include/linux/init_task.h b/include/linux/init_task.h -index 40fc5813cf93..4fe260a1c280 100644 +index bccb3f1f6262..88275e28ccad 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h @@ -25,6 +25,15 @@ @@ -66,11 +68,11 @@ index 40fc5813cf93..4fe260a1c280 100644 #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE diff --git a/include/linux/sched.h b/include/linux/sched.h -index 77f01ac385f7..7b92c4d35ddd 100644 +index 8982820dae21..a94c5f5e5c20 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h -@@ -1254,6 +1254,12 @@ struct task_struct { - short il_prev; +@@ -1313,6 +1313,12 @@ struct task_struct { + u8 il_weight; short pref_node_fork; #endif +#ifdef CONFIG_SIGEXIT @@ -83,15 +85,15 @@ index 77f01ac385f7..7b92c4d35ddd 100644 int numa_scan_seq; unsigned int numa_scan_period; diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h -index 370ed14b1ae0..4d5d1c7b7902 100644 +index 35791791a879..27852b28ab88 100644 --- a/include/uapi/linux/prctl.h +++ b/include/uapi/linux/prctl.h @@ -63,6 +63,22 @@ # define PR_ENDIAN_LITTLE 1 /* True little endian mode */ # define PR_ENDIAN_PPC_LITTLE 2 /* "PowerPC" pseudo little endian */ -+#define PR_DO_NOTIFY_TASK_STATE 17 /* Set/get notification for task -+ state changes */ ++#define PR_DO_NOTIFY_TASK_STATE 17 /* Set/get notification for task ++ state changes */ + +/* This is the data structure for requestion process death + * (and other state change) information. Sig of -1 means @@ -110,36 +112,36 @@ index 370ed14b1ae0..4d5d1c7b7902 100644 #define PR_GET_SECCOMP 21 #define PR_SET_SECCOMP 22 diff --git a/init/Kconfig b/init/Kconfig -index e403a2925635..b946cfd059b9 100644 +index 7256fa127530..38737731dbed 100644 --- a/init/Kconfig +++ b/init/Kconfig -@@ -1866,6 +1866,21 @@ config DEBUG_PERF_USE_VMALLOC +@@ -1927,6 +1927,21 @@ config DEBUG_PERF_USE_VMALLOC endmenu +config SIGEXIT -+ bool "Notification of death of arbitrary processes" -+ default n -+ help -+ When enabled this exposes a new feature which may be called to request -+ notification when an arbitrary process changes state. The caller specifies -+ a pid, signal number, and event mask, and when that pid dies, or is -+ stopped, or anything else that would normally cause a SIGCHLD, the -+ kernel will send the specified signal to the caller if the event is in -+ the event mask originally passed down. The siginfo_t struct will -+ contain the same information as would be included with SIGCHLD. ++ bool "Notification of death of arbitrary processes" ++ default n ++ help ++ When enabled this exposes a new feature which may be called to request ++ notification when an arbitrary process changes state. The caller specifies ++ a pid, signal number, and event mask, and when that pid dies, or is ++ stopped, or anything else that would normally cause a SIGCHLD, the ++ kernel will send the specified signal to the caller if the event is in ++ the event mask originally passed down. The siginfo_t struct will ++ contain the same information as would be included with SIGCHLD. + -+ This is exposed to userspace via the prctl() -+ call with the PR_DO_NOTIFY_TASK_STATE option ++ This is exposed to userspace via the prctl() ++ call with the PR_DO_NOTIFY_TASK_STATE option + config SYSTEM_DATA_VERIFICATION def_bool n select SYSTEM_TRUSTED_KEYRING diff --git a/init/init_task.c b/init/init_task.c -index ff6c4b9bfe6b..ce224088251c 100644 +index 136a8231355a..7cabef0ca921 100644 --- a/init/init_task.c +++ b/init/init_task.c -@@ -129,6 +129,7 @@ struct task_struct init_task +@@ -138,6 +138,7 @@ struct task_struct init_task __aligned(L1_CACHE_BYTES) = { .alloc_lock = __SPIN_LOCK_UNLOCKED(init_task.alloc_lock), .journal_info = NULL, INIT_CPU_TIMERS(init_task) @@ -148,17 +150,17 @@ index ff6c4b9bfe6b..ce224088251c 100644 .timer_slack_ns = 50000, /* 50 usec default slack */ .thread_pid = &init_struct_pid, diff --git a/kernel/Makefile b/kernel/Makefile -index ce105a5558fc..11fec2c76af0 100644 +index 87866b037fbe..a5d38470e0b3 100644 --- a/kernel/Makefile +++ b/kernel/Makefile -@@ -113,6 +113,7 @@ obj-$(CONFIG_KCSAN) += kcsan/ +@@ -115,6 +115,7 @@ obj-$(CONFIG_KCSAN) += kcsan/ obj-$(CONFIG_SHADOW_CALL_STACK) += scs.o obj-$(CONFIG_HAVE_STATIC_CALL) += static_call.o obj-$(CONFIG_HAVE_STATIC_CALL_INLINE) += static_call_inline.o +obj-$(CONFIG_SIGEXIT) += death_notify.o obj-$(CONFIG_CFI_CLANG) += cfi.o - obj-$(CONFIG_NUMA) += numa.o + obj-$(CONFIG_PERF_EVENTS) += events/ diff --git a/kernel/death_notify.c b/kernel/death_notify.c new file mode 100644 index 000000000000..5819d35a2564 @@ -446,49 +448,50 @@ index 000000000000..14a0995b79af +#endif + diff --git a/kernel/exit.c b/kernel/exit.c -index 21a59a6e1f2e..0b1bf34a1550 100644 +index 619f0014c33b..12eefc9f3e24 100644 --- a/kernel/exit.c +++ b/kernel/exit.c -@@ -73,6 +73,9 @@ - #include - #include +@@ -77,6 +77,9 @@ #include + + #include "exit.h" +#ifdef CONFIG_SIGEXIT +#include "death_notify.h" +#endif /* * The default value should be high enough to not crash a system that randomly -@@ -251,6 +254,9 @@ void release_task(struct task_struct *p) +@@ -253,6 +256,9 @@ void release_task(struct task_struct *p) cgroup_release(p); write_lock_irq(&tasklist_lock); +#ifdef CONFIG_SIGEXIT + release_notify_others(p); -+#endif ++#endif ptrace_release_task(p); thread_pid = get_pid(p->thread_pid); __exit_signal(p); diff --git a/kernel/fork.c b/kernel/fork.c -index 869467885640..9a79ab5b7d77 100644 +index 8434ff53ab23..00f2f7392078 100644 --- a/kernel/fork.c +++ b/kernel/fork.c -@@ -2466,6 +2466,10 @@ __latent_entropy struct task_struct *copy_process( +@@ -2358,7 +2358,10 @@ __latent_entropy struct task_struct *copy_process( RCU_INIT_POINTER(p->bpf_storage, NULL); p->bpf_ctx = NULL; #endif +- +#ifdef CONFIG_SIGEXIT + INIT_LIST_HEAD(&p->notify); + INIT_LIST_HEAD(&p->monitor); +#endif - /* Perform scheduler related setup. Assign this task to a CPU. */ retval = sched_fork(clone_flags, p); + if (retval) diff --git a/kernel/signal.c b/kernel/signal.c -index 09019017d669..883f7fa7f738 100644 +index 2ae45e6eb6bb..c181894345b9 100644 --- a/kernel/signal.c +++ b/kernel/signal.c -@@ -57,6 +57,9 @@ +@@ -58,6 +58,9 @@ #include #include #include /* for syscall_get_* */ @@ -498,22 +501,20 @@ index 09019017d669..883f7fa7f738 100644 /* * SLAB caches for signal bits. -@@ -2150,6 +2153,10 @@ bool do_notify_parent(struct task_struct *tsk, int sig) +@@ -2145,6 +2148,9 @@ bool do_notify_parent(struct task_struct *tsk, int sig) __wake_up_parent(tsk, tsk->parent); spin_unlock_irqrestore(&psig->siglock, flags); +#ifdef CONFIG_SIGEXIT + do_notify_others(tsk, &info); +#endif -+ return autoreap; } -@@ -2222,6 +2229,10 @@ static void do_notify_parent_cldstop(struct task_struct *tsk, +@@ -2217,6 +2223,9 @@ static void do_notify_parent_cldstop(struct task_struct *tsk, */ __wake_up_parent(tsk, parent); spin_unlock_irqrestore(&sighand->siglock, flags); -+ +#ifdef CONFIG_SIGEXIT + do_notify_others(tsk, &info); +#endif @@ -521,7 +522,7 @@ index 09019017d669..883f7fa7f738 100644 /* diff --git a/kernel/sys.c b/kernel/sys.c -index 44b575990333..4db207723ff9 100644 +index 4da31f28fda8..ad4f05c66e9f 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -76,6 +76,9 @@ @@ -534,7 +535,7 @@ index 44b575990333..4db207723ff9 100644 #ifndef SET_UNALIGN_CTL # define SET_UNALIGN_CTL(a, b) (-EINVAL) -@@ -2575,6 +2578,11 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, +@@ -2599,6 +2602,11 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3, else error = PR_MCE_KILL_DEFAULT; break; @@ -547,5 +548,5 @@ index 44b575990333..4db207723ff9 100644 error = prctl_set_mm(arg2, arg3, arg4, arg5); break; -- -2.43.0 +2.47.1 diff --git a/kernel-std/debian/patches/0003-affine-compute-kernel-threads.patch b/kernel-std/debian/patches/0003-affine-compute-kernel-threads.patch index 82fe2c08..5f55958e 100644 --- a/kernel-std/debian/patches/0003-affine-compute-kernel-threads.patch +++ b/kernel-std/debian/patches/0003-affine-compute-kernel-threads.patch @@ -1,7 +1,7 @@ -From 004708f2e02a4ae97672d2c618effa7cdbbe38a6 Mon Sep 17 00:00:00 2001 +From 0213e30fa1f6d2a9015b4bf136d10f07a6b91d3b Mon Sep 17 00:00:00 2001 From: Chris Friesen Date: Tue, 24 Nov 2015 16:27:28 -0500 -Subject: [PATCH] affine compute kernel threads +Subject: [PATCH 03/16] affine compute kernel threads This is a kernel enhancement to configure the cpu affinity of kernel threads via kernel boot option kthread_cpus=. The compute @@ -32,6 +32,8 @@ Signed-off-by: Vefa Bicakci Signed-off-by: Jiping Ma [lz: Adapted the patch for upgrading kernel from 5.10 to 6.6] Signed-off-by: Li Zhou +[jm: Adapted the patch for upgrading kernel from 6.6 to 6.12] +Signed-off-by: Jiping Ma --- .../admin-guide/kernel-parameters.txt | 10 ++++++++ include/linux/cpumask.h | 3 +++ @@ -42,46 +44,47 @@ Signed-off-by: Li Zhou 6 files changed, 43 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index 59f7b400d..acc7025c1 100644 +index bf3aacb1ceb7..b6d995d47ea1 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -2473,6 +2473,16 @@ +@@ -2637,6 +2637,16 @@ See also Documentation/trace/kprobetrace.rst "Kernel Boot Parameter" section. -+ kthread_cpus= [KNL, SMP] Only run kernel threads on the specified -+ list of processors. The kernel will start threads -+ on the indicated processors only (unless there -+ are specific reasons to run a thread with -+ different affinities). This can be used to make -+ init start on certain processors and also to -+ control where kmod and other user space threads -+ are being spawned. Allows to keep kernel threads -+ away from certain cores unless absoluteluy necessary. ++ kthread_cpus= [KNL, SMP] Only run kernel threads on the specified ++ list of processors. The kernel will start threads ++ on the indicated processors only (unless there ++ are specific reasons to run a thread with ++ different affinities). This can be used to make ++ init start on certain processors and also to ++ control where kmod and other user space threads ++ are being spawned. Allows to keep kernel threads ++ away from certain cores unless absoluteluy necessary. + - kpti= [ARM64] Control page table isolation of user - and kernel address spaces. + kpti= [ARM64,EARLY] Control page table isolation of + user and kernel address spaces. Default: enabled on cores which need mitigation. diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h -index c2aa0aa26..2919c2aef 100644 +index 9278a50d514f..2b91ee73365b 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h -@@ -61,6 +61,7 @@ static inline void set_nr_cpu_ids(unsigned int nr) - * cpu_present_mask - has bit 'cpu' set iff cpu is populated +@@ -84,6 +84,7 @@ static __always_inline void set_nr_cpu_ids(unsigned int nr) + * cpu_enabled_mask - has bit 'cpu' set iff cpu can be brought online * cpu_online_mask - has bit 'cpu' set iff cpu available to scheduler * cpu_active_mask - has bit 'cpu' set iff cpu available to migration + * cpu_kthread_mask - has bit 'cpu' set iff general kernel threads allowed * * If !CONFIG_HOTPLUG_CPU, present == possible, and active == online. * -@@ -93,11 +94,13 @@ extern struct cpumask __cpu_possible_mask; - extern struct cpumask __cpu_online_mask; +@@ -117,12 +118,14 @@ extern struct cpumask __cpu_online_mask; + extern struct cpumask __cpu_enabled_mask; extern struct cpumask __cpu_present_mask; extern struct cpumask __cpu_active_mask; +extern struct cpumask __cpu_kthread_mask; extern struct cpumask __cpu_dying_mask; #define cpu_possible_mask ((const struct cpumask *)&__cpu_possible_mask) #define cpu_online_mask ((const struct cpumask *)&__cpu_online_mask) + #define cpu_enabled_mask ((const struct cpumask *)&__cpu_enabled_mask) #define cpu_present_mask ((const struct cpumask *)&__cpu_present_mask) #define cpu_active_mask ((const struct cpumask *)&__cpu_active_mask) +#define cpu_kthread_mask ((const struct cpumask *)&__cpu_kthread_mask) @@ -89,10 +92,10 @@ index c2aa0aa26..2919c2aef 100644 extern atomic_t __num_online_cpus; diff --git a/init/main.c b/init/main.c -index bd4ce7345..c40b2c441 100644 +index a7aaae73743e..569c18d1622c 100644 --- a/init/main.c +++ b/init/main.c -@@ -1633,6 +1633,8 @@ static noinline void __init kernel_init_freeable(void) +@@ -1593,6 +1593,8 @@ static noinline void __init kernel_init_freeable(void) do_basic_setup(); @@ -102,10 +105,10 @@ index bd4ce7345..c40b2c441 100644 wait_for_initramfs(); diff --git a/kernel/cpu.c b/kernel/cpu.c -index 98a7a7b14..d051b4097 100644 +index 9ee6c9145b1d..7ab2274c0b8b 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c -@@ -2651,6 +2651,29 @@ EXPORT_SYMBOL(__cpu_dying_mask); +@@ -3121,6 +3121,29 @@ EXPORT_SYMBOL(__cpu_dying_mask); atomic_t __num_online_cpus __read_mostly; EXPORT_SYMBOL(__num_online_cpus); @@ -136,10 +139,10 @@ index 98a7a7b14..d051b4097 100644 { cpumask_copy(&__cpu_present_mask, src); diff --git a/kernel/kthread.c b/kernel/kthread.c -index f97fd01a2..2bd5d136e 100644 +index 9bb36897b6c6..77d2b3f577f4 100644 --- a/kernel/kthread.c +++ b/kernel/kthread.c -@@ -355,7 +355,7 @@ static int kthread(void *_create) +@@ -368,7 +368,7 @@ static int kthread(void *_create) * back to default in case they have been changed. */ sched_setscheduler_nocheck(current, SCHED_NORMAL, ¶m); @@ -148,7 +151,7 @@ index f97fd01a2..2bd5d136e 100644 /* OK, tell user we're spawned, wait for stop or wakeup */ __set_current_state(TASK_UNINTERRUPTIBLE); -@@ -722,7 +722,7 @@ int kthreadd(void *unused) +@@ -743,7 +743,7 @@ int kthreadd(void *unused) /* Setup a clean context for our children to inherit. */ set_task_comm(tsk, "kthreadd"); ignore_signals(tsk); @@ -158,10 +161,10 @@ index f97fd01a2..2bd5d136e 100644 current->flags |= PF_NOFREEZE; diff --git a/kernel/umh.c b/kernel/umh.c -index fbf872c62..43e3f4567 100644 +index ff1f13a27d29..0dec76b539a7 100644 --- a/kernel/umh.c +++ b/kernel/umh.c -@@ -82,6 +82,9 @@ static int call_usermodehelper_exec_async(void *data) +@@ -79,6 +79,9 @@ static int call_usermodehelper_exec_async(void *data) */ current->fs->umask = 0022; @@ -172,5 +175,5 @@ index fbf872c62..43e3f4567 100644 * Our parent (unbound workqueue) runs with elevated scheduling * priority. Avoid propagating that into the userspace child. -- -2.17.1 +2.47.1 diff --git a/kernel-std/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch b/kernel-std/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch index 186a94ad..2c1f9be5 100644 --- a/kernel-std/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch +++ b/kernel-std/debian/patches/0005-Make-kernel-start-eth-devices-at-offset.patch @@ -1,7 +1,7 @@ -From 130eb445c6abc1dec0cb9d24b2b7e4cba13f7037 Mon Sep 17 00:00:00 2001 +From b40833737594a50e69a505f0da82168c5d998ca6 Mon Sep 17 00:00:00 2001 From: Chris Friesen Date: Thu, 12 May 2016 18:00:00 -0400 -Subject: [PATCH] Make kernel start eth devices at offset +Subject: [PATCH 05/16] Make kernel start eth devices at offset In order to avoid naming collisions, we want to make the kernel start naming its "ethX" devices at eth1000 instead of eth0. This @@ -12,27 +12,29 @@ Signed-off-by: Zhang Zhiguo Signed-off-by: Jiping Ma [lz: Adapted the patch for context changes.] Signed-off-by: Li Zhou +[jm: Adapted the patch for context changes.] +Signed-off-by: Jiping Ma --- net/core/dev.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/net/core/dev.c b/net/core/dev.c -index 9bf90b2a7..9526361a0 100644 +index c761f862bc5a..d91ad9228b19 100644 --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -1119,6 +1119,12 @@ static int __dev_alloc_name(struct net *net, const char *name, char *buf) - __set_bit(i, inuse); - } - -+ /* STX extension, want kernel to start at eth1000 */ -+ if (strcmp(name, "eth%d") == 0) { -+ for (i=0; i < 1000; i++) -+ set_bit(i, inuse); -+ } -+ - i = find_first_zero_bit(inuse, max_netdevices); - bitmap_free(inuse); +@@ -1203,6 +1203,12 @@ static int __dev_alloc_name(struct net *net, const char *name, char *res) + __set_bit(i, inuse); } + ++ /* STX extension, want kernel to start at eth1000 */ ++ if (strcmp(name, "eth%d") == 0) { ++ for (i=0; i < 1000; i++) ++ set_bit(i, inuse); ++ } ++ + i = find_first_zero_bit(inuse, max_netdevices); + bitmap_free(inuse); + if (i == max_netdevices) -- -2.17.1 +2.47.1 diff --git a/kernel-std/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch b/kernel-std/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch index 04f55171..0f3c416e 100644 --- a/kernel-std/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch +++ b/kernel-std/debian/patches/0006-intel-iommu-allow-ignoring-Ethernet-device-RMRR-with.patch @@ -1,8 +1,8 @@ -From f311c0cd55b9fb90696350d8545cf46381ccc805 Mon Sep 17 00:00:00 2001 +From 43085ada69718fca39228c84919732d445fa1235 Mon Sep 17 00:00:00 2001 From: Matt Peters Date: Mon, 30 May 2016 10:51:02 -0400 -Subject: [PATCH] intel-iommu: allow ignoring Ethernet device RMRR with IOMMU - passthrough +Subject: [PATCH 06/16] intel-iommu: allow ignoring Ethernet device RMRR with + IOMMU passthrough Some BIOS's are reporting DMAR RMRR entries for Ethernet devices which is causing problems when PCI passthrough is enabled. These @@ -23,6 +23,8 @@ Signed-off-by: Li Zhou Signed-off-by: Jiping Ma [lz: Adapted the patch for upgrading kernel from 5.10 to 6.6.] Signed-off-by: Li Zhou +[jm: Adapted the patch for upgrading kernel from 6.6 to 6.12.] +Signed-off-by: Jiping Ma --- .../admin-guide/kernel-parameters.txt | 5 +++++ Documentation/arch/x86/iommu.rst | 18 +++++++++++++++ @@ -30,23 +32,23 @@ Signed-off-by: Li Zhou 3 files changed, 44 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index 44b3c3f8c..d7c13e702 100644 +index b6d995d47ea1..c182de48eabb 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -2115,6 +2115,11 @@ +@@ -2218,6 +2218,11 @@ bypassed by not enabling DMAR with this option. In this case, gfx device will use physical address for DMA. + eth_no_rmrr [Default Off] -+ With this option provided, the kernel will ignore -+ any specified RMRR regions specified by the BIOS -+ for PCI ethernet devices. Confirm with your hardware -+ vendor the RMRR regions are indeed invalid first. ++ With this option provided, the kernel will ignore ++ any specified RMRR regions specified by the BIOS ++ for PCI ethernet devices. Confirm with your hardware ++ vendor the RMRR regions are indeed invalid first. strict [Default Off] Deprecated, equivalent to iommu.strict=1. sp_off [Default Off] diff --git a/Documentation/arch/x86/iommu.rst b/Documentation/arch/x86/iommu.rst -index 42c7a6faa..edcbff38c 100644 +index 41fbadfe2221..5a02c241774d 100644 --- a/Documentation/arch/x86/iommu.rst +++ b/Documentation/arch/x86/iommu.rst @@ -35,6 +35,24 @@ regions will fail. Hence BIOS uses RMRR to specify these regions along with @@ -75,18 +77,18 @@ index 42c7a6faa..edcbff38c 100644 ^^^^^^^^^^^^^^^^^ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c -index 4c3707384..6b185695a 100644 +index 9c46a4cd3848..ea0ffcf82d7e 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c -@@ -293,6 +293,7 @@ EXPORT_SYMBOL_GPL(intel_iommu_enabled); +@@ -209,6 +209,7 @@ int intel_iommu_enabled = 0; + EXPORT_SYMBOL_GPL(intel_iommu_enabled); - static int dmar_map_gfx = 1; static int intel_iommu_superpage = 1; +static int intel_iommu_ethrmrr = 1; static int iommu_identity_mapping; static int iommu_skip_te_disable; - -@@ -339,6 +340,15 @@ static int __init intel_iommu_setup(char *str) + static int disable_igfx_iommu; +@@ -256,6 +257,15 @@ static int __init intel_iommu_setup(char *str) } else if (!strncmp(str, "forcedac", 8)) { pr_warn("intel_iommu=forcedac deprecated; use iommu.forcedac instead\n"); iommu_dma_forcedac = true; @@ -102,7 +104,7 @@ index 4c3707384..6b185695a 100644 } else if (!strncmp(str, "strict", 6)) { pr_warn("intel_iommu=strict deprecated; use iommu.strict=1 instead\n"); iommu_set_dma_strict(); -@@ -2518,8 +2528,18 @@ static bool device_rmrr_is_relaxable(struct device *dev) +@@ -2025,8 +2035,18 @@ static bool device_rmrr_is_relaxable(struct device *dev) pdev = to_pci_dev(dev); if (IS_USB_DEVICE(pdev) || IS_GFX_DEVICE(pdev)) return true; @@ -121,7 +123,7 @@ index 4c3707384..6b185695a 100644 + } } - /* + static int device_def_domain_type(struct device *dev) -- -2.17.1 +2.47.1 diff --git a/kernel-std/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch b/kernel-std/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch index b38c2999..eed361ca 100644 --- a/kernel-std/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch +++ b/kernel-std/debian/patches/0010-workqueue-Affine-rescuer-threads-and-unbound-wqs.patch @@ -1,7 +1,7 @@ -From c335a673dea2fd4c0452d88975cc2045d0934d14 Mon Sep 17 00:00:00 2001 +From b51ab594903af7cc209b4d8ca905db403a99772c Mon Sep 17 00:00:00 2001 From: "M. Vefa Bicakci" Date: Thu, 9 Sep 2021 04:56:46 -0400 -Subject: [PATCH] workqueue: Affine rescuer threads and unbound wqs +Subject: [PATCH 10/16] workqueue: Affine rescuer threads and unbound wqs This commit ensures that workqueue rescuer threads are affined to the platform CPUs specified by the "kthread_cpus" kernel argument. Prior to @@ -27,24 +27,29 @@ Signed-off-by: Jiping Ma [lz: Adapted the patch for upgrading kernel from 5.10 to 6.6 according to M. Vefa Bicakci's suggestion.] Signed-off-by: Li Zhou +[jm: Adapted the patch for upgrading kernel from 6.6 to 6.12.] +Signed-off-by: Jiping Ma --- - kernel/workqueue.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) + kernel/workqueue.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/kernel/workqueue.c b/kernel/workqueue.c -index e6a95bb74..a15ad43c8 100644 +index 3f0f7cf15ed2..d39a4db6bb65 100644 --- a/kernel/workqueue.c +++ b/kernel/workqueue.c -@@ -4659,7 +4659,7 @@ static int init_rescuer(struct workqueue_struct *wq) +@@ -5559,10 +5559,7 @@ static int init_rescuer(struct workqueue_struct *wq) } wq->rescuer = rescuer; -- kthread_bind_mask(rescuer->task, cpu_possible_mask); +- if (wq->flags & WQ_UNBOUND) +- kthread_bind_mask(rescuer->task, unbound_effective_cpumask(wq)); +- else +- kthread_bind_mask(rescuer->task, cpu_possible_mask); + kthread_bind_mask(rescuer->task, cpu_kthread_mask); wake_up_process(rescuer->task); return 0; -@@ -6545,6 +6545,7 @@ void __init workqueue_init_early(void) +@@ -7727,6 +7724,7 @@ void __init workqueue_init_early(void) cpumask_copy(wq_unbound_cpumask, cpu_possible_mask); restrict_unbound_cpumask("HK_TYPE_WQ", housekeeping_cpumask(HK_TYPE_WQ)); restrict_unbound_cpumask("HK_TYPE_DOMAIN", housekeeping_cpumask(HK_TYPE_DOMAIN)); @@ -53,5 +58,5 @@ index e6a95bb74..a15ad43c8 100644 restrict_unbound_cpumask("workqueue.unbound_cpus", &wq_cmdline_cpumask); -- -2.17.1 +2.47.1 diff --git a/kernel-std/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch b/kernel-std/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch index f5ed448e..7ee79c2d 100644 --- a/kernel-std/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch +++ b/kernel-std/debian/patches/0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch @@ -1,7 +1,8 @@ -From ed051d788e0f7d177bec80d7b594e7b889b975bd Mon Sep 17 00:00:00 2001 +From ac36a126f58faacde2237fc06dc38600f9d3789c Mon Sep 17 00:00:00 2001 From: "M. Vefa Bicakci" -Date: Wed, 4 Jan 2023 20:41:54 -0500 -Subject: [PATCH] Revert "sched/idle: Move quiet_vmstate() into the NOHZ code" +Date: Wed, 4 Jan 2023 20:36:53 -0500 +Subject: [PATCH 13/16] Revert "sched/idle: Move quiet_vmstate() into the NOHZ + code" This reverts commit 62cb1188ed86a9cf082fd2f757d4dd9b54741f24. @@ -84,10 +85,10 @@ Signed-off-by: M. Vefa Bicakci 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c -index f26ab2675..9298330c5 100644 +index 53bb9193c537..e7c4d47f9537 100644 --- a/kernel/sched/idle.c +++ b/kernel/sched/idle.c -@@ -274,6 +274,7 @@ static void do_idle(void) +@@ -268,6 +268,7 @@ static void do_idle(void) */ __current_set_polling(); @@ -96,10 +97,10 @@ index f26ab2675..9298330c5 100644 while (!need_resched()) { diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c -index 1ad89eec2..468e756f1 100644 +index e0c47259e91a..31bbff551ed9 100644 --- a/kernel/time/tick-sched.c +++ b/kernel/time/tick-sched.c -@@ -25,7 +25,6 @@ +@@ -26,7 +26,6 @@ #include #include #include @@ -107,14 +108,14 @@ index 1ad89eec2..468e756f1 100644 #include -@@ -932,7 +931,6 @@ static void tick_nohz_stop_tick(struct tick_sched *ts, int cpu) +@@ -1047,7 +1046,6 @@ static void tick_nohz_stop_tick(struct tick_sched *ts, int cpu) */ - if (!ts->tick_stopped) { + if (!tick_sched_flag_test(ts, TS_FLAG_STOPPED)) { calc_load_nohz_start(); - quiet_vmstat(); ts->last_tick = hrtimer_get_expires(&ts->sched_timer); - ts->tick_stopped = 1; + tick_sched_flag_set(ts, TS_FLAG_STOPPED); -- -2.17.1 +2.47.1 diff --git a/kernel-std/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch b/kernel-std/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch index 709accbb..56d7b473 100644 --- a/kernel-std/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch +++ b/kernel-std/debian/patches/0014-Port-negative-dentries-limit-feature-from-3.10.patch @@ -1,7 +1,7 @@ -From d3a94bc5b2139aeb6f6d1f05c2bd47a8f9ad2650 Mon Sep 17 00:00:00 2001 +From fc7e2942cbc9864da546678d65f201244b6685dc Mon Sep 17 00:00:00 2001 From: Jim Somerville Date: Fri, 14 Apr 2023 15:29:22 -0400 -Subject: [PATCH] Port negative dentries limit feature from 3.10 +Subject: [PATCH 14/16] Port negative dentries limit feature from 3.10 This ports the Redhat feature forward from the 3.10 kernel version. @@ -34,12 +34,14 @@ Replace "&zero_ul" with "SYSCTL_LONG_ZERO" according to: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/ commit/?id=b1f2aff888af54a057c2c3c0d88a13ef5d37b52a.] Signed-off-by: Li Zhou +[jm: Adapted the patch for 6.12.x.] +Signed-off-by: Jiping Ma --- fs/dcache.c | 185 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 183 insertions(+), 2 deletions(-) diff --git a/fs/dcache.c b/fs/dcache.c -index 576ad162c..0fff744af 100644 +index 3a01c42c6639..bef98597df07 100644 --- a/fs/dcache.c +++ b/fs/dcache.c @@ -32,6 +32,7 @@ @@ -50,7 +52,7 @@ index 576ad162c..0fff744af 100644 #include "internal.h" #include "mount.h" -@@ -124,6 +125,65 @@ struct dentry_stat_t { +@@ -132,6 +133,65 @@ struct dentry_stat_t { long dummy; /* Reserved for future use */ }; @@ -80,7 +82,7 @@ index 576ad162c..0fff744af 100644 +/* + * Sysctl proc handler for dcache_negativ3_dentry_limit_sysctl. + */ -+int proc_dcache_negative_dentry_limit(struct ctl_table *ctl, int write, ++static int proc_dcache_negative_dentry_limit(const struct ctl_table *ctl, int write, + void __user *buffer, size_t *lenp, + loff_t *ppos) +{ @@ -116,7 +118,7 @@ index 576ad162c..0fff744af 100644 static DEFINE_PER_CPU(long, nr_dentry); static DEFINE_PER_CPU(long, nr_dentry_unused); static DEFINE_PER_CPU(long, nr_dentry_negative); -@@ -191,6 +251,15 @@ static struct ctl_table fs_dcache_sysctls[] = { +@@ -199,6 +259,15 @@ static struct ctl_table fs_dcache_sysctls[] = { .mode = 0444, .proc_handler = proc_nr_dentry, }, @@ -129,10 +131,10 @@ index 576ad162c..0fff744af 100644 + .extra1 = SYSCTL_LONG_ZERO, + .extra2 = SYSCTL_ONE_HUNDRED, + }, - { } }; -@@ -1202,8 +1271,9 @@ void shrink_dentry_list(struct list_head *list) + static int __init init_fs_dcache_sysctls(void) +@@ -1088,8 +1157,9 @@ void shrink_dentry_list(struct list_head *list) } } @@ -144,7 +146,7 @@ index 576ad162c..0fff744af 100644 { struct list_head *freeable = arg; struct dentry *dentry = container_of(item, struct dentry, d_lru); -@@ -1254,12 +1324,29 @@ static enum lru_status dentry_lru_isolate(struct list_head *item, +@@ -1140,12 +1210,29 @@ static enum lru_status dentry_lru_isolate(struct list_head *item, return LRU_ROTATE; } @@ -174,7 +176,7 @@ index 576ad162c..0fff744af 100644 /** * prune_dcache_sb - shrink the dcache * @sb: superblock -@@ -1283,6 +1370,20 @@ long prune_dcache_sb(struct super_block *sb, struct shrink_control *sc) +@@ -1169,6 +1256,20 @@ long prune_dcache_sb(struct super_block *sb, struct shrink_control *sc) return freed; } @@ -195,7 +197,7 @@ index 576ad162c..0fff744af 100644 static enum lru_status dentry_lru_isolate_shrink(struct list_head *item, struct list_lru_one *lru, spinlock_t *lru_lock, void *arg) { -@@ -1677,6 +1778,86 @@ static enum d_walk_ret umount_check(void *_data, struct dentry *dentry) +@@ -1549,6 +1650,86 @@ static enum d_walk_ret umount_check(void *_data, struct dentry *dentry) return D_WALK_CONTINUE; } @@ -283,5 +285,5 @@ index 576ad162c..0fff744af 100644 { shrink_dcache_parent(dentry); -- -2.17.1 +2.47.1 diff --git a/kernel-std/debian/patches/0016-Add-driver-versions-for-ice-i40e-and-iavf.patch b/kernel-std/debian/patches/0016-Add-driver-versions-for-ice-i40e-and-iavf.patch deleted file mode 100644 index 5b9e21f0..00000000 --- a/kernel-std/debian/patches/0016-Add-driver-versions-for-ice-i40e-and-iavf.patch +++ /dev/null @@ -1,282 +0,0 @@ -From b866d25ee24d62641b9e16a509d08ed4a4e0e1c7 Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Sun, 31 Mar 2024 20:13:57 -0700 -Subject: [PATCH] Add driver versions for ice, i40e and iavf - -As we need driver version to track driver information, add -the necessary driver version for the Intel drivers. - -Signed-off-by: Jiping Ma ---- - Makefile | 8 +++++++- - drivers/net/ethernet/intel/i40e/i40e.h | 1 + - drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 2 ++ - drivers/net/ethernet/intel/i40e/i40e_main.c | 16 ++++++++++------ - drivers/net/ethernet/intel/iavf/iavf.h | 1 + - drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 1 + - drivers/net/ethernet/intel/iavf/iavf_main.c | 8 ++++++-- - drivers/net/ethernet/intel/ice/ice.h | 1 + - drivers/net/ethernet/intel/ice/ice_ethtool.c | 1 + - drivers/net/ethernet/intel/ice/ice_main.c | 15 +++++++++------ - 10 files changed, 39 insertions(+), 15 deletions(-) - -diff --git a/Makefile b/Makefile -index 8ed7620308d1..2235636756b9 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,6 +1227,9 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds -+ICE_STX = "-stx.0" -+I40E_STX = "-stx.0" -+IAVF_STX = "-stx.0" - - uts_len := 64 - define filechk_utsrelease.h -@@ -1249,7 +1252,10 @@ define filechk_version.h - ((c) > 255 ? 255 : (c)))'; \ - echo \#define LINUX_VERSION_MAJOR $(VERSION); \ - echo \#define LINUX_VERSION_PATCHLEVEL $(PATCHLEVEL); \ -- echo \#define LINUX_VERSION_SUBLEVEL $(SUBLEVEL) -+ echo \#define LINUX_VERSION_SUBLEVEL $(SUBLEVEL); \ -+ echo \#define LINUX_ICE_DRIVER_VERSION \"$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(ICE_STX)\"; \ -+ echo \#define LINUX_I40E_DRIVER_VERSION \"$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(I40E_STX)\"; \ -+ echo \#define LINUX_IAVF_DRIVER_VERSION \"$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(IAVF_STX)\" - endef - - ifneq ($(DISTRIBUTION_OFFICIAL_BUILD),) -diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h -index 3e6839ac1f0f..a72be4e1b318 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e.h -+++ b/drivers/net/ethernet/intel/i40e/i40e.h -@@ -1102,6 +1102,7 @@ static inline u32 i40e_get_pf_count(struct i40e_hw *hw) - int i40e_up(struct i40e_vsi *vsi); - void i40e_down(struct i40e_vsi *vsi); - extern const char i40e_driver_name[]; -+extern const char i40e_driver_version_str[]; - void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags); - void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired); - int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); -diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -index 4e90570ba780..d6a019b27add 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c -@@ -2005,6 +2005,8 @@ static void i40e_get_drvinfo(struct net_device *netdev, - struct i40e_pf *pf = vsi->back; - - strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); -+ strlcpy(drvinfo->version, i40e_driver_version_str, -+ sizeof(drvinfo->version)); - strscpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), - sizeof(drvinfo->fw_version)); - strscpy(drvinfo->bus_info, pci_name(pf->pdev), -diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c -index f8d1a994c2f6..b8043e8cb9e2 100644 ---- a/drivers/net/ethernet/intel/i40e/i40e_main.c -+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c -@@ -1,13 +1,13 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2013 - 2021 Intel Corporation. */ - --#include - #include - #include - #include - #include - #include - #include -+#include - - /* Local includes */ - #include "i40e.h" -@@ -28,6 +28,8 @@ const char i40e_driver_name[] = "i40e"; - static const char i40e_driver_string[] = - "Intel(R) Ethernet Connection XL710 Network Driver"; - -+#define DRV_VERSION LINUX_I40E_DRIVER_VERSION -+const char i40e_driver_version_str[] = DRV_VERSION; - static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation."; - - /* a bit of forward declarations */ -@@ -101,6 +103,7 @@ MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX - MODULE_AUTHOR("Intel Corporation, "); - MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); - MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); - - static struct workqueue_struct *i40e_wq; - -@@ -10783,11 +10786,11 @@ static void i40e_send_version(struct i40e_pf *pf) - { - struct i40e_driver_version dv; - -- dv.major_version = 0xff; -- dv.minor_version = 0xff; -- dv.build_version = 0xff; -+ dv.major_version = LINUX_VERSION_MAJOR; -+ dv.minor_version = LINUX_VERSION_PATCHLEVEL; -+ dv.build_version = LINUX_VERSION_SUBLEVEL; - dv.subbuild_version = 0; -- strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string)); -+ strscpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); - i40e_aq_send_driver_version(&pf->hw, &dv, NULL); - } - -@@ -16768,7 +16771,8 @@ static int __init i40e_init_module(void) - { - int err; - -- pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string); -+ pr_info("%s: %s - version %s\n", i40e_driver_name, -+ i40e_driver_string, i40e_driver_version_str); - pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); - - /* There is no need to throttle the number of active tasks because -diff --git a/drivers/net/ethernet/intel/iavf/iavf.h b/drivers/net/ethernet/intel/iavf/iavf.h -index 431d9d62c8c6..fec2e5bb77df 100644 ---- a/drivers/net/ethernet/intel/iavf/iavf.h -+++ b/drivers/net/ethernet/intel/iavf/iavf.h -@@ -468,6 +468,7 @@ struct iavf_device { - - /* needed by iavf_ethtool.c */ - extern char iavf_driver_name[]; -+extern const char iavf_driver_version[]; - - static inline const char *iavf_state_str(enum iavf_state_t state) - { -diff --git a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c -index 1ac97bd606e3..204f8305f728 100644 ---- a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c -+++ b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c -@@ -586,6 +586,7 @@ static void iavf_get_drvinfo(struct net_device *netdev, - struct iavf_adapter *adapter = netdev_priv(netdev); - - strscpy(drvinfo->driver, iavf_driver_name, 32); -+ strlcpy(drvinfo->version, iavf_driver_version, 32); - strscpy(drvinfo->fw_version, "N/A", 4); - strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 32); - drvinfo->n_priv_flags = IAVF_PRIV_FLAGS_STR_LEN; -diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethernet/intel/iavf/iavf_main.c -index ce0b91999526..10a96793c123 100644 ---- a/drivers/net/ethernet/intel/iavf/iavf_main.c -+++ b/drivers/net/ethernet/intel/iavf/iavf_main.c -@@ -1,6 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2013 - 2018 Intel Corporation. */ - -+#include - #include "iavf.h" - #include "iavf_prototype.h" - #include "iavf_client.h" -@@ -21,6 +22,8 @@ char iavf_driver_name[] = "iavf"; - static const char iavf_driver_string[] = - "Intel(R) Ethernet Adaptive Virtual Function Network Driver"; - -+#define DRV_VERSION LINUX_IAVF_DRIVER_VERSION -+const char iavf_driver_version[] = DRV_VERSION; - static const char iavf_copyright[] = - "Copyright (c) 2013 - 2018 Intel Corporation."; - -@@ -47,6 +50,7 @@ MODULE_ALIAS("i40evf"); - MODULE_AUTHOR("Intel Corporation, "); - MODULE_DESCRIPTION("Intel(R) Ethernet Adaptive Virtual Function Network Driver"); - MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); - - static const struct net_device_ops iavf_netdev_ops; - -@@ -5326,8 +5330,8 @@ static struct pci_driver iavf_driver = { - **/ - static int __init iavf_init_module(void) - { -- pr_info("iavf: %s\n", iavf_driver_string); -- -+ pr_info("iavf: %s - version %s\n", iavf_driver_string, -+ iavf_driver_version); - pr_info("%s\n", iavf_copyright); - - return pci_register_driver(&iavf_driver); -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index c7962f322db2..2695794a5df7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -77,6 +77,7 @@ - #include "ice_gnss.h" - #include "ice_irq.h" - -+extern const char ice_drv_ver[]; - #define ICE_BAR0 0 - #define ICE_REQ_DESC_MULTIPLE 32 - #define ICE_MIN_NUM_DESC 64 -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 39b5f24be7e4..456cf4785c74 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -358,6 +358,7 @@ __ice_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo, - orom = &hw->flash.orom; - - strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver)); -+ strscpy(drvinfo->version, ice_drv_ver, sizeof(drvinfo->version)); - - /* Display NVM version (from which the firmware version can be - * determined) which contains more pertinent information. -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 600a2f537087..149984fb8ab0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -5,7 +5,7 @@ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - --#include -+#include - #include - #include "ice.h" - #include "ice_base.h" -@@ -25,7 +25,9 @@ - #include "ice_vsi_vlan_ops.h" - #include - -+#define DRV_VERSION LINUX_ICE_DRIVER_VERSION - #define DRV_SUMMARY "Intel(R) Ethernet Connection E800 Series Linux Driver" -+const char ice_drv_ver[] = DRV_VERSION; - static const char ice_driver_string[] = DRV_SUMMARY; - static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation."; - -@@ -36,6 +38,7 @@ static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation."; - MODULE_AUTHOR("Intel Corporation, "); - MODULE_DESCRIPTION(DRV_SUMMARY); - MODULE_LICENSE("GPL v2"); -+MODULE_VERSION(DRV_VERSION); - MODULE_FIRMWARE(ICE_DDP_PKG_FILE); - - static int debug = -1; -@@ -4198,11 +4201,11 @@ static int ice_send_version(struct ice_pf *pf) - { - struct ice_driver_ver dv; - -- dv.major_ver = 0xff; -- dv.minor_ver = 0xff; -- dv.build_ver = 0xff; -+ dv.major_ver = LINUX_VERSION_MAJOR; -+ dv.minor_ver = LINUX_VERSION_PATCHLEVEL; -+ dv.build_ver = LINUX_VERSION_SUBLEVEL; - dv.subbuild_ver = 0; -- strscpy((char *)dv.driver_string, UTS_RELEASE, -+ strscpy((char *)dv.driver_string, DRV_VERSION, - sizeof(dv.driver_string)); - return ice_aq_send_driver_ver(&pf->hw, &dv, NULL); - } -@@ -5657,7 +5660,7 @@ static int __init ice_module_init(void) - { - int status = -ENOMEM; - -- pr_info("%s\n", ice_driver_string); -+ pr_info("%s - version %s\n", ice_driver_string, ice_drv_ver); - pr_info("%s\n", ice_copyright); - - ice_wq = alloc_workqueue("%s", 0, 0, KBUILD_MODNAME); --- -2.43.0 - diff --git a/kernel-std/debian/patches/0016-tools-Fix-the-build-errors.patch b/kernel-std/debian/patches/0016-tools-Fix-the-build-errors.patch new file mode 100644 index 00000000..0689e09e --- /dev/null +++ b/kernel-std/debian/patches/0016-tools-Fix-the-build-errors.patch @@ -0,0 +1,78 @@ +From ca2a6b12ce2421e4e70705059b143e2f43c65efe Mon Sep 17 00:00:00 2001 +From: Jiping Ma +Date: Tue, 18 Mar 2025 07:24:15 +0000 +Subject: [PATCH 16/16] tools: Fix the build errors + +Add "{ }" in the code block of case to fix the following build error. + +tools/power/x86/turbostat/turbostat.c:2811:4: error: a label can +only be part of a statement and a declaration is not a statement + 2811 | const unsigned long value_raw = t->pmt_counter[i]; + | ^~~~~ + +Signed-off-by: Jiping Ma +--- + tools/power/x86/turbostat/turbostat.c | 30 ++++++++++++++++----------- + 1 file changed, 18 insertions(+), 12 deletions(-) + +diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c +index 235e82fe7d0a..9a3d38259042 100644 +--- a/tools/power/x86/turbostat/turbostat.c ++++ b/tools/power/x86/turbostat/turbostat.c +@@ -2808,11 +2808,13 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data + break; + + case PMT_TYPE_XTAL_TIME: +- const unsigned long value_raw = t->pmt_counter[i]; +- const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; ++ { ++ const unsigned long value_raw = t->pmt_counter[i]; ++ const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; + +- outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); +- break; ++ outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); ++ break; ++ } + } + } + +@@ -2889,11 +2891,13 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data + break; + + case PMT_TYPE_XTAL_TIME: +- const unsigned long value_raw = c->pmt_counter[i]; +- const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; ++ { ++ const unsigned long value_raw = c->pmt_counter[i]; ++ const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; + +- outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); +- break; ++ outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); ++ break; ++ } + } + } + +@@ -3088,11 +3092,13 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data + break; + + case PMT_TYPE_XTAL_TIME: +- const unsigned long value_raw = p->pmt_counter[i]; +- const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; ++ { ++ const unsigned long value_raw = p->pmt_counter[i]; ++ const double value_converted = 100.0 * value_raw / crystal_hz / interval_float; + +- outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); +- break; ++ outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), value_converted); ++ break; ++ } + } + } + +-- +2.47.1 + diff --git a/kernel-std/debian/patches/0017-ice-Use-irq_update_affinity_hint.patch b/kernel-std/debian/patches/0017-ice-Use-irq_update_affinity_hint.patch deleted file mode 100644 index 46e3eb98..00000000 --- a/kernel-std/debian/patches/0017-ice-Use-irq_update_affinity_hint.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 6cdb8d6b6ca8d1cdc7e7f6dbc2469fb81fc4062e Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Fri, 10 May 2024 20:24:31 -0700 -Subject: [PATCH] ice: Use irq_update_affinity_hint - -This commit makes the ice device driver use the irq_update_affinity_hint -function instead of the irq_set_affinity_hint function. This is done -because the latter function sets the IRQ CPU affinities, whereas the -former does not, and this allows the use of the default IRQ affinity CPU -mask provided via the irqaffinity= kernel command line option. - -Please note that this patch was not cherry-picked from an upstream -commit. The changes have been inspired by the i40e and iavf device -driver patches in the following patch series: - https://lore.kernel.org/netdev/20210903152430.244937-1-nitesh@redhat.com/t/#u - -The aforementioned patches have been mainlined as of this writing with -the following merge commit by Linus Torvalds: - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=147cc5838c0f5c76e908b816e924ca378e0d4735 - -And the i40e and iavf patches are accessible at: - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d34c54d1739c2cdf2e4437b74e6da269147f4987 - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0f9744f4ed539f2e847d7ed41993b243e3ba5cff - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/Makefile b/Makefile -index 2235636756b9..b545b2a4e667 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.0" -+ICE_STX = "-stx.1" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 149984fb8ab0..c5ef2f422c34 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -2574,7 +2574,7 @@ static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename) - irq_num = vsi->q_vectors[vector]->irq.virq; - if (!IS_ENABLED(CONFIG_RFS_ACCEL)) - irq_set_affinity_notifier(irq_num, NULL); -- irq_set_affinity_hint(irq_num, NULL); -+ irq_update_affinity_hint(irq_num, NULL); - devm_free_irq(dev, irq_num, &vsi->q_vectors[vector]); - } - return err; --- -2.43.0 - diff --git a/kernel-std/debian/patches/0018-sched-debug-Fix-the-runnable-tasks-output.patch b/kernel-std/debian/patches/0018-sched-debug-Fix-the-runnable-tasks-output.patch deleted file mode 100644 index d57a44cb..00000000 --- a/kernel-std/debian/patches/0018-sched-debug-Fix-the-runnable-tasks-output.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 3fda533e3df1a170a69c0634f7d182501d92a430 Mon Sep 17 00:00:00 2001 -From: Peng Zhang -Date: Tue, 1 Apr 2025 15:39:34 +0800 -Subject: [PATCH] sched/debug: Fix the runnable tasks output - -The current runnable tasks output looks like: - - runnable tasks: - S task PID tree-key switches prio wait-time sum-exec sum-sleep - ------------------------------------------------------------------------------------------------------------- - Ikworker/R-rcu_g 4 0.129049 E 0.620179 0.750000 0.002920 2 100 0.000000 0.002920 0.000000 0.000000 0 0 / - Ikworker/R-sync_ 5 0.125328 E 0.624147 0.750000 0.001840 2 100 0.000000 0.001840 0.000000 0.000000 0 0 / - Ikworker/R-slub_ 6 0.120835 E 0.628680 0.750000 0.001800 2 100 0.000000 0.001800 0.000000 0.000000 0 0 / - Ikworker/R-netns 7 0.114294 E 0.634701 0.750000 0.002400 2 100 0.000000 0.002400 0.000000 0.000000 0 0 / - I kworker/0:1 9 508.781746 E 511.754666 3.000000 151.575240 224 120 0.000000 151.575240 0.000000 0.000000 0 0 / - -Which is messy. Remove the duplicate printing of sum_exec_runtime and -tidy up the layout to make it look like: - - runnable tasks: - S task PID vruntime eligible deadline slice sum-exec switches prio wait-time sum-sleep sum-block node group-id group-path - ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- - I kworker/0:3 1698 295.001459 E 297.977619 3.000000 38.862920 9 120 0.000000 0.000000 0.000000 0 0 / - I kworker/0:4 1702 278.026303 E 281.026303 3.000000 9.918760 3 120 0.000000 0.000000 0.000000 0 0 / - S NetworkManager 2646 0.377936 E 2.598104 3.000000 98.535880 314 120 0.000000 0.000000 0.000000 0 0 /system.slice/NetworkManager.service - S virtqemud 2689 0.541016 E 2.440104 3.000000 50.967960 80 120 0.000000 0.000000 0.000000 0 0 /system.slice/virtqemud.service - S gsd-smartcard 3058 73.604144 E 76.475904 3.000000 74.033320 88 120 0.000000 0.000000 0.000000 0 0 /user.slice/user-42.slice/session-c1.scope - -Reviewed-by: Christoph Lameter (Ampere) -Signed-off-by: Huang Shijie -Signed-off-by: Peter Zijlstra (Intel) -Link: https://lkml.kernel.org/r/20240906053019.7874-1-shijie@os.amperecomputing.com -(Adapted for context change) -Signed-off-by: Peng Zhang -(cherry picked from commit 2cab4bd024d23f658e40dce209dfd012f4e8b19a) ---- - kernel/sched/debug.c | 31 +++++++++++++++++++++++-------- - 1 file changed, 23 insertions(+), 8 deletions(-) - -diff --git a/kernel/sched/debug.c b/kernel/sched/debug.c -index 4c3d0d9f3..acdce2ee1 100644 ---- a/kernel/sched/debug.c -+++ b/kernel/sched/debug.c -@@ -579,7 +579,7 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p) - else - SEQ_printf(m, " %c", task_state_to_char(p)); - -- SEQ_printf(m, "%15s %5d %9Ld.%06ld %c %9Ld.%06ld %9Ld.%06ld %9Ld.%06ld %9Ld %5d ", -+ SEQ_printf(m, " %15s %5d %9Ld.%06ld %c %9Ld.%06ld %9Ld.%06ld %9Ld.%06ld %9Ld %5d ", - p->comm, task_pid_nr(p), - SPLIT_NS(p->se.vruntime), - entity_eligible(cfs_rq_of(&p->se), &p->se) ? 'E' : 'N', -@@ -589,17 +589,16 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p) - (long long)(p->nvcsw + p->nivcsw), - p->prio); - -- SEQ_printf(m, "%9lld.%06ld %9lld.%06ld %9lld.%06ld %9lld.%06ld", -+ SEQ_printf(m, "%9lld.%06ld %9lld.%06ld %9lld.%06ld", - SPLIT_NS(schedstat_val_or_zero(p->stats.wait_sum)), -- SPLIT_NS(p->se.sum_exec_runtime), - SPLIT_NS(schedstat_val_or_zero(p->stats.sum_sleep_runtime)), - SPLIT_NS(schedstat_val_or_zero(p->stats.sum_block_runtime))); - - #ifdef CONFIG_NUMA_BALANCING -- SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p)); -+ SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p)); - #endif - #ifdef CONFIG_CGROUP_SCHED -- SEQ_printf_task_group_path(m, task_group(p), " %s") -+ SEQ_printf_task_group_path(m, task_group(p), " %s") - #endif - - SEQ_printf(m, "\n"); -@@ -611,10 +610,26 @@ static void print_rq(struct seq_file *m, struct rq *rq, int rq_cpu) - - SEQ_printf(m, "\n"); - SEQ_printf(m, "runnable tasks:\n"); -- SEQ_printf(m, " S task PID tree-key switches prio" -- " wait-time sum-exec sum-sleep\n"); -+ SEQ_printf(m, " S task PID vruntime eligible " -+ "deadline slice sum-exec switches " -+ "prio wait-time sum-sleep sum-block" -+#ifdef CONFIG_NUMA_BALANCING -+ " node group-id" -+#endif -+#ifdef CONFIG_CGROUP_SCHED -+ " group-path" -+#endif -+ "\n"); - SEQ_printf(m, "-------------------------------------------------------" -- "------------------------------------------------------\n"); -+ "------------------------------------------------------" -+ "------------------------------------------------------" -+#ifdef CONFIG_NUMA_BALANCING -+ "--------------" -+#endif -+#ifdef CONFIG_CGROUP_SCHED -+ "--------------" -+#endif -+ "\n"); - - rcu_read_lock(); - for_each_process_thread(g, p) { --- -2.34.1 - diff --git a/kernel-std/debian/patches/0076-ipv6-remove-max_size-check-inline-with-ipv4.patch b/kernel-std/debian/patches/0076-ipv6-remove-max_size-check-inline-with-ipv4.patch deleted file mode 100644 index 30d24266..00000000 --- a/kernel-std/debian/patches/0076-ipv6-remove-max_size-check-inline-with-ipv4.patch +++ /dev/null @@ -1,207 +0,0 @@ -From a616a8c8e5e479cc01a752f93a9887ed51bb150e Mon Sep 17 00:00:00 2001 -From: Jon Maxwell -Date: Thu, 12 Jan 2023 12:25:32 +1100 -Subject: [PATCH] ipv6: remove max_size check inline with ipv4 - -In ip6_dst_gc() replace: - - if (entries > gc_thresh) - -With: - - if (entries > ops->gc_thresh) - -Sending Ipv6 packets in a loop via a raw socket triggers an issue where a -route is cloned by ip6_rt_cache_alloc() for each packet sent. This quickly -consumes the Ipv6 max_size threshold which defaults to 4096 resulting in -these warnings: - -[1] 99.187805] dst_alloc: 7728 callbacks suppressed -[2] Route cache is full: consider increasing sysctl net.ipv6.route.max_size. -. -. -[300] Route cache is full: consider increasing sysctl net.ipv6.route.max_size. - -When this happens the packet is dropped and sendto() gets a network is -unreachable error: - -remaining pkt 200557 errno 101 -remaining pkt 196462 errno 101 -. -. -remaining pkt 126821 errno 101 - -Implement David Aherns suggestion to remove max_size check seeing that Ipv6 -has a GC to manage memory usage. Ipv4 already does not check max_size. - -Here are some memory comparisons for Ipv4 vs Ipv6 with the patch: - -Test by running 5 instances of a program that sends UDP packets to a raw -socket 5000000 times. Compare Ipv4 and Ipv6 performance with a similar -program. - -Ipv4: - -Before test: - -MemFree: 29427108 kB -Slab: 237612 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 2881 3990 192 42 2 : tunables 0 0 0 - -During test: - -MemFree: 29417608 kB -Slab: 247712 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 44394 44394 192 42 2 : tunables 0 0 0 - -After test: - -MemFree: 29422308 kB -Slab: 238104 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -Ipv6 with patch: - -Errno 101 errors are not observed anymore with the patch. - -Before test: - -MemFree: 29422308 kB -Slab: 238104 kB - -ip6_dst_cache 1912 2528 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -During Test: - -MemFree: 29431516 kB -Slab: 240940 kB - -ip6_dst_cache 11980 12064 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -After Test: - -MemFree: 29441816 kB -Slab: 238132 kB - -ip6_dst_cache 1902 2432 256 32 2 : tunables 0 0 0 -xfrm_dst_cache 0 0 320 25 2 : tunables 0 0 0 -ip_dst_cache 3048 4116 192 42 2 : tunables 0 0 0 - -Tested-by: Andrea Mayer -Signed-off-by: Jon Maxwell -Reviewed-by: David Ahern -Link: https://lore.kernel.org/r/20230112012532.311021-1-jmaxwell37@gmail.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit af6d10345ca76670c1b7c37799f0d5576ccef277) -Signed-off-by: Jiping Ma ---- - include/net/dst_ops.h | 2 +- - net/core/dst.c | 8 ++------ - net/ipv6/route.c | 13 +++++-------- - 3 files changed, 8 insertions(+), 15 deletions(-) - -diff --git a/include/net/dst_ops.h b/include/net/dst_ops.h -index 88ff7bb2bb9b..632086b2f644 100644 ---- a/include/net/dst_ops.h -+++ b/include/net/dst_ops.h -@@ -16,7 +16,7 @@ struct dst_ops { - unsigned short family; - unsigned int gc_thresh; - -- int (*gc)(struct dst_ops *ops); -+ void (*gc)(struct dst_ops *ops); - struct dst_entry * (*check)(struct dst_entry *, __u32 cookie); - unsigned int (*default_advmss)(const struct dst_entry *); - unsigned int (*mtu)(const struct dst_entry *); -diff --git a/net/core/dst.c b/net/core/dst.c -index fb3bcba87744..453ec8aafc4a 100644 ---- a/net/core/dst.c -+++ b/net/core/dst.c -@@ -83,12 +83,8 @@ void *dst_alloc(struct dst_ops *ops, struct net_device *dev, - - if (ops->gc && - !(flags & DST_NOCOUNT) && -- dst_entries_get_fast(ops) > ops->gc_thresh) { -- if (ops->gc(ops)) { -- pr_notice_ratelimited("Route cache is full: consider increasing sysctl net.ipv6.route.max_size.\n"); -- return NULL; -- } -- } -+ dst_entries_get_fast(ops) > ops->gc_thresh) -+ ops->gc(ops); - - dst = kmem_cache_alloc(ops->kmem_cachep, GFP_ATOMIC); - if (!dst) -diff --git a/net/ipv6/route.c b/net/ipv6/route.c -index a6d5c99f65a3..b23e42efb3df 100644 ---- a/net/ipv6/route.c -+++ b/net/ipv6/route.c -@@ -89,7 +89,7 @@ static struct dst_entry *ip6_negative_advice(struct dst_entry *); - static void ip6_dst_destroy(struct dst_entry *); - static void ip6_dst_ifdown(struct dst_entry *, - struct net_device *dev, int how); --static int ip6_dst_gc(struct dst_ops *ops); -+static void ip6_dst_gc(struct dst_ops *ops); - - static int ip6_pkt_discard(struct sk_buff *skb); - static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); -@@ -3184,11 +3184,10 @@ struct dst_entry *icmp6_dst_alloc(struct net_device *dev, - return dst; - } - --static int ip6_dst_gc(struct dst_ops *ops) -+static void ip6_dst_gc(struct dst_ops *ops) - { - struct net *net = container_of(ops, struct net, ipv6.ip6_dst_ops); - int rt_min_interval = net->ipv6.sysctl.ip6_rt_gc_min_interval; -- int rt_max_size = net->ipv6.sysctl.ip6_rt_max_size; - int rt_elasticity = net->ipv6.sysctl.ip6_rt_gc_elasticity; - int rt_gc_timeout = net->ipv6.sysctl.ip6_rt_gc_timeout; - unsigned long rt_last_gc = net->ipv6.ip6_rt_last_gc; -@@ -3196,11 +3195,10 @@ static int ip6_dst_gc(struct dst_ops *ops) - int entries; - - entries = dst_entries_get_fast(ops); -- if (entries > rt_max_size) -+ if (entries > ops->gc_thresh) - entries = dst_entries_get_slow(ops); - -- if (time_after(rt_last_gc + rt_min_interval, jiffies) && -- entries <= rt_max_size) -+ if (time_after(rt_last_gc + rt_min_interval, jiffies)) - goto out; - - fib6_run_gc(atomic_inc_return(&net->ipv6.ip6_rt_gc_expire), net, true); -@@ -3210,7 +3208,6 @@ static int ip6_dst_gc(struct dst_ops *ops) - out: - val = atomic_read(&net->ipv6.ip6_rt_gc_expire); - atomic_set(&net->ipv6.ip6_rt_gc_expire, val - (val >> rt_elasticity)); -- return entries > rt_max_size; - } - - static int ip6_nh_lookup_table(struct net *net, struct fib6_config *cfg, -@@ -6363,7 +6360,7 @@ static int __net_init ip6_route_net_init(struct net *net) - #endif - - net->ipv6.sysctl.flush_delay = 0; -- net->ipv6.sysctl.ip6_rt_max_size = 4096; -+ net->ipv6.sysctl.ip6_rt_max_size = INT_MAX; - net->ipv6.sysctl.ip6_rt_gc_min_interval = HZ / 2; - net->ipv6.sysctl.ip6_rt_gc_timeout = 60*HZ; - net->ipv6.sysctl.ip6_rt_gc_interval = 30*HZ; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch b/kernel-std/debian/patches/ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch deleted file mode 100644 index d0ad7896..00000000 --- a/kernel-std/debian/patches/ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch +++ /dev/null @@ -1,684 +0,0 @@ -From ba0d88d4ff54805aac7aec77cc5b05d0df9114da Mon Sep 17 00:00:00 2001 -From: Michal Michalik -Date: Thu, 27 Jul 2023 15:50:34 +0200 -Subject: [PATCH 01/36] ice: Auxbus devices & driver for E822 TS - -There is a problem in HW in E822-based devices leading to race -condition. -It might happen that, in order: -- PF0 (which owns the PHC) requests few timestamps, -- PF1 requests a timestamp, -- interrupt is being triggered and both PF0 and PF1 threads are woken -up, -- PF0 got one timestamp, still waiting for others so not going to sleep, -- PF1 gets it's timestamp, process it and go to sleep, -- PF1 requests a timestamp again, -- just before PF0 goes to sleep timestamp of PF1 appear, -- PF0 finishes all it's timestamps and go to sleep (PF1 also sleeping). -That leaves PF1 timestamp memory not read, which lead to blocking the -next interrupt from arriving. - -Fix it by adding auxiliary devices and only one driver to handle all the -timestamps for all PF's by PHC owner. In the past each PF requested it's -own timestamps and process it from the start till the end which causes -problem described above. Currently each PF requests the timestamps as -before, but the actual reading of the completed timestamps is being done -by the PTP auxiliary driver, which is registered by the PF which owns PHC. - -Additionally, the newly introduced auxiliary driver/devices for PTP clock -owner will be used for other features in all products (including E810). - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Signed-off-by: Michal Michalik -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit d938a8cca88a5f02f523f95fe3d2d1214f4b4a8d) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 12 + - .../net/ethernet/intel/ice/ice_hw_autogen.h | 1 + - drivers/net/ethernet/intel/ice/ice_main.c | 11 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 393 +++++++++++++++++- - drivers/net/ethernet/intel/ice/ice_ptp.h | 30 ++ - 5 files changed, 430 insertions(+), 17 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index b9cd0113b859..0a3d76d184ba 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -671,6 +671,18 @@ static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) - return !!qv->ch; /* Enable it to run with TC */ - } - -+/** -+ * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt -+ * @pf: Board private structure -+ * -+ * Return true if this PF should respond to the Tx timestamp interrupt -+ * indication in the miscellaneous OICR interrupt handler. -+ */ -+static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) -+{ -+ return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; -+} -+ - /** - * ice_irq_dynamic_ena - Enable default interrupt generation settings - * @hw: pointer to HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -index 531cc2194741..6756f3d51d14 100644 ---- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -@@ -231,6 +231,7 @@ - #define PFINT_SB_CTL 0x0016B600 - #define PFINT_SB_CTL_MSIX_INDX_M ICE_M(0x7FF, 0) - #define PFINT_SB_CTL_CAUSE_ENA_M BIT(30) -+#define PFINT_TSYN_MSK 0x0016C980 - #define QINT_RQCTL(_QRX) (0x00150000 + ((_QRX) * 4)) - #define QINT_RQCTL_MSIX_INDX_S 0 - #define QINT_RQCTL_MSIX_INDX_M ICE_M(0x7FF, 0) -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 8a6acb5a722e..39cb6ee52abe 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3190,7 +3190,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (!hw->reset_ongoing) -+ if (!hw->reset_ongoing && ice_ptp_pf_handles_tx_interrupt(pf)) - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); - } - -@@ -7444,8 +7444,13 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - } - - /* configure PTP timestamping after VSI rebuild */ -- if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_cfg_timestamp(pf, false); -+ if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) { -+ if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -+ ice_ptp_cfg_timestamp(pf, false); -+ else if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) -+ /* for E82x PHC owner always need to have interrupts */ -+ ice_ptp_cfg_timestamp(pf, true); -+ } - - err = ice_vsi_rebuild_by_type(pf, ICE_VSI_SWITCHDEV_CTRL); - if (err) { -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 3648d3cccacc..e3012608c9dd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -255,6 +255,24 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, - return ice_ptp_set_sma_e810t(info, pin, func); - } - -+/** -+ * ice_ptp_configure_tx_tstamp - Enable or disable Tx timestamp interrupt -+ * @pf: The PF pointer to search in -+ * @on: bool value for whether timestamp interrupt is enabled or disabled -+ */ -+static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) -+{ -+ u32 val; -+ -+ /* Configure the Tx timestamp interrupt */ -+ val = rd32(&pf->hw, PFINT_OICR_ENA); -+ if (on) -+ val |= PFINT_OICR_TSYN_TX_M; -+ else -+ val &= ~PFINT_OICR_TSYN_TX_M; -+ wr32(&pf->hw, PFINT_OICR_ENA, val); -+} -+ - /** - * ice_set_tx_tstamp - Enable or disable Tx timestamping - * @pf: The PF pointer to search in -@@ -263,7 +281,6 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, - static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - { - struct ice_vsi *vsi; -- u32 val; - u16 i; - - vsi = ice_get_main_vsi(pf); -@@ -277,13 +294,8 @@ static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - vsi->tx_rings[i]->ptp_tx = on; - } - -- /* Configure the Tx timestamp interrupt */ -- val = rd32(&pf->hw, PFINT_OICR_ENA); -- if (on) -- val |= PFINT_OICR_TSYN_TX_M; -- else -- val &= ~PFINT_OICR_TSYN_TX_M; -- wr32(&pf->hw, PFINT_OICR_ENA, val); -+ if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -+ ice_ptp_configure_tx_tstamp(pf, on); - - pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; - } -@@ -674,9 +686,6 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - int err; - u8 idx; - -- if (!tx->init) -- return; -- - ptp_port = container_of(tx, struct ice_ptp_port, tx); - pf = ptp_port_to_pf(ptp_port); - hw = &pf->hw; -@@ -774,6 +783,39 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - } - } - -+/** -+ * ice_ptp_tx_tstamp_owner - Process Tx timestamps for all ports on the device -+ * @pf: Board private structure -+ */ -+static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) -+{ -+ struct ice_ptp_port *port; -+ unsigned int i; -+ -+ mutex_lock(&pf->ptp.ports_owner.lock); -+ list_for_each_entry(port, &pf->ptp.ports_owner.ports, list_member) { -+ struct ice_ptp_tx *tx = &port->tx; -+ -+ if (!tx || !tx->init) -+ continue; -+ -+ ice_ptp_process_tx_tstamp(tx); -+ } -+ mutex_unlock(&pf->ptp.ports_owner.lock); -+ -+ for (i = 0; i < ICE_MAX_QUAD; i++) { -+ u64 tstamp_ready; -+ int err; -+ -+ /* Read the Tx ready status first */ -+ err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); -+ if (err || tstamp_ready) -+ return ICE_TX_TSTAMP_WORK_PENDING; -+ } -+ -+ return ICE_TX_TSTAMP_WORK_DONE; -+} -+ - /** - * ice_ptp_tx_tstamp - Process Tx timestamps for this function. - * @tx: Tx tracking structure to initialize -@@ -2448,7 +2490,21 @@ s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - */ - enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf) - { -- return ice_ptp_tx_tstamp(&pf->ptp.port.tx); -+ switch (pf->ptp.tx_interrupt_mode) { -+ case ICE_PTP_TX_INTERRUPT_NONE: -+ /* This device has the clock owner handle timestamps for it */ -+ return ICE_TX_TSTAMP_WORK_DONE; -+ case ICE_PTP_TX_INTERRUPT_SELF: -+ /* This device handles its own timestamps */ -+ return ice_ptp_tx_tstamp(&pf->ptp.port.tx); -+ case ICE_PTP_TX_INTERRUPT_ALL: -+ /* This device handles timestamps for all ports */ -+ return ice_ptp_tx_tstamp_owner(pf); -+ default: -+ WARN_ONCE(1, "Unexpected Tx timestamp interrupt mode %u\n", -+ pf->ptp.tx_interrupt_mode); -+ return ICE_TX_TSTAMP_WORK_DONE; -+ } - } - - static void ice_ptp_periodic_work(struct kthread_work *work) -@@ -2557,6 +2613,187 @@ void ice_ptp_reset(struct ice_pf *pf) - dev_err(ice_pf_to_dev(pf), "PTP reset failed %d\n", err); - } - -+/** -+ * ice_ptp_aux_dev_to_aux_pf - Get auxiliary PF handle for the auxiliary device -+ * @aux_dev: auxiliary device to get the auxiliary PF for -+ */ -+static struct ice_pf * -+ice_ptp_aux_dev_to_aux_pf(struct auxiliary_device *aux_dev) -+{ -+ struct ice_ptp_port *aux_port; -+ struct ice_ptp *aux_ptp; -+ -+ aux_port = container_of(aux_dev, struct ice_ptp_port, aux_dev); -+ aux_ptp = container_of(aux_port, struct ice_ptp, port); -+ -+ return container_of(aux_ptp, struct ice_pf, ptp); -+} -+ -+/** -+ * ice_ptp_aux_dev_to_owner_pf - Get PF handle for the auxiliary device -+ * @aux_dev: auxiliary device to get the PF for -+ */ -+static struct ice_pf * -+ice_ptp_aux_dev_to_owner_pf(struct auxiliary_device *aux_dev) -+{ -+ struct ice_ptp_port_owner *ports_owner; -+ struct auxiliary_driver *aux_drv; -+ struct ice_ptp *owner_ptp; -+ -+ if (!aux_dev->dev.driver) -+ return NULL; -+ -+ aux_drv = to_auxiliary_drv(aux_dev->dev.driver); -+ ports_owner = container_of(aux_drv, struct ice_ptp_port_owner, -+ aux_driver); -+ owner_ptp = container_of(ports_owner, struct ice_ptp, ports_owner); -+ return container_of(owner_ptp, struct ice_pf, ptp); -+} -+ -+/** -+ * ice_ptp_auxbus_probe - Probe auxiliary devices -+ * @aux_dev: PF's auxiliary device -+ * @id: Auxiliary device ID -+ */ -+static int ice_ptp_auxbus_probe(struct auxiliary_device *aux_dev, -+ const struct auxiliary_device_id *id) -+{ -+ struct ice_pf *owner_pf = ice_ptp_aux_dev_to_owner_pf(aux_dev); -+ struct ice_pf *aux_pf = ice_ptp_aux_dev_to_aux_pf(aux_dev); -+ -+ if (WARN_ON(!owner_pf)) -+ return -ENODEV; -+ -+ INIT_LIST_HEAD(&aux_pf->ptp.port.list_member); -+ mutex_lock(&owner_pf->ptp.ports_owner.lock); -+ list_add(&aux_pf->ptp.port.list_member, -+ &owner_pf->ptp.ports_owner.ports); -+ mutex_unlock(&owner_pf->ptp.ports_owner.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_ptp_auxbus_remove - Remove auxiliary devices from the bus -+ * @aux_dev: PF's auxiliary device -+ */ -+static void ice_ptp_auxbus_remove(struct auxiliary_device *aux_dev) -+{ -+ struct ice_pf *owner_pf = ice_ptp_aux_dev_to_owner_pf(aux_dev); -+ struct ice_pf *aux_pf = ice_ptp_aux_dev_to_aux_pf(aux_dev); -+ -+ mutex_lock(&owner_pf->ptp.ports_owner.lock); -+ list_del(&aux_pf->ptp.port.list_member); -+ mutex_unlock(&owner_pf->ptp.ports_owner.lock); -+} -+ -+/** -+ * ice_ptp_auxbus_shutdown -+ * @aux_dev: PF's auxiliary device -+ */ -+static void ice_ptp_auxbus_shutdown(struct auxiliary_device *aux_dev) -+{ -+ /* Doing nothing here, but handle to auxbus driver must be satisfied */ -+} -+ -+/** -+ * ice_ptp_auxbus_suspend -+ * @aux_dev: PF's auxiliary device -+ * @state: power management state indicator -+ */ -+static int -+ice_ptp_auxbus_suspend(struct auxiliary_device *aux_dev, pm_message_t state) -+{ -+ /* Doing nothing here, but handle to auxbus driver must be satisfied */ -+ return 0; -+} -+ -+/** -+ * ice_ptp_auxbus_resume -+ * @aux_dev: PF's auxiliary device -+ */ -+static int ice_ptp_auxbus_resume(struct auxiliary_device *aux_dev) -+{ -+ /* Doing nothing here, but handle to auxbus driver must be satisfied */ -+ return 0; -+} -+ -+/** -+ * ice_ptp_auxbus_create_id_table - Create auxiliary device ID table -+ * @pf: Board private structure -+ * @name: auxiliary bus driver name -+ */ -+static struct auxiliary_device_id * -+ice_ptp_auxbus_create_id_table(struct ice_pf *pf, const char *name) -+{ -+ struct auxiliary_device_id *ids; -+ -+ /* Second id left empty to terminate the array */ -+ ids = devm_kcalloc(ice_pf_to_dev(pf), 2, -+ sizeof(struct auxiliary_device_id), GFP_KERNEL); -+ if (!ids) -+ return NULL; -+ -+ snprintf(ids[0].name, sizeof(ids[0].name), "ice.%s", name); -+ -+ return ids; -+} -+ -+/** -+ * ice_ptp_register_auxbus_driver - Register PTP auxiliary bus driver -+ * @pf: Board private structure -+ */ -+static int ice_ptp_register_auxbus_driver(struct ice_pf *pf) -+{ -+ struct auxiliary_driver *aux_driver; -+ struct ice_ptp *ptp; -+ struct device *dev; -+ char *name; -+ int err; -+ -+ ptp = &pf->ptp; -+ dev = ice_pf_to_dev(pf); -+ aux_driver = &ptp->ports_owner.aux_driver; -+ INIT_LIST_HEAD(&ptp->ports_owner.ports); -+ mutex_init(&ptp->ports_owner.lock); -+ name = devm_kasprintf(dev, GFP_KERNEL, "ptp_aux_dev_%u_%u_clk%u", -+ pf->pdev->bus->number, PCI_SLOT(pf->pdev->devfn), -+ ice_get_ptp_src_clock_index(&pf->hw)); -+ -+ aux_driver->name = name; -+ aux_driver->shutdown = ice_ptp_auxbus_shutdown; -+ aux_driver->suspend = ice_ptp_auxbus_suspend; -+ aux_driver->remove = ice_ptp_auxbus_remove; -+ aux_driver->resume = ice_ptp_auxbus_resume; -+ aux_driver->probe = ice_ptp_auxbus_probe; -+ aux_driver->id_table = ice_ptp_auxbus_create_id_table(pf, name); -+ if (!aux_driver->id_table) -+ return -ENOMEM; -+ -+ err = auxiliary_driver_register(aux_driver); -+ if (err) { -+ devm_kfree(dev, aux_driver->id_table); -+ dev_err(dev, "Failed registering aux_driver, name <%s>\n", -+ name); -+ } -+ -+ return err; -+} -+ -+/** -+ * ice_ptp_unregister_auxbus_driver - Unregister PTP auxiliary bus driver -+ * @pf: Board private structure -+ */ -+static void ice_ptp_unregister_auxbus_driver(struct ice_pf *pf) -+{ -+ struct auxiliary_driver *aux_driver = &pf->ptp.ports_owner.aux_driver; -+ -+ auxiliary_driver_unregister(aux_driver); -+ devm_kfree(ice_pf_to_dev(pf), aux_driver->id_table); -+ -+ mutex_destroy(&pf->ptp.ports_owner.lock); -+} -+ - /** - * ice_ptp_prepare_for_reset - Prepare PTP for reset - * @pf: Board private structure -@@ -2635,7 +2872,15 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - /* Release the global hardware lock */ - ice_ptp_unlock(hw); - -- if (!ice_is_e810(hw)) { -+ if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) { -+ /* The clock owner for this device type handles the timestamp -+ * interrupt for all ports. -+ */ -+ ice_ptp_configure_tx_tstamp(pf, true); -+ -+ /* React on all quads interrupts for E82x */ -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); -+ - /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); - if (err) -@@ -2650,8 +2895,16 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - /* Store the PTP clock index for other PFs */ - ice_set_ptp_clock_index(pf); - -- return 0; -+ err = ice_ptp_register_auxbus_driver(pf); -+ if (err) { -+ dev_err(ice_pf_to_dev(pf), "Failed to register PTP auxbus driver"); -+ goto err_aux; -+ } - -+ return 0; -+err_aux: -+ ice_clear_ptp_clock_index(pf); -+ ptp_clock_unregister(pf->ptp.clock); - err_clk: - pf->ptp.clock = NULL; - err_exit: -@@ -2701,6 +2954,13 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); - case ICE_PHY_E822: -+ /* Non-owner PFs don't react to any interrupts on E82x, -+ * neither on own quad nor on others -+ */ -+ if (!ice_ptp_pf_handles_tx_interrupt(pf)) { -+ ice_ptp_configure_tx_tstamp(pf, false); -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); -+ } - kthread_init_delayed_work(&ptp_port->ov_work, - ice_ptp_wait_for_offsets); - -@@ -2711,6 +2971,101 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - } - } - -+/** -+ * ice_ptp_release_auxbus_device -+ * @dev: device that utilizes the auxbus -+ */ -+static void ice_ptp_release_auxbus_device(struct device *dev) -+{ -+ /* Doing nothing here, but handle to auxbux device must be satisfied */ -+} -+ -+/** -+ * ice_ptp_create_auxbus_device - Create PTP auxiliary bus device -+ * @pf: Board private structure -+ */ -+static int ice_ptp_create_auxbus_device(struct ice_pf *pf) -+{ -+ struct auxiliary_device *aux_dev; -+ struct ice_ptp *ptp; -+ struct device *dev; -+ char *name; -+ int err; -+ u32 id; -+ -+ ptp = &pf->ptp; -+ id = ptp->port.port_num; -+ dev = ice_pf_to_dev(pf); -+ -+ aux_dev = &ptp->port.aux_dev; -+ -+ name = devm_kasprintf(dev, GFP_KERNEL, "ptp_aux_dev_%u_%u_clk%u", -+ pf->pdev->bus->number, PCI_SLOT(pf->pdev->devfn), -+ ice_get_ptp_src_clock_index(&pf->hw)); -+ -+ aux_dev->name = name; -+ aux_dev->id = id; -+ aux_dev->dev.release = ice_ptp_release_auxbus_device; -+ aux_dev->dev.parent = dev; -+ -+ err = auxiliary_device_init(aux_dev); -+ if (err) -+ goto aux_err; -+ -+ err = auxiliary_device_add(aux_dev); -+ if (err) { -+ auxiliary_device_uninit(aux_dev); -+ goto aux_err; -+ } -+ -+ return 0; -+aux_err: -+ dev_err(dev, "Failed to create PTP auxiliary bus device <%s>\n", name); -+ devm_kfree(dev, name); -+ return err; -+} -+ -+/** -+ * ice_ptp_remove_auxbus_device - Remove PTP auxiliary bus device -+ * @pf: Board private structure -+ */ -+static void ice_ptp_remove_auxbus_device(struct ice_pf *pf) -+{ -+ struct auxiliary_device *aux_dev = &pf->ptp.port.aux_dev; -+ -+ auxiliary_device_delete(aux_dev); -+ auxiliary_device_uninit(aux_dev); -+ -+ memset(aux_dev, 0, sizeof(*aux_dev)); -+} -+ -+/** -+ * ice_ptp_init_tx_interrupt_mode - Initialize device Tx interrupt mode -+ * @pf: Board private structure -+ * -+ * Initialize the Tx timestamp interrupt mode for this device. For most device -+ * types, each PF processes the interrupt and manages its own timestamps. For -+ * E822-based devices, only the clock owner processes the timestamps. Other -+ * PFs disable the interrupt and do not process their own timestamps. -+ */ -+static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf) -+{ -+ switch (pf->hw.phy_model) { -+ case ICE_PHY_E822: -+ /* E822 based PHY has the clock owner process the interrupt -+ * for all ports. -+ */ -+ if (ice_pf_src_tmr_owned(pf)) -+ pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_ALL; -+ else -+ pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_NONE; -+ break; -+ default: -+ /* other PHY types handle their own Tx interrupt */ -+ pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_SELF; -+ } -+} -+ - /** - * ice_ptp_init - Initialize PTP hardware clock support - * @pf: Board private structure -@@ -2731,6 +3086,8 @@ void ice_ptp_init(struct ice_pf *pf) - - ice_ptp_init_phy_model(hw); - -+ ice_ptp_init_tx_interrupt_mode(pf); -+ - /* If this function owns the clock hardware, it must allocate and - * configure the PTP clock device to represent it. - */ -@@ -2753,6 +3110,10 @@ void ice_ptp_init(struct ice_pf *pf) - if (err) - goto err; - -+ err = ice_ptp_create_auxbus_device(pf); -+ if (err) -+ goto err; -+ - dev_info(ice_pf_to_dev(pf), "PTP init successful\n"); - return; - -@@ -2781,6 +3142,8 @@ void ice_ptp_release(struct ice_pf *pf) - /* Disable timestamping for both Tx and Rx */ - ice_ptp_cfg_timestamp(pf, false); - -+ ice_ptp_remove_auxbus_device(pf); -+ - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); - - clear_bit(ICE_FLAG_PTP, pf->flags); -@@ -2804,5 +3167,7 @@ void ice_ptp_release(struct ice_pf *pf) - ptp_clock_unregister(pf->ptp.clock); - pf->ptp.clock = NULL; - -+ ice_ptp_unregister_auxbus_driver(pf); -+ - dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 995a57019ba7..d94c22329df0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -157,7 +157,9 @@ struct ice_ptp_tx { - * ready for PTP functionality. It is used to track the port initialization - * and determine when the port's PHY offset is valid. - * -+ * @list_member: list member structure of auxiliary device - * @tx: Tx timestamp tracking for this port -+ * @aux_dev: auxiliary device associated with this port - * @ov_work: delayed work task for tracking when PHY offset is valid - * @ps_lock: mutex used to protect the overall PTP PHY start procedure - * @link_up: indicates whether the link is up -@@ -165,7 +167,9 @@ struct ice_ptp_tx { - * @port_num: the port number this structure represents - */ - struct ice_ptp_port { -+ struct list_head list_member; - struct ice_ptp_tx tx; -+ struct auxiliary_device aux_dev; - struct kthread_delayed_work ov_work; - struct mutex ps_lock; /* protects overall PTP PHY start procedure */ - bool link_up; -@@ -173,11 +177,35 @@ struct ice_ptp_port { - u8 port_num; - }; - -+enum ice_ptp_tx_interrupt { -+ ICE_PTP_TX_INTERRUPT_NONE = 0, -+ ICE_PTP_TX_INTERRUPT_SELF, -+ ICE_PTP_TX_INTERRUPT_ALL, -+}; -+ -+/** -+ * struct ice_ptp_port_owner - data used to handle the PTP clock owner info -+ * -+ * This structure contains data necessary for the PTP clock owner to correctly -+ * handle the timestamping feature for all attached ports. -+ * -+ * @aux_driver: the structure carring the auxiliary driver information -+ * @ports: list of porst handled by this port owner -+ * @lock: protect access to ports list -+ */ -+struct ice_ptp_port_owner { -+ struct auxiliary_driver aux_driver; -+ struct list_head ports; -+ struct mutex lock; -+}; -+ - #define GLTSYN_TGT_H_IDX_MAX 4 - - /** - * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK -+ * @tx_interrupt_mode: the TX interrupt mode for the PTP clock - * @port: data for the PHY port initialization procedure -+ * @ports_owner: data for the auxiliary driver owner - * @work: delayed work function for periodic tasks - * @cached_phc_time: a cached copy of the PHC time for timestamp extension - * @cached_phc_jiffies: jiffies when cached_phc_time was last updated -@@ -197,7 +225,9 @@ struct ice_ptp_port { - * @late_cached_phc_updates: number of times cached PHC update is late - */ - struct ice_ptp { -+ enum ice_ptp_tx_interrupt tx_interrupt_mode; - struct ice_ptp_port port; -+ struct ice_ptp_port_owner ports_owner; - struct kthread_delayed_work work; - u64 cached_phc_time; - unsigned long cached_phc_jiffies; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch b/kernel-std/debian/patches/ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch deleted file mode 100644 index 3078a79b..00000000 --- a/kernel-std/debian/patches/ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch +++ /dev/null @@ -1,95 +0,0 @@ -From f6af978ef435067b4c9f5ff5e159f8b65d969268 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Fri, 8 Sep 2023 14:37:14 -0700 -Subject: [PATCH 02/36] ice: introduce ice_pf_src_tmr_owned - -Add ice_pf_src_tmr_owned() macro to check the function capability bit -indicating if the current function owns the PTP hardware clock. This is -slightly shorter than the more verbose access via -hw.func_caps.ts_func_info.src_tmr_owned. Use this where possible rather -than open coding its equivalent. - -Signed-off-by: Jacob Keller -Signed-off-by: Tony Nguyen -(cherry picked from commit 42d40bb21e332151da6fb689bf7d4af8195866ed) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 ++ - drivers/net/ethernet/intel/ice/ice_lib.c | 2 +- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 6 +++--- - 4 files changed, 7 insertions(+), 5 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 0a3d76d184ba..54a98c4032b7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -197,6 +197,8 @@ extern const char ice_drv_ver[]; - - #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) - -+#define ice_pf_src_tmr_owned(pf) ((pf)->hw.func_caps.ts_func_info.src_tmr_owned) -+ - enum ice_feature { - ICE_F_DSCP, - ICE_F_PHY_RCLK, -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 632091487413..106ef843f4b5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4010,7 +4010,7 @@ void ice_init_feature_support(struct ice_pf *pf) - if (ice_is_phy_rclk_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_PHY_RCLK); - /* If we don't own the timer - don't enable other caps */ -- if (!pf->hw.func_caps.ts_func_info.src_tmr_owned) -+ if (!ice_pf_src_tmr_owned(pf)) - break; - if (ice_is_cgu_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_CGU); -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 39cb6ee52abe..e957529b3fd6 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3200,7 +3200,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - ena_mask &= ~PFINT_OICR_TSYN_EVNT_M; - -- if (hw->func_caps.ts_func_info.src_tmr_owned) { -+ if (ice_pf_src_tmr_owned(pf)) { - /* Save EVENTs from GLTSYN register */ - pf->ptp.ext_ts_irq |= gltsyn_stat & - (GLTSYN_STAT_EVENT0_M | -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index e3012608c9dd..b1951357ba9f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -448,7 +448,7 @@ static void ice_clear_ptp_clock_index(struct ice_pf *pf) - int err; - - /* Do not clear the index if we don't own the timer */ -- if (!hw->func_caps.ts_func_info.src_tmr_owned) -+ if (!ice_pf_src_tmr_owned(pf)) - return; - - tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -@@ -2538,7 +2538,7 @@ void ice_ptp_reset(struct ice_pf *pf) - if (test_bit(ICE_PFR_REQ, pf->state)) - goto pfr; - -- if (!hw->func_caps.ts_func_info.src_tmr_owned) -+ if (!ice_pf_src_tmr_owned(pf)) - goto reset_ts; - - err = ice_ptp_init_phc(hw); -@@ -3091,7 +3091,7 @@ void ice_ptp_init(struct ice_pf *pf) - /* If this function owns the clock hardware, it must allocate and - * configure the PTP clock device to represent it. - */ -- if (hw->func_caps.ts_func_info.src_tmr_owned) { -+ if (ice_pf_src_tmr_owned(pf)) { - err = ice_ptp_init_owner(pf); - if (err) - goto err; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch b/kernel-std/debian/patches/ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch deleted file mode 100644 index 206d655f..00000000 --- a/kernel-std/debian/patches/ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 3c155fbf8e2a0546302a01cc06e8ece18468148e Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Fri, 1 Dec 2023 10:08:42 -0800 -Subject: [PATCH 03/36] ice: Re-enable timestamping correctly after reset - -During reset, TX_TSYN interrupt should be processed as it may process -timestamps in brief moments before and after reset. -Timestamping should be enabled on VSIs at the end of reset procedure. -On ice_get_phy_tx_tstamp_ready error, interrupt should not be rearmed -because error only happens on resets. - -Reviewed-by: Jesse Brandeburg -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 1cc5b6eaad92d69fe4d84bbee5c12ee297d56296) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 19 ++++++++++--------- - 2 files changed, 11 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index e957529b3fd6..d2f3b4374d14 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3190,7 +3190,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (!hw->reset_ongoing && ice_ptp_pf_handles_tx_interrupt(pf)) -+ if (ice_ptp_pf_handles_tx_interrupt(pf)) - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); - } - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index b1951357ba9f..92459589f6ce 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -809,7 +809,9 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) - - /* Read the Tx ready status first */ - err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); -- if (err || tstamp_ready) -+ if (err) -+ break; -+ else if (tstamp_ready) - return ICE_TX_TSTAMP_WORK_PENDING; - } - -@@ -2535,12 +2537,10 @@ void ice_ptp_reset(struct ice_pf *pf) - int err, itr = 1; - u64 time_diff; - -- if (test_bit(ICE_PFR_REQ, pf->state)) -+ if (test_bit(ICE_PFR_REQ, pf->state) || -+ !ice_pf_src_tmr_owned(pf)) - goto pfr; - -- if (!ice_pf_src_tmr_owned(pf)) -- goto reset_ts; -- - err = ice_ptp_init_phc(hw); - if (err) - goto err; -@@ -2584,10 +2584,6 @@ void ice_ptp_reset(struct ice_pf *pf) - goto err; - } - --reset_ts: -- /* Restart the PHY timestamping block */ -- ice_ptp_reset_phy_timestamping(pf); -- - pfr: - /* Init Tx structures */ - if (ice_is_e810(&pf->hw)) { -@@ -2603,6 +2599,11 @@ void ice_ptp_reset(struct ice_pf *pf) - - set_bit(ICE_FLAG_PTP, pf->flags); - -+ /* Restart the PHY timestamping block */ -+ if (!test_bit(ICE_PFR_REQ, pf->state) && -+ ice_pf_src_tmr_owned(pf)) -+ ice_ptp_restart_all_phy(pf); -+ - /* Start periodic work going */ - kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch b/kernel-std/debian/patches/ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch deleted file mode 100644 index 29d0c524..00000000 --- a/kernel-std/debian/patches/ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 214f06259ade960e3790b62f96bc1b75e5b76e79 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Fri, 1 Dec 2023 10:08:43 -0800 -Subject: [PATCH 04/36] ice: periodically kick Tx timestamp interrupt - -The E822 hardware for Tx timestamping keeps track of how many -outstanding timestamps are still in the PHY memory block. It will not -generate a new interrupt to the MAC until all of the timestamps in the -region have been read. - -If somehow all the available data is not read, but the driver has exited -its interrupt routine already, the PHY will not generate a new interrupt -even if new timestamp data is captured. Because no interrupt is -generated, the driver never processes the timestamp data. This state -results in a permanent failure for all future Tx timestamps. - -It is not clear how the driver and hardware could enter this state. -However, if it does, there is currently no recovery mechanism. - -Add a recovery mechanism via the periodic PTP work thread which invokes -ice_ptp_periodic_work(). Introduce a new check, -ice_ptp_maybe_trigger_tx_interrupt() which checks the PHY timestamp -ready bitmask. If any bits are set, trigger a software interrupt by -writing to PFINT_OICR. - -Once triggered, the main timestamp processing thread will read through -the PHY data and clear the outstanding timestamp data. Once cleared, new -data should trigger interrupts as expected. - -This should allow recovery from such a state rather than leaving the -device in a state where we cannot process Tx timestamps. - -It is possible that this function checks for timestamp data -simultaneously with the interrupt, and it might trigger additional -unnecessary interrupts. This will cause a small amount of additional -processing. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Andrii Staikov -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 712e876371f8350c446a33577cf4a0aedcd4742a) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 50 ++++++++++++++++++++++++ - 1 file changed, 50 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 92459589f6ce..0d6c7215e0c1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -2509,6 +2509,54 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf) - } - } - -+/** -+ * ice_ptp_maybe_trigger_tx_interrupt - Trigger Tx timstamp interrupt -+ * @pf: Board private structure -+ * -+ * The device PHY issues Tx timestamp interrupts to the driver for processing -+ * timestamp data from the PHY. It will not interrupt again until all -+ * current timestamp data is read. In rare circumstances, it is possible that -+ * the driver fails to read all outstanding data. -+ * -+ * To avoid getting permanently stuck, periodically check if the PHY has -+ * outstanding timestamp data. If so, trigger an interrupt from software to -+ * process this data. -+ */ -+static void ice_ptp_maybe_trigger_tx_interrupt(struct ice_pf *pf) -+{ -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ bool trigger_oicr = false; -+ unsigned int i; -+ -+ if (ice_is_e810(hw)) -+ return; -+ -+ if (!ice_pf_src_tmr_owned(pf)) -+ return; -+ -+ for (i = 0; i < ICE_MAX_QUAD; i++) { -+ u64 tstamp_ready; -+ int err; -+ -+ err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); -+ if (!err && tstamp_ready) { -+ trigger_oicr = true; -+ break; -+ } -+ } -+ -+ if (trigger_oicr) { -+ /* Trigger a software interrupt, to ensure this data -+ * gets processed. -+ */ -+ dev_dbg(dev, "PTP periodic task detected waiting timestamps. Triggering Tx timestamp interrupt now.\n"); -+ -+ wr32(hw, PFINT_OICR, PFINT_OICR_TSYN_TX_M); -+ ice_flush(hw); -+ } -+} -+ - static void ice_ptp_periodic_work(struct kthread_work *work) - { - struct ice_ptp *ptp = container_of(work, struct ice_ptp, work.work); -@@ -2520,6 +2568,8 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - - err = ice_ptp_update_cached_phctime(pf); - -+ ice_ptp_maybe_trigger_tx_interrupt(pf); -+ - /* Run twice a second or reschedule if phc update failed */ - kthread_queue_delayed_work(ptp->kworker, &ptp->work, - msecs_to_jiffies(err ? 10 : 500)); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch b/kernel-std/debian/patches/ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch deleted file mode 100644 index a31b8b17..00000000 --- a/kernel-std/debian/patches/ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch +++ /dev/null @@ -1,81 +0,0 @@ -From c25fc364d599195403ed9ba51ef8fa6ed3b642ff Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 26 Jul 2023 11:27:44 -0700 -Subject: [PATCH 05/36] ice: PTP: Rename macros used for PHY/QUAD port - definitions - -The ice_fill_phy_msg_e822 function uses several macros to specify the -correct address when sending a sideband message to the PHY block in -hardware. - -The names of these macros are fairly generic and confusing. Future -development is going to extend the driver to support new hardware families -which have different relationships between PHY and QUAD. Rename the macros -for clarity and to indicate that they are E822 specific. This also matches -closer to the hardware specification in the data sheet. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 64fd7de2469dd52a7f1517ce95ae22fcb391a8a1) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 8 ++++---- - drivers/net/ethernet/intel/ice/ice_type.h | 14 +++++++------- - 2 files changed, 11 insertions(+), 11 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index a299af39a7c4..03c4aa995e8d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -294,9 +294,9 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - { - int phy_port, phy, quadtype; - -- phy_port = port % ICE_PORTS_PER_PHY; -- phy = port / ICE_PORTS_PER_PHY; -- quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_NUM_QUAD_TYPE; -+ phy_port = port % ICE_PORTS_PER_PHY_E822; -+ phy = port / ICE_PORTS_PER_PHY_E822; -+ quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E822; - - if (quadtype == 0) { - msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port); -@@ -628,7 +628,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - - msg->dest_dev = rmn_0; - -- if ((quad % ICE_NUM_QUAD_TYPE) == 0) -+ if ((quad % ICE_QUADS_PER_PHY_E822) == 0) - addr = Q_0_BASE + offset; - else - addr = Q_1_BASE + offset; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 4cd131546aa9..bb5d8b681bc2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -909,13 +909,13 @@ struct ice_hw { - /* INTRL granularity in 1 us */ - u8 intrl_gran; - --#define ICE_PHY_PER_NAC 1 --#define ICE_MAX_QUAD 2 --#define ICE_NUM_QUAD_TYPE 2 --#define ICE_PORTS_PER_QUAD 4 --#define ICE_PHY_0_LAST_QUAD 1 --#define ICE_PORTS_PER_PHY 8 --#define ICE_NUM_EXTERNAL_PORTS ICE_PORTS_PER_PHY -+#define ICE_PHY_PER_NAC_E822 1 -+#define ICE_MAX_QUAD 2 -+#define ICE_QUADS_PER_PHY_E822 2 -+#define ICE_PORTS_PER_PHY_E822 8 -+#define ICE_PORTS_PER_QUAD 4 -+#define ICE_PORTS_PER_PHY_E810 4 -+#define ICE_NUM_EXTERNAL_PORTS (ICE_MAX_QUAD * ICE_PORTS_PER_QUAD) - - /* Active package version (currently active) */ - struct ice_pkg_ver active_pkg_ver; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch b/kernel-std/debian/patches/ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch deleted file mode 100644 index 0faf7dd3..00000000 --- a/kernel-std/debian/patches/ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 13f48f4c94ad4d317e7c7ccaa188a11850a8aa32 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 26 Jul 2023 11:27:45 -0700 -Subject: [PATCH 06/36] ice: PTP: move quad value check inside - ice_fill_phy_msg_e822 - -The callers of ice_fill_phy_msg_e822 check for whether the quad number is -within the expected range. Move this check inside the ice_fill_phy_msg_e822 -function instead of duplicating it twice. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit dd84744cf5ea967c8d53aae6b6a45703dbc5c5c4) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 19 ++++++++++++------- - 1 file changed, 12 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 03c4aa995e8d..e024b88ce32b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -621,11 +621,14 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - * Fill a message buffer for accessing a register in a quad shared between - * multiple PHYs. - */ --static void -+static int - ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - { - u32 addr; - -+ if (quad >= ICE_MAX_QUAD) -+ return -EINVAL; -+ - msg->dest_dev = rmn_0; - - if ((quad % ICE_QUADS_PER_PHY_E822) == 0) -@@ -635,6 +638,8 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - - msg->msg_addr_low = lower_16_bits(addr); - msg->msg_addr_high = upper_16_bits(addr); -+ -+ return 0; - } - - /** -@@ -653,10 +658,10 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- if (quad >= ICE_MAX_QUAD) -- return -EINVAL; -+ err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ if (err) -+ return err; - -- ice_fill_quad_msg_e822(&msg, quad, offset); - msg.opcode = ice_sbq_msg_rd; - - err = ice_sbq_rw_reg(hw, &msg); -@@ -687,10 +692,10 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- if (quad >= ICE_MAX_QUAD) -- return -EINVAL; -+ err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ if (err) -+ return err; - -- ice_fill_quad_msg_e822(&msg, quad, offset); - msg.opcode = ice_sbq_msg_wr; - msg.data = val; - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch b/kernel-std/debian/patches/ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch deleted file mode 100644 index a2e95af6..00000000 --- a/kernel-std/debian/patches/ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 7dae9333af82f6c9e2db1940c3a10ae38dabea7b Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 21 Nov 2023 13:12:55 -0800 -Subject: [PATCH 07/36] ice: remove ptp_tx ring parameter flag - -Before performing a Tx timestamp in ice_stamp(), the driver checks a ptp_tx -ring variable to see if timestamping is enabled on that ring. This value is -set for all rings whenever userspace configures Tx timestamping. - -Ostensibly this was done to avoid wasting cycles checking other fields when -timestamping has not been enabled. However, for Tx timestamps we already -get an individual per-SKB flag indicating whether userspace wants to -request a timestamp on that packet. We do not gain much by also having -a separate flag to check for whether timestamping was enabled. - -In fact, the driver currently fails to restore the field after a PF reset. -Because of this, if a PF reset occurs, timestamps will be disabled. - -Since this flag doesn't add value in the hotpath, remove it and always -provide a timestamp if the SKB flag has been set. - -A following change will fix the reset path to properly restore user -timestamping configuration completely. - -This went unnoticed for some time because one of the most common -applications using Tx timestamps, ptp4l, will reconfigure the socket as -part of its fault recovery logic. - -Fixes: ea9b847cda64 ("ice: enable transmit timestamps for E810 devices") -Signed-off-by: Jacob Keller -Reviewed-by: Jesse Brandeburg -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 0ffb08b1a45bd6b7694e01da0e1d9e3e788418fb) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 14 -------------- - drivers/net/ethernet/intel/ice/ice_txrx.c | 3 --- - drivers/net/ethernet/intel/ice/ice_txrx.h | 1 - - 3 files changed, 18 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 0d6c7215e0c1..c03153bdb7c3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -280,20 +280,6 @@ static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) - */ - static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - { -- struct ice_vsi *vsi; -- u16 i; -- -- vsi = ice_get_main_vsi(pf); -- if (!vsi) -- return; -- -- /* Set the timestamp enable flag for all the Tx rings */ -- ice_for_each_txq(vsi, i) { -- if (!vsi->tx_rings[i]) -- continue; -- vsi->tx_rings[i]->ptp_tx = on; -- } -- - if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) - ice_ptp_configure_tx_tstamp(pf, on); - -diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.c b/drivers/net/ethernet/intel/ice/ice_txrx.c -index 24c914015973..9170a3e8f088 100644 ---- a/drivers/net/ethernet/intel/ice/ice_txrx.c -+++ b/drivers/net/ethernet/intel/ice/ice_txrx.c -@@ -2305,9 +2305,6 @@ ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb, - if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) - return; - -- if (!tx_ring->ptp_tx) -- return; -- - /* Tx timestamps cannot be sampled when doing TSO */ - if (first->tx_flags & ICE_TX_FLAGS_TSO) - return; -diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.h b/drivers/net/ethernet/intel/ice/ice_txrx.h -index 407d4c320097..b28b9826bbcd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_txrx.h -+++ b/drivers/net/ethernet/intel/ice/ice_txrx.h -@@ -381,7 +381,6 @@ struct ice_tx_ring { - #define ICE_TX_FLAGS_RING_VLAN_L2TAG2 BIT(2) - u8 flags; - u8 dcb_tc; /* Traffic class of ring */ -- u8 ptp_tx; - } ____cacheline_internodealigned_in_smp; - - static inline bool ice_ring_uses_build_skb(struct ice_rx_ring *ring) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch b/kernel-std/debian/patches/ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch deleted file mode 100644 index 9b7c9ca9..00000000 --- a/kernel-std/debian/patches/ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch +++ /dev/null @@ -1,160 +0,0 @@ -From 99007ca6255e2c35256bd97fa141705d301eb934 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 21 Nov 2023 13:12:56 -0800 -Subject: [PATCH 08/36] ice: unify logic for programming PFINT_TSYN_MSK - -Commit d938a8cca88a ("ice: Auxbus devices & driver for E822 TS") modified -how Tx timestamps are handled for E822 devices. On these devices, only the -clock owner handles reading the Tx timestamp data from firmware. To do -this, the PFINT_TSYN_MSK register is modified from the default value to one -which enables reacting to a Tx timestamp on all PHY ports. - -The driver currently programs PFINT_TSYN_MSK in different places depending -on whether the port is the clock owner or not. For the clock owner, the -PFINT_TSYN_MSK value is programmed during ice_ptp_init_owner just before -calling ice_ptp_tx_ena_intr to program the PHY ports. - -For the non-clock owner ports, the PFINT_TSYN_MSK is programmed during -ice_ptp_init_port. - -If a large enough device reset occurs, the PFINT_TSYN_MSK register will be -reset to the default value in which only the PHY associated directly with -the PF will cause the Tx timestamp interrupt to trigger. - -The driver lacks logic to reprogram the PFINT_TSYN_MSK register after a -device reset. For the E822 device, this results in the PF no longer -responding to interrupts for other ports. This results in failure to -deliver Tx timestamps to user space applications. - -Rename ice_ptp_configure_tx_tstamp to ice_ptp_cfg_tx_interrupt, and unify -the logic for programming PFINT_TSYN_MSK and PFINT_OICR_ENA into one place. -This function will program both registers according to the combination of -user configuration and device requirements. - -This ensures that PFINT_TSYN_MSK is always restored when we configure the -Tx timestamp interrupt. - -Fixes: d938a8cca88a ("ice: Auxbus devices & driver for E822 TS") -Signed-off-by: Jacob Keller -Reviewed-by: Jesse Brandeburg -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 7d606a1e2d0575b6c3a2600f43f90d1e409f9661) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 60 ++++++++++++++---------- - 1 file changed, 34 insertions(+), 26 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index c03153bdb7c3..b0bba866e8a2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -256,21 +256,42 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, - } - - /** -- * ice_ptp_configure_tx_tstamp - Enable or disable Tx timestamp interrupt -- * @pf: The PF pointer to search in -- * @on: bool value for whether timestamp interrupt is enabled or disabled -+ * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device -+ * @pf: Board private structure -+ * -+ * Program the device to respond appropriately to the Tx timestamp interrupt -+ * cause. - */ --static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) -+static void ice_ptp_cfg_tx_interrupt(struct ice_pf *pf) - { -+ struct ice_hw *hw = &pf->hw; -+ bool enable; - u32 val; - -+ switch (pf->ptp.tx_interrupt_mode) { -+ case ICE_PTP_TX_INTERRUPT_ALL: -+ /* React to interrupts across all quads. */ -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); -+ enable = true; -+ break; -+ case ICE_PTP_TX_INTERRUPT_NONE: -+ /* Do not react to interrupts on any quad. */ -+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); -+ enable = false; -+ break; -+ case ICE_PTP_TX_INTERRUPT_SELF: -+ default: -+ enable = pf->ptp.tstamp_config.tx_type == HWTSTAMP_TX_ON; -+ break; -+ } -+ - /* Configure the Tx timestamp interrupt */ -- val = rd32(&pf->hw, PFINT_OICR_ENA); -- if (on) -+ val = rd32(hw, PFINT_OICR_ENA); -+ if (enable) - val |= PFINT_OICR_TSYN_TX_M; - else - val &= ~PFINT_OICR_TSYN_TX_M; -- wr32(&pf->hw, PFINT_OICR_ENA, val); -+ wr32(hw, PFINT_OICR_ENA, val); - } - - /** -@@ -280,10 +301,9 @@ static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on) - */ - static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) - { -- if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -- ice_ptp_configure_tx_tstamp(pf, on); -- - pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; -+ -+ ice_ptp_cfg_tx_interrupt(pf); - } - - /** -@@ -2909,15 +2929,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - /* Release the global hardware lock */ - ice_ptp_unlock(hw); - -- if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) { -- /* The clock owner for this device type handles the timestamp -- * interrupt for all ports. -- */ -- ice_ptp_configure_tx_tstamp(pf, true); -- -- /* React on all quads interrupts for E82x */ -- wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); -- -+ if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ - err = ice_ptp_tx_ena_intr(pf, true, itr); - if (err) -@@ -2991,13 +3003,6 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); - case ICE_PHY_E822: -- /* Non-owner PFs don't react to any interrupts on E82x, -- * neither on own quad nor on others -- */ -- if (!ice_ptp_pf_handles_tx_interrupt(pf)) { -- ice_ptp_configure_tx_tstamp(pf, false); -- wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); -- } - kthread_init_delayed_work(&ptp_port->ov_work, - ice_ptp_wait_for_offsets); - -@@ -3142,6 +3147,9 @@ void ice_ptp_init(struct ice_pf *pf) - /* Start the PHY timestamping block */ - ice_ptp_reset_phy_timestamping(pf); - -+ /* Configure initial Tx interrupt settings */ -+ ice_ptp_cfg_tx_interrupt(pf); -+ - set_bit(ICE_FLAG_PTP, pf->flags); - err = ice_ptp_init_work(pf, ptp); - if (err) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch b/kernel-std/debian/patches/ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch deleted file mode 100644 index 76770529..00000000 --- a/kernel-std/debian/patches/ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch +++ /dev/null @@ -1,147 +0,0 @@ -From e5a65377977e338a8f7baf92892481acf1c62403 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 26 Jul 2023 11:27:43 -0700 -Subject: [PATCH 09/36] ice: PTP: Clean up timestamp registers correctly - -E822 PHY TS registers should not be written and the only way to clean up -them is to reset QUAD memory. - -To ensure that the status bit for the timestamp index is cleared, ensure -that ice_clear_phy_tstamp implementations first read the timestamp out. -Implementations which can write the register continue to do so. - -Add a note to indicate this function should only be called on timestamps -which have their valid bit set. Update the dynamic debug messages to -reflect the actual action taken. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit be65a1a33bdee3912daac50aa6c5270ec9c37010) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 70 +++++++++++++-------- - 1 file changed, 45 insertions(+), 25 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index e024b88ce32b..cd28430cfdda 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -759,29 +759,32 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - * @quad: the quad to read from - * @idx: the timestamp index to reset - * -- * Clear a timestamp, resetting its valid bit, from the PHY quad block that is -- * shared between the internal PHYs on the E822 devices. -+ * Read the timestamp out of the quad to clear its timestamp status bit from -+ * the PHY quad block that is shared between the internal PHYs of the E822 -+ * devices. -+ * -+ * Note that unlike E810, software cannot directly write to the quad memory -+ * bank registers. E822 relies on the ice_get_phy_tx_tstamp_ready() function -+ * to determine which timestamps are valid. Reading a timestamp auto-clears -+ * the valid bit. -+ * -+ * To directly clear the contents of the timestamp block entirely, discarding -+ * all timestamp data at once, software should instead use -+ * ice_ptp_reset_ts_memory_quad_e822(). -+ * -+ * This function should only be called on an idx whose bit is set according to -+ * ice_get_phy_tx_tstamp_ready(). - */ - static int - ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) - { -- u16 lo_addr, hi_addr; -+ u64 unused_tstamp; - int err; - -- lo_addr = (u16)TS_L(Q_REG_TX_MEMORY_BANK_START, idx); -- hi_addr = (u16)TS_H(Q_REG_TX_MEMORY_BANK_START, idx); -- -- err = ice_write_quad_reg_e822(hw, quad, lo_addr, 0); -- if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear low PTP timestamp register, err %d\n", -- err); -- return err; -- } -- -- err = ice_write_quad_reg_e822(hw, quad, hi_addr, 0); -+ err = ice_read_phy_tstamp_e822(hw, quad, idx, &unused_tstamp); - if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear high PTP timestamp register, err %d\n", -- err); -+ ice_debug(hw, ICE_DBG_PTP, "Failed to read the timestamp register for quad %u, idx %u, err %d\n", -+ quad, idx, err); - return err; - } - -@@ -2816,28 +2819,39 @@ ice_read_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp) - * @lport: the lport to read from - * @idx: the timestamp index to reset - * -- * Clear a timestamp, resetting its valid bit, from the timestamp block of the -- * external PHY on the E810 device. -+ * Read the timestamp and then forcibly overwrite its value to clear the valid -+ * bit from the timestamp block of the external PHY on the E810 device. -+ * -+ * This function should only be called on an idx whose bit is set according to -+ * ice_get_phy_tx_tstamp_ready(). - */ - static int ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) - { - u32 lo_addr, hi_addr; -+ u64 unused_tstamp; - int err; - -+ err = ice_read_phy_tstamp_e810(hw, lport, idx, &unused_tstamp); -+ if (err) { -+ ice_debug(hw, ICE_DBG_PTP, "Failed to read the timestamp register for lport %u, idx %u, err %d\n", -+ lport, idx, err); -+ return err; -+ } -+ - lo_addr = TS_EXT(LOW_TX_MEMORY_BANK_START, lport, idx); - hi_addr = TS_EXT(HIGH_TX_MEMORY_BANK_START, lport, idx); - - err = ice_write_phy_reg_e810(hw, lo_addr, 0); - if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear low PTP timestamp register, err %d\n", -- err); -+ ice_debug(hw, ICE_DBG_PTP, "Failed to clear low PTP timestamp register for lport %u, idx %u, err %d\n", -+ lport, idx, err); - return err; - } - - err = ice_write_phy_reg_e810(hw, hi_addr, 0); - if (err) { -- ice_debug(hw, ICE_DBG_PTP, "Failed to clear high PTP timestamp register, err %d\n", -- err); -+ ice_debug(hw, ICE_DBG_PTP, "Failed to clear high PTP timestamp register for lport %u, idx %u, err %d\n", -+ lport, idx, err); - return err; - } - -@@ -3519,9 +3533,15 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - * @block: the block to read from - * @idx: the timestamp index to reset - * -- * Clear a timestamp, resetting its valid bit, from the timestamp block. For -- * E822 devices, the block is the quad to clear from. For E810 devices, the -- * block is the logical port to clear from. -+ * Clear a timestamp from the timestamp block, discarding its value without -+ * returning it. This resets the memory status bit for the timestamp index -+ * allowing it to be reused for another timestamp in the future. -+ * -+ * For E822 devices, the block number is the PHY quad to clear from. For E810 -+ * devices, the block number is the logical port to clear from. -+ * -+ * This function must only be called on a timestamp index whose valid bit is -+ * set according to ice_get_phy_tx_tstamp_ready(). - */ - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - { --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch b/kernel-std/debian/patches/ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch deleted file mode 100644 index 2a88fb45..00000000 --- a/kernel-std/debian/patches/ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch +++ /dev/null @@ -1,65 +0,0 @@ -From e2a74a0a7dd399b0ee2ddd4889c609dedb85bfb5 Mon Sep 17 00:00:00 2001 -From: Michal Michalik -Date: Thu, 27 Jul 2023 15:50:35 +0200 -Subject: [PATCH 10/36] ice: Use PTP auxbus for all PHYs restart in E822 - -The E822 (and other devices based on the same PHY) is having issue while -setting the PHC timer - the PHY timers are drifting from the PHC. After -such a set all PHYs need to be restarted and resynchronised - do it -using auxiliary bus. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Michal Michalik -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit af3c5c8748e6d286d4f2dd9800f9d27f29b8e2ef) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 24 +++++++++++++++++++++--- - 1 file changed, 21 insertions(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index b0bba866e8a2..42eb1418eb90 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1496,6 +1496,24 @@ static void ice_ptp_reset_phy_timestamping(struct ice_pf *pf) - ice_ptp_port_phy_restart(&pf->ptp.port); - } - -+/** -+ * ice_ptp_restart_all_phy - Restart all PHYs to recalibrate timestamping -+ * @pf: Board private structure -+ */ -+static void ice_ptp_restart_all_phy(struct ice_pf *pf) -+{ -+ struct list_head *entry; -+ -+ list_for_each(entry, &pf->ptp.ports_owner.ports) { -+ struct ice_ptp_port *port = list_entry(entry, -+ struct ice_ptp_port, -+ list_member); -+ -+ if (port->link_up) -+ ice_ptp_port_phy_restart(port); -+ } -+} -+ - /** - * ice_ptp_adjfine - Adjust clock increment rate - * @info: the driver's PTP info structure -@@ -1933,9 +1951,9 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts) - /* Reenable periodic outputs */ - ice_ptp_enable_all_clkout(pf); - -- /* Recalibrate and re-enable timestamp block */ -- if (pf->ptp.port.link_up) -- ice_ptp_port_phy_restart(&pf->ptp.port); -+ /* Recalibrate and re-enable timestamp blocks for E822/E823 */ -+ if (hw->phy_model == ICE_PHY_E822) -+ ice_ptp_restart_all_phy(pf); - exit: - if (err) { - dev_err(ice_pf_to_dev(pf), "PTP failed to set time %d\n", err); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0011-ice-Rename-E822-to-E82X.patch b/kernel-std/debian/patches/ice-VDF/0011-ice-Rename-E822-to-E82X.patch deleted file mode 100644 index 5f259989..00000000 --- a/kernel-std/debian/patches/ice-VDF/0011-ice-Rename-E822-to-E82X.patch +++ /dev/null @@ -1,2177 +0,0 @@ -From ed199ec1c5886cf9830921b9380cf91ee216f26f Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Fri, 1 Dec 2023 10:08:44 -0800 -Subject: [PATCH 11/36] ice: Rename E822 to E82X - -When code is applicable for both E822 and E823 devices, rename it from -E822 to E82X. -ICE_PHY_PER_NAC_E822 was unused, so just remove it. - -Signed-off-by: Karol Kolacinski -Reviewed-by: Przemek Kitszel -Reviewed-by: Simon Horman -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit a39dd252d552ab3212fea55330081ee64a9e5573) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 48 +- - drivers/net/ethernet/intel/ice/ice_ptp.h | 2 +- - .../net/ethernet/intel/ice/ice_ptp_consts.h | 12 +- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 444 +++++++++--------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 48 +- - drivers/net/ethernet/intel/ice/ice_type.h | 7 +- - 6 files changed, 280 insertions(+), 281 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 42eb1418eb90..2e6e1fc84d11 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -7,7 +7,7 @@ - - #define E810_OUT_PROP_DELAY_NS 1 - --#define UNKNOWN_INCVAL_E822 0x100000000ULL -+#define UNKNOWN_INCVAL_E82X 0x100000000ULL - - static const struct ptp_pin_desc ice_pin_desc_e810t[] = { - /* name idx func chan */ -@@ -987,7 +987,7 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - } - - /** -- * ice_ptp_init_tx_e822 - Initialize tracking for Tx timestamps -+ * ice_ptp_init_tx_e82x - Initialize tracking for Tx timestamps - * @pf: Board private structure - * @tx: the Tx tracking structure to initialize - * @port: the port this structure tracks -@@ -998,11 +998,11 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - * registers into chunks based on the port number. - */ - static int --ice_ptp_init_tx_e822(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) -+ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) - { - tx->block = port / ICE_PORTS_PER_QUAD; -- tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E822; -- tx->len = INDEX_PER_PORT_E822; -+ tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; -+ tx->len = INDEX_PER_PORT_E82X; - tx->verify_cached = 0; - - return ice_ptp_alloc_tx_tracker(tx); -@@ -1205,10 +1205,10 @@ static u64 ice_base_incval(struct ice_pf *pf) - - if (ice_is_e810(hw)) - incval = ICE_PTP_NOMINAL_INCVAL_E810; -- else if (ice_e822_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) -- incval = ice_e822_nominal_incval(ice_e822_time_ref(hw)); -+ else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) -+ incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); - else -- incval = UNKNOWN_INCVAL_E822; -+ incval = UNKNOWN_INCVAL_E82X; - - dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", - incval); -@@ -1237,10 +1237,10 @@ static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port) - - /* need to read FIFO state */ - if (offs == 0 || offs == 1) -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_FIFO01_STATUS, -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_FIFO01_STATUS, - &val); - else -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_FIFO23_STATUS, -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_FIFO23_STATUS, - &val); - - if (err) { -@@ -1268,7 +1268,7 @@ static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port) - dev_dbg(ice_pf_to_dev(pf), - "Port %d Tx FIFO still not empty; resetting quad %d\n", - port->port_num, quad); -- ice_ptp_reset_ts_memory_quad_e822(hw, quad); -+ ice_ptp_reset_ts_memory_quad_e82x(hw, quad); - port->tx_fifo_busy_cnt = FIFO_OK; - return 0; - } -@@ -1313,8 +1313,8 @@ static void ice_ptp_wait_for_offsets(struct kthread_work *work) - - tx_err = ice_ptp_check_tx_fifo(port); - if (!tx_err) -- tx_err = ice_phy_cfg_tx_offset_e822(hw, port->port_num); -- rx_err = ice_phy_cfg_rx_offset_e822(hw, port->port_num); -+ tx_err = ice_phy_cfg_tx_offset_e82x(hw, port->port_num); -+ rx_err = ice_phy_cfg_rx_offset_e82x(hw, port->port_num); - if (tx_err || rx_err) { - /* Tx and/or Rx offset not yet configured, try again later */ - kthread_queue_delayed_work(pf->ptp.kworker, -@@ -1343,7 +1343,7 @@ ice_ptp_port_phy_stop(struct ice_ptp_port *ptp_port) - - kthread_cancel_delayed_work_sync(&ptp_port->ov_work); - -- err = ice_stop_phy_timer_e822(hw, port, true); -+ err = ice_stop_phy_timer_e82x(hw, port, true); - if (err) - dev_err(ice_pf_to_dev(pf), "PTP failed to set PHY port %d down, err %d\n", - port, err); -@@ -1386,7 +1386,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - ptp_port->tx_fifo_busy_cnt = 0; - - /* Start the PHY timer in Vernier mode */ -- err = ice_start_phy_timer_e822(hw, port); -+ err = ice_start_phy_timer_e82x(hw, port); - if (err) - goto out_unlock; - -@@ -1435,7 +1435,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - case ICE_PHY_E810: - /* Do not reconfigure E810 PHY */ - return; -- case ICE_PHY_E822: -+ case ICE_PHY_E82X: - ice_ptp_port_phy_restart(ptp_port); - return; - default: -@@ -1461,7 +1461,7 @@ static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) - ice_ptp_reset_ts_memory(hw); - - for (quad = 0; quad < ICE_MAX_QUAD; quad++) { -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, - &val); - if (err) - break; -@@ -1475,7 +1475,7 @@ static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) - val &= ~Q_REG_TX_MEM_GBL_CFG_INTR_ENA_M; - } - -- err = ice_write_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, -+ err = ice_write_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, - val); - if (err) - break; -@@ -1713,7 +1713,7 @@ static int ice_ptp_cfg_clkout(struct ice_pf *pf, unsigned int chan, - if (ice_is_e810(hw)) - start_time -= E810_OUT_PROP_DELAY_NS; - else -- start_time -= ice_e822_pps_delay(ice_e822_time_ref(hw)); -+ start_time -= ice_e82x_pps_delay(ice_e82x_time_ref(hw)); - - /* 2. Write TARGET time */ - wr32(hw, GLTSYN_TGT_L(chan, tmr_idx), lower_32_bits(start_time)); -@@ -1952,7 +1952,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts) - ice_ptp_enable_all_clkout(pf); - - /* Recalibrate and re-enable timestamp blocks for E822/E823 */ -- if (hw->phy_model == ICE_PHY_E822) -+ if (hw->phy_model == ICE_PHY_E82X) - ice_ptp_restart_all_phy(pf); - exit: - if (err) { -@@ -2665,7 +2665,7 @@ void ice_ptp_reset(struct ice_pf *pf) - } else { - kthread_init_delayed_work(&ptp->port.ov_work, - ice_ptp_wait_for_offsets); -- err = ice_ptp_init_tx_e822(pf, &ptp->port.tx, -+ err = ice_ptp_init_tx_e82x(pf, &ptp->port.tx, - ptp->port.port_num); - } - if (err) -@@ -3020,11 +3020,11 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); -- case ICE_PHY_E822: -+ case ICE_PHY_E82X: - kthread_init_delayed_work(&ptp_port->ov_work, - ice_ptp_wait_for_offsets); - -- return ice_ptp_init_tx_e822(pf, &ptp_port->tx, -+ return ice_ptp_init_tx_e82x(pf, &ptp_port->tx, - ptp_port->port_num); - default: - return -ENODEV; -@@ -3111,7 +3111,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf) - static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf) - { - switch (pf->hw.phy_model) { -- case ICE_PHY_E822: -+ case ICE_PHY_E82X: - /* E822 based PHY has the clock owner process the interrupt - * for all ports. - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index d94c22329df0..a3ae008a3539 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -147,7 +147,7 @@ struct ice_ptp_tx { - - /* Quad and port information for initializing timestamp blocks */ - #define INDEX_PER_QUAD 64 --#define INDEX_PER_PORT_E822 16 -+#define INDEX_PER_PORT_E82X 16 - #define INDEX_PER_PORT_E810 64 - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h -index 4109aa3b2fcd..2c4dab0c48ab 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h -@@ -9,17 +9,17 @@ - */ - /* Constants defined for the PTP 1588 clock hardware. */ - --/* struct ice_time_ref_info_e822 -+/* struct ice_time_ref_info_e82x - * - * E822 hardware can use different sources as the reference for the PTP - * hardware clock. Each clock has different characteristics such as a slightly - * different frequency, etc. - * - * This lookup table defines several constants that depend on the current time -- * reference. See the struct ice_time_ref_info_e822 for information about the -+ * reference. See the struct ice_time_ref_info_e82x for information about the - * meaning of each constant. - */ --const struct ice_time_ref_info_e822 e822_time_ref[NUM_ICE_TIME_REF_FREQ] = { -+const struct ice_time_ref_info_e82x e822_time_ref[NUM_ICE_TIME_REF_FREQ] = { - /* ICE_TIME_REF_FREQ_25_000 -> 25 MHz */ - { - /* pll_freq */ -@@ -81,7 +81,7 @@ const struct ice_time_ref_info_e822 e822_time_ref[NUM_ICE_TIME_REF_FREQ] = { - }, - }; - --const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { -+const struct ice_cgu_pll_params_e82x e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { - /* ICE_TIME_REF_FREQ_25_000 -> 25 MHz */ - { - /* refclk_pre_div */ -@@ -155,7 +155,7 @@ const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { - }, - }; - --/* struct ice_vernier_info_e822 -+/* struct ice_vernier_info_e82x - * - * E822 hardware calibrates the delay of the timestamp indication from the - * actual packet transmission or reception during the initialization of the -@@ -168,7 +168,7 @@ const struct ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = { - * used by this link speed, and that the register should be cleared by writing - * 0. Other values specify the clock frequency in Hz. - */ --const struct ice_vernier_info_e822 e822_vernier[NUM_ICE_PTP_LNK_SPD] = { -+const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD] = { - /* ICE_PTP_LNK_SPD_1G */ - { - /* tx_par_clk */ -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index cd28430cfdda..7337e7e710ed 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -284,19 +284,19 @@ static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw) - */ - - /** -- * ice_fill_phy_msg_e822 - Fill message data for a PHY register access -+ * ice_fill_phy_msg_e82x - Fill message data for a PHY register access - * @msg: the PHY message buffer to fill in - * @port: the port to access - * @offset: the register offset - */ - static void --ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) -+ice_fill_phy_msg_e82x(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - { - int phy_port, phy, quadtype; - -- phy_port = port % ICE_PORTS_PER_PHY_E822; -- phy = port / ICE_PORTS_PER_PHY_E822; -- quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E822; -+ phy_port = port % ICE_PORTS_PER_PHY_E82X; -+ phy = port / ICE_PORTS_PER_PHY_E82X; -+ quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E82X; - - if (quadtype == 0) { - msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port); -@@ -315,7 +315,7 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - } - - /** -- * ice_is_64b_phy_reg_e822 - Check if this is a 64bit PHY register -+ * ice_is_64b_phy_reg_e82x - Check if this is a 64bit PHY register - * @low_addr: the low address to check - * @high_addr: on return, contains the high address of the 64bit register - * -@@ -323,7 +323,7 @@ ice_fill_phy_msg_e822(struct ice_sbq_msg_input *msg, u8 port, u16 offset) - * represented as two 32bit registers. If it is, return the appropriate high - * register offset to use. - */ --static bool ice_is_64b_phy_reg_e822(u16 low_addr, u16 *high_addr) -+static bool ice_is_64b_phy_reg_e82x(u16 low_addr, u16 *high_addr) - { - switch (low_addr) { - case P_REG_PAR_PCS_TX_OFFSET_L: -@@ -368,7 +368,7 @@ static bool ice_is_64b_phy_reg_e822(u16 low_addr, u16 *high_addr) - } - - /** -- * ice_is_40b_phy_reg_e822 - Check if this is a 40bit PHY register -+ * ice_is_40b_phy_reg_e82x - Check if this is a 40bit PHY register - * @low_addr: the low address to check - * @high_addr: on return, contains the high address of the 40bit value - * -@@ -377,7 +377,7 @@ static bool ice_is_64b_phy_reg_e822(u16 low_addr, u16 *high_addr) - * upper 32 bits in the high register. If it is, return the appropriate high - * register offset to use. - */ --static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr) -+static bool ice_is_40b_phy_reg_e82x(u16 low_addr, u16 *high_addr) - { - switch (low_addr) { - case P_REG_TIMETUS_L: -@@ -413,7 +413,7 @@ static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr) - } - - /** -- * ice_read_phy_reg_e822 - Read a PHY register -+ * ice_read_phy_reg_e82x - Read a PHY register - * @hw: pointer to the HW struct - * @port: PHY port to read from - * @offset: PHY register offset to read -@@ -422,12 +422,12 @@ static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr) - * Read a PHY register for the given port over the device sideband queue. - */ - static int --ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val) -+ice_read_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e822(&msg, port, offset); -+ ice_fill_phy_msg_e82x(&msg, port, offset); - msg.opcode = ice_sbq_msg_rd; - - err = ice_sbq_rw_reg(hw, &msg); -@@ -443,7 +443,7 @@ ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - } - - /** -- * ice_read_64b_phy_reg_e822 - Read a 64bit value from PHY registers -+ * ice_read_64b_phy_reg_e82x - Read a 64bit value from PHY registers - * @hw: pointer to the HW struct - * @port: PHY port to read from - * @low_addr: offset of the lower register to read from -@@ -455,7 +455,7 @@ ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - * known to be two parts of a 64bit value. - */ - static int --ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) -+ice_read_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - { - u32 low, high; - u16 high_addr; -@@ -464,20 +464,20 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - /* Only operate on registers known to be split into two 32bit - * registers. - */ -- if (!ice_is_64b_phy_reg_e822(low_addr, &high_addr)) { -+ if (!ice_is_64b_phy_reg_e82x(low_addr, &high_addr)) { - ice_debug(hw, ICE_DBG_PTP, "Invalid 64b register addr 0x%08x\n", - low_addr); - return -EINVAL; - } - -- err = ice_read_phy_reg_e822(hw, port, low_addr, &low); -+ err = ice_read_phy_reg_e82x(hw, port, low_addr, &low); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read from low register 0x%08x\n, err %d", - low_addr, err); - return err; - } - -- err = ice_read_phy_reg_e822(hw, port, high_addr, &high); -+ err = ice_read_phy_reg_e82x(hw, port, high_addr, &high); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read from high register 0x%08x\n, err %d", - high_addr, err); -@@ -490,7 +490,7 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - } - - /** -- * ice_write_phy_reg_e822 - Write a PHY register -+ * ice_write_phy_reg_e82x - Write a PHY register - * @hw: pointer to the HW struct - * @port: PHY port to write to - * @offset: PHY register offset to write -@@ -499,12 +499,12 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val) - * Write a PHY register for the given port over the device sideband queue. - */ - static int --ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val) -+ice_write_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e822(&msg, port, offset); -+ ice_fill_phy_msg_e82x(&msg, port, offset); - msg.opcode = ice_sbq_msg_wr; - msg.data = val; - -@@ -519,7 +519,7 @@ ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val) - } - - /** -- * ice_write_40b_phy_reg_e822 - Write a 40b value to the PHY -+ * ice_write_40b_phy_reg_e82x - Write a 40b value to the PHY - * @hw: pointer to the HW struct - * @port: port to write to - * @low_addr: offset of the low register -@@ -529,7 +529,7 @@ ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val) - * it up into two chunks, the lower 8 bits and the upper 32 bits. - */ - static int --ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) -+ice_write_40b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - { - u32 low, high; - u16 high_addr; -@@ -538,7 +538,7 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - /* Only operate on registers known to be split into a lower 8 bit - * register and an upper 32 bit register. - */ -- if (!ice_is_40b_phy_reg_e822(low_addr, &high_addr)) { -+ if (!ice_is_40b_phy_reg_e82x(low_addr, &high_addr)) { - ice_debug(hw, ICE_DBG_PTP, "Invalid 40b register addr 0x%08x\n", - low_addr); - return -EINVAL; -@@ -547,14 +547,14 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - low = (u32)(val & P_REG_40B_LOW_M); - high = (u32)(val >> P_REG_40B_HIGH_S); - -- err = ice_write_phy_reg_e822(hw, port, low_addr, low); -+ err = ice_write_phy_reg_e82x(hw, port, low_addr, low); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to low register 0x%08x\n, err %d", - low_addr, err); - return err; - } - -- err = ice_write_phy_reg_e822(hw, port, high_addr, high); -+ err = ice_write_phy_reg_e82x(hw, port, high_addr, high); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to high register 0x%08x\n, err %d", - high_addr, err); -@@ -565,7 +565,7 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - } - - /** -- * ice_write_64b_phy_reg_e822 - Write a 64bit value to PHY registers -+ * ice_write_64b_phy_reg_e82x - Write a 64bit value to PHY registers - * @hw: pointer to the HW struct - * @port: PHY port to read from - * @low_addr: offset of the lower register to read from -@@ -577,7 +577,7 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - * a 64bit value. - */ - static int --ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) -+ice_write_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - { - u32 low, high; - u16 high_addr; -@@ -586,7 +586,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - /* Only operate on registers known to be split into two 32bit - * registers. - */ -- if (!ice_is_64b_phy_reg_e822(low_addr, &high_addr)) { -+ if (!ice_is_64b_phy_reg_e82x(low_addr, &high_addr)) { - ice_debug(hw, ICE_DBG_PTP, "Invalid 64b register addr 0x%08x\n", - low_addr); - return -EINVAL; -@@ -595,14 +595,14 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - low = lower_32_bits(val); - high = upper_32_bits(val); - -- err = ice_write_phy_reg_e822(hw, port, low_addr, low); -+ err = ice_write_phy_reg_e82x(hw, port, low_addr, low); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to low register 0x%08x\n, err %d", - low_addr, err); - return err; - } - -- err = ice_write_phy_reg_e822(hw, port, high_addr, high); -+ err = ice_write_phy_reg_e82x(hw, port, high_addr, high); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write to high register 0x%08x\n, err %d", - high_addr, err); -@@ -613,7 +613,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - } - - /** -- * ice_fill_quad_msg_e822 - Fill message data for quad register access -+ * ice_fill_quad_msg_e82x - Fill message data for quad register access - * @msg: the PHY message buffer to fill in - * @quad: the quad to access - * @offset: the register offset -@@ -622,7 +622,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - * multiple PHYs. - */ - static int --ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) -+ice_fill_quad_msg_e82x(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - { - u32 addr; - -@@ -631,7 +631,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - - msg->dest_dev = rmn_0; - -- if ((quad % ICE_QUADS_PER_PHY_E822) == 0) -+ if ((quad % ICE_QUADS_PER_PHY_E82X) == 0) - addr = Q_0_BASE + offset; - else - addr = Q_1_BASE + offset; -@@ -643,7 +643,7 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - } - - /** -- * ice_read_quad_reg_e822 - Read a PHY quad register -+ * ice_read_quad_reg_e82x - Read a PHY quad register - * @hw: pointer to the HW struct - * @quad: quad to read from - * @offset: quad register offset to read -@@ -653,12 +653,12 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) - * shared between multiple PHYs. - */ - int --ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) -+ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(&msg, quad, offset); - if (err) - return err; - -@@ -677,7 +677,7 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - } - - /** -- * ice_write_quad_reg_e822 - Write a PHY quad register -+ * ice_write_quad_reg_e82x - Write a PHY quad register - * @hw: pointer to the HW struct - * @quad: quad to write to - * @offset: quad register offset to write -@@ -687,12 +687,12 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - * shared between multiple PHYs. - */ - int --ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) -+ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - { - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e822(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(&msg, quad, offset); - if (err) - return err; - -@@ -710,7 +710,7 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - } - - /** -- * ice_read_phy_tstamp_e822 - Read a PHY timestamp out of the quad block -+ * ice_read_phy_tstamp_e82x - Read a PHY timestamp out of the quad block - * @hw: pointer to the HW struct - * @quad: the quad to read from - * @idx: the timestamp index to read -@@ -721,7 +721,7 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - * family of devices. - */ - static int --ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) -+ice_read_phy_tstamp_e82x(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - { - u16 lo_addr, hi_addr; - u32 lo, hi; -@@ -730,14 +730,14 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - lo_addr = (u16)TS_L(Q_REG_TX_MEMORY_BANK_START, idx); - hi_addr = (u16)TS_H(Q_REG_TX_MEMORY_BANK_START, idx); - -- err = ice_read_quad_reg_e822(hw, quad, lo_addr, &lo); -+ err = ice_read_quad_reg_e82x(hw, quad, lo_addr, &lo); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read low PTP timestamp register, err %d\n", - err); - return err; - } - -- err = ice_read_quad_reg_e822(hw, quad, hi_addr, &hi); -+ err = ice_read_quad_reg_e82x(hw, quad, hi_addr, &hi); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read high PTP timestamp register, err %d\n", - err); -@@ -754,7 +754,7 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - } - - /** -- * ice_clear_phy_tstamp_e822 - Clear a timestamp from the quad block -+ * ice_clear_phy_tstamp_e82x - Clear a timestamp from the quad block - * @hw: pointer to the HW struct - * @quad: the quad to read from - * @idx: the timestamp index to reset -@@ -770,18 +770,18 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp) - * - * To directly clear the contents of the timestamp block entirely, discarding - * all timestamp data at once, software should instead use -- * ice_ptp_reset_ts_memory_quad_e822(). -+ * ice_ptp_reset_ts_memory_quad_e82x(). - * - * This function should only be called on an idx whose bit is set according to - * ice_get_phy_tx_tstamp_ready(). - */ - static int --ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) -+ice_clear_phy_tstamp_e82x(struct ice_hw *hw, u8 quad, u8 idx) - { - u64 unused_tstamp; - int err; - -- err = ice_read_phy_tstamp_e822(hw, quad, idx, &unused_tstamp); -+ err = ice_read_phy_tstamp_e82x(hw, quad, idx, &unused_tstamp); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read the timestamp register for quad %u, idx %u, err %d\n", - quad, idx, err); -@@ -792,33 +792,33 @@ ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx) - } - - /** -- * ice_ptp_reset_ts_memory_quad_e822 - Clear all timestamps from the quad block -+ * ice_ptp_reset_ts_memory_quad_e82x - Clear all timestamps from the quad block - * @hw: pointer to the HW struct - * @quad: the quad to read from - * - * Clear all timestamps from the PHY quad block that is shared between the - * internal PHYs on the E822 devices. - */ --void ice_ptp_reset_ts_memory_quad_e822(struct ice_hw *hw, u8 quad) -+void ice_ptp_reset_ts_memory_quad_e82x(struct ice_hw *hw, u8 quad) - { -- ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, Q_REG_TS_CTRL_M); -- ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, ~(u32)Q_REG_TS_CTRL_M); -+ ice_write_quad_reg_e82x(hw, quad, Q_REG_TS_CTRL, Q_REG_TS_CTRL_M); -+ ice_write_quad_reg_e82x(hw, quad, Q_REG_TS_CTRL, ~(u32)Q_REG_TS_CTRL_M); - } - - /** -- * ice_ptp_reset_ts_memory_e822 - Clear all timestamps from all quad blocks -+ * ice_ptp_reset_ts_memory_e82x - Clear all timestamps from all quad blocks - * @hw: pointer to the HW struct - */ --static void ice_ptp_reset_ts_memory_e822(struct ice_hw *hw) -+static void ice_ptp_reset_ts_memory_e82x(struct ice_hw *hw) - { - unsigned int quad; - - for (quad = 0; quad < ICE_MAX_QUAD; quad++) -- ice_ptp_reset_ts_memory_quad_e822(hw, quad); -+ ice_ptp_reset_ts_memory_quad_e82x(hw, quad); - } - - /** -- * ice_read_cgu_reg_e822 - Read a CGU register -+ * ice_read_cgu_reg_e82x - Read a CGU register - * @hw: pointer to the HW struct - * @addr: Register address to read - * @val: storage for register value read -@@ -827,7 +827,7 @@ static void ice_ptp_reset_ts_memory_e822(struct ice_hw *hw) - * applicable to E822 devices. - */ - static int --ice_read_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 *val) -+ice_read_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 *val) - { - struct ice_sbq_msg_input cgu_msg; - int err; -@@ -850,7 +850,7 @@ ice_read_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 *val) - } - - /** -- * ice_write_cgu_reg_e822 - Write a CGU register -+ * ice_write_cgu_reg_e82x - Write a CGU register - * @hw: pointer to the HW struct - * @addr: Register address to write - * @val: value to write into the register -@@ -859,7 +859,7 @@ ice_read_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 *val) - * applicable to E822 devices. - */ - static int --ice_write_cgu_reg_e822(struct ice_hw *hw, u32 addr, u32 val) -+ice_write_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 val) - { - struct ice_sbq_msg_input cgu_msg; - int err; -@@ -925,7 +925,7 @@ static const char *ice_clk_src_str(u8 clk_src) - } - - /** -- * ice_cfg_cgu_pll_e822 - Configure the Clock Generation Unit -+ * ice_cfg_cgu_pll_e82x - Configure the Clock Generation Unit - * @hw: pointer to the HW struct - * @clk_freq: Clock frequency to program - * @clk_src: Clock source to select (TIME_REF, or TCX0) -@@ -934,7 +934,7 @@ static const char *ice_clk_src_str(u8 clk_src) - * time reference, enabling the PLL which drives the PTP hardware clock. - */ - static int --ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, -+ice_cfg_cgu_pll_e82x(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - enum ice_clk_src clk_src) - { - union tspll_ro_bwm_lf bwm_lf; -@@ -963,15 +963,15 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - return -EINVAL; - } - -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD9, &dw9.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &dw9.val); - if (err) - return err; - -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD24, &dw24.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &dw24.val); - if (err) - return err; - -- err = ice_read_cgu_reg_e822(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); -+ err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); - if (err) - return err; - -@@ -986,43 +986,43 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - if (dw24.field.ts_pll_enable) { - dw24.field.ts_pll_enable = 0; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD24, dw24.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val); - if (err) - return err; - } - - /* Set the frequency */ - dw9.field.time_ref_freq_sel = clk_freq; -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD9, dw9.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val); - if (err) - return err; - - /* Configure the TS PLL feedback divisor */ -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD19, &dw19.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD19, &dw19.val); - if (err) - return err; - - dw19.field.tspll_fbdiv_intgr = e822_cgu_params[clk_freq].feedback_div; - dw19.field.tspll_ndivratio = 1; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD19, dw19.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD19, dw19.val); - if (err) - return err; - - /* Configure the TS PLL post divisor */ -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD22, &dw22.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD22, &dw22.val); - if (err) - return err; - - dw22.field.time1588clk_div = e822_cgu_params[clk_freq].post_pll_div; - dw22.field.time1588clk_sel_div2 = 0; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD22, dw22.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD22, dw22.val); - if (err) - return err; - - /* Configure the TS PLL pre divisor and clock source */ -- err = ice_read_cgu_reg_e822(hw, NAC_CGU_DWORD24, &dw24.val); -+ err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &dw24.val); - if (err) - return err; - -@@ -1030,21 +1030,21 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - dw24.field.tspll_fbdiv_frac = e822_cgu_params[clk_freq].frac_n_div; - dw24.field.time_ref_sel = clk_src; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD24, dw24.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val); - if (err) - return err; - - /* Finally, enable the PLL */ - dw24.field.ts_pll_enable = 1; - -- err = ice_write_cgu_reg_e822(hw, NAC_CGU_DWORD24, dw24.val); -+ err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val); - if (err) - return err; - - /* Wait to verify if the PLL locks */ - usleep_range(1000, 5000); - -- err = ice_read_cgu_reg_e822(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); -+ err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_BWM_LF, &bwm_lf.val); - if (err) - return err; - -@@ -1064,18 +1064,18 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq, - } - - /** -- * ice_init_cgu_e822 - Initialize CGU with settings from firmware -+ * ice_init_cgu_e82x - Initialize CGU with settings from firmware - * @hw: pointer to the HW structure - * - * Initialize the Clock Generation Unit of the E822 device. - */ --static int ice_init_cgu_e822(struct ice_hw *hw) -+static int ice_init_cgu_e82x(struct ice_hw *hw) - { - struct ice_ts_func_info *ts_info = &hw->func_caps.ts_func_info; - union tspll_cntr_bist_settings cntr_bist; - int err; - -- err = ice_read_cgu_reg_e822(hw, TSPLL_CNTR_BIST_SETTINGS, -+ err = ice_read_cgu_reg_e82x(hw, TSPLL_CNTR_BIST_SETTINGS, - &cntr_bist.val); - if (err) - return err; -@@ -1084,7 +1084,7 @@ static int ice_init_cgu_e822(struct ice_hw *hw) - cntr_bist.field.i_plllock_sel_0 = 0; - cntr_bist.field.i_plllock_sel_1 = 0; - -- err = ice_write_cgu_reg_e822(hw, TSPLL_CNTR_BIST_SETTINGS, -+ err = ice_write_cgu_reg_e82x(hw, TSPLL_CNTR_BIST_SETTINGS, - cntr_bist.val); - if (err) - return err; -@@ -1092,7 +1092,7 @@ static int ice_init_cgu_e822(struct ice_hw *hw) - /* Configure the CGU PLL using the parameters from the function - * capabilities. - */ -- err = ice_cfg_cgu_pll_e822(hw, ts_info->time_ref, -+ err = ice_cfg_cgu_pll_e82x(hw, ts_info->time_ref, - (enum ice_clk_src)ts_info->clk_src); - if (err) - return err; -@@ -1113,7 +1113,7 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - int err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_WL, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_WL, - PTP_VERNIER_WL); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to set vernier window length for port %u, err %d\n", -@@ -1126,12 +1126,12 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) - } - - /** -- * ice_ptp_init_phc_e822 - Perform E822 specific PHC initialization -+ * ice_ptp_init_phc_e82x - Perform E822 specific PHC initialization - * @hw: pointer to HW struct - * - * Perform PHC initialization steps specific to E822 devices. - */ --static int ice_ptp_init_phc_e822(struct ice_hw *hw) -+static int ice_ptp_init_phc_e82x(struct ice_hw *hw) - { - int err; - u32 regval; -@@ -1145,7 +1145,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw) - wr32(hw, PF_SB_REM_DEV_CTL, regval); - - /* Initialize the Clock Generation Unit */ -- err = ice_init_cgu_e822(hw); -+ err = ice_init_cgu_e82x(hw); - if (err) - return err; - -@@ -1154,7 +1154,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw) - } - - /** -- * ice_ptp_prep_phy_time_e822 - Prepare PHY port with initial time -+ * ice_ptp_prep_phy_time_e82x - Prepare PHY port with initial time - * @hw: pointer to the HW struct - * @time: Time to initialize the PHY port clocks to - * -@@ -1164,7 +1164,7 @@ static int ice_ptp_init_phc_e822(struct ice_hw *hw) - * units of nominal nanoseconds. - */ - static int --ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) -+ice_ptp_prep_phy_time_e82x(struct ice_hw *hw, u32 time) - { - u64 phy_time; - u8 port; -@@ -1177,14 +1177,14 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) - - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - /* Tx case */ -- err = ice_write_64b_phy_reg_e822(hw, port, -+ err = ice_write_64b_phy_reg_e82x(hw, port, - P_REG_TX_TIMER_INC_PRE_L, - phy_time); - if (err) - goto exit_err; - - /* Rx case */ -- err = ice_write_64b_phy_reg_e822(hw, port, -+ err = ice_write_64b_phy_reg_e82x(hw, port, - P_REG_RX_TIMER_INC_PRE_L, - phy_time); - if (err) -@@ -1201,7 +1201,7 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) - } - - /** -- * ice_ptp_prep_port_adj_e822 - Prepare a single port for time adjust -+ * ice_ptp_prep_port_adj_e82x - Prepare a single port for time adjust - * @hw: pointer to HW struct - * @port: Port number to be programmed - * @time: time in cycles to adjust the port Tx and Rx clocks -@@ -1216,7 +1216,7 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time) - * Negative adjustments are supported using 2s complement arithmetic. - */ - static int --ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) -+ice_ptp_prep_port_adj_e82x(struct ice_hw *hw, u8 port, s64 time) - { - u32 l_time, u_time; - int err; -@@ -1225,23 +1225,23 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) - u_time = upper_32_bits(time); - - /* Tx case */ -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_TIMER_INC_PRE_L, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TIMER_INC_PRE_L, - l_time); - if (err) - goto exit_err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_TIMER_INC_PRE_U, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TIMER_INC_PRE_U, - u_time); - if (err) - goto exit_err; - - /* Rx case */ -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_TIMER_INC_PRE_L, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TIMER_INC_PRE_L, - l_time); - if (err) - goto exit_err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_TIMER_INC_PRE_U, -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TIMER_INC_PRE_U, - u_time); - if (err) - goto exit_err; -@@ -1255,7 +1255,7 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) - } - - /** -- * ice_ptp_prep_phy_adj_e822 - Prep PHY ports for a time adjustment -+ * ice_ptp_prep_phy_adj_e82x - Prep PHY ports for a time adjustment - * @hw: pointer to HW struct - * @adj: adjustment in nanoseconds - * -@@ -1264,7 +1264,7 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time) - * ADJ_TIME or ADJ_TIME_AT_TIME sync command. - */ - static int --ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) -+ice_ptp_prep_phy_adj_e82x(struct ice_hw *hw, s32 adj) - { - s64 cycles; - u8 port; -@@ -1281,7 +1281,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - int err; - -- err = ice_ptp_prep_port_adj_e822(hw, port, cycles); -+ err = ice_ptp_prep_port_adj_e82x(hw, port, cycles); - if (err) - return err; - } -@@ -1290,7 +1290,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) - } - - /** -- * ice_ptp_prep_phy_incval_e822 - Prepare PHY ports for time adjustment -+ * ice_ptp_prep_phy_incval_e82x - Prepare PHY ports for time adjustment - * @hw: pointer to HW struct - * @incval: new increment value to prepare - * -@@ -1299,13 +1299,13 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj) - * issuing an INIT_INCVAL command. - */ - static int --ice_ptp_prep_phy_incval_e822(struct ice_hw *hw, u64 incval) -+ice_ptp_prep_phy_incval_e82x(struct ice_hw *hw, u64 incval) - { - int err; - u8 port; - - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_TIMETUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_TIMETUS_L, - incval); - if (err) - goto exit_err; -@@ -1337,7 +1337,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - int err; - - /* Tx case */ -- err = ice_read_64b_phy_reg_e822(hw, port, P_REG_TX_CAPTURE_L, tx_ts); -+ err = ice_read_64b_phy_reg_e82x(hw, port, P_REG_TX_CAPTURE_L, tx_ts); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read REG_TX_CAPTURE, err %d\n", - err); -@@ -1348,7 +1348,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - (unsigned long long)*tx_ts); - - /* Rx case */ -- err = ice_read_64b_phy_reg_e822(hw, port, P_REG_RX_CAPTURE_L, rx_ts); -+ err = ice_read_64b_phy_reg_e82x(hw, port, P_REG_RX_CAPTURE_L, rx_ts); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_CAPTURE, err %d\n", - err); -@@ -1362,7 +1362,7 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - } - - /** -- * ice_ptp_write_port_cmd_e822 - Prepare a single PHY port for a timer command -+ * ice_ptp_write_port_cmd_e82x - Prepare a single PHY port for a timer command - * @hw: pointer to HW struct - * @port: Port to which cmd has to be sent - * @cmd: Command to be sent to the port -@@ -1372,8 +1372,8 @@ ice_ptp_read_port_capture(struct ice_hw *hw, u8 port, u64 *tx_ts, u64 *rx_ts) - * Do not use this function directly. If you want to configure exactly one - * port, use ice_ptp_one_port_cmd() instead. - */ --static int --ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd) -+static int ice_ptp_write_port_cmd_e82x(struct ice_hw *hw, u8 port, -+ enum ice_ptp_tmr_cmd cmd) - { - u32 cmd_val, val; - u8 tmr_idx; -@@ -1403,7 +1403,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - - /* Tx case */ - /* Read, modify, write */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_TX_TMR_CMD, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_TX_TMR_CMD, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_TMR_CMD, err %d\n", - err); -@@ -1414,7 +1414,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - val &= ~TS_CMD_MASK; - val |= cmd_val; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_TMR_CMD, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_TMR_CMD, val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write back TX_TMR_CMD, err %d\n", - err); -@@ -1423,7 +1423,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - - /* Rx case */ - /* Read, modify, write */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_TMR_CMD, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_TMR_CMD, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_TMR_CMD, err %d\n", - err); -@@ -1434,7 +1434,7 @@ ice_ptp_write_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd - val &= ~TS_CMD_MASK; - val |= cmd_val; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_TMR_CMD, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_TMR_CMD, val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write back RX_TMR_CMD, err %d\n", - err); -@@ -1469,7 +1469,7 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - else - cmd = ICE_PTP_NOP; - -- err = ice_ptp_write_port_cmd_e822(hw, port, cmd); -+ err = ice_ptp_write_port_cmd_e82x(hw, port, cmd); - if (err) - return err; - } -@@ -1478,7 +1478,7 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - } - - /** -- * ice_ptp_port_cmd_e822 - Prepare all ports for a timer command -+ * ice_ptp_port_cmd_e82x - Prepare all ports for a timer command - * @hw: pointer to the HW struct - * @cmd: timer command to prepare - * -@@ -1486,14 +1486,14 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - * command. - */ - static int --ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) -+ice_ptp_port_cmd_e82x(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - { - u8 port; - - for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { - int err; - -- err = ice_ptp_write_port_cmd_e822(hw, port, cmd); -+ err = ice_ptp_write_port_cmd_e82x(hw, port, cmd); - if (err) - return err; - } -@@ -1509,7 +1509,7 @@ ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - */ - - /** -- * ice_phy_get_speed_and_fec_e822 - Get link speed and FEC based on serdes mode -+ * ice_phy_get_speed_and_fec_e82x - Get link speed and FEC based on serdes mode - * @hw: pointer to HW struct - * @port: the port to read from - * @link_out: if non-NULL, holds link speed on success -@@ -1519,7 +1519,7 @@ ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - * algorithm. - */ - static int --ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port, -+ice_phy_get_speed_and_fec_e82x(struct ice_hw *hw, u8 port, - enum ice_ptp_link_spd *link_out, - enum ice_ptp_fec_mode *fec_out) - { -@@ -1528,7 +1528,7 @@ ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port, - u32 serdes; - int err; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_LINK_SPEED, &serdes); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_LINK_SPEED, &serdes); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read serdes info\n"); - return err; -@@ -1585,18 +1585,18 @@ ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port, - } - - /** -- * ice_phy_cfg_lane_e822 - Configure PHY quad for single/multi-lane timestamp -+ * ice_phy_cfg_lane_e82x - Configure PHY quad for single/multi-lane timestamp - * @hw: pointer to HW struct - * @port: to configure the quad for - */ --static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) -+static void ice_phy_cfg_lane_e82x(struct ice_hw *hw, u8 port) - { - enum ice_ptp_link_spd link_spd; - int err; - u32 val; - u8 quad; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, NULL); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, NULL); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to get PHY link speed, err %d\n", - err); -@@ -1605,7 +1605,7 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - - quad = port / ICE_PORTS_PER_QUAD; - -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val); -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_MEM_GLB_CFG, err %d\n", - err); -@@ -1617,7 +1617,7 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - else - val |= Q_REG_TX_MEM_GBL_CFG_LANE_TYPE_M; - -- err = ice_write_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG, val); -+ err = ice_write_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write back TX_MEM_GBL_CFG, err %d\n", - err); -@@ -1626,7 +1626,7 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_phy_cfg_uix_e822 - Configure Serdes UI to TU conversion for E822 -+ * ice_phy_cfg_uix_e82x - Configure Serdes UI to TU conversion for E822 - * @hw: pointer to the HW structure - * @port: the port to configure - * -@@ -1671,12 +1671,12 @@ static void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port) - * a divide by 390,625,000. This does lose some precision, but avoids - * miscalculation due to arithmetic overflow. - */ --static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) -+static int ice_phy_cfg_uix_e82x(struct ice_hw *hw, u8 port) - { - u64 cur_freq, clk_incval, tu_per_sec, uix; - int err; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second divided by 256 */ -@@ -1688,7 +1688,7 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - /* Program the 10Gb/40Gb conversion ratio */ - uix = div_u64(tu_per_sec * LINE_UI_10G_40G, 390625000); - -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_UIX66_10G_40G_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_UIX66_10G_40G_L, - uix); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write UIX66_10G_40G, err %d\n", -@@ -1699,7 +1699,7 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - /* Program the 25Gb/100Gb conversion ratio */ - uix = div_u64(tu_per_sec * LINE_UI_25G_100G, 390625000); - -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_UIX66_25G_100G_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_UIX66_25G_100G_L, - uix); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to write UIX66_25G_100G, err %d\n", -@@ -1711,7 +1711,7 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_phy_cfg_parpcs_e822 - Configure TUs per PAR/PCS clock cycle -+ * ice_phy_cfg_parpcs_e82x - Configure TUs per PAR/PCS clock cycle - * @hw: pointer to the HW struct - * @port: port to configure - * -@@ -1753,18 +1753,18 @@ static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port) - * frequency is ~29 bits, so multiplying them together should fit within the - * 64 bit arithmetic. - */ --static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) -+static int ice_phy_cfg_parpcs_e82x(struct ice_hw *hw, u8 port) - { - u64 cur_freq, clk_incval, tu_per_sec, phy_tus; - enum ice_ptp_link_spd link_spd; - enum ice_ptp_fec_mode fec_mode; - int err; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, &fec_mode); - if (err) - return err; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per cycle of the PHC clock */ -@@ -1784,7 +1784,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PAR_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PAR_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1796,7 +1796,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PAR_RX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PAR_RX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1808,7 +1808,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PCS_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PCS_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1820,7 +1820,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_PCS_RX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_PCS_RX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1832,7 +1832,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PAR_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PAR_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1844,7 +1844,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PAR_RX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PAR_RX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1856,7 +1856,7 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PCS_TX_TUS_L, -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PCS_TX_TUS_L, - phy_tus); - if (err) - return err; -@@ -1868,23 +1868,23 @@ static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port) - else - phy_tus = 0; - -- return ice_write_40b_phy_reg_e822(hw, port, P_REG_DESK_PCS_RX_TUS_L, -+ return ice_write_40b_phy_reg_e82x(hw, port, P_REG_DESK_PCS_RX_TUS_L, - phy_tus); - } - - /** -- * ice_calc_fixed_tx_offset_e822 - Calculated Fixed Tx offset for a port -+ * ice_calc_fixed_tx_offset_e82x - Calculated Fixed Tx offset for a port - * @hw: pointer to the HW struct - * @link_spd: the Link speed to calculate for - * - * Calculate the fixed offset due to known static latency data. - */ - static u64 --ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) -+ice_calc_fixed_tx_offset_e82x(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - { - u64 cur_freq, clk_incval, tu_per_sec, fixed_offset; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second */ -@@ -1904,7 +1904,7 @@ ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - } - - /** -- * ice_phy_cfg_tx_offset_e822 - Configure total Tx timestamp offset -+ * ice_phy_cfg_tx_offset_e82x - Configure total Tx timestamp offset - * @hw: pointer to the HW struct - * @port: the PHY port to configure - * -@@ -1926,7 +1926,7 @@ ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - * Returns zero on success, -EBUSY if the hardware vernier offset - * calibration has not completed, or another error code on failure. - */ --int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) -+int ice_phy_cfg_tx_offset_e82x(struct ice_hw *hw, u8 port) - { - enum ice_ptp_link_spd link_spd; - enum ice_ptp_fec_mode fec_mode; -@@ -1935,7 +1935,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - u32 reg; - - /* Nothing to do if we've already programmed the offset */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_TX_OR, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_TX_OR, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_OR for port %u, err %d\n", - port, err); -@@ -1945,7 +1945,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - if (reg) - return 0; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_TX_OV_STATUS, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_TX_OV_STATUS, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_OV_STATUS for port %u, err %d\n", - port, err); -@@ -1955,11 +1955,11 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - if (!(reg & P_REG_TX_OV_STATUS_OV_M)) - return -EBUSY; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, &fec_mode); - if (err) - return err; - -- total_offset = ice_calc_fixed_tx_offset_e822(hw, link_spd); -+ total_offset = ice_calc_fixed_tx_offset_e82x(hw, link_spd); - - /* Read the first Vernier offset from the PHY register and add it to - * the total offset. -@@ -1970,7 +1970,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - link_spd == ICE_PTP_LNK_SPD_25G_RS || - link_spd == ICE_PTP_LNK_SPD_40G || - link_spd == ICE_PTP_LNK_SPD_50G) { -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_PCS_TX_OFFSET_L, - &val); - if (err) -@@ -1985,7 +1985,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - */ - if (link_spd == ICE_PTP_LNK_SPD_50G_RS || - link_spd == ICE_PTP_LNK_SPD_100G_RS) { -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_TX_TIME_L, - &val); - if (err) -@@ -1998,12 +1998,12 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - * PHY and indicate that the Tx offset is ready. After this, - * timestamps will be enabled. - */ -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_TOTAL_TX_OFFSET_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_TOTAL_TX_OFFSET_L, - total_offset); - if (err) - return err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_OR, 1); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 1); - if (err) - return err; - -@@ -2014,7 +2014,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_phy_calc_pmd_adj_e822 - Calculate PMD adjustment for Rx -+ * ice_phy_calc_pmd_adj_e82x - Calculate PMD adjustment for Rx - * @hw: pointer to the HW struct - * @port: the PHY port to adjust for - * @link_spd: the current link speed of the PHY -@@ -2026,7 +2026,7 @@ int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port) - * various delays caused when receiving a packet. - */ - static int --ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, -+ice_phy_calc_pmd_adj_e82x(struct ice_hw *hw, u8 port, - enum ice_ptp_link_spd link_spd, - enum ice_ptp_fec_mode fec_mode, u64 *pmd_adj) - { -@@ -2035,7 +2035,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - u32 val; - int err; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_PMD_ALIGNMENT, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_PMD_ALIGNMENT, &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read PMD alignment, err %d\n", - err); -@@ -2044,7 +2044,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - - pmd_align = (u8)val; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second */ -@@ -2123,7 +2123,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - u64 cycle_adj; - u8 rx_cycle; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_40_TO_160_CNT, -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_40_TO_160_CNT, - &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read 25G-RS Rx cycle count, err %d\n", -@@ -2145,7 +2145,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - u64 cycle_adj; - u8 rx_cycle; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_80_TO_160_CNT, -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_80_TO_160_CNT, - &val); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read 50G-RS Rx cycle count, err %d\n", -@@ -2172,18 +2172,18 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port, - } - - /** -- * ice_calc_fixed_rx_offset_e822 - Calculated the fixed Rx offset for a port -+ * ice_calc_fixed_rx_offset_e82x - Calculated the fixed Rx offset for a port - * @hw: pointer to HW struct - * @link_spd: The Link speed to calculate for - * - * Determine the fixed Rx latency for a given link speed. - */ - static u64 --ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) -+ice_calc_fixed_rx_offset_e82x(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - { - u64 cur_freq, clk_incval, tu_per_sec, fixed_offset; - -- cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw)); -+ cur_freq = ice_e82x_pll_freq(ice_e82x_time_ref(hw)); - clk_incval = ice_ptp_read_src_incval(hw); - - /* Calculate TUs per second */ -@@ -2203,7 +2203,7 @@ ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - } - - /** -- * ice_phy_cfg_rx_offset_e822 - Configure total Rx timestamp offset -+ * ice_phy_cfg_rx_offset_e82x - Configure total Rx timestamp offset - * @hw: pointer to the HW struct - * @port: the PHY port to configure - * -@@ -2229,7 +2229,7 @@ ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd) - * Returns zero on success, -EBUSY if the hardware vernier offset - * calibration has not completed, or another error code on failure. - */ --int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) -+int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 port) - { - enum ice_ptp_link_spd link_spd; - enum ice_ptp_fec_mode fec_mode; -@@ -2238,7 +2238,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - u32 reg; - - /* Nothing to do if we've already programmed the offset */ -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_OR, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_OR, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_OR for port %u, err %d\n", - port, err); -@@ -2248,7 +2248,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - if (reg) - return 0; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_RX_OV_STATUS, ®); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_RX_OV_STATUS, ®); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read RX_OV_STATUS for port %u, err %d\n", - port, err); -@@ -2258,16 +2258,16 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - if (!(reg & P_REG_RX_OV_STATUS_OV_M)) - return -EBUSY; - -- err = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode); -+ err = ice_phy_get_speed_and_fec_e82x(hw, port, &link_spd, &fec_mode); - if (err) - return err; - -- total_offset = ice_calc_fixed_rx_offset_e822(hw, link_spd); -+ total_offset = ice_calc_fixed_rx_offset_e82x(hw, link_spd); - - /* Read the first Vernier offset from the PHY register and add it to - * the total offset. - */ -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_PCS_RX_OFFSET_L, - &val); - if (err) -@@ -2282,7 +2282,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - link_spd == ICE_PTP_LNK_SPD_50G || - link_spd == ICE_PTP_LNK_SPD_50G_RS || - link_spd == ICE_PTP_LNK_SPD_100G_RS) { -- err = ice_read_64b_phy_reg_e822(hw, port, -+ err = ice_read_64b_phy_reg_e82x(hw, port, - P_REG_PAR_RX_TIME_L, - &val); - if (err) -@@ -2292,7 +2292,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - } - - /* In addition, Rx must account for the PMD alignment */ -- err = ice_phy_calc_pmd_adj_e822(hw, port, link_spd, fec_mode, &pmd); -+ err = ice_phy_calc_pmd_adj_e82x(hw, port, link_spd, fec_mode, &pmd); - if (err) - return err; - -@@ -2308,12 +2308,12 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - * PHY and indicate that the Rx offset is ready. After this, - * timestamps will be enabled. - */ -- err = ice_write_64b_phy_reg_e822(hw, port, P_REG_TOTAL_RX_OFFSET_L, -+ err = ice_write_64b_phy_reg_e82x(hw, port, P_REG_TOTAL_RX_OFFSET_L, - total_offset); - if (err) - return err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_OR, 1); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 1); - if (err) - return err; - -@@ -2324,7 +2324,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_read_phy_and_phc_time_e822 - Simultaneously capture PHC and PHY time -+ * ice_read_phy_and_phc_time_e82x - Simultaneously capture PHC and PHY time - * @hw: pointer to the HW struct - * @port: the PHY port to read - * @phy_time: on return, the 64bit PHY timer value -@@ -2334,7 +2334,7 @@ int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port) - * timer values. - */ - static int --ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time, -+ice_read_phy_and_phc_time_e82x(struct ice_hw *hw, u8 port, u64 *phy_time, - u64 *phc_time) - { - u64 tx_time, rx_time; -@@ -2381,7 +2381,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time, - } - - /** -- * ice_sync_phy_timer_e822 - Synchronize the PHY timer with PHC timer -+ * ice_sync_phy_timer_e82x - Synchronize the PHY timer with PHC timer - * @hw: pointer to the HW struct - * @port: the PHY port to synchronize - * -@@ -2391,7 +2391,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time, - * calculate an appropriate 2s complement addition to add to the PHY timer in - * order to ensure it reads the same value as the primary PHC timer. - */ --static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) -+static int ice_sync_phy_timer_e82x(struct ice_hw *hw, u8 port) - { - u64 phc_time, phy_time, difference; - int err; -@@ -2401,7 +2401,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - return -EBUSY; - } - -- err = ice_read_phy_and_phc_time_e822(hw, port, &phy_time, &phc_time); -+ err = ice_read_phy_and_phc_time_e82x(hw, port, &phy_time, &phc_time); - if (err) - goto err_unlock; - -@@ -2415,7 +2415,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - */ - difference = phc_time - phy_time; - -- err = ice_ptp_prep_port_adj_e822(hw, port, (s64)difference); -+ err = ice_ptp_prep_port_adj_e82x(hw, port, (s64)difference); - if (err) - goto err_unlock; - -@@ -2432,7 +2432,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - /* Re-capture the timer values to flush the command registers and - * verify that the time was properly adjusted. - */ -- err = ice_read_phy_and_phc_time_e822(hw, port, &phy_time, &phc_time); -+ err = ice_read_phy_and_phc_time_e82x(hw, port, &phy_time, &phc_time); - if (err) - goto err_unlock; - -@@ -2451,7 +2451,7 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_stop_phy_timer_e822 - Stop the PHY clock timer -+ * ice_stop_phy_timer_e82x - Stop the PHY clock timer - * @hw: pointer to the HW struct - * @port: the PHY port to stop - * @soft_reset: if true, hold the SOFT_RESET bit of P_REG_PS -@@ -2461,36 +2461,36 @@ static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port) - * initialized or when link speed changes. - */ - int --ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) -+ice_stop_phy_timer_e82x(struct ice_hw *hw, u8 port, bool soft_reset) - { - int err; - u32 val; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_TX_OR, 0); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_TX_OR, 0); - if (err) - return err; - -- err = ice_write_phy_reg_e822(hw, port, P_REG_RX_OR, 0); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_RX_OR, 0); - if (err) - return err; - -- err = ice_read_phy_reg_e822(hw, port, P_REG_PS, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_PS, &val); - if (err) - return err; - - val &= ~P_REG_PS_START_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val &= ~P_REG_PS_ENA_CLK_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - if (soft_reset) { - val |= P_REG_PS_SFT_RESET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - } -@@ -2501,7 +2501,7 @@ ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) - } - - /** -- * ice_start_phy_timer_e822 - Start the PHY clock timer -+ * ice_start_phy_timer_e82x - Start the PHY clock timer - * @hw: pointer to the HW struct - * @port: the PHY port to start - * -@@ -2511,7 +2511,7 @@ ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset) - * - * Hardware will take Vernier measurements on Tx or Rx of packets. - */ --int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) -+int ice_start_phy_timer_e82x(struct ice_hw *hw, u8 port) - { - u32 lo, hi, val; - u64 incval; -@@ -2520,17 +2520,17 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - - tmr_idx = ice_get_ptp_src_clock_index(hw); - -- err = ice_stop_phy_timer_e822(hw, port, false); -+ err = ice_stop_phy_timer_e82x(hw, port, false); - if (err) - return err; - -- ice_phy_cfg_lane_e822(hw, port); -+ ice_phy_cfg_lane_e82x(hw, port); - -- err = ice_phy_cfg_uix_e822(hw, port); -+ err = ice_phy_cfg_uix_e82x(hw, port); - if (err) - return err; - -- err = ice_phy_cfg_parpcs_e822(hw, port); -+ err = ice_phy_cfg_parpcs_e82x(hw, port); - if (err) - return err; - -@@ -2538,7 +2538,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - hi = rd32(hw, GLTSYN_INCVAL_H(tmr_idx)); - incval = (u64)hi << 32 | lo; - -- err = ice_write_40b_phy_reg_e822(hw, port, P_REG_TIMETUS_L, incval); -+ err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_TIMETUS_L, incval); - if (err) - return err; - -@@ -2551,22 +2551,22 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - - ice_ptp_exec_tmr_cmd(hw); - -- err = ice_read_phy_reg_e822(hw, port, P_REG_PS, &val); -+ err = ice_read_phy_reg_e82x(hw, port, P_REG_PS, &val); - if (err) - return err; - - val |= P_REG_PS_SFT_RESET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val |= P_REG_PS_START_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val &= ~P_REG_PS_SFT_RESET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - -@@ -2577,18 +2577,18 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - ice_ptp_exec_tmr_cmd(hw); - - val |= P_REG_PS_ENA_CLK_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - val |= P_REG_PS_LOAD_OFFSET_M; -- err = ice_write_phy_reg_e822(hw, port, P_REG_PS, val); -+ err = ice_write_phy_reg_e82x(hw, port, P_REG_PS, val); - if (err) - return err; - - ice_ptp_exec_tmr_cmd(hw); - -- err = ice_sync_phy_timer_e822(hw, port); -+ err = ice_sync_phy_timer_e82x(hw, port); - if (err) - return err; - -@@ -2598,7 +2598,7 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - } - - /** -- * ice_get_phy_tx_tstamp_ready_e822 - Read Tx memory status register -+ * ice_get_phy_tx_tstamp_ready_e82x - Read Tx memory status register - * @hw: pointer to the HW struct - * @quad: the timestamp quad to read from - * @tstamp_ready: contents of the Tx memory status register -@@ -2608,19 +2608,19 @@ int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port) - * ready to be captured from the PHY timestamp block. - */ - static int --ice_get_phy_tx_tstamp_ready_e822(struct ice_hw *hw, u8 quad, u64 *tstamp_ready) -+ice_get_phy_tx_tstamp_ready_e82x(struct ice_hw *hw, u8 quad, u64 *tstamp_ready) - { - u32 hi, lo; - int err; - -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEMORY_STATUS_U, &hi); -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEMORY_STATUS_U, &hi); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_MEMORY_STATUS_U for quad %u, err %d\n", - quad, err); - return err; - } - -- err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEMORY_STATUS_L, &lo); -+ err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEMORY_STATUS_L, &lo); - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to read TX_MEMORY_STATUS_L for quad %u, err %d\n", - quad, err); -@@ -3306,7 +3306,7 @@ void ice_ptp_init_phy_model(struct ice_hw *hw) - if (ice_is_e810(hw)) - hw->phy_model = ICE_PHY_E810; - else -- hw->phy_model = ICE_PHY_E822; -+ hw->phy_model = ICE_PHY_E82X; - } - - /** -@@ -3331,8 +3331,8 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - case ICE_PHY_E810: - err = ice_ptp_port_cmd_e810(hw, cmd); - break; -- case ICE_PHY_E822: -- err = ice_ptp_port_cmd_e822(hw, cmd); -+ case ICE_PHY_E82X: -+ err = ice_ptp_port_cmd_e82x(hw, cmd); - break; - default: - err = -EOPNOTSUPP; -@@ -3383,8 +3383,8 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time) - case ICE_PHY_E810: - err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF); - break; -- case ICE_PHY_E822: -- err = ice_ptp_prep_phy_time_e822(hw, time & 0xFFFFFFFF); -+ case ICE_PHY_E82X: -+ err = ice_ptp_prep_phy_time_e82x(hw, time & 0xFFFFFFFF); - break; - default: - err = -EOPNOTSUPP; -@@ -3425,8 +3425,8 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval) - case ICE_PHY_E810: - err = ice_ptp_prep_phy_incval_e810(hw, incval); - break; -- case ICE_PHY_E822: -- err = ice_ptp_prep_phy_incval_e822(hw, incval); -+ case ICE_PHY_E82X: -+ err = ice_ptp_prep_phy_incval_e82x(hw, incval); - break; - default: - err = -EOPNOTSUPP; -@@ -3491,8 +3491,8 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - case ICE_PHY_E810: - err = ice_ptp_prep_phy_adj_e810(hw, adj); - break; -- case ICE_PHY_E822: -- err = ice_ptp_prep_phy_adj_e822(hw, adj); -+ case ICE_PHY_E82X: -+ err = ice_ptp_prep_phy_adj_e82x(hw, adj); - break; - default: - err = -EOPNOTSUPP; -@@ -3520,8 +3520,8 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_read_phy_tstamp_e810(hw, block, idx, tstamp); -- case ICE_PHY_E822: -- return ice_read_phy_tstamp_e822(hw, block, idx, tstamp); -+ case ICE_PHY_E82X: -+ return ice_read_phy_tstamp_e82x(hw, block, idx, tstamp); - default: - return -EOPNOTSUPP; - } -@@ -3548,8 +3548,8 @@ int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_clear_phy_tstamp_e810(hw, block, idx); -- case ICE_PHY_E822: -- return ice_clear_phy_tstamp_e822(hw, block, idx); -+ case ICE_PHY_E82X: -+ return ice_clear_phy_tstamp_e82x(hw, block, idx); - default: - return -EOPNOTSUPP; - } -@@ -3607,8 +3607,8 @@ int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) - void ice_ptp_reset_ts_memory(struct ice_hw *hw) - { - switch (hw->phy_model) { -- case ICE_PHY_E822: -- ice_ptp_reset_ts_memory_e822(hw); -+ case ICE_PHY_E82X: -+ ice_ptp_reset_ts_memory_e82x(hw); - break; - case ICE_PHY_E810: - default: -@@ -3635,8 +3635,8 @@ int ice_ptp_init_phc(struct ice_hw *hw) - switch (hw->phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_phc_e810(hw); -- case ICE_PHY_E822: -- return ice_ptp_init_phc_e822(hw); -+ case ICE_PHY_E82X: -+ return ice_ptp_init_phc_e82x(hw); - default: - return -EOPNOTSUPP; - } -@@ -3659,8 +3659,8 @@ int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - case ICE_PHY_E810: - return ice_get_phy_tx_tstamp_ready_e810(hw, block, - tstamp_ready); -- case ICE_PHY_E822: -- return ice_get_phy_tx_tstamp_ready_e822(hw, block, -+ case ICE_PHY_E82X: -+ return ice_get_phy_tx_tstamp_ready_e82x(hw, block, - tstamp_ready); - break; - default: -@@ -3941,7 +3941,7 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) - case ICE_DEV_ID_E823C_QSFP: - case ICE_DEV_ID_E823C_SFP: - case ICE_DEV_ID_E823C_SGMII: -- *pin_num = ICE_E822_RCLK_PINS_NUM; -+ *pin_num = ICE_E82X_RCLK_PINS_NUM; - ret = 0; - if (hw->cgu_part_number == - ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032) -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 9dc30918f044..0cc285614c72 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -42,7 +42,7 @@ enum ice_ptp_fec_mode { - }; - - /** -- * struct ice_time_ref_info_e822 -+ * struct ice_time_ref_info_e82x - * @pll_freq: Frequency of PLL that drives timer ticks in Hz - * @nominal_incval: increment to generate nanoseconds in GLTSYN_TIME_L - * @pps_delay: propagation delay of the PPS output signal -@@ -50,14 +50,14 @@ enum ice_ptp_fec_mode { - * Characteristic information for the various TIME_REF sources possible in the - * E822 devices - */ --struct ice_time_ref_info_e822 { -+struct ice_time_ref_info_e82x { - u64 pll_freq; - u64 nominal_incval; - u8 pps_delay; - }; - - /** -- * struct ice_vernier_info_e822 -+ * struct ice_vernier_info_e82x - * @tx_par_clk: Frequency used to calculate P_REG_PAR_TX_TUS - * @rx_par_clk: Frequency used to calculate P_REG_PAR_RX_TUS - * @tx_pcs_clk: Frequency used to calculate P_REG_PCS_TX_TUS -@@ -80,7 +80,7 @@ struct ice_time_ref_info_e822 { - * different link speeds, either the deskew marker for multi-lane link speeds - * or the Reed Solomon gearbox marker for RS-FEC. - */ --struct ice_vernier_info_e822 { -+struct ice_vernier_info_e82x { - u32 tx_par_clk; - u32 rx_par_clk; - u32 tx_pcs_clk; -@@ -95,7 +95,7 @@ struct ice_vernier_info_e822 { - }; - - /** -- * struct ice_cgu_pll_params_e822 -+ * struct ice_cgu_pll_params_e82x - * @refclk_pre_div: Reference clock pre-divisor - * @feedback_div: Feedback divisor - * @frac_n_div: Fractional divisor -@@ -104,7 +104,7 @@ struct ice_vernier_info_e822 { - * Clock Generation Unit parameters used to program the PLL based on the - * selected TIME_REF frequency. - */ --struct ice_cgu_pll_params_e822 { -+struct ice_cgu_pll_params_e82x { - u32 refclk_pre_div; - u32 feedback_div; - u32 frac_n_div; -@@ -124,7 +124,7 @@ enum ice_phy_rclk_pins { - }; - - #define ICE_E810_RCLK_PINS_NUM (ICE_RCLKB_PIN + 1) --#define ICE_E822_RCLK_PINS_NUM (ICE_RCLKA_PIN + 1) -+#define ICE_E82X_RCLK_PINS_NUM (ICE_RCLKA_PIN + 1) - #define E810T_CGU_INPUT_C827(_phy, _pin) ((_phy) * ICE_E810_RCLK_PINS_NUM + \ - (_pin) + ZL_REF1P) - -@@ -183,16 +183,16 @@ struct ice_cgu_pin_desc { - }; - - extern const struct --ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ]; -+ice_cgu_pll_params_e82x e822_cgu_params[NUM_ICE_TIME_REF_FREQ]; - - #define E810C_QSFP_C827_0_HANDLE 2 - #define E810C_QSFP_C827_1_HANDLE 3 - - /* Table of constants related to possible TIME_REF sources */ --extern const struct ice_time_ref_info_e822 e822_time_ref[NUM_ICE_TIME_REF_FREQ]; -+extern const struct ice_time_ref_info_e82x e822_time_ref[NUM_ICE_TIME_REF_FREQ]; - - /* Table of constants for Vernier calibration on E822 */ --extern const struct ice_vernier_info_e822 e822_vernier[NUM_ICE_PTP_LNK_SPD]; -+extern const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD]; - - /* Increment value to generate nanoseconds in the GLTSYN_TIME_L register for - * the E810 devices. Based off of a PLL with an 812.5 MHz frequency. -@@ -214,23 +214,23 @@ int ice_ptp_init_phc(struct ice_hw *hw); - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready); - - /* E822 family functions */ --int ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val); --int ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val); --void ice_ptp_reset_ts_memory_quad_e822(struct ice_hw *hw, u8 quad); -+int ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val); -+int ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val); -+void ice_ptp_reset_ts_memory_quad_e82x(struct ice_hw *hw, u8 quad); - - /** -- * ice_e822_time_ref - Get the current TIME_REF from capabilities -+ * ice_e82x_time_ref - Get the current TIME_REF from capabilities - * @hw: pointer to the HW structure - * - * Returns the current TIME_REF from the capabilities structure. - */ --static inline enum ice_time_ref_freq ice_e822_time_ref(struct ice_hw *hw) -+static inline enum ice_time_ref_freq ice_e82x_time_ref(struct ice_hw *hw) - { - return hw->func_caps.ts_func_info.time_ref; - } - - /** -- * ice_set_e822_time_ref - Set new TIME_REF -+ * ice_set_e82x_time_ref - Set new TIME_REF - * @hw: pointer to the HW structure - * @time_ref: new TIME_REF to set - * -@@ -238,31 +238,31 @@ static inline enum ice_time_ref_freq ice_e822_time_ref(struct ice_hw *hw) - * change, such as an update to the CGU registers. - */ - static inline void --ice_set_e822_time_ref(struct ice_hw *hw, enum ice_time_ref_freq time_ref) -+ice_set_e82x_time_ref(struct ice_hw *hw, enum ice_time_ref_freq time_ref) - { - hw->func_caps.ts_func_info.time_ref = time_ref; - } - --static inline u64 ice_e822_pll_freq(enum ice_time_ref_freq time_ref) -+static inline u64 ice_e82x_pll_freq(enum ice_time_ref_freq time_ref) - { - return e822_time_ref[time_ref].pll_freq; - } - --static inline u64 ice_e822_nominal_incval(enum ice_time_ref_freq time_ref) -+static inline u64 ice_e82x_nominal_incval(enum ice_time_ref_freq time_ref) - { - return e822_time_ref[time_ref].nominal_incval; - } - --static inline u64 ice_e822_pps_delay(enum ice_time_ref_freq time_ref) -+static inline u64 ice_e82x_pps_delay(enum ice_time_ref_freq time_ref) - { - return e822_time_ref[time_ref].pps_delay; - } - - /* E822 Vernier calibration functions */ --int ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset); --int ice_start_phy_timer_e822(struct ice_hw *hw, u8 port); --int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port); --int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port); -+int ice_stop_phy_timer_e82x(struct ice_hw *hw, u8 port, bool soft_reset); -+int ice_start_phy_timer_e82x(struct ice_hw *hw, u8 port); -+int ice_phy_cfg_tx_offset_e82x(struct ice_hw *hw, u8 port); -+int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 port); - - /* E810 family functions */ - int ice_ptp_init_phy_e810(struct ice_hw *hw); -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index bb5d8b681bc2..f8b658386552 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -826,7 +826,7 @@ struct ice_mbx_data { - enum ice_phy_model { - ICE_PHY_UNSUP = -1, - ICE_PHY_E810 = 1, -- ICE_PHY_E822, -+ ICE_PHY_E82X, - }; - - /* Port hardware description */ -@@ -909,10 +909,9 @@ struct ice_hw { - /* INTRL granularity in 1 us */ - u8 intrl_gran; - --#define ICE_PHY_PER_NAC_E822 1 - #define ICE_MAX_QUAD 2 --#define ICE_QUADS_PER_PHY_E822 2 --#define ICE_PORTS_PER_PHY_E822 8 -+#define ICE_QUADS_PER_PHY_E82X 2 -+#define ICE_PORTS_PER_PHY_E82X 8 - #define ICE_PORTS_PER_QUAD 4 - #define ICE_PORTS_PER_PHY_E810 4 - #define ICE_NUM_EXTERNAL_PORTS (ICE_MAX_QUAD * ICE_PORTS_PER_QUAD) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch b/kernel-std/debian/patches/ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch deleted file mode 100644 index 9b6a7417..00000000 --- a/kernel-std/debian/patches/ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 3b37119a08ffe4be182ade746a6b1fe3bcf65921 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 29 Nov 2023 13:40:22 +0100 -Subject: [PATCH 12/36] ice: Schedule service task in IRQ top half - -Schedule service task and EXTTS in the top half to avoid bottom half -scheduling if possible, which significantly reduces timestamping delay. - -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Reviewed-by: Przemek Kitszel -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 00d50001444ef5c75c8ab476a6674708f3ff613b) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 - - drivers/net/ethernet/intel/ice/ice_main.c | 20 +++++++++++--------- - 2 files changed, 11 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 54a98c4032b7..efe78d5e4da1 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -517,7 +517,6 @@ enum ice_pf_flags { - }; - - enum ice_misc_thread_tasks { -- ICE_MISC_THREAD_EXTTS_EVENT, - ICE_MISC_THREAD_TX_TSTAMP, - ICE_MISC_THREAD_NBITS /* must be last */ - }; -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index d2f3b4374d14..2acaa17a12bf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3109,6 +3109,7 @@ static void ice_ena_misc_vector(struct ice_pf *pf) - static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - { - struct ice_pf *pf = (struct ice_pf *)data; -+ irqreturn_t ret = IRQ_HANDLED; - struct ice_hw *hw = &pf->hw; - struct device *dev; - u32 oicr, ena_mask; -@@ -3190,8 +3191,10 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (ice_ptp_pf_handles_tx_interrupt(pf)) -+ if (ice_ptp_pf_handles_tx_interrupt(pf)) { - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); -+ ret = IRQ_WAKE_THREAD; -+ } - } - - if (oicr & PFINT_OICR_TSYN_EVNT_M) { -@@ -3207,7 +3210,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - GLTSYN_STAT_EVENT1_M | - GLTSYN_STAT_EVENT2_M); - -- set_bit(ICE_MISC_THREAD_EXTTS_EVENT, pf->misc_thread); -+ ice_ptp_extts_event(pf); - } - } - -@@ -3230,8 +3233,11 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - set_bit(ICE_PFR_REQ, pf->state); - } - } -+ ice_service_task_schedule(pf); -+ if (ret == IRQ_HANDLED) -+ ice_irq_dynamic_ena(hw, NULL, NULL); - -- return IRQ_WAKE_THREAD; -+ return ret; - } - - /** -@@ -3247,12 +3253,7 @@ static irqreturn_t ice_misc_intr_thread_fn(int __always_unused irq, void *data) - hw = &pf->hw; - - if (ice_is_reset_in_progress(pf->state)) -- return IRQ_HANDLED; -- -- ice_service_task_schedule(pf); -- -- if (test_and_clear_bit(ICE_MISC_THREAD_EXTTS_EVENT, pf->misc_thread)) -- ice_ptp_extts_event(pf); -+ goto skip_irq; - - if (test_and_clear_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread)) { - /* Process outstanding Tx timestamps. If there is more work, -@@ -3264,6 +3265,7 @@ static irqreturn_t ice_misc_intr_thread_fn(int __always_unused irq, void *data) - } - } - -+skip_irq: - ice_irq_dynamic_ena(hw, NULL, NULL); - - return IRQ_HANDLED; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch b/kernel-std/debian/patches/ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch deleted file mode 100644 index 639642f0..00000000 --- a/kernel-std/debian/patches/ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch +++ /dev/null @@ -1,660 +0,0 @@ -From c4ab92eb3ee89178a012702f2a98477d683fad31 Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Wed, 29 Nov 2023 13:40:23 +0100 -Subject: [PATCH 13/36] ice: Enable SW interrupt from FW for LL TS - -Introduce new capability - Low Latency Timestamping with Interrupt. -On supported devices, driver can request a single timestamp from FW -without polling the register afterwards. Instead, FW can issue -a dedicated interrupt when the timestamp was read from the PHY register -and its value is available to read from the register. -This eliminates the need of bottom half scheduling, which results in -minimal delay for timestamping. - -For this mode, allocate TS indices sequentially, so that timestamps are -always completed in FIFO manner. - -Co-developed-by: Yochai Hagvi -Signed-off-by: Yochai Hagvi -Reviewed-by: Przemek Kitszel -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 82e71b226e0ef770d7bc143701c8b4960b4eb3d5) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 + - drivers/net/ethernet/intel/ice/ice_common.c | 3 + - .../net/ethernet/intel/ice/ice_hw_autogen.h | 2 + - drivers/net/ethernet/intel/ice/ice_main.c | 120 +++++++++++-- - drivers/net/ethernet/intel/ice/ice_ptp.c | 163 ++++++++++++++++-- - drivers/net/ethernet/intel/ice/ice_ptp.h | 9 + - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 1 + - drivers/net/ethernet/intel/ice/ice_type.h | 2 + - 8 files changed, 274 insertions(+), 28 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index efe78d5e4da1..ee42a504c2f4 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -594,6 +594,7 @@ struct ice_pf { - u32 hw_csum_rx_error; - u32 oicr_err_reg; - struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ -+ struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ - u16 max_pf_txqs; /* Total Tx queues PF wide */ - u16 max_pf_rxqs; /* Total Rx queues PF wide */ - u16 num_lan_msix; /* Total MSIX vectors for base driver */ -@@ -618,6 +619,7 @@ struct ice_pf { - unsigned long tx_timeout_last_recovery; - u32 tx_timeout_recovery_level; - char int_name[ICE_INT_NAME_STR_LEN]; -+ char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; - struct auxiliary_device *adev; - int aux_idx; - u32 sw_int_count; -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 7674267a2d90..acf6ac00f804 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -2624,6 +2624,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, - info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0); - - info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0); -+ info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0); - - info->ena_ports = logical_id; - info->tmr_own_map = phys_id; -@@ -2644,6 +2645,8 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, - info->tmr1_ena); - ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_read = %u\n", - info->ts_ll_read); -+ ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n", -+ info->ts_ll_int_read); - ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n", - info->ena_ports); - ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n", -diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -index 6756f3d51d14..fa730bca7f15 100644 ---- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h -@@ -200,6 +200,8 @@ - #define GLINT_VECT2FUNC_PF_NUM_M ICE_M(0x7, 12) - #define GLINT_VECT2FUNC_IS_PF_S 16 - #define GLINT_VECT2FUNC_IS_PF_M BIT(16) -+#define PFINT_ALLOC 0x001D2600 -+#define PFINT_ALLOC_FIRST ICE_M(0x7FF, 0) - #define PFINT_FW_CTL 0x0016C800 - #define PFINT_FW_CTL_MSIX_INDX_M ICE_M(0x7FF, 0) - #define PFINT_FW_CTL_ITR_INDX_S 11 -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 2acaa17a12bf..9163a72368b3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -3071,6 +3071,7 @@ static int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp) - static void ice_ena_misc_vector(struct ice_pf *pf) - { - struct ice_hw *hw = &pf->hw; -+ u32 pf_intr_start_offset; - u32 val; - - /* Disable anti-spoof detection interrupt to prevent spurious event -@@ -3099,6 +3100,47 @@ static void ice_ena_misc_vector(struct ice_pf *pf) - /* SW_ITR_IDX = 0, but don't change INTENA */ - wr32(hw, GLINT_DYN_CTL(pf->oicr_irq.index), - GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M); -+ -+ if (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ return; -+ pf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST; -+ wr32(hw, GLINT_DYN_CTL(pf->ll_ts_irq.index + pf_intr_start_offset), -+ GLINT_DYN_CTL_SW_ITR_INDX_M | GLINT_DYN_CTL_INTENA_MSK_M); -+} -+ -+/** -+ * ice_ll_ts_intr - ll_ts interrupt handler -+ * @irq: interrupt number -+ * @data: pointer to a q_vector -+ */ -+static irqreturn_t ice_ll_ts_intr(int __always_unused irq, void *data) -+{ -+ struct ice_pf *pf = data; -+ u32 pf_intr_start_offset; -+ struct ice_ptp_tx *tx; -+ unsigned long flags; -+ struct ice_hw *hw; -+ u32 val; -+ u8 idx; -+ -+ hw = &pf->hw; -+ tx = &pf->ptp.port.tx; -+ spin_lock_irqsave(&tx->lock, flags); -+ ice_ptp_complete_tx_single_tstamp(tx); -+ -+ idx = find_next_bit_wrap(tx->in_use, tx->len, -+ tx->last_ll_ts_idx_read + 1); -+ if (idx != tx->len) -+ ice_ptp_req_tx_single_tstamp(tx, idx); -+ spin_unlock_irqrestore(&tx->lock, flags); -+ -+ val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | -+ (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); -+ pf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST; -+ wr32(hw, GLINT_DYN_CTL(pf->ll_ts_irq.index + pf_intr_start_offset), -+ val); -+ -+ return IRQ_HANDLED; - } - - /** -@@ -3191,7 +3233,19 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data) - - if (oicr & PFINT_OICR_TSYN_TX_M) { - ena_mask &= ~PFINT_OICR_TSYN_TX_M; -- if (ice_ptp_pf_handles_tx_interrupt(pf)) { -+ if (ice_pf_state_is_nominal(pf) && -+ pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) { -+ struct ice_ptp_tx *tx = &pf->ptp.port.tx; -+ unsigned long flags; -+ u8 idx; -+ -+ spin_lock_irqsave(&tx->lock, flags); -+ idx = find_next_bit_wrap(tx->in_use, tx->len, -+ tx->last_ll_ts_idx_read + 1); -+ if (idx != tx->len) -+ ice_ptp_req_tx_single_tstamp(tx, idx); -+ spin_unlock_irqrestore(&tx->lock, flags); -+ } else if (ice_ptp_pf_handles_tx_interrupt(pf)) { - set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); - ret = IRQ_WAKE_THREAD; - } -@@ -3295,6 +3349,20 @@ static void ice_dis_ctrlq_interrupts(struct ice_hw *hw) - ice_flush(hw); - } - -+/** -+ * ice_free_irq_msix_ll_ts- Unroll ll_ts vector setup -+ * @pf: board private structure -+ */ -+static void ice_free_irq_msix_ll_ts(struct ice_pf *pf) -+{ -+ int irq_num = pf->ll_ts_irq.virq; -+ -+ synchronize_irq(irq_num); -+ devm_free_irq(ice_pf_to_dev(pf), irq_num, pf); -+ -+ ice_free_irq(pf, pf->ll_ts_irq); -+} -+ - /** - * ice_free_irq_msix_misc - Unroll misc vector setup - * @pf: board private structure -@@ -3314,6 +3382,8 @@ static void ice_free_irq_msix_misc(struct ice_pf *pf) - devm_free_irq(ice_pf_to_dev(pf), misc_irq_num, pf); - - ice_free_irq(pf, pf->oicr_irq); -+ if (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ ice_free_irq_msix_ll_ts(pf); - } - - /** -@@ -3339,10 +3409,12 @@ static void ice_ena_ctrlq_interrupts(struct ice_hw *hw, u16 reg_idx) - PFINT_MBX_CTL_CAUSE_ENA_M); - wr32(hw, PFINT_MBX_CTL, val); - -- /* This enables Sideband queue Interrupt causes */ -- val = ((reg_idx & PFINT_SB_CTL_MSIX_INDX_M) | -- PFINT_SB_CTL_CAUSE_ENA_M); -- wr32(hw, PFINT_SB_CTL, val); -+ if (!hw->dev_caps.ts_dev_info.ts_ll_int_read) { -+ /* enable Sideband queue Interrupt causes */ -+ val = ((reg_idx & PFINT_SB_CTL_MSIX_INDX_M) | -+ PFINT_SB_CTL_CAUSE_ENA_M); -+ wr32(hw, PFINT_SB_CTL, val); -+ } - - ice_flush(hw); - } -@@ -3359,13 +3431,17 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf) - { - struct device *dev = ice_pf_to_dev(pf); - struct ice_hw *hw = &pf->hw; -- struct msi_map oicr_irq; -+ u32 pf_intr_start_offset; -+ struct msi_map irq; - int err = 0; - - if (!pf->int_name[0]) - snprintf(pf->int_name, sizeof(pf->int_name) - 1, "%s-%s:misc", - dev_driver_string(dev), dev_name(dev)); - -+ if (!pf->int_name_ll_ts[0]) -+ snprintf(pf->int_name_ll_ts, sizeof(pf->int_name_ll_ts) - 1, -+ "%s-%s:ll_ts", dev_driver_string(dev), dev_name(dev)); - /* Do not request IRQ but do enable OICR interrupt since settings are - * lost during reset. Note that this function is called only during - * rebuild path and not while reset is in progress. -@@ -3374,11 +3450,11 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf) - goto skip_req_irq; - - /* reserve one vector in irq_tracker for misc interrupts */ -- oicr_irq = ice_alloc_irq(pf, false); -- if (oicr_irq.index < 0) -- return oicr_irq.index; -+ irq = ice_alloc_irq(pf, false); -+ if (irq.index < 0) -+ return irq.index; - -- pf->oicr_irq = oicr_irq; -+ pf->oicr_irq = irq; - err = devm_request_threaded_irq(dev, pf->oicr_irq.virq, ice_misc_intr, - ice_misc_intr_thread_fn, 0, - pf->int_name, pf); -@@ -3389,10 +3465,34 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf) - return err; - } - -+ /* reserve one vector in irq_tracker for ll_ts interrupt */ -+ if (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ goto skip_req_irq; -+ -+ irq = ice_alloc_irq(pf, false); -+ if (irq.index < 0) -+ return irq.index; -+ -+ pf->ll_ts_irq = irq; -+ err = devm_request_irq(dev, pf->ll_ts_irq.virq, ice_ll_ts_intr, 0, -+ pf->int_name_ll_ts, pf); -+ if (err) { -+ dev_err(dev, "devm_request_irq for %s failed: %d\n", -+ pf->int_name_ll_ts, err); -+ ice_free_irq(pf, pf->ll_ts_irq); -+ return err; -+ } -+ - skip_req_irq: - ice_ena_misc_vector(pf); - - ice_ena_ctrlq_interrupts(hw, pf->oicr_irq.index); -+ /* This enables LL TS interrupt */ -+ pf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST; -+ if (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) -+ wr32(hw, PFINT_SB_CTL, -+ ((pf->ll_ts_irq.index + pf_intr_start_offset) & -+ PFINT_SB_CTL_MSIX_INDX_M) | PFINT_SB_CTL_CAUSE_ENA_M); - wr32(hw, GLINT_ITR(ICE_RX_ITR, pf->oicr_irq.index), - ITR_REG_ALIGN(ICE_ITR_8K) >> ICE_ITR_GRAN_S); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 2e6e1fc84d11..75038d826f71 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -634,6 +634,119 @@ ice_ptp_is_tx_tracker_up(struct ice_ptp_tx *tx) - return tx->init && !tx->calibrating; - } - -+/** -+ * ice_ptp_req_tx_single_tstamp - Request Tx timestamp for a port from FW -+ * @tx: the PTP Tx timestamp tracker -+ * @idx: index of the timestamp to request -+ */ -+void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) -+{ -+ struct ice_ptp_port *ptp_port; -+ struct sk_buff *skb; -+ struct ice_pf *pf; -+ -+ if (!tx->init) -+ return; -+ -+ ptp_port = container_of(tx, struct ice_ptp_port, tx); -+ pf = ptp_port_to_pf(ptp_port); -+ -+ /* Drop packets which have waited for more than 2 seconds */ -+ if (time_is_before_jiffies(tx->tstamps[idx].start + 2 * HZ)) { -+ /* Count the number of Tx timestamps that timed out */ -+ pf->ptp.tx_hwtstamp_timeouts++; -+ -+ skb = tx->tstamps[idx].skb; -+ tx->tstamps[idx].skb = NULL; -+ clear_bit(idx, tx->in_use); -+ -+ dev_kfree_skb_any(skb); -+ return; -+ } -+ -+ ice_trace(tx_tstamp_fw_req, tx->tstamps[idx].skb, idx); -+ -+ /* Write TS index to read to the PF register so the FW can read it */ -+ wr32(&pf->hw, PF_SB_ATQBAL, -+ TS_LL_READ_TS_INTR | FIELD_PREP(TS_LL_READ_TS_IDX, idx) | -+ TS_LL_READ_TS); -+ tx->last_ll_ts_idx_read = idx; -+} -+ -+/** -+ * ice_ptp_complete_tx_single_tstamp - Complete Tx timestamp for a port -+ * @tx: the PTP Tx timestamp tracker -+ */ -+void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) -+{ -+ struct skb_shared_hwtstamps shhwtstamps = {}; -+ u8 idx = tx->last_ll_ts_idx_read; -+ struct ice_ptp_port *ptp_port; -+ u64 raw_tstamp, tstamp; -+ bool drop_ts = false; -+ struct sk_buff *skb; -+ struct ice_pf *pf; -+ u32 val; -+ -+ if (!tx->init || tx->last_ll_ts_idx_read < 0) -+ return; -+ -+ ptp_port = container_of(tx, struct ice_ptp_port, tx); -+ pf = ptp_port_to_pf(ptp_port); -+ -+ ice_trace(tx_tstamp_fw_done, tx->tstamps[idx].skb, idx); -+ -+ val = rd32(&pf->hw, PF_SB_ATQBAL); -+ -+ /* When the bit is cleared, the TS is ready in the register */ -+ if (val & TS_LL_READ_TS) { -+ dev_err(ice_pf_to_dev(pf), "Failed to get the Tx tstamp - FW not ready"); -+ return; -+ } -+ -+ /* High 8 bit value of the TS is on the bits 16:23 */ -+ raw_tstamp = FIELD_GET(TS_LL_READ_TS_HIGH, val); -+ raw_tstamp <<= 32; -+ -+ /* Read the low 32 bit value */ -+ raw_tstamp |= (u64)rd32(&pf->hw, PF_SB_ATQBAH); -+ -+ /* For PHYs which don't implement a proper timestamp ready bitmap, -+ * verify that the timestamp value is different from the last cached -+ * timestamp. If it is not, skip this for now assuming it hasn't yet -+ * been captured by hardware. -+ */ -+ if (!drop_ts && tx->verify_cached && -+ raw_tstamp == tx->tstamps[idx].cached_tstamp) -+ return; -+ -+ if (tx->verify_cached && raw_tstamp) -+ tx->tstamps[idx].cached_tstamp = raw_tstamp; -+ clear_bit(idx, tx->in_use); -+ skb = tx->tstamps[idx].skb; -+ tx->tstamps[idx].skb = NULL; -+ if (test_and_clear_bit(idx, tx->stale)) -+ drop_ts = true; -+ -+ if (!skb) -+ return; -+ -+ if (drop_ts) { -+ dev_kfree_skb_any(skb); -+ return; -+ } -+ -+ /* Extend the timestamp using cached PHC time */ -+ tstamp = ice_ptp_extend_40b_ts(pf, raw_tstamp); -+ if (tstamp) { -+ shhwtstamps.hwtstamp = ns_to_ktime(tstamp); -+ ice_trace(tx_tstamp_complete, skb, idx); -+ } -+ -+ skb_tstamp_tx(skb, &shhwtstamps); -+ dev_kfree_skb_any(skb); -+} -+ - /** - * ice_ptp_process_tx_tstamp - Process Tx timestamps for a port - * @tx: the PTP Tx timestamp tracker -@@ -685,6 +798,7 @@ ice_ptp_is_tx_tracker_up(struct ice_ptp_tx *tx) - static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - { - struct ice_ptp_port *ptp_port; -+ unsigned long flags; - struct ice_pf *pf; - struct ice_hw *hw; - u64 tstamp_ready; -@@ -756,7 +870,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - drop_ts = true; - - skip_ts_read: -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - if (tx->verify_cached && raw_tstamp) - tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); -@@ -764,7 +878,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - tx->tstamps[idx].skb = NULL; - if (test_and_clear_bit(idx, tx->stale)) - drop_ts = true; -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* It is unlikely but possible that the SKB will have been - * flushed at this point due to link change or teardown. -@@ -834,6 +948,7 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) - static enum ice_tx_tstamp_work ice_ptp_tx_tstamp(struct ice_ptp_tx *tx) - { - bool more_timestamps; -+ unsigned long flags; - - if (!tx->init) - return ICE_TX_TSTAMP_WORK_DONE; -@@ -842,9 +957,9 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp(struct ice_ptp_tx *tx) - ice_ptp_process_tx_tstamp(tx); - - /* Check if there are outstanding Tx timestamps */ -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - more_timestamps = tx->init && !bitmap_empty(tx->in_use, tx->len); -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - if (more_timestamps) - return ICE_TX_TSTAMP_WORK_PENDING; -@@ -881,6 +996,7 @@ ice_ptp_alloc_tx_tracker(struct ice_ptp_tx *tx) - tx->in_use = in_use; - tx->stale = stale; - tx->init = 1; -+ tx->last_ll_ts_idx_read = -1; - - spin_lock_init(&tx->lock); - -@@ -898,6 +1014,7 @@ static void - ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - { - struct ice_hw *hw = &pf->hw; -+ unsigned long flags; - u64 tstamp_ready; - int err; - u8 idx; -@@ -921,12 +1038,12 @@ ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - if (!hw->reset_ongoing && (tstamp_ready & BIT_ULL(phy_idx))) - ice_clear_phy_tstamp(hw, tx->block, phy_idx); - -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - skb = tx->tstamps[idx].skb; - tx->tstamps[idx].skb = NULL; - clear_bit(idx, tx->in_use); - clear_bit(idx, tx->stale); -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* Count the number of Tx timestamps flushed */ - pf->ptp.tx_hwtstamp_flushed++; -@@ -950,9 +1067,11 @@ ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - static void - ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) - { -- spin_lock(&tx->lock); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&tx->lock, flags); - bitmap_or(tx->stale, tx->stale, tx->in_use, tx->len); -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - } - - /** -@@ -965,9 +1084,11 @@ ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) - static void - ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - { -- spin_lock(&tx->lock); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&tx->lock, flags); - tx->init = 0; -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* wait for potentially outstanding interrupt to complete */ - synchronize_irq(pf->oicr_irq.virq); -@@ -1367,6 +1488,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - struct ice_pf *pf = ptp_port_to_pf(ptp_port); - u8 port = ptp_port->port_num; - struct ice_hw *hw = &pf->hw; -+ unsigned long flags; - int err; - - if (ice_is_e810(hw)) -@@ -1380,9 +1502,9 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - kthread_cancel_delayed_work_sync(&ptp_port->ov_work); - - /* temporarily disable Tx timestamps while calibrating PHY offset */ -- spin_lock(&ptp_port->tx.lock); -+ spin_lock_irqsave(&ptp_port->tx.lock, flags); - ptp_port->tx.calibrating = true; -- spin_unlock(&ptp_port->tx.lock); -+ spin_unlock_irqrestore(&ptp_port->tx.lock, flags); - ptp_port->tx_fifo_busy_cnt = 0; - - /* Start the PHY timer in Vernier mode */ -@@ -1391,9 +1513,9 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - goto out_unlock; - - /* Enable Tx timestamps right away */ -- spin_lock(&ptp_port->tx.lock); -+ spin_lock_irqsave(&ptp_port->tx.lock, flags); - ptp_port->tx.calibrating = false; -- spin_unlock(&ptp_port->tx.lock); -+ spin_unlock_irqrestore(&ptp_port->tx.lock, flags); - - kthread_queue_delayed_work(pf->ptp.kworker, &ptp_port->ov_work, 0); - -@@ -2471,18 +2593,23 @@ static long ice_ptp_create_clock(struct ice_pf *pf) - */ - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - { -+ unsigned long flags; - u8 idx; - -- spin_lock(&tx->lock); -+ spin_lock_irqsave(&tx->lock, flags); - - /* Check that this tracker is accepting new timestamp requests */ - if (!ice_ptp_is_tx_tracker_up(tx)) { -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - return -1; - } - - /* Find and set the first available index */ -- idx = find_first_zero_bit(tx->in_use, tx->len); -+ idx = find_next_zero_bit(tx->in_use, tx->len, -+ tx->last_ll_ts_idx_read + 1); -+ if (idx == tx->len) -+ idx = find_first_zero_bit(tx->in_use, tx->len); -+ - if (idx < tx->len) { - /* We got a valid index that no other thread could have set. Store - * a reference to the skb and the start time to allow discarding old -@@ -2496,7 +2623,7 @@ s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - ice_trace(tx_tstamp_request, skb, idx); - } - -- spin_unlock(&tx->lock); -+ spin_unlock_irqrestore(&tx->lock, flags); - - /* return the appropriate PHY timestamp register index, -1 if no - * indexes were available. -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index a3ae008a3539..64679d3d2c49 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -131,6 +131,7 @@ enum ice_tx_tstamp_work { - * @calibrating: if true, the PHY is calibrating the Tx offset. During this - * window, timestamps are temporarily disabled. - * @verify_cached: if true, verify new timestamp differs from last read value -+ * @last_ll_ts_idx_read: index of the last LL TS read by the FW - */ - struct ice_ptp_tx { - spinlock_t lock; /* lock protecting in_use bitmap */ -@@ -143,6 +144,7 @@ struct ice_ptp_tx { - u8 init : 1; - u8 calibrating : 1; - u8 verify_cached : 1; -+ s8 last_ll_ts_idx_read; - }; - - /* Quad and port information for initializing timestamp blocks */ -@@ -296,6 +298,8 @@ int ice_get_ptp_clock_index(struct ice_pf *pf); - - void ice_ptp_extts_event(struct ice_pf *pf); - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); -+void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx); -+void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx); - enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); - - void -@@ -330,6 +334,11 @@ ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) - return -1; - } - -+static inline void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) -+{ } -+ -+static inline void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) { } -+ - static inline bool ice_ptp_process_ts(struct ice_pf *pf) - { - return true; -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 0cc285614c72..7e8fd369ef7c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -509,6 +509,7 @@ int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, - #define TS_LL_READ_RETRIES 200 - #define TS_LL_READ_TS_HIGH GENMASK(23, 16) - #define TS_LL_READ_TS_IDX GENMASK(29, 24) -+#define TS_LL_READ_TS_INTR BIT(30) - #define TS_LL_READ_TS BIT(31) - - /* Internal PHY timestamp address */ -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index f8b658386552..b0f1f4db1d8b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -350,6 +350,7 @@ struct ice_ts_func_info { - #define ICE_TS_TMR0_ENA_M BIT(25) - #define ICE_TS_TMR1_ENA_M BIT(26) - #define ICE_TS_LL_TX_TS_READ_M BIT(28) -+#define ICE_TS_LL_TX_TS_INT_READ_M BIT(29) - - struct ice_ts_dev_info { - /* Device specific info */ -@@ -363,6 +364,7 @@ struct ice_ts_dev_info { - u8 tmr0_ena; - u8 tmr1_ena; - u8 ts_ll_read; -+ u8 ts_ll_int_read; - }; - - /* Function specific capabilities */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch b/kernel-std/debian/patches/ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch deleted file mode 100644 index c8c26134..00000000 --- a/kernel-std/debian/patches/ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch +++ /dev/null @@ -1,310 +0,0 @@ -From f267daca86600496d536f85c4d1945558b982427 Mon Sep 17 00:00:00 2001 -From: Michal Michalik -Date: Thu, 27 Jul 2023 15:50:36 +0200 -Subject: [PATCH 14/36] ice: PTP: add clock domain number to auxiliary - interface - -The PHC clock id used to be moved between PFs using FW admin queue -shared parameters - move the implementation to auxiliary bus. - -Signed-off-by: Karol Kolacinski -Signed-off-by: Jacob Keller -Signed-off-by: Michal Michalik -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit fcd2c1e3139a27766ef263bd2011195dbc8a79f5) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 5 - - drivers/net/ethernet/intel/ice/ice_ethtool.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 163 +++--------------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 11 +- - 4 files changed, 34 insertions(+), 147 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 353ac55bdb9d..9bacb69ead8c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2360,11 +2360,6 @@ struct ice_aqc_driver_shared_params { - }; - - enum ice_aqc_driver_params { -- /* OS clock index for PTP timer Domain 0 */ -- ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0 = 0, -- /* OS clock index for PTP timer Domain 1 */ -- ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1, -- - /* Add new parameters above */ - ICE_AQC_DRIVER_PARAM_MAX = 16, - }; -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 456cf4785c74..057453d589d5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -3286,7 +3286,7 @@ ice_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) - SOF_TIMESTAMPING_RX_HARDWARE | - SOF_TIMESTAMPING_RAW_HARDWARE; - -- info->phc_index = ice_get_ptp_clock_index(pf); -+ info->phc_index = ice_ptp_clock_index(pf); - - info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 75038d826f71..a2d0da7dfe83 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -345,131 +345,6 @@ void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) - ice_set_rx_tstamp(pf, ena); - } - --/** -- * ice_get_ptp_clock_index - Get the PTP clock index -- * @pf: the PF pointer -- * -- * Determine the clock index of the PTP clock associated with this device. If -- * this is the PF controlling the clock, just use the local access to the -- * clock device pointer. -- * -- * Otherwise, read from the driver shared parameters to determine the clock -- * index value. -- * -- * Returns: the index of the PTP clock associated with this device, or -1 if -- * there is no associated clock. -- */ --int ice_get_ptp_clock_index(struct ice_pf *pf) --{ -- struct device *dev = ice_pf_to_dev(pf); -- enum ice_aqc_driver_params param_idx; -- struct ice_hw *hw = &pf->hw; -- u8 tmr_idx; -- u32 value; -- int err; -- -- /* Use the ptp_clock structure if we're the main PF */ -- if (pf->ptp.clock) -- return ptp_clock_index(pf->ptp.clock); -- -- tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -- if (!tmr_idx) -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0; -- else -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1; -- -- err = ice_aq_get_driver_param(hw, param_idx, &value, NULL); -- if (err) { -- dev_err(dev, "Failed to read PTP clock index parameter, err %d aq_err %s\n", -- err, ice_aq_str(hw->adminq.sq_last_status)); -- return -1; -- } -- -- /* The PTP clock index is an integer, and will be between 0 and -- * INT_MAX. The highest bit of the driver shared parameter is used to -- * indicate whether or not the currently stored clock index is valid. -- */ -- if (!(value & PTP_SHARED_CLK_IDX_VALID)) -- return -1; -- -- return value & ~PTP_SHARED_CLK_IDX_VALID; --} -- --/** -- * ice_set_ptp_clock_index - Set the PTP clock index -- * @pf: the PF pointer -- * -- * Set the PTP clock index for this device into the shared driver parameters, -- * so that other PFs associated with this device can read it. -- * -- * If the PF is unable to store the clock index, it will log an error, but -- * will continue operating PTP. -- */ --static void ice_set_ptp_clock_index(struct ice_pf *pf) --{ -- struct device *dev = ice_pf_to_dev(pf); -- enum ice_aqc_driver_params param_idx; -- struct ice_hw *hw = &pf->hw; -- u8 tmr_idx; -- u32 value; -- int err; -- -- if (!pf->ptp.clock) -- return; -- -- tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -- if (!tmr_idx) -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0; -- else -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1; -- -- value = (u32)ptp_clock_index(pf->ptp.clock); -- if (value > INT_MAX) { -- dev_err(dev, "PTP Clock index is too large to store\n"); -- return; -- } -- value |= PTP_SHARED_CLK_IDX_VALID; -- -- err = ice_aq_set_driver_param(hw, param_idx, value, NULL); -- if (err) { -- dev_err(dev, "Failed to set PTP clock index parameter, err %d aq_err %s\n", -- err, ice_aq_str(hw->adminq.sq_last_status)); -- } --} -- --/** -- * ice_clear_ptp_clock_index - Clear the PTP clock index -- * @pf: the PF pointer -- * -- * Clear the PTP clock index for this device. Must be called when -- * unregistering the PTP clock, in order to ensure other PFs stop reporting -- * a clock object that no longer exists. -- */ --static void ice_clear_ptp_clock_index(struct ice_pf *pf) --{ -- struct device *dev = ice_pf_to_dev(pf); -- enum ice_aqc_driver_params param_idx; -- struct ice_hw *hw = &pf->hw; -- u8 tmr_idx; -- int err; -- -- /* Do not clear the index if we don't own the timer */ -- if (!ice_pf_src_tmr_owned(pf)) -- return; -- -- tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; -- if (!tmr_idx) -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0; -- else -- param_idx = ICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1; -- -- err = ice_aq_set_driver_param(hw, param_idx, 0, NULL); -- if (err) { -- dev_dbg(dev, "Failed to clear PTP clock index parameter, err %d aq_err %s\n", -- err, ice_aq_str(hw->adminq.sq_last_status)); -- } --} -- - /** - * ice_ptp_read_src_clk_reg - Read the source clock register - * @pf: Board private structure -@@ -2564,7 +2439,6 @@ static void ice_ptp_set_caps(struct ice_pf *pf) - static long ice_ptp_create_clock(struct ice_pf *pf) - { - struct ptp_clock_info *info; -- struct ptp_clock *clock; - struct device *dev; - - /* No need to create a clock device if we already have one */ -@@ -2577,11 +2451,11 @@ static long ice_ptp_create_clock(struct ice_pf *pf) - dev = ice_pf_to_dev(pf); - - /* Attempt to register the clock before enabling the hardware. */ -- clock = ptp_clock_register(info, dev); -- if (IS_ERR(clock)) -- return PTR_ERR(clock); -- -- pf->ptp.clock = clock; -+ pf->ptp.clock = ptp_clock_register(info, dev); -+ if (IS_ERR(pf->ptp.clock)) { -+ dev_err(ice_pf_to_dev(pf), "Failed to register PTP clock device"); -+ return PTR_ERR(pf->ptp.clock); -+ } - - return 0; - } -@@ -2996,6 +2870,28 @@ static void ice_ptp_unregister_auxbus_driver(struct ice_pf *pf) - mutex_destroy(&pf->ptp.ports_owner.lock); - } - -+/** -+ * ice_ptp_clock_index - Get the PTP clock index for this device -+ * @pf: Board private structure -+ * -+ * Returns: the PTP clock index associated with this PF, or -1 if no PTP clock -+ * is associated. -+ */ -+int ice_ptp_clock_index(struct ice_pf *pf) -+{ -+ struct auxiliary_device *aux_dev; -+ struct ice_pf *owner_pf; -+ struct ptp_clock *clock; -+ -+ aux_dev = &pf->ptp.port.aux_dev; -+ owner_pf = ice_ptp_aux_dev_to_owner_pf(aux_dev); -+ if (!owner_pf) -+ return -1; -+ clock = owner_pf->ptp.clock; -+ -+ return clock ? ptp_clock_index(clock) : -1; -+} -+ - /** - * ice_ptp_prepare_for_reset - Prepare PTP for reset - * @pf: Board private structure -@@ -3086,9 +2982,6 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - if (err) - goto err_clk; - -- /* Store the PTP clock index for other PFs */ -- ice_set_ptp_clock_index(pf); -- - err = ice_ptp_register_auxbus_driver(pf); - if (err) { - dev_err(ice_pf_to_dev(pf), "Failed to register PTP auxbus driver"); -@@ -3097,7 +2990,6 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - - return 0; - err_aux: -- ice_clear_ptp_clock_index(pf); - ptp_clock_unregister(pf->ptp.clock); - err_clk: - pf->ptp.clock = NULL; -@@ -3353,7 +3245,6 @@ void ice_ptp_release(struct ice_pf *pf) - /* Disable periodic outputs */ - ice_ptp_disable_all_clkout(pf); - -- ice_clear_ptp_clock_index(pf); - ptp_clock_unregister(pf->ptp.clock); - pf->ptp.clock = NULL; - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 64679d3d2c49..95ebd7a048ec 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -290,11 +290,11 @@ struct ice_ptp { - #define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4)) - - #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) -+int ice_ptp_clock_index(struct ice_pf *pf); - struct ice_pf; - int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); - int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); - void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena); --int ice_get_ptp_clock_index(struct ice_pf *pf); - - void ice_ptp_extts_event(struct ice_pf *pf); - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); -@@ -322,10 +322,6 @@ static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) - } - - static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { } --static inline int ice_get_ptp_clock_index(struct ice_pf *pf) --{ -- return -1; --} - - static inline void ice_ptp_extts_event(struct ice_pf *pf) { } - static inline s8 -@@ -353,5 +349,10 @@ static inline void ice_ptp_release(struct ice_pf *pf) { } - static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - { - } -+ -+static inline int ice_ptp_clock_index(struct ice_pf *pf) -+{ -+ return -1; -+} - #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */ - #endif /* _ICE_PTP_H_ */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch b/kernel-std/debian/patches/ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch deleted file mode 100644 index ed75abed..00000000 --- a/kernel-std/debian/patches/ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch +++ /dev/null @@ -1,266 +0,0 @@ -From eb63973adae478fdcc324f5490d6803646f0cc76 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 21 Nov 2023 13:12:57 -0800 -Subject: [PATCH 15/36] ice: restore timestamp configuration after device reset - -The driver calls ice_ptp_cfg_timestamp() during ice_ptp_prepare_for_reset() -to disable timestamping while the device is resetting. This operation -destroys the user requested configuration. While the driver does call -ice_ptp_cfg_timestamp in ice_rebuild() to restore some hardware settings -after a reset, it unconditionally passes true or false, resulting in -failure to restore previous user space configuration. - -This results in a device reset forcibly disabling timestamp configuration -regardless of current user settings. - -This was not detected previously due to a quirk of the LinuxPTP ptp4l -application. If ptp4l detects a missing timestamp, it enters a fault state -and performs recovery logic which includes executing SIOCSHWTSTAMP again, -restoring the now accidentally cleared configuration. - -Not every application does this, and for these applications, timestamps -will mysteriously stop after a PF reset, without being restored until an -application restart. - -Fix this by replacing ice_ptp_cfg_timestamp() with two new functions: - -1) ice_ptp_disable_timestamp_mode() which unconditionally disables the - timestamping logic in ice_ptp_prepare_for_reset() and ice_ptp_release() - -2) ice_ptp_restore_timestamp_mode() which calls - ice_ptp_restore_tx_interrupt() to restore Tx timestamping configuration, - calls ice_set_rx_tstamp() to restore Rx timestamping configuration, and - issues an immediate TSYN_TX interrupt to ensure that timestamps which - may have occurred during the device reset get processed. - -Modify the ice_ptp_set_timestamp_mode to directly save the user -configuration and then call ice_ptp_restore_timestamp_mode. This way, reset -no longer destroys the saved user configuration. - -This obsoletes the ice_set_tx_tstamp() function which can now be safely -removed. - -With this change, all devices should now restore Tx and Rx timestamping -functionality correctly after a PF reset without application intervention. - -Fixes: 77a781155a65 ("ice: enable receive hardware timestamping") -Fixes: ea9b847cda64 ("ice: enable transmit timestamps for E810 devices") -Signed-off-by: Jacob Keller -Reviewed-by: Jesse Brandeburg -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 7758017911a4f2578d54c318e8fe77bcb5899054) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 12 +--- - drivers/net/ethernet/intel/ice/ice_ptp.c | 74 ++++++++++++++--------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 5 +- - 3 files changed, 51 insertions(+), 40 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 9163a72368b3..8cfb923198e9 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -7545,15 +7545,6 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - goto err_vsi_rebuild; - } - -- /* configure PTP timestamping after VSI rebuild */ -- if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) { -- if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF) -- ice_ptp_cfg_timestamp(pf, false); -- else if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) -- /* for E82x PHC owner always need to have interrupts */ -- ice_ptp_cfg_timestamp(pf, true); -- } -- - err = ice_vsi_rebuild_by_type(pf, ICE_VSI_SWITCHDEV_CTRL); - if (err) { - dev_err(dev, "Switchdev CTRL VSI rebuild failed: %d\n", err); -@@ -7605,6 +7596,9 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - ice_plug_aux_dev(pf); - if (ice_is_feature_supported(pf, ICE_F_SRIOV_LAG)) - ice_lag_rebuild(pf); -+ -+ /* Restore timestamp mode settings after VSI rebuild */ -+ ice_ptp_restore_timestamp_mode(pf); - return; - - err_vsi_rebuild: -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index a2d0da7dfe83..8fc6905b0f79 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -294,18 +294,6 @@ static void ice_ptp_cfg_tx_interrupt(struct ice_pf *pf) - wr32(hw, PFINT_OICR_ENA, val); - } - --/** -- * ice_set_tx_tstamp - Enable or disable Tx timestamping -- * @pf: The PF pointer to search in -- * @on: bool value for whether timestamps are enabled or disabled -- */ --static void ice_set_tx_tstamp(struct ice_pf *pf, bool on) --{ -- pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; -- -- ice_ptp_cfg_tx_interrupt(pf); --} -- - /** - * ice_set_rx_tstamp - Enable or disable Rx timestamping - * @pf: The PF pointer to search in -@@ -317,7 +305,7 @@ static void ice_set_rx_tstamp(struct ice_pf *pf, bool on) - u16 i; - - vsi = ice_get_main_vsi(pf); -- if (!vsi) -+ if (!vsi || !vsi->rx_rings) - return; - - /* Set the timestamp flag for all the Rx rings */ -@@ -326,23 +314,50 @@ static void ice_set_rx_tstamp(struct ice_pf *pf, bool on) - continue; - vsi->rx_rings[i]->ptp_rx = on; - } -+} -+ -+/** -+ * ice_ptp_disable_timestamp_mode - Disable current timestamp mode -+ * @pf: Board private structure -+ * -+ * Called during preparation for reset to temporarily disable timestamping on -+ * the device. Called during remove to disable timestamping while cleaning up -+ * driver resources. -+ */ -+static void ice_ptp_disable_timestamp_mode(struct ice_pf *pf) -+{ -+ struct ice_hw *hw = &pf->hw; -+ u32 val; -+ -+ val = rd32(hw, PFINT_OICR_ENA); -+ val &= ~PFINT_OICR_TSYN_TX_M; -+ wr32(hw, PFINT_OICR_ENA, val); - -- pf->ptp.tstamp_config.rx_filter = on ? HWTSTAMP_FILTER_ALL : -- HWTSTAMP_FILTER_NONE; -+ ice_set_rx_tstamp(pf, false); - } - - /** -- * ice_ptp_cfg_timestamp - Configure timestamp for init/deinit -+ * ice_ptp_restore_timestamp_mode - Restore timestamp configuration - * @pf: Board private structure -- * @ena: bool value to enable or disable time stamp - * -- * This function will configure timestamping during PTP initialization -- * and deinitialization -+ * Called at the end of rebuild to restore timestamp configuration after -+ * a device reset. - */ --void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) -+void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) - { -- ice_set_tx_tstamp(pf, ena); -- ice_set_rx_tstamp(pf, ena); -+ struct ice_hw *hw = &pf->hw; -+ bool enable_rx; -+ -+ ice_ptp_cfg_tx_interrupt(pf); -+ -+ enable_rx = pf->ptp.tstamp_config.rx_filter == HWTSTAMP_FILTER_ALL; -+ ice_set_rx_tstamp(pf, enable_rx); -+ -+ /* Trigger an immediate software interrupt to ensure that timestamps -+ * which occurred during reset are handled now. -+ */ -+ wr32(hw, PFINT_OICR, PFINT_OICR_TSYN_TX_M); -+ ice_flush(hw); - } - - /** -@@ -2152,10 +2167,10 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) - { - switch (config->tx_type) { - case HWTSTAMP_TX_OFF: -- ice_set_tx_tstamp(pf, false); -+ pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_OFF; - break; - case HWTSTAMP_TX_ON: -- ice_set_tx_tstamp(pf, true); -+ pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_ON; - break; - default: - return -ERANGE; -@@ -2163,7 +2178,7 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) - - switch (config->rx_filter) { - case HWTSTAMP_FILTER_NONE: -- ice_set_rx_tstamp(pf, false); -+ pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; - break; - case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: - case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: -@@ -2179,12 +2194,15 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) - case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: - case HWTSTAMP_FILTER_NTP_ALL: - case HWTSTAMP_FILTER_ALL: -- ice_set_rx_tstamp(pf, true); -+ pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_ALL; - break; - default: - return -ERANGE; - } - -+ /* Immediately update the device timestamping mode */ -+ ice_ptp_restore_timestamp_mode(pf); -+ - return 0; - } - -@@ -2904,7 +2922,7 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) - clear_bit(ICE_FLAG_PTP, pf->flags); - - /* Disable timestamping for both Tx and Rx */ -- ice_ptp_cfg_timestamp(pf, false); -+ ice_ptp_disable_timestamp_mode(pf); - - kthread_cancel_delayed_work_sync(&ptp->work); - -@@ -3222,7 +3240,7 @@ void ice_ptp_release(struct ice_pf *pf) - return; - - /* Disable timestamping for both Tx and Rx */ -- ice_ptp_cfg_timestamp(pf, false); -+ ice_ptp_disable_timestamp_mode(pf); - - ice_ptp_remove_auxbus_device(pf); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 95ebd7a048ec..130e6d2ae9a5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -294,7 +294,7 @@ int ice_ptp_clock_index(struct ice_pf *pf); - struct ice_pf; - int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr); - int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr); --void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena); -+void ice_ptp_restore_timestamp_mode(struct ice_pf *pf); - - void ice_ptp_extts_event(struct ice_pf *pf); - s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb); -@@ -321,8 +321,7 @@ static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) - return -EOPNOTSUPP; - } - --static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { } -- -+static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { } - static inline void ice_ptp_extts_event(struct ice_pf *pf) { } - static inline s8 - ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0016-ice-introduce-PTP-state-machine.patch b/kernel-std/debian/patches/ice-VDF/0016-ice-introduce-PTP-state-machine.patch deleted file mode 100644 index 851c986e..00000000 --- a/kernel-std/debian/patches/ice-VDF/0016-ice-introduce-PTP-state-machine.patch +++ /dev/null @@ -1,316 +0,0 @@ -From 5c6115d27a377927d6392b3bfbe9739188c8153c Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:49 -0800 -Subject: [PATCH 16/36] ice: introduce PTP state machine - -Add PTP state machine so that the driver can correctly identify PTP -state around resets. -When the driver got information about ungraceful reset, PTP was not -prepared for reset and it returned error. When this situation occurs, -prepare PTP before rebuilding its structures. - -Signed-off-by: Jacob Keller -Co-developed-by: Karol Kolacinski -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 8293e4cb2ff54b1ec4f7206dcb74c908f62a3fb8) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 - - drivers/net/ethernet/intel/ice/ice_ethtool.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 110 +++++++++++-------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 10 ++ - 4 files changed, 74 insertions(+), 49 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index ee42a504c2f4..3278d032a2bd 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -492,7 +492,6 @@ enum ice_pf_flags { - ICE_FLAG_DCB_ENA, - ICE_FLAG_FD_ENA, - ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ -- ICE_FLAG_PTP, /* PTP is enabled by software */ - ICE_FLAG_ADV_FEATURES, - ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ - ICE_FLAG_CLS_FLOWER, -diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c -index 057453d589d5..9e949c493c38 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ethtool.c -+++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c -@@ -3276,7 +3276,7 @@ ice_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info) - struct ice_pf *pf = ice_netdev_to_pf(dev); - - /* only report timestamping if PTP is enabled */ -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return ethtool_op_get_ts_info(dev, info); - - info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 8fc6905b0f79..36c81c5ee83b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1430,7 +1430,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - struct ice_ptp_port *ptp_port; - struct ice_hw *hw = &pf->hw; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return; - - if (WARN_ON_ONCE(port >= ICE_NUM_EXTERNAL_PORTS)) -@@ -2148,7 +2148,7 @@ int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) - { - struct hwtstamp_config *config; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return -EIO; - - config = &pf->ptp.tstamp_config; -@@ -2218,7 +2218,7 @@ int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr) - struct hwtstamp_config config; - int err; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return -EAGAIN; - - if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) -@@ -2606,7 +2606,7 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - struct ice_pf *pf = container_of(ptp, struct ice_pf, ptp); - int err; - -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return; - - err = ice_ptp_update_cached_phctime(pf); -@@ -2618,6 +2618,42 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - msecs_to_jiffies(err ? 10 : 500)); - } - -+/** -+ * ice_ptp_prepare_for_reset - Prepare PTP for reset -+ * @pf: Board private structure -+ */ -+void ice_ptp_prepare_for_reset(struct ice_pf *pf) -+{ -+ struct ice_ptp *ptp = &pf->ptp; -+ u8 src_tmr; -+ -+ if (ptp->state != ICE_PTP_READY) -+ return; -+ -+ ptp->state = ICE_PTP_RESETTING; -+ -+ /* Disable timestamping for both Tx and Rx */ -+ ice_ptp_disable_timestamp_mode(pf); -+ -+ kthread_cancel_delayed_work_sync(&ptp->work); -+ -+ if (test_bit(ICE_PFR_REQ, pf->state)) -+ return; -+ -+ ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); -+ -+ /* Disable periodic outputs */ -+ ice_ptp_disable_all_clkout(pf); -+ -+ src_tmr = ice_get_ptp_src_clock_index(&pf->hw); -+ -+ /* Disable source clock */ -+ wr32(&pf->hw, GLTSYN_ENA(src_tmr), (u32)~GLTSYN_ENA_TSYN_ENA_M); -+ -+ /* Acquire PHC and system timer to restore after reset */ -+ ptp->reset_time = ktime_get_real_ns(); -+} -+ - /** - * ice_ptp_reset - Initialize PTP hardware clock support after reset - * @pf: Board private structure -@@ -2630,6 +2666,14 @@ void ice_ptp_reset(struct ice_pf *pf) - int err, itr = 1; - u64 time_diff; - -+ if (ptp->state == ICE_PTP_READY) { -+ ice_ptp_prepare_for_reset(pf); -+ } else if (ptp->state != ICE_PTP_RESETTING) { -+ err = -EINVAL; -+ dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); -+ goto err; -+ } -+ - if (test_bit(ICE_PFR_REQ, pf->state) || - !ice_pf_src_tmr_owned(pf)) - goto pfr; -@@ -2690,7 +2734,7 @@ void ice_ptp_reset(struct ice_pf *pf) - if (err) - goto err; - -- set_bit(ICE_FLAG_PTP, pf->flags); -+ ptp->state = ICE_PTP_READY; - - /* Restart the PHY timestamping block */ - if (!test_bit(ICE_PFR_REQ, pf->state) && -@@ -2704,6 +2748,7 @@ void ice_ptp_reset(struct ice_pf *pf) - return; - - err: -+ ptp->state = ICE_PTP_ERROR; - dev_err(ice_pf_to_dev(pf), "PTP reset failed %d\n", err); - } - -@@ -2910,39 +2955,6 @@ int ice_ptp_clock_index(struct ice_pf *pf) - return clock ? ptp_clock_index(clock) : -1; - } - --/** -- * ice_ptp_prepare_for_reset - Prepare PTP for reset -- * @pf: Board private structure -- */ --void ice_ptp_prepare_for_reset(struct ice_pf *pf) --{ -- struct ice_ptp *ptp = &pf->ptp; -- u8 src_tmr; -- -- clear_bit(ICE_FLAG_PTP, pf->flags); -- -- /* Disable timestamping for both Tx and Rx */ -- ice_ptp_disable_timestamp_mode(pf); -- -- kthread_cancel_delayed_work_sync(&ptp->work); -- -- if (test_bit(ICE_PFR_REQ, pf->state)) -- return; -- -- ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); -- -- /* Disable periodic outputs */ -- ice_ptp_disable_all_clkout(pf); -- -- src_tmr = ice_get_ptp_src_clock_index(&pf->hw); -- -- /* Disable source clock */ -- wr32(&pf->hw, GLTSYN_ENA(src_tmr), (u32)~GLTSYN_ENA_TSYN_ENA_M); -- -- /* Acquire PHC and system timer to restore after reset */ -- ptp->reset_time = ktime_get_real_ns(); --} -- - /** - * ice_ptp_init_owner - Initialize PTP_1588_CLOCK device - * @pf: Board private structure -@@ -3181,6 +3193,8 @@ void ice_ptp_init(struct ice_pf *pf) - struct ice_hw *hw = &pf->hw; - int err; - -+ ptp->state = ICE_PTP_INITIALIZING; -+ - ice_ptp_init_phy_model(hw); - - ice_ptp_init_tx_interrupt_mode(pf); -@@ -3205,12 +3219,13 @@ void ice_ptp_init(struct ice_pf *pf) - /* Configure initial Tx interrupt settings */ - ice_ptp_cfg_tx_interrupt(pf); - -- set_bit(ICE_FLAG_PTP, pf->flags); -- err = ice_ptp_init_work(pf, ptp); -+ err = ice_ptp_create_auxbus_device(pf); - if (err) - goto err; - -- err = ice_ptp_create_auxbus_device(pf); -+ ptp->state = ICE_PTP_READY; -+ -+ err = ice_ptp_init_work(pf, ptp); - if (err) - goto err; - -@@ -3223,7 +3238,7 @@ void ice_ptp_init(struct ice_pf *pf) - ptp_clock_unregister(ptp->clock); - pf->ptp.clock = NULL; - } -- clear_bit(ICE_FLAG_PTP, pf->flags); -+ ptp->state = ICE_PTP_ERROR; - dev_err(ice_pf_to_dev(pf), "PTP failed %d\n", err); - } - -@@ -3236,9 +3251,11 @@ void ice_ptp_init(struct ice_pf *pf) - */ - void ice_ptp_release(struct ice_pf *pf) - { -- if (!test_bit(ICE_FLAG_PTP, pf->flags)) -+ if (pf->ptp.state != ICE_PTP_READY) - return; - -+ pf->ptp.state = ICE_PTP_UNINIT; -+ - /* Disable timestamping for both Tx and Rx */ - ice_ptp_disable_timestamp_mode(pf); - -@@ -3246,8 +3263,6 @@ void ice_ptp_release(struct ice_pf *pf) - - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); - -- clear_bit(ICE_FLAG_PTP, pf->flags); -- - kthread_cancel_delayed_work_sync(&pf->ptp.work); - - ice_ptp_port_phy_stop(&pf->ptp.port); -@@ -3257,6 +3272,9 @@ void ice_ptp_release(struct ice_pf *pf) - pf->ptp.kworker = NULL; - } - -+ if (ice_pf_src_tmr_owned(pf)) -+ ice_ptp_unregister_auxbus_driver(pf); -+ - if (!pf->ptp.clock) - return; - -@@ -3266,7 +3284,5 @@ void ice_ptp_release(struct ice_pf *pf) - ptp_clock_unregister(pf->ptp.clock); - pf->ptp.clock = NULL; - -- ice_ptp_unregister_auxbus_driver(pf); -- - dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 130e6d2ae9a5..e3cc69692405 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -203,8 +203,17 @@ struct ice_ptp_port_owner { - - #define GLTSYN_TGT_H_IDX_MAX 4 - -+enum ice_ptp_state { -+ ICE_PTP_UNINIT = 0, -+ ICE_PTP_INITIALIZING, -+ ICE_PTP_READY, -+ ICE_PTP_RESETTING, -+ ICE_PTP_ERROR, -+}; -+ - /** - * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK -+ * @state: current state of PTP state machine - * @tx_interrupt_mode: the TX interrupt mode for the PTP clock - * @port: data for the PHY port initialization procedure - * @ports_owner: data for the auxiliary driver owner -@@ -227,6 +236,7 @@ struct ice_ptp_port_owner { - * @late_cached_phc_updates: number of times cached PHC update is late - */ - struct ice_ptp { -+ enum ice_ptp_state state; - enum ice_ptp_tx_interrupt tx_interrupt_mode; - struct ice_ptp_port port; - struct ice_ptp_port_owner ports_owner; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch b/kernel-std/debian/patches/ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch deleted file mode 100644 index c72ff132..00000000 --- a/kernel-std/debian/patches/ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 68d481b41ee5c177a1376fb82a98c09c148d982a Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:50 -0800 -Subject: [PATCH 17/36] ice: pass reset type to PTP reset functions - -The ice_ptp_prepare_for_reset() and ice_ptp_reset() functions currently -check the pf->flags ICE_FLAG_PFR_REQ bit to determine if the current -reset is a PF reset or not. - -This is problematic, because it is possible that a PF reset and a higher -level reset (CORE reset, GLOBAL reset, EMP reset) are requested -simultaneously. In that case, the driver performs the highest level -reset requested. However, the ICE_FLAG_PFR_REQ flag will still be set. - -The main driver reset functions take an enum ice_reset_req indicating -which reset is actually being performed. Pass this data into the PTP -functions and rely on this instead of relying on the driver flags. - -This ensures that the PTP code performs the proper level of reset that -the driver is actually undergoing. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit c75d5e675a8542274fa0f7e52f3c4db1d4859a0c) -[Adjust the ice_ptp.h with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 4 ++-- - drivers/net/ethernet/intel/ice/ice_ptp.c | 13 +++++++------ - drivers/net/ethernet/intel/ice/ice_ptp.h | 17 +++++++++++++---- - 3 files changed, 22 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 8cfb923198e9..d5321410f2d7 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -615,7 +615,7 @@ ice_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - ice_pf_dis_all_vsi(pf, false); - - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_prepare_for_reset(pf); -+ ice_ptp_prepare_for_reset(pf, reset_type); - - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_exit(pf); -@@ -7533,7 +7533,7 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - * fail. - */ - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_reset(pf); -+ ice_ptp_reset(pf, reset_type); - - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_init(pf); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 36c81c5ee83b..20d1d22235d3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -2621,8 +2621,9 @@ static void ice_ptp_periodic_work(struct kthread_work *work) - /** - * ice_ptp_prepare_for_reset - Prepare PTP for reset - * @pf: Board private structure -+ * @reset_type: the reset type being performed - */ --void ice_ptp_prepare_for_reset(struct ice_pf *pf) -+void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - { - struct ice_ptp *ptp = &pf->ptp; - u8 src_tmr; -@@ -2637,7 +2638,7 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) - - kthread_cancel_delayed_work_sync(&ptp->work); - -- if (test_bit(ICE_PFR_REQ, pf->state)) -+ if (reset_type == ICE_RESET_PFR) - return; - - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); -@@ -2657,8 +2658,9 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) - /** - * ice_ptp_reset - Initialize PTP hardware clock support after reset - * @pf: Board private structure -+ * @reset_type: the reset type being performed - */ --void ice_ptp_reset(struct ice_pf *pf) -+void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - { - struct ice_ptp *ptp = &pf->ptp; - struct ice_hw *hw = &pf->hw; -@@ -2667,15 +2669,14 @@ void ice_ptp_reset(struct ice_pf *pf) - u64 time_diff; - - if (ptp->state == ICE_PTP_READY) { -- ice_ptp_prepare_for_reset(pf); -+ ice_ptp_prepare_for_reset(pf, reset_type); - } else if (ptp->state != ICE_PTP_RESETTING) { - err = -EINVAL; - dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); - goto err; - } - -- if (test_bit(ICE_PFR_REQ, pf->state) || -- !ice_pf_src_tmr_owned(pf)) -+ if (reset_type == ICE_RESET_PFR || !ice_pf_src_tmr_owned(pf)) - goto pfr; - - err = ice_ptp_init_phc(hw); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index e3cc69692405..cd74712a17a1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -315,8 +315,9 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); - void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb); --void ice_ptp_reset(struct ice_pf *pf); --void ice_ptp_prepare_for_reset(struct ice_pf *pf); -+void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type); -+void ice_ptp_prepare_for_reset(struct ice_pf *pf, -+ enum ice_reset_req reset_type); - void ice_ptp_init(struct ice_pf *pf); - void ice_ptp_release(struct ice_pf *pf); - void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup); -@@ -351,8 +352,16 @@ static inline bool ice_ptp_process_ts(struct ice_pf *pf) - static inline void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { } --static inline void ice_ptp_reset(struct ice_pf *pf) { } --static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { } -+ -+static inline void ice_ptp_reset(struct ice_pf *pf, -+ enum ice_reset_req reset_type) -+{ -+} -+ -+static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf, -+ enum ice_reset_req reset_type) -+{ -+} - static inline void ice_ptp_init(struct ice_pf *pf) { } - static inline void ice_ptp_release(struct ice_pf *pf) { } - static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch b/kernel-std/debian/patches/ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch deleted file mode 100644 index a17f0f89..00000000 --- a/kernel-std/debian/patches/ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 084497314e63f3d92178bc44500a27a277abc378 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:51 -0800 -Subject: [PATCH 18/36] ice: rename verify_cached to has_ready_bitmap - -The tx->verify_cached flag is used to inform the Tx timestamp tracking -code whether it needs to verify the cached Tx timestamp value against -a previous captured value. This is necessary on E810 hardware which does -not have a Tx timestamp ready bitmap. - -In addition, we currently rely on the fact that the -ice_get_phy_tx_tstamp_ready() function returns all 1s for E810 hardware. -Instead of introducing a brand new flag, rename and verify_cached to -has_ready_bitmap, inverting the relevant checks. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 3f2216e8dbce04da5376ea7df410541f7b687cb0) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ - drivers/net/ethernet/intel/ice/ice_ptp.h | 8 +++++--- - 2 files changed, 11 insertions(+), 9 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 20d1d22235d3..a8c6b83579e6 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -606,11 +606,11 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) - * timestamp. If it is not, skip this for now assuming it hasn't yet - * been captured by hardware. - */ -- if (!drop_ts && tx->verify_cached && -+ if (!drop_ts && !tx->has_ready_bitmap && - raw_tstamp == tx->tstamps[idx].cached_tstamp) - return; - -- if (tx->verify_cached && raw_tstamp) -+ if (!tx->has_ready_bitmap && raw_tstamp) - tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); - skb = tx->tstamps[idx].skb; -@@ -751,7 +751,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - * from the last cached timestamp. If it is not, skip this for - * now assuming it hasn't yet been captured by hardware. - */ -- if (!drop_ts && tx->verify_cached && -+ if (!drop_ts && !tx->has_ready_bitmap && - raw_tstamp == tx->tstamps[idx].cached_tstamp) - continue; - -@@ -761,7 +761,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - - skip_ts_read: - spin_lock_irqsave(&tx->lock, flags); -- if (tx->verify_cached && raw_tstamp) -+ if (!tx->has_ready_bitmap && raw_tstamp) - tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); - skb = tx->tstamps[idx].skb; -@@ -1014,7 +1014,7 @@ ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) - tx->block = port / ICE_PORTS_PER_QUAD; - tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; - tx->len = INDEX_PER_PORT_E82X; -- tx->verify_cached = 0; -+ tx->has_ready_bitmap = 1; - - return ice_ptp_alloc_tx_tracker(tx); - } -@@ -1037,7 +1037,7 @@ ice_ptp_init_tx_e810(struct ice_pf *pf, struct ice_ptp_tx *tx) - * verify new timestamps against cached copy of the last read - * timestamp. - */ -- tx->verify_cached = 1; -+ tx->has_ready_bitmap = 0; - - return ice_ptp_alloc_tx_tracker(tx); - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index cd74712a17a1..1486a0b3b016 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -100,7 +100,7 @@ struct ice_perout_channel { - * the last timestamp we read for a given index. If the current timestamp - * value is the same as the cached value, we assume a new timestamp hasn't - * been captured. This avoids reporting stale timestamps to the stack. This is -- * only done if the verify_cached flag is set in ice_ptp_tx structure. -+ * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure. - */ - struct ice_tx_tstamp { - struct sk_buff *skb; -@@ -130,7 +130,9 @@ enum ice_tx_tstamp_work { - * @init: if true, the tracker is initialized; - * @calibrating: if true, the PHY is calibrating the Tx offset. During this - * window, timestamps are temporarily disabled. -- * @verify_cached: if true, verify new timestamp differs from last read value -+ * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready -+ * bitmap register. If false, fall back to verifying new -+ * timestamp values against previously cached copy. - * @last_ll_ts_idx_read: index of the last LL TS read by the FW - */ - struct ice_ptp_tx { -@@ -143,7 +145,7 @@ struct ice_ptp_tx { - u8 len; - u8 init : 1; - u8 calibrating : 1; -- u8 verify_cached : 1; -+ u8 has_ready_bitmap : 1; - s8 last_ll_ts_idx_read; - }; - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch b/kernel-std/debian/patches/ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch deleted file mode 100644 index d1701f9e..00000000 --- a/kernel-std/debian/patches/ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 375bced6b51243a8c8708204dd32960d076d5b83 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:52 -0800 -Subject: [PATCH 19/36] ice: don't check has_ready_bitmap in E810 functions - -E810 hardware does not have a Tx timestamp ready bitmap. Don't check -has_ready_bitmap in E810-specific functions. -Add has_ready_bitmap check in ice_ptp_process_tx_tstamp() to stop -relying on the fact that ice_get_phy_tx_tstamp_ready() returns all 1s. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit fea82915fca626eaa83f36d8a23194e8593ef4b4) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 23 +++++++++++------------ - 1 file changed, 11 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index a8c6b83579e6..ddc2dd0b2a28 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -601,17 +601,13 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) - /* Read the low 32 bit value */ - raw_tstamp |= (u64)rd32(&pf->hw, PF_SB_ATQBAH); - -- /* For PHYs which don't implement a proper timestamp ready bitmap, -- * verify that the timestamp value is different from the last cached -- * timestamp. If it is not, skip this for now assuming it hasn't yet -- * been captured by hardware. -+ /* Devices using this interface always verify the timestamp differs -+ * relative to the last cached timestamp value. - */ -- if (!drop_ts && !tx->has_ready_bitmap && -- raw_tstamp == tx->tstamps[idx].cached_tstamp) -+ if (raw_tstamp == tx->tstamps[idx].cached_tstamp) - return; - -- if (!tx->has_ready_bitmap && raw_tstamp) -- tx->tstamps[idx].cached_tstamp = raw_tstamp; -+ tx->tstamps[idx].cached_tstamp = raw_tstamp; - clear_bit(idx, tx->in_use); - skb = tx->tstamps[idx].skb; - tx->tstamps[idx].skb = NULL; -@@ -701,9 +697,11 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - hw = &pf->hw; - - /* Read the Tx ready status first */ -- err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); -- if (err) -- return; -+ if (tx->has_ready_bitmap) { -+ err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); -+ if (err) -+ return; -+ } - - /* Drop packets if the link went down */ - link_up = ptp_port->link_up; -@@ -731,7 +729,8 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) - * If we do not, the hardware logic for generating a new - * interrupt can get stuck on some devices. - */ -- if (!(tstamp_ready & BIT_ULL(phy_idx))) { -+ if (tx->has_ready_bitmap && -+ !(tstamp_ready & BIT_ULL(phy_idx))) { - if (drop_ts) - goto skip_ts_read; - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch b/kernel-std/debian/patches/ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch deleted file mode 100644 index 30d0631e..00000000 --- a/kernel-std/debian/patches/ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch +++ /dev/null @@ -1,88 +0,0 @@ -From a5318a3a04ed9535ab18ef0f0537b3d33862bee9 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:53 -0800 -Subject: [PATCH 20/36] ice: rename ice_ptp_tx_cfg_intr - -The ice_ptp_tx_cfg_intr() function sends a control queue message to -configure the PHY timestamp interrupt block. This is a very similar name -to a function which is used to configure the MAC Other Interrupt Cause -Enable register. - -Rename this function to ice_ptp_cfg_phy_interrupt in order to make it -more obvious to the reader what action it performs, and distinguish it -from other similarly named functions. - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 1abefdca85e8664374f53c7bc80d5f5f827ce711) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index ddc2dd0b2a28..c6e9d77fc59b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1455,14 +1455,14 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - } - - /** -- * ice_ptp_tx_ena_intr - Enable or disable the Tx timestamp interrupt -+ * ice_ptp_cfg_phy_interrupt - Configure PHY interrupt settings - * @pf: PF private structure - * @ena: bool value to enable or disable interrupt - * @threshold: Minimum number of packets at which intr is triggered - * - * Utility function to enable or disable Tx timestamp interrupt and threshold - */ --static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold) -+static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold) - { - struct ice_hw *hw = &pf->hw; - int err = 0; -@@ -2664,8 +2664,8 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - struct ice_ptp *ptp = &pf->ptp; - struct ice_hw *hw = &pf->hw; - struct timespec64 ts; -- int err, itr = 1; - u64 time_diff; -+ int err; - - if (ptp->state == ICE_PTP_READY) { - ice_ptp_prepare_for_reset(pf, reset_type); -@@ -2716,7 +2716,7 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ -- err = ice_ptp_tx_ena_intr(pf, true, itr); -+ err = ice_ptp_cfg_phy_interrupt(pf, true, 1); - if (err) - goto err; - } -@@ -2967,7 +2967,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - { - struct ice_hw *hw = &pf->hw; - struct timespec64 ts; -- int err, itr = 1; -+ int err; - - err = ice_ptp_init_phc(hw); - if (err) { -@@ -3002,7 +3002,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) - - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ -- err = ice_ptp_tx_ena_intr(pf, true, itr); -+ err = ice_ptp_cfg_phy_interrupt(pf, true, 1); - if (err) - goto err_exit; - } --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch b/kernel-std/debian/patches/ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch deleted file mode 100644 index 075359c8..00000000 --- a/kernel-std/debian/patches/ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch +++ /dev/null @@ -1,191 +0,0 @@ -From 9411c5b82a7196b9712488631fd14e67e2d919fa Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:54 -0800 -Subject: [PATCH 21/36] ice: factor out ice_ptp_rebuild_owner() - -The ice_ptp_reset() function uses a goto to skip past clock owner -operations if performing a PF reset or if the device is not the clock -owner. This is a bit confusing. Factor this out into -ice_ptp_rebuild_owner() instead. - -The ice_ptp_reset() function is called by ice_rebuild() to restore PTP -functionality after a device reset. Follow the convention set by the -ice_main.c file and rename this function to ice_ptp_rebuild(), in the -same way that we have ice_prepare_for_reset() and -ice_ptp_prepare_for_reset(). - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 803bef817807d2d36c930dada20c96fffae0dd19) -[Adjust ice_ptp.h with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 2 +- - drivers/net/ethernet/intel/ice/ice_ptp.c | 62 ++++++++++++++--------- - drivers/net/ethernet/intel/ice/ice_ptp.h | 6 +-- - 3 files changed, 42 insertions(+), 28 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index d5321410f2d7..a04dcc89c35d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -7533,7 +7533,7 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - * fail. - */ - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) -- ice_ptp_reset(pf, reset_type); -+ ice_ptp_rebuild(pf, reset_type); - - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_init(pf); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index c6e9d77fc59b..780aa242c86b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -2655,11 +2655,13 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - } - - /** -- * ice_ptp_reset - Initialize PTP hardware clock support after reset -+ * ice_ptp_rebuild_owner - Initialize PTP clock owner after reset - * @pf: Board private structure -- * @reset_type: the reset type being performed -+ * -+ * Companion function for ice_ptp_rebuild() which handles tasks that only the -+ * PTP clock owner instance should perform. - */ --void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) -+static int ice_ptp_rebuild_owner(struct ice_pf *pf) - { - struct ice_ptp *ptp = &pf->ptp; - struct ice_hw *hw = &pf->hw; -@@ -2667,32 +2669,21 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - u64 time_diff; - int err; - -- if (ptp->state == ICE_PTP_READY) { -- ice_ptp_prepare_for_reset(pf, reset_type); -- } else if (ptp->state != ICE_PTP_RESETTING) { -- err = -EINVAL; -- dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); -- goto err; -- } -- -- if (reset_type == ICE_RESET_PFR || !ice_pf_src_tmr_owned(pf)) -- goto pfr; -- - err = ice_ptp_init_phc(hw); - if (err) -- goto err; -+ return err; - - /* Acquire the global hardware lock */ - if (!ice_ptp_lock(hw)) { - err = -EBUSY; -- goto err; -+ return err; - } - - /* Write the increment time value to PHY and LAN */ - err = ice_ptp_write_incval(hw, ice_base_incval(pf)); - if (err) { - ice_ptp_unlock(hw); -- goto err; -+ return err; - } - - /* Write the initial Time value to PHY and LAN using the cached PHC -@@ -2708,7 +2699,7 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - err = ice_ptp_write_init(pf, &ts); - if (err) { - ice_ptp_unlock(hw); -- goto err; -+ return err; - } - - /* Release the global hardware lock */ -@@ -2717,11 +2708,39 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ - err = ice_ptp_cfg_phy_interrupt(pf, true, 1); -+ if (err) -+ return err; -+ -+ ice_ptp_restart_all_phy(pf); -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_ptp_rebuild - Initialize PTP hardware clock support after reset -+ * @pf: Board private structure -+ * @reset_type: the reset type being performed -+ */ -+void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) -+{ -+ struct ice_ptp *ptp = &pf->ptp; -+ int err; -+ -+ if (ptp->state == ICE_PTP_READY) { -+ ice_ptp_prepare_for_reset(pf, reset_type); -+ } else if (ptp->state != ICE_PTP_RESETTING) { -+ err = -EINVAL; -+ dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); -+ goto err; -+ } -+ -+ if (ice_pf_src_tmr_owned(pf) && reset_type != ICE_RESET_PFR) { -+ err = ice_ptp_rebuild_owner(pf); - if (err) - goto err; - } - --pfr: - /* Init Tx structures */ - if (ice_is_e810(&pf->hw)) { - err = ice_ptp_init_tx_e810(pf, &ptp->port.tx); -@@ -2736,11 +2755,6 @@ void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type) - - ptp->state = ICE_PTP_READY; - -- /* Restart the PHY timestamping block */ -- if (!test_bit(ICE_PFR_REQ, pf->state) && -- ice_pf_src_tmr_owned(pf)) -- ice_ptp_restart_all_phy(pf); -- - /* Start periodic work going */ - kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 1486a0b3b016..352405a2daf2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -317,7 +317,7 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf); - void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb); --void ice_ptp_reset(struct ice_pf *pf, enum ice_reset_req reset_type); -+void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type); - void ice_ptp_prepare_for_reset(struct ice_pf *pf, - enum ice_reset_req reset_type); - void ice_ptp_init(struct ice_pf *pf); -@@ -355,8 +355,8 @@ static inline void - ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring, - union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { } - --static inline void ice_ptp_reset(struct ice_pf *pf, -- enum ice_reset_req reset_type) -+static inline void ice_ptp_rebuild(struct ice_pf *pf, -+ enum ice_reset_req reset_type) - { - } - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch b/kernel-std/debian/patches/ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch deleted file mode 100644 index 8e2133b5..00000000 --- a/kernel-std/debian/patches/ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 1c89a9e26f669bead5ebcac38fa98c20c517769c Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Thu, 25 Jan 2024 13:57:55 -0800 -Subject: [PATCH 22/36] ice: stop destroying and reinitalizing Tx tracker - during reset - -The ice driver currently attempts to destroy and re-initialize the Tx -timestamp tracker during the reset flow. The release of the Tx tracker -only happened during CORE reset or GLOBAL reset. The ice_ptp_rebuild() -function always calls the ice_ptp_init_tx function which will allocate -a new tracker data structure, resulting in memory leaks during PF reset. - -Certainly the driver should not be allocating a new tracker without -removing the old tracker data, as this results in a memory leak. -Additionally, there's no reason to remove the tracker memory during a -reset. Remove this logic from the reset and rebuild flow. Instead of -releasing the Tx tracker, flush outstanding timestamps just before we -reset the PHY timestamp block in ice_ptp_cfg_phy_interrupt(). - -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Jacob Keller -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit 7a25fe5cd5fb2265065ac6765c53c0a1f1e874d3) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 33 +++++++++++++++--------- - 1 file changed, 21 insertions(+), 12 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 780aa242c86b..48ec59fc5d87 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -963,6 +963,22 @@ ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) - spin_unlock_irqrestore(&tx->lock, flags); - } - -+/** -+ * ice_ptp_flush_all_tx_tracker - Flush all timestamp trackers on this clock -+ * @pf: Board private structure -+ * -+ * Called by the clock owner to flush all the Tx timestamp trackers associated -+ * with the clock. -+ */ -+static void -+ice_ptp_flush_all_tx_tracker(struct ice_pf *pf) -+{ -+ struct ice_ptp_port *port; -+ -+ list_for_each_entry(port, &pf->ptp.ports_owner.ports, list_member) -+ ice_ptp_flush_tx_tracker(ptp_port_to_pf(port), &port->tx); -+} -+ - /** - * ice_ptp_release_tx_tracker - Release allocated memory for Tx tracker - * @pf: Board private structure -@@ -2705,6 +2721,11 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) - /* Release the global hardware lock */ - ice_ptp_unlock(hw); - -+ /* Flush software tracking of any outstanding timestamps since we're -+ * about to flush the PHY timestamp block. -+ */ -+ ice_ptp_flush_all_tx_tracker(pf); -+ - if (!ice_is_e810(hw)) { - /* Enable quad interrupts */ - err = ice_ptp_cfg_phy_interrupt(pf, true, 1); -@@ -2741,18 +2762,6 @@ void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) - goto err; - } - -- /* Init Tx structures */ -- if (ice_is_e810(&pf->hw)) { -- err = ice_ptp_init_tx_e810(pf, &ptp->port.tx); -- } else { -- kthread_init_delayed_work(&ptp->port.ov_work, -- ice_ptp_wait_for_offsets); -- err = ice_ptp_init_tx_e82x(pf, &ptp->port.tx, -- ptp->port.port_num); -- } -- if (err) -- goto err; -- - ptp->state = ICE_PTP_READY; - - /* Start periodic work going */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch b/kernel-std/debian/patches/ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch deleted file mode 100644 index 3a902574..00000000 --- a/kernel-std/debian/patches/ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch +++ /dev/null @@ -1,457 +0,0 @@ -From 6f1d1fa58f58ff3f6ce61ab502bd29227ca1bb3f Mon Sep 17 00:00:00 2001 -From: Wojciech Drewek -Date: Mon, 5 Feb 2024 14:03:56 +0100 -Subject: [PATCH 23/36] ice: Remove and readd netdev during devlink reload - -Recent changes to the devlink reload (commit 9b2348e2d6c9 -("devlink: warn about existing entities during reload-reinit")) -force the drivers to destroy devlink ports during reinit. -Adjust ice driver to this requirement, unregister netdvice, destroy -devlink port. ice_init_eth() was removed and all the common code -between probe and reload was moved to ice_load(). - -During devlink reload we can't take devl_lock (it's already taken) -and in ice_probe() we have to lock it. Use devl_* variant of the API -which does not acquire and release devl_lock. Guard ice_load() -with devl_lock only in case of probe. - -Suggested-by: Jiri Pirko -Reviewed-by: Przemek Kitszel -Reviewed-by: Vadim Fedorenko -Reviewed-by: Simon Horman -Reviewed-by: Brett Creeley -Signed-off-by: Wojciech Drewek -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 41cc4e53934c30f1cf7745c257154e538c78a1f5) -[Adjust ice.h with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 + - drivers/net/ethernet/intel/ice/ice_devlink.c | 68 ++++++- - drivers/net/ethernet/intel/ice/ice_main.c | 186 ++++++------------- - 3 files changed, 125 insertions(+), 131 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 3278d032a2bd..d3f72f9fbcd7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -978,6 +978,8 @@ int ice_stop(struct net_device *netdev); - void ice_service_task_schedule(struct ice_pf *pf); - int ice_load(struct ice_pf *pf); - void ice_unload(struct ice_pf *pf); -+int ice_init_dev(struct ice_pf *pf); -+void ice_deinit_dev(struct ice_pf *pf); - - /** - * ice_set_rdma_cap - enable RDMA support -diff --git a/drivers/net/ethernet/intel/ice/ice_devlink.c b/drivers/net/ethernet/intel/ice/ice_devlink.c -index 3a2261823d93..43007e3674c4 100644 ---- a/drivers/net/ethernet/intel/ice/ice_devlink.c -+++ b/drivers/net/ethernet/intel/ice/ice_devlink.c -@@ -444,6 +444,20 @@ ice_devlink_reload_empr_start(struct ice_pf *pf, - return 0; - } - -+/** -+ * ice_devlink_reinit_down - unload given PF -+ * @pf: pointer to the PF struct -+ */ -+static void ice_devlink_reinit_down(struct ice_pf *pf) -+{ -+ /* No need to take devl_lock, it's already taken by devlink API */ -+ ice_unload(pf); -+ rtnl_lock(); -+ ice_vsi_decfg(ice_get_main_vsi(pf)); -+ rtnl_unlock(); -+ ice_deinit_dev(pf); -+} -+ - /** - * ice_devlink_reload_down - prepare for reload - * @devlink: pointer to the devlink instance to reload -@@ -477,7 +491,7 @@ ice_devlink_reload_down(struct devlink *devlink, bool netns_change, - "Remove all VFs before doing reinit\n"); - return -EOPNOTSUPP; - } -- ice_unload(pf); -+ ice_devlink_reinit_down(pf); - return 0; - case DEVLINK_RELOAD_ACTION_FW_ACTIVATE: - return ice_devlink_reload_empr_start(pf, extack); -@@ -1240,6 +1254,45 @@ static int ice_devlink_set_parent(struct devlink_rate *devlink_rate, - return status; - } - -+/** -+ * ice_devlink_reinit_up - do reinit of the given PF -+ * @pf: pointer to the PF struct -+ */ -+static int ice_devlink_reinit_up(struct ice_pf *pf) -+{ -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ struct ice_vsi_cfg_params params; -+ int err; -+ -+ err = ice_init_dev(pf); -+ if (err) -+ return err; -+ -+ params = ice_vsi_to_params(vsi); -+ params.flags = ICE_VSI_FLAG_INIT; -+ -+ rtnl_lock(); -+ err = ice_vsi_cfg(vsi, ¶ms); -+ rtnl_unlock(); -+ if (err) -+ goto err_vsi_cfg; -+ -+ /* No need to take devl_lock, it's already taken by devlink API */ -+ err = ice_load(pf); -+ if (err) -+ goto err_load; -+ -+ return 0; -+ -+err_load: -+ rtnl_lock(); -+ ice_vsi_decfg(vsi); -+ rtnl_unlock(); -+err_vsi_cfg: -+ ice_deinit_dev(pf); -+ return err; -+} -+ - /** - * ice_devlink_reload_up - do reload up after reinit - * @devlink: pointer to the devlink instance reloading -@@ -1260,7 +1313,7 @@ ice_devlink_reload_up(struct devlink *devlink, - switch (action) { - case DEVLINK_RELOAD_ACTION_DRIVER_REINIT: - *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT); -- return ice_load(pf); -+ return ice_devlink_reinit_up(pf); - case DEVLINK_RELOAD_ACTION_FW_ACTIVATE: - *actions_performed = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE); - return ice_devlink_reload_empr_finish(pf, extack); -@@ -1540,6 +1593,7 @@ static const struct devlink_port_ops ice_devlink_port_ops = { - * @pf: the PF to create a devlink port for - * - * Create and register a devlink_port for this PF. -+ * This function has to be called under devl_lock. - * - * Return: zero on success or an error code on failure. - */ -@@ -1552,6 +1606,8 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) - struct device *dev; - int err; - -+ devlink = priv_to_devlink(pf); -+ - dev = ice_pf_to_dev(pf); - - devlink_port = &pf->devlink_port; -@@ -1572,10 +1628,9 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) - ice_devlink_set_switch_id(pf, &attrs.switch_id); - - devlink_port_attrs_set(devlink_port, &attrs); -- devlink = priv_to_devlink(pf); - -- err = devlink_port_register_with_ops(devlink, devlink_port, vsi->idx, -- &ice_devlink_port_ops); -+ err = devl_port_register_with_ops(devlink, devlink_port, vsi->idx, -+ &ice_devlink_port_ops); - if (err) { - dev_err(dev, "Failed to create devlink port for PF %d, error %d\n", - pf->hw.pf_id, err); -@@ -1590,10 +1645,11 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) - * @pf: the PF to cleanup - * - * Unregisters the devlink_port structure associated with this PF. -+ * This function has to be called under devl_lock. - */ - void ice_devlink_destroy_pf_port(struct ice_pf *pf) - { -- devlink_port_unregister(&pf->devlink_port); -+ devl_port_unregister(&pf->devlink_port); - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index a04dcc89c35d..d3340114297a 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -4588,90 +4588,6 @@ static void ice_decfg_netdev(struct ice_vsi *vsi) - vsi->netdev = NULL; - } - --static int ice_start_eth(struct ice_vsi *vsi) --{ -- int err; -- -- err = ice_init_mac_fltr(vsi->back); -- if (err) -- return err; -- -- err = ice_vsi_open(vsi); -- if (err) -- ice_fltr_remove_all(vsi); -- -- return err; --} -- --static void ice_stop_eth(struct ice_vsi *vsi) --{ -- ice_fltr_remove_all(vsi); -- ice_vsi_close(vsi); --} -- --static int ice_init_eth(struct ice_pf *pf) --{ -- struct ice_vsi *vsi = ice_get_main_vsi(pf); -- int err; -- -- if (!vsi) -- return -EINVAL; -- -- /* init channel list */ -- INIT_LIST_HEAD(&vsi->ch_list); -- -- err = ice_cfg_netdev(vsi); -- if (err) -- return err; -- /* Setup DCB netlink interface */ -- ice_dcbnl_setup(vsi); -- -- err = ice_init_mac_fltr(pf); -- if (err) -- goto err_init_mac_fltr; -- -- err = ice_devlink_create_pf_port(pf); -- if (err) -- goto err_devlink_create_pf_port; -- -- SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port); -- -- err = ice_register_netdev(vsi); -- if (err) -- goto err_register_netdev; -- -- err = ice_tc_indir_block_register(vsi); -- if (err) -- goto err_tc_indir_block_register; -- -- ice_napi_add(vsi); -- -- return 0; -- --err_tc_indir_block_register: -- ice_unregister_netdev(vsi); --err_register_netdev: -- ice_devlink_destroy_pf_port(pf); --err_devlink_create_pf_port: --err_init_mac_fltr: -- ice_decfg_netdev(vsi); -- return err; --} -- --static void ice_deinit_eth(struct ice_pf *pf) --{ -- struct ice_vsi *vsi = ice_get_main_vsi(pf); -- -- if (!vsi) -- return; -- -- ice_vsi_close(vsi); -- ice_unregister_netdev(vsi); -- ice_devlink_destroy_pf_port(pf); -- ice_tc_indir_block_unregister(vsi); -- ice_decfg_netdev(vsi); --} -- - /** - * ice_wait_for_fw - wait for full FW readiness - * @hw: pointer to the hardware structure -@@ -4697,7 +4613,7 @@ static int ice_wait_for_fw(struct ice_hw *hw, u32 timeout) - return -ETIMEDOUT; - } - --static int ice_init_dev(struct ice_pf *pf) -+int ice_init_dev(struct ice_pf *pf) - { - struct device *dev = ice_pf_to_dev(pf); - struct ice_hw *hw = &pf->hw; -@@ -4790,7 +4706,7 @@ static int ice_init_dev(struct ice_pf *pf) - return err; - } - --static void ice_deinit_dev(struct ice_pf *pf) -+void ice_deinit_dev(struct ice_pf *pf) - { - ice_free_irq_msix_misc(pf); - ice_deinit_pf(pf); -@@ -5091,31 +5007,47 @@ static void ice_deinit(struct ice_pf *pf) - /** - * ice_load - load pf by init hw and starting VSI - * @pf: pointer to the pf instance -+ * -+ * This function has to be called under devl_lock. - */ - int ice_load(struct ice_pf *pf) - { -- struct ice_vsi_cfg_params params = {}; - struct ice_vsi *vsi; - int err; - -- err = ice_init_dev(pf); -+ devl_assert_locked(priv_to_devlink(pf)); -+ -+ vsi = ice_get_main_vsi(pf); -+ -+ /* init channel list */ -+ INIT_LIST_HEAD(&vsi->ch_list); -+ -+ err = ice_cfg_netdev(vsi); - if (err) - return err; - -- vsi = ice_get_main_vsi(pf); -+ /* Setup DCB netlink interface */ -+ ice_dcbnl_setup(vsi); - -- params = ice_vsi_to_params(vsi); -- params.flags = ICE_VSI_FLAG_INIT; -+ err = ice_init_mac_fltr(pf); -+ if (err) -+ goto err_init_mac_fltr; - -- rtnl_lock(); -- err = ice_vsi_cfg(vsi, ¶ms); -+ err = ice_devlink_create_pf_port(pf); - if (err) -- goto err_vsi_cfg; -+ goto err_devlink_create_pf_port; - -- err = ice_start_eth(ice_get_main_vsi(pf)); -+ SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port); -+ -+ err = ice_register_netdev(vsi); -+ if (err) -+ goto err_register_netdev; -+ -+ err = ice_tc_indir_block_register(vsi); - if (err) -- goto err_start_eth; -- rtnl_unlock(); -+ goto err_tc_indir_block_register; -+ -+ ice_napi_add(vsi); - - err = ice_init_rdma(pf); - if (err) -@@ -5129,29 +5061,35 @@ int ice_load(struct ice_pf *pf) - return 0; - - err_init_rdma: -- ice_vsi_close(ice_get_main_vsi(pf)); -- rtnl_lock(); --err_start_eth: -- ice_vsi_decfg(ice_get_main_vsi(pf)); --err_vsi_cfg: -- rtnl_unlock(); -- ice_deinit_dev(pf); -+ ice_tc_indir_block_unregister(vsi); -+err_tc_indir_block_register: -+ ice_unregister_netdev(vsi); -+err_register_netdev: -+ ice_devlink_destroy_pf_port(pf); -+err_devlink_create_pf_port: -+err_init_mac_fltr: -+ ice_decfg_netdev(vsi); - return err; - } - - /** - * ice_unload - unload pf by stopping VSI and deinit hw - * @pf: pointer to the pf instance -+ * -+ * This function has to be called under devl_lock. - */ - void ice_unload(struct ice_pf *pf) - { -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ -+ devl_assert_locked(priv_to_devlink(pf)); -+ - ice_deinit_features(pf); - ice_deinit_rdma(pf); -- rtnl_lock(); -- ice_stop_eth(ice_get_main_vsi(pf)); -- ice_vsi_decfg(ice_get_main_vsi(pf)); -- rtnl_unlock(); -- ice_deinit_dev(pf); -+ ice_tc_indir_block_unregister(vsi); -+ ice_unregister_netdev(vsi); -+ ice_devlink_destroy_pf_port(pf); -+ ice_decfg_netdev(vsi); - } - - /** -@@ -5249,27 +5187,23 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - if (err) - goto err_init; - -- err = ice_init_eth(pf); -+ devl_lock(priv_to_devlink(pf)); -+ err = ice_load(pf); -+ devl_unlock(priv_to_devlink(pf)); - if (err) -- goto err_init_eth; -- -- err = ice_init_rdma(pf); -- if (err) -- goto err_init_rdma; -+ goto err_load; - - err = ice_init_devlink(pf); - if (err) - goto err_init_devlink; - -- ice_init_features(pf); -- - return 0; - - err_init_devlink: -- ice_deinit_rdma(pf); --err_init_rdma: -- ice_deinit_eth(pf); --err_init_eth: -+ devl_lock(priv_to_devlink(pf)); -+ ice_unload(pf); -+ devl_unlock(priv_to_devlink(pf)); -+err_load: - ice_deinit(pf); - err_init: - pci_disable_device(pdev); -@@ -5363,12 +5297,14 @@ static void ice_remove(struct pci_dev *pdev) - - if (!ice_is_safe_mode(pf)) - ice_remove_arfs(pf); -- ice_deinit_features(pf); -+ - ice_deinit_devlink(pf); -- ice_deinit_rdma(pf); -- ice_deinit_eth(pf); -- ice_deinit(pf); - -+ devl_lock(priv_to_devlink(pf)); -+ ice_unload(pf); -+ devl_unlock(priv_to_devlink(pf)); -+ -+ ice_deinit(pf); - ice_vsi_release_all(pf); - - ice_setup_mc_magic_wake(pf); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0024-ice-remove-FW-logging-code.patch b/kernel-std/debian/patches/ice-VDF/0024-ice-remove-FW-logging-code.patch deleted file mode 100644 index 23bb1f17..00000000 --- a/kernel-std/debian/patches/ice-VDF/0024-ice-remove-FW-logging-code.patch +++ /dev/null @@ -1,434 +0,0 @@ -From e110839c4d9bfa4c885877a69573f48c008d3edd Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:11 -0800 -Subject: [PATCH 24/36] ice: remove FW logging code - -The FW logging code doesn't work because there is no way to set -cq_ena or uart_ena so remove the code. This code is the original -(v1) way of FW logging so it should be replaced with the v2 way. - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 1953fc720e603721764f31daae216a2851664167) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 78 ------- - drivers/net/ethernet/intel/ice/ice_common.c | 217 ------------------ - drivers/net/ethernet/intel/ice/ice_common.h | 1 - - drivers/net/ethernet/intel/ice/ice_main.c | 3 - - drivers/net/ethernet/intel/ice/ice_type.h | 20 -- - 5 files changed, 319 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 9bacb69ead8c..3b289e6a225b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2032,78 +2032,6 @@ struct ice_aqc_add_rdma_qset_data { - struct ice_aqc_add_tx_rdma_qset_entry rdma_qsets[]; - }; - --/* Configure Firmware Logging Command (indirect 0xFF09) -- * Logging Information Read Response (indirect 0xFF10) -- * Note: The 0xFF10 command has no input parameters. -- */ --struct ice_aqc_fw_logging { -- u8 log_ctrl; --#define ICE_AQC_FW_LOG_AQ_EN BIT(0) --#define ICE_AQC_FW_LOG_UART_EN BIT(1) -- u8 rsvd0; -- u8 log_ctrl_valid; /* Not used by 0xFF10 Response */ --#define ICE_AQC_FW_LOG_AQ_VALID BIT(0) --#define ICE_AQC_FW_LOG_UART_VALID BIT(1) -- u8 rsvd1[5]; -- __le32 addr_high; -- __le32 addr_low; --}; -- --enum ice_aqc_fw_logging_mod { -- ICE_AQC_FW_LOG_ID_GENERAL = 0, -- ICE_AQC_FW_LOG_ID_CTRL, -- ICE_AQC_FW_LOG_ID_LINK, -- ICE_AQC_FW_LOG_ID_LINK_TOPO, -- ICE_AQC_FW_LOG_ID_DNL, -- ICE_AQC_FW_LOG_ID_I2C, -- ICE_AQC_FW_LOG_ID_SDP, -- ICE_AQC_FW_LOG_ID_MDIO, -- ICE_AQC_FW_LOG_ID_ADMINQ, -- ICE_AQC_FW_LOG_ID_HDMA, -- ICE_AQC_FW_LOG_ID_LLDP, -- ICE_AQC_FW_LOG_ID_DCBX, -- ICE_AQC_FW_LOG_ID_DCB, -- ICE_AQC_FW_LOG_ID_NETPROXY, -- ICE_AQC_FW_LOG_ID_NVM, -- ICE_AQC_FW_LOG_ID_AUTH, -- ICE_AQC_FW_LOG_ID_VPD, -- ICE_AQC_FW_LOG_ID_IOSF, -- ICE_AQC_FW_LOG_ID_PARSER, -- ICE_AQC_FW_LOG_ID_SW, -- ICE_AQC_FW_LOG_ID_SCHEDULER, -- ICE_AQC_FW_LOG_ID_TXQ, -- ICE_AQC_FW_LOG_ID_RSVD, -- ICE_AQC_FW_LOG_ID_POST, -- ICE_AQC_FW_LOG_ID_WATCHDOG, -- ICE_AQC_FW_LOG_ID_TASK_DISPATCH, -- ICE_AQC_FW_LOG_ID_MNG, -- ICE_AQC_FW_LOG_ID_MAX, --}; -- --/* Defines for both above FW logging command/response buffers */ --#define ICE_AQC_FW_LOG_ID_S 0 --#define ICE_AQC_FW_LOG_ID_M (0xFFF << ICE_AQC_FW_LOG_ID_S) -- --#define ICE_AQC_FW_LOG_CONF_SUCCESS 0 /* Used by response */ --#define ICE_AQC_FW_LOG_CONF_BAD_INDX BIT(12) /* Used by response */ -- --#define ICE_AQC_FW_LOG_EN_S 12 --#define ICE_AQC_FW_LOG_EN_M (0xF << ICE_AQC_FW_LOG_EN_S) --#define ICE_AQC_FW_LOG_INFO_EN BIT(12) /* Used by command */ --#define ICE_AQC_FW_LOG_INIT_EN BIT(13) /* Used by command */ --#define ICE_AQC_FW_LOG_FLOW_EN BIT(14) /* Used by command */ --#define ICE_AQC_FW_LOG_ERR_EN BIT(15) /* Used by command */ -- --/* Get/Clear FW Log (indirect 0xFF11) */ --struct ice_aqc_get_clear_fw_log { -- u8 flags; --#define ICE_AQC_FW_LOG_CLEAR BIT(0) --#define ICE_AQC_FW_LOG_MORE_DATA_AVAIL BIT(1) -- u8 rsvd1[7]; -- __le32 addr_high; -- __le32 addr_low; --}; -- - /* Download Package (indirect 0x0C40) */ - /* Also used for Update Package (indirect 0x0C41 and 0x0C42) */ - struct ice_aqc_download_pkg { -@@ -2448,8 +2376,6 @@ struct ice_aq_desc { - struct ice_aqc_add_rdma_qset add_rdma_qset; - struct ice_aqc_add_get_update_free_vsi vsi_cmd; - struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res; -- struct ice_aqc_fw_logging fw_logging; -- struct ice_aqc_get_clear_fw_log get_clear_fw_log; - struct ice_aqc_download_pkg download_pkg; - struct ice_aqc_set_cgu_input_config set_cgu_input_config; - struct ice_aqc_get_cgu_input_config get_cgu_input_config; -@@ -2657,10 +2583,6 @@ enum ice_adminq_opc { - - /* Standalone Commands/Events */ - ice_aqc_opc_event_lan_overflow = 0x1001, -- -- /* debug commands */ -- ice_aqc_opc_fw_logging = 0xFF09, -- ice_aqc_opc_fw_logging_info = 0xFF10, - }; - - #endif /* _ICE_ADMINQ_CMD_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index acf6ac00f804..a5c4b7ad6a20 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -897,216 +897,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) - devm_kfree(ice_hw_to_dev(hw), sw); - } - --/** -- * ice_get_fw_log_cfg - get FW logging configuration -- * @hw: pointer to the HW struct -- */ --static int ice_get_fw_log_cfg(struct ice_hw *hw) --{ -- struct ice_aq_desc desc; -- __le16 *config; -- int status; -- u16 size; -- -- size = sizeof(*config) * ICE_AQC_FW_LOG_ID_MAX; -- config = kzalloc(size, GFP_KERNEL); -- if (!config) -- return -ENOMEM; -- -- ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging_info); -- -- status = ice_aq_send_cmd(hw, &desc, config, size, NULL); -- if (!status) { -- u16 i; -- -- /* Save FW logging information into the HW structure */ -- for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { -- u16 v, m, flgs; -- -- v = le16_to_cpu(config[i]); -- m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; -- flgs = (v & ICE_AQC_FW_LOG_EN_M) >> ICE_AQC_FW_LOG_EN_S; -- -- if (m < ICE_AQC_FW_LOG_ID_MAX) -- hw->fw_log.evnts[m].cur = flgs; -- } -- } -- -- kfree(config); -- -- return status; --} -- --/** -- * ice_cfg_fw_log - configure FW logging -- * @hw: pointer to the HW struct -- * @enable: enable certain FW logging events if true, disable all if false -- * -- * This function enables/disables the FW logging via Rx CQ events and a UART -- * port based on predetermined configurations. FW logging via the Rx CQ can be -- * enabled/disabled for individual PF's. However, FW logging via the UART can -- * only be enabled/disabled for all PFs on the same device. -- * -- * To enable overall FW logging, the "cq_en" and "uart_en" enable bits in -- * hw->fw_log need to be set accordingly, e.g. based on user-provided input, -- * before initializing the device. -- * -- * When re/configuring FW logging, callers need to update the "cfg" elements of -- * the hw->fw_log.evnts array with the desired logging event configurations for -- * modules of interest. When disabling FW logging completely, the callers can -- * just pass false in the "enable" parameter. On completion, the function will -- * update the "cur" element of the hw->fw_log.evnts array with the resulting -- * logging event configurations of the modules that are being re/configured. FW -- * logging modules that are not part of a reconfiguration operation retain their -- * previous states. -- * -- * Before resetting the device, it is recommended that the driver disables FW -- * logging before shutting down the control queue. When disabling FW logging -- * ("enable" = false), the latest configurations of FW logging events stored in -- * hw->fw_log.evnts[] are not overridden to allow them to be reconfigured after -- * a device reset. -- * -- * When enabling FW logging to emit log messages via the Rx CQ during the -- * device's initialization phase, a mechanism alternative to interrupt handlers -- * needs to be used to extract FW log messages from the Rx CQ periodically and -- * to prevent the Rx CQ from being full and stalling other types of control -- * messages from FW to SW. Interrupts are typically disabled during the device's -- * initialization phase. -- */ --static int ice_cfg_fw_log(struct ice_hw *hw, bool enable) --{ -- struct ice_aqc_fw_logging *cmd; -- u16 i, chgs = 0, len = 0; -- struct ice_aq_desc desc; -- __le16 *data = NULL; -- u8 actv_evnts = 0; -- void *buf = NULL; -- int status = 0; -- -- if (!hw->fw_log.cq_en && !hw->fw_log.uart_en) -- return 0; -- -- /* Disable FW logging only when the control queue is still responsive */ -- if (!enable && -- (!hw->fw_log.actv_evnts || !ice_check_sq_alive(hw, &hw->adminq))) -- return 0; -- -- /* Get current FW log settings */ -- status = ice_get_fw_log_cfg(hw); -- if (status) -- return status; -- -- ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logging); -- cmd = &desc.params.fw_logging; -- -- /* Indicate which controls are valid */ -- if (hw->fw_log.cq_en) -- cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_AQ_VALID; -- -- if (hw->fw_log.uart_en) -- cmd->log_ctrl_valid |= ICE_AQC_FW_LOG_UART_VALID; -- -- if (enable) { -- /* Fill in an array of entries with FW logging modules and -- * logging events being reconfigured. -- */ -- for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { -- u16 val; -- -- /* Keep track of enabled event types */ -- actv_evnts |= hw->fw_log.evnts[i].cfg; -- -- if (hw->fw_log.evnts[i].cfg == hw->fw_log.evnts[i].cur) -- continue; -- -- if (!data) { -- data = devm_kcalloc(ice_hw_to_dev(hw), -- ICE_AQC_FW_LOG_ID_MAX, -- sizeof(*data), -- GFP_KERNEL); -- if (!data) -- return -ENOMEM; -- } -- -- val = i << ICE_AQC_FW_LOG_ID_S; -- val |= hw->fw_log.evnts[i].cfg << ICE_AQC_FW_LOG_EN_S; -- data[chgs++] = cpu_to_le16(val); -- } -- -- /* Only enable FW logging if at least one module is specified. -- * If FW logging is currently enabled but all modules are not -- * enabled to emit log messages, disable FW logging altogether. -- */ -- if (actv_evnts) { -- /* Leave if there is effectively no change */ -- if (!chgs) -- goto out; -- -- if (hw->fw_log.cq_en) -- cmd->log_ctrl |= ICE_AQC_FW_LOG_AQ_EN; -- -- if (hw->fw_log.uart_en) -- cmd->log_ctrl |= ICE_AQC_FW_LOG_UART_EN; -- -- buf = data; -- len = sizeof(*data) * chgs; -- desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); -- } -- } -- -- status = ice_aq_send_cmd(hw, &desc, buf, len, NULL); -- if (!status) { -- /* Update the current configuration to reflect events enabled. -- * hw->fw_log.cq_en and hw->fw_log.uart_en indicate if the FW -- * logging mode is enabled for the device. They do not reflect -- * actual modules being enabled to emit log messages. So, their -- * values remain unchanged even when all modules are disabled. -- */ -- u16 cnt = enable ? chgs : (u16)ICE_AQC_FW_LOG_ID_MAX; -- -- hw->fw_log.actv_evnts = actv_evnts; -- for (i = 0; i < cnt; i++) { -- u16 v, m; -- -- if (!enable) { -- /* When disabling all FW logging events as part -- * of device's de-initialization, the original -- * configurations are retained, and can be used -- * to reconfigure FW logging later if the device -- * is re-initialized. -- */ -- hw->fw_log.evnts[i].cur = 0; -- continue; -- } -- -- v = le16_to_cpu(data[i]); -- m = (v & ICE_AQC_FW_LOG_ID_M) >> ICE_AQC_FW_LOG_ID_S; -- hw->fw_log.evnts[m].cur = hw->fw_log.evnts[m].cfg; -- } -- } -- --out: -- devm_kfree(ice_hw_to_dev(hw), data); -- -- return status; --} -- --/** -- * ice_output_fw_log -- * @hw: pointer to the HW struct -- * @desc: pointer to the AQ message descriptor -- * @buf: pointer to the buffer accompanying the AQ message -- * -- * Formats a FW Log message and outputs it via the standard driver logs. -- */ --void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf) --{ -- ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg Start ]\n"); -- ice_debug_array(hw, ICE_DBG_FW_LOG, 16, 1, (u8 *)buf, -- le16_to_cpu(desc->datalen)); -- ice_debug(hw, ICE_DBG_FW_LOG, "[ FW Log Msg End ]\n"); --} -- - /** - * ice_get_itr_intrl_gran - * @hw: pointer to the HW struct -@@ -1164,11 +954,6 @@ int ice_init_hw(struct ice_hw *hw) - if (status) - goto err_unroll_cqinit; - -- /* Enable FW logging. Not fatal if this fails. */ -- status = ice_cfg_fw_log(hw, true); -- if (status) -- ice_debug(hw, ICE_DBG_INIT, "Failed to enable FW logging.\n"); -- - status = ice_clear_pf_cfg(hw); - if (status) - goto err_unroll_cqinit; -@@ -1318,8 +1103,6 @@ void ice_deinit_hw(struct ice_hw *hw) - ice_free_hw_tbls(hw); - mutex_destroy(&hw->tnl_lock); - -- /* Attempt to disable FW logging before shutting down control queues */ -- ice_cfg_fw_log(hw, false); - ice_destroy_all_ctrlq(hw); - - /* Clear VSI contexts if not already cleared */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 7a966a0c224f..d47e5400351f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -199,7 +199,6 @@ ice_aq_cfg_lan_txq(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *buf, - struct ice_sq_cd *cd); - int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle); - void ice_replay_post(struct ice_hw *hw); --void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf); - struct ice_q_ctx * - ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); - int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in); -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index d3340114297a..e5cc9790969c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -1535,9 +1535,6 @@ static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type) - - ice_vc_process_vf_msg(pf, &event, &data); - break; -- case ice_aqc_opc_fw_logging: -- ice_output_fw_log(hw, &event.desc, event.msg_buf); -- break; - case ice_aqc_opc_lldp_set_mib_change: - ice_dcb_process_lldp_set_mib_change(pf, &event); - break; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index b0f1f4db1d8b..6e1fed0d7384 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -731,24 +731,6 @@ struct ice_switch_info { - DECLARE_BITMAP(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS); - }; - --/* FW logging configuration */ --struct ice_fw_log_evnt { -- u8 cfg : 4; /* New event enables to configure */ -- u8 cur : 4; /* Current/active event enables */ --}; -- --struct ice_fw_log_cfg { -- u8 cq_en : 1; /* FW logging is enabled via the control queue */ -- u8 uart_en : 1; /* FW logging is enabled via UART for all PFs */ -- u8 actv_evnts; /* Cumulation of currently enabled log events */ -- --#define ICE_FW_LOG_EVNT_INFO (ICE_AQC_FW_LOG_INFO_EN >> ICE_AQC_FW_LOG_EN_S) --#define ICE_FW_LOG_EVNT_INIT (ICE_AQC_FW_LOG_INIT_EN >> ICE_AQC_FW_LOG_EN_S) --#define ICE_FW_LOG_EVNT_FLOW (ICE_AQC_FW_LOG_FLOW_EN >> ICE_AQC_FW_LOG_EN_S) --#define ICE_FW_LOG_EVNT_ERR (ICE_AQC_FW_LOG_ERR_EN >> ICE_AQC_FW_LOG_EN_S) -- struct ice_fw_log_evnt evnts[ICE_AQC_FW_LOG_ID_MAX]; --}; -- - /* Enum defining the different states of the mailbox snapshot in the - * PF-VF mailbox overflow detection algorithm. The snapshot can be in - * states: -@@ -890,8 +872,6 @@ struct ice_hw { - u8 fw_patch; /* firmware patch version */ - u32 fw_build; /* firmware build number */ - -- struct ice_fw_log_cfg fw_log; -- - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the ITR/INTRL granularity during - * initialization. --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0025-ice-configure-FW-logging.patch b/kernel-std/debian/patches/ice-VDF/0025-ice-configure-FW-logging.patch deleted file mode 100644 index 203cc8e8..00000000 --- a/kernel-std/debian/patches/ice-VDF/0025-ice-configure-FW-logging.patch +++ /dev/null @@ -1,1083 +0,0 @@ -From 752f352c0d7da9c6c07e4c8364082e201d20fdc2 Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:12 -0800 -Subject: [PATCH 25/36] ice: configure FW logging - -Users want the ability to debug FW issues by retrieving the -FW logs from the E8xx devices. Use debugfs to allow the user to -configure the log level and number of messages for FW logging. - -If FW logging is supported on the E8xx then the file 'fwlog' will be -created under the PCI device ID for the ice driver. If the file does not -exist then either the E8xx doesn't support FW logging or debugfs is not -enabled on the system. - -One thing users want to do is control which events are reported. The -user can read and write the 'fwlog/modules/' to get/set -the log levels. Each module in the FW that supports logging ht as a file -under 'fwlog/modules' that supports reading (to see what the current log -level is) and writing (to change the log level). - -The format to set the log levels for a module are: - - # echo > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/ - -The supported log levels are: - - * none - * error - * warning - * normal - * verbose - -Each level includes the messages from the previous/lower level - -The modules that are supported are: - - * general - * ctrl - * link - * link_topo - * dnl - * i2c - * sdp - * mdio - * adminq - * hdma - * lldp - * dcbx - * dcb - * xlr - * nvm - * auth - * vpd - * iosf - * parser - * sw - * scheduler - * txq - * rsvd - * post - * watchdog - * task_dispatch - * mng - * synce - * health - * tsdrv - * pfreg - * mdlver - * all - -The module 'all' is a special module which allows the user to read or -write to all of the modules. - -The following example command would set the DCB module to the 'normal' -log level: - - # echo normal > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/dcb - -If the user wants to set the DCB, Link, and the AdminQ modules to -'verbose' then the commands are: - - # echo verbose > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/dcb - # echo verbose > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/link - # echo verbose > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/adminq - -If the user wants to set all modules to the 'warning' level then the -command is: - - # echo warning > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/all - -If the user wants to disable logging for a module then they can set the -level to 'none'. An example setting the 'watchdog' module is: - - # echo none > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/watchdog - -If the user wants to see what the log level is for a specific module -then the command is: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/dcb - -This will return the log level for the DCB module. If the user wants to -see the log level for all the modules then the command is: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/modules/all - -Writing to the module file will update the configuration, but NOT enable the -configuration (that is a separate command). - -In addition to configuring the modules, the user can also configure the -number of log messages (nr_messages) to include in a single Admin Receive -Queue (ARQ) event.The range is 1-128 (1 means push every log message, 128 -means push only when the max AQ command buffer is full). The suggested -value is 10. - -To see/change the resolution the user can read/write the -'fwlog/nr_messages' file. An example changing the value to 50 is - - # echo 50 > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/nr_messages - -To see the current value of 'nr_messages' then the command is: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/nr_messages - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 96a9a9341cdaea0c3bce4c134e04a2a42ae899ac) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/Makefile | 4 +- - drivers/net/ethernet/intel/ice/ice.h | 9 + - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 80 ++++ - drivers/net/ethernet/intel/ice/ice_common.c | 6 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 359 ++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 261 +++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.h | 56 +++ - drivers/net/ethernet/intel/ice/ice_main.c | 18 + - drivers/net/ethernet/intel/ice/ice_type.h | 4 + - 9 files changed, 796 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/intel/ice/ice_debugfs.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_fwlog.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_fwlog.h - -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 0679907980f7..8757bec23fb3 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -34,7 +34,9 @@ ice-y := ice_main.o \ - ice_lag.o \ - ice_ethtool.o \ - ice_repr.o \ -- ice_tc_lib.o -+ ice_tc_lib.o \ -+ ice_fwlog.o \ -+ ice_debugfs.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index d3f72f9fbcd7..7966ac61154c 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -559,6 +559,10 @@ struct ice_pf { - struct ice_vsi_stats **vsi_stats; - struct ice_sw *first_sw; /* first switch created by firmware */ - u16 eswitch_mode; /* current mode of eswitch */ -+ struct dentry *ice_debugfs_pf; -+ struct dentry *ice_debugfs_pf_fwlog; -+ /* keep track of all the dentrys for FW log modules */ -+ struct dentry **ice_debugfs_pf_fwlog_modules; - struct ice_vfs vfs; - DECLARE_BITMAP(features, ICE_F_MAX); - DECLARE_BITMAP(state, ICE_STATE_NBITS); -@@ -890,6 +894,11 @@ static inline bool ice_is_adq_active(struct ice_pf *pf) - return false; - } - -+void ice_debugfs_fwlog_init(struct ice_pf *pf); -+void ice_debugfs_init(void); -+void ice_debugfs_exit(void); -+void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); -+ - bool netif_is_ice(const struct net_device *dev); - int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); - int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 3b289e6a225b..347e4fed5e0d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2299,6 +2299,81 @@ struct ice_aqc_event_lan_overflow { - u8 reserved[8]; - }; - -+enum ice_aqc_fw_logging_mod { -+ ICE_AQC_FW_LOG_ID_GENERAL = 0, -+ ICE_AQC_FW_LOG_ID_CTRL, -+ ICE_AQC_FW_LOG_ID_LINK, -+ ICE_AQC_FW_LOG_ID_LINK_TOPO, -+ ICE_AQC_FW_LOG_ID_DNL, -+ ICE_AQC_FW_LOG_ID_I2C, -+ ICE_AQC_FW_LOG_ID_SDP, -+ ICE_AQC_FW_LOG_ID_MDIO, -+ ICE_AQC_FW_LOG_ID_ADMINQ, -+ ICE_AQC_FW_LOG_ID_HDMA, -+ ICE_AQC_FW_LOG_ID_LLDP, -+ ICE_AQC_FW_LOG_ID_DCBX, -+ ICE_AQC_FW_LOG_ID_DCB, -+ ICE_AQC_FW_LOG_ID_XLR, -+ ICE_AQC_FW_LOG_ID_NVM, -+ ICE_AQC_FW_LOG_ID_AUTH, -+ ICE_AQC_FW_LOG_ID_VPD, -+ ICE_AQC_FW_LOG_ID_IOSF, -+ ICE_AQC_FW_LOG_ID_PARSER, -+ ICE_AQC_FW_LOG_ID_SW, -+ ICE_AQC_FW_LOG_ID_SCHEDULER, -+ ICE_AQC_FW_LOG_ID_TXQ, -+ ICE_AQC_FW_LOG_ID_RSVD, -+ ICE_AQC_FW_LOG_ID_POST, -+ ICE_AQC_FW_LOG_ID_WATCHDOG, -+ ICE_AQC_FW_LOG_ID_TASK_DISPATCH, -+ ICE_AQC_FW_LOG_ID_MNG, -+ ICE_AQC_FW_LOG_ID_SYNCE, -+ ICE_AQC_FW_LOG_ID_HEALTH, -+ ICE_AQC_FW_LOG_ID_TSDRV, -+ ICE_AQC_FW_LOG_ID_PFREG, -+ ICE_AQC_FW_LOG_ID_MDLVER, -+ ICE_AQC_FW_LOG_ID_MAX, -+}; -+ -+/* Set FW Logging configuration (indirect 0xFF30) -+ * Query FW Logging (indirect 0xFF32) -+ */ -+struct ice_aqc_fw_log { -+ u8 cmd_flags; -+#define ICE_AQC_FW_LOG_CONF_UART_EN BIT(0) -+#define ICE_AQC_FW_LOG_CONF_AQ_EN BIT(1) -+#define ICE_AQC_FW_LOG_QUERY_REGISTERED BIT(2) -+#define ICE_AQC_FW_LOG_CONF_SET_VALID BIT(3) -+#define ICE_AQC_FW_LOG_AQ_QUERY BIT(2) -+ -+ u8 rsp_flag; -+ __le16 fw_rt_msb; -+ union { -+ struct { -+ __le32 fw_rt_lsb; -+ } sync; -+ struct { -+ __le16 log_resolution; -+#define ICE_AQC_FW_LOG_MIN_RESOLUTION (1) -+#define ICE_AQC_FW_LOG_MAX_RESOLUTION (128) -+ -+ __le16 mdl_cnt; -+ } cfg; -+ } ops; -+ __le32 addr_high; -+ __le32 addr_low; -+}; -+ -+/* Response Buffer for: -+ * Set Firmware Logging Configuration (0xFF30) -+ * Query FW Logging (0xFF32) -+ */ -+struct ice_aqc_fw_log_cfg_resp { -+ __le16 module_identifier; -+ u8 log_level; -+ u8 rsvd0; -+}; -+ - /** - * struct ice_aq_desc - Admin Queue (AQ) descriptor - * @flags: ICE_AQ_FLAG_* flags -@@ -2387,6 +2462,7 @@ struct ice_aq_desc { - struct ice_aqc_get_cgu_ref_prio get_cgu_ref_prio; - struct ice_aqc_get_cgu_info get_cgu_info; - struct ice_aqc_driver_shared_params drv_shared_params; -+ struct ice_aqc_fw_log fw_log; - struct ice_aqc_set_mac_lb set_mac_lb; - struct ice_aqc_alloc_free_res_cmd sw_res_ctrl; - struct ice_aqc_set_mac_cfg set_mac_cfg; -@@ -2583,6 +2659,10 @@ enum ice_adminq_opc { - - /* Standalone Commands/Events */ - ice_aqc_opc_event_lan_overflow = 0x1001, -+ -+ /* FW Logging Commands */ -+ ice_aqc_opc_fw_logs_config = 0xFF30, -+ ice_aqc_opc_fw_logs_query = 0xFF32, - }; - - #endif /* _ICE_ADMINQ_CMD_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index a5c4b7ad6a20..6dcba0577633 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -954,6 +954,11 @@ int ice_init_hw(struct ice_hw *hw) - if (status) - goto err_unroll_cqinit; - -+ status = ice_fwlog_init(hw); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "Error initializing FW logging: %d\n", -+ status); -+ - status = ice_clear_pf_cfg(hw); - if (status) - goto err_unroll_cqinit; -@@ -1103,6 +1108,7 @@ void ice_deinit_hw(struct ice_hw *hw) - ice_free_hw_tbls(hw); - mutex_destroy(&hw->tnl_lock); - -+ ice_fwlog_deinit(hw); - ice_destroy_all_ctrlq(hw); - - /* Clear VSI contexts if not already cleared */ -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -new file mode 100644 -index 000000000000..3b0d9b214fd1 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -0,0 +1,359 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (c) 2022, Intel Corporation. */ -+ -+#include -+#include -+#include -+#include -+#include "ice.h" -+ -+static struct dentry *ice_debugfs_root; -+ -+/* create a define that has an extra module that doesn't really exist. this -+ * is so we can add a module 'all' to easily enable/disable all the modules -+ */ -+#define ICE_NR_FW_LOG_MODULES (ICE_AQC_FW_LOG_ID_MAX + 1) -+ -+/* the ordering in this array is important. it matches the ordering of the -+ * values in the FW so the index is the same value as in ice_aqc_fw_logging_mod -+ */ -+static const char * const ice_fwlog_module_string[] = { -+ "general", -+ "ctrl", -+ "link", -+ "link_topo", -+ "dnl", -+ "i2c", -+ "sdp", -+ "mdio", -+ "adminq", -+ "hdma", -+ "lldp", -+ "dcbx", -+ "dcb", -+ "xlr", -+ "nvm", -+ "auth", -+ "vpd", -+ "iosf", -+ "parser", -+ "sw", -+ "scheduler", -+ "txq", -+ "rsvd", -+ "post", -+ "watchdog", -+ "task_dispatch", -+ "mng", -+ "synce", -+ "health", -+ "tsdrv", -+ "pfreg", -+ "mdlver", -+ "all", -+}; -+ -+/* the ordering in this array is important. it matches the ordering of the -+ * values in the FW so the index is the same value as in ice_fwlog_level -+ */ -+static const char * const ice_fwlog_level_string[] = { -+ "none", -+ "error", -+ "warning", -+ "normal", -+ "verbose", -+}; -+ -+/** -+ * ice_fwlog_print_module_cfg - print current FW logging module configuration -+ * @hw: pointer to the HW structure -+ * @module: module to print -+ * @s: the seq file to put data into -+ */ -+static void -+ice_fwlog_print_module_cfg(struct ice_hw *hw, int module, struct seq_file *s) -+{ -+ struct ice_fwlog_cfg *cfg = &hw->fwlog_cfg; -+ struct ice_fwlog_module_entry *entry; -+ -+ if (module != ICE_AQC_FW_LOG_ID_MAX) { -+ entry = &cfg->module_entries[module]; -+ -+ seq_printf(s, "\tModule: %s, Log Level: %s\n", -+ ice_fwlog_module_string[entry->module_id], -+ ice_fwlog_level_string[entry->log_level]); -+ } else { -+ int i; -+ -+ for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) { -+ entry = &cfg->module_entries[i]; -+ -+ seq_printf(s, "\tModule: %s, Log Level: %s\n", -+ ice_fwlog_module_string[entry->module_id], -+ ice_fwlog_level_string[entry->log_level]); -+ } -+ } -+} -+ -+static int ice_find_module_by_dentry(struct ice_pf *pf, struct dentry *d) -+{ -+ int i, module; -+ -+ module = -1; -+ /* find the module based on the dentry */ -+ for (i = 0; i < ICE_NR_FW_LOG_MODULES; i++) { -+ if (d == pf->ice_debugfs_pf_fwlog_modules[i]) { -+ module = i; -+ break; -+ } -+ } -+ -+ return module; -+} -+ -+/** -+ * ice_debugfs_module_show - read from 'module' file -+ * @s: the opened file -+ * @v: pointer to the offset -+ */ -+static int ice_debugfs_module_show(struct seq_file *s, void *v) -+{ -+ const struct file *filp = s->file; -+ struct dentry *dentry; -+ struct ice_pf *pf; -+ int module; -+ -+ dentry = file_dentry(filp); -+ pf = s->private; -+ -+ module = ice_find_module_by_dentry(pf, dentry); -+ if (module < 0) { -+ dev_info(ice_pf_to_dev(pf), "unknown module\n"); -+ return -EINVAL; -+ } -+ -+ ice_fwlog_print_module_cfg(&pf->hw, module, s); -+ -+ return 0; -+} -+ -+static int ice_debugfs_module_open(struct inode *inode, struct file *filp) -+{ -+ return single_open(filp, ice_debugfs_module_show, inode->i_private); -+} -+ -+/** -+ * ice_debugfs_module_write - write into 'module' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_module_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = file_inode(filp)->i_private; -+ struct dentry *dentry = file_dentry(filp); -+ struct device *dev = ice_pf_to_dev(pf); -+ char user_val[16], *cmd_buf; -+ int module, log_level, cnt; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 8) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ module = ice_find_module_by_dentry(pf, dentry); -+ if (module < 0) { -+ dev_info(dev, "unknown module\n"); -+ return -EINVAL; -+ } -+ -+ cnt = sscanf(cmd_buf, "%s", user_val); -+ if (cnt != 1) -+ return -EINVAL; -+ -+ log_level = sysfs_match_string(ice_fwlog_level_string, user_val); -+ if (log_level < 0) { -+ dev_info(dev, "unknown log level '%s'\n", user_val); -+ return -EINVAL; -+ } -+ -+ if (module != ICE_AQC_FW_LOG_ID_MAX) { -+ ice_pf_fwlog_update_module(pf, log_level, module); -+ } else { -+ /* the module 'all' is a shortcut so that we can set -+ * all of the modules to the same level quickly -+ */ -+ int i; -+ -+ for (i = 0; i < ICE_AQC_FW_LOG_ID_MAX; i++) -+ ice_pf_fwlog_update_module(pf, log_level, i); -+ } -+ -+ return count; -+} -+ -+static const struct file_operations ice_debugfs_module_fops = { -+ .owner = THIS_MODULE, -+ .open = ice_debugfs_module_open, -+ .read = seq_read, -+ .release = single_release, -+ .write = ice_debugfs_module_write, -+}; -+ -+/** -+ * ice_debugfs_nr_messages_read - read from 'nr_messages' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_nr_messages_read(struct file *filp, -+ char __user *buffer, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char buff[32] = {}; -+ -+ snprintf(buff, sizeof(buff), "%d\n", -+ hw->fwlog_cfg.log_resolution); -+ -+ return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff)); -+} -+ -+/** -+ * ice_debugfs_nr_messages_write - write into 'nr_messages' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_nr_messages_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ char user_val[8], *cmd_buf; -+ s16 nr_messages; -+ ssize_t ret; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 4) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ ret = sscanf(cmd_buf, "%s", user_val); -+ if (ret != 1) -+ return -EINVAL; -+ -+ ret = kstrtos16(user_val, 0, &nr_messages); -+ if (ret) -+ return ret; -+ -+ if (nr_messages < ICE_AQC_FW_LOG_MIN_RESOLUTION || -+ nr_messages > ICE_AQC_FW_LOG_MAX_RESOLUTION) { -+ dev_err(dev, "Invalid FW log number of messages %d, value must be between %d - %d\n", -+ nr_messages, ICE_AQC_FW_LOG_MIN_RESOLUTION, -+ ICE_AQC_FW_LOG_MAX_RESOLUTION); -+ return -EINVAL; -+ } -+ -+ hw->fwlog_cfg.log_resolution = nr_messages; -+ -+ return count; -+} -+ -+static const struct file_operations ice_debugfs_nr_messages_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_nr_messages_read, -+ .write = ice_debugfs_nr_messages_write, -+}; -+ -+/** -+ * ice_debugfs_fwlog_init - setup the debugfs directory -+ * @pf: the ice that is starting up -+ */ -+void ice_debugfs_fwlog_init(struct ice_pf *pf) -+{ -+ const char *name = pci_name(pf->pdev); -+ struct dentry *fw_modules_dir; -+ struct dentry **fw_modules; -+ int i; -+ -+ /* only support fw log commands on PF 0 */ -+ if (pf->hw.bus.func) -+ return; -+ -+ /* allocate space for this first because if it fails then we don't -+ * need to unwind -+ */ -+ fw_modules = kcalloc(ICE_NR_FW_LOG_MODULES, sizeof(*fw_modules), -+ GFP_KERNEL); -+ if (!fw_modules) -+ return; -+ -+ pf->ice_debugfs_pf = debugfs_create_dir(name, ice_debugfs_root); -+ if (IS_ERR(pf->ice_debugfs_pf)) -+ goto err_create_module_files; -+ -+ pf->ice_debugfs_pf_fwlog = debugfs_create_dir("fwlog", -+ pf->ice_debugfs_pf); -+ if (IS_ERR(pf->ice_debugfs_pf)) -+ goto err_create_module_files; -+ -+ fw_modules_dir = debugfs_create_dir("modules", -+ pf->ice_debugfs_pf_fwlog); -+ if (IS_ERR(fw_modules_dir)) -+ goto err_create_module_files; -+ -+ for (i = 0; i < ICE_NR_FW_LOG_MODULES; i++) { -+ fw_modules[i] = debugfs_create_file(ice_fwlog_module_string[i], -+ 0600, fw_modules_dir, pf, -+ &ice_debugfs_module_fops); -+ if (IS_ERR(fw_modules[i])) -+ goto err_create_module_files; -+ } -+ -+ debugfs_create_file("nr_messages", 0600, -+ pf->ice_debugfs_pf_fwlog, pf, -+ &ice_debugfs_nr_messages_fops); -+ -+ pf->ice_debugfs_pf_fwlog_modules = fw_modules; -+ -+ return; -+ -+err_create_module_files: -+ debugfs_remove_recursive(pf->ice_debugfs_pf_fwlog); -+ kfree(fw_modules); -+} -+ -+/** -+ * ice_debugfs_init - create root directory for debugfs entries -+ */ -+void ice_debugfs_init(void) -+{ -+ ice_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); -+ if (IS_ERR(ice_debugfs_root)) -+ pr_info("init of debugfs failed\n"); -+} -+ -+/** -+ * ice_debugfs_exit - remove debugfs entries -+ */ -+void ice_debugfs_exit(void) -+{ -+ debugfs_remove_recursive(ice_debugfs_root); -+ ice_debugfs_root = NULL; -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -new file mode 100644 -index 000000000000..307e0d04f3fe ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -0,0 +1,261 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (c) 2022, Intel Corporation. */ -+ -+#include "ice.h" -+#include "ice_common.h" -+#include "ice_fwlog.h" -+ -+/** -+ * ice_fwlog_init - Initialize FW logging configuration -+ * @hw: pointer to the HW structure -+ * -+ * This function should be called on driver initialization during -+ * ice_init_hw(). -+ */ -+int ice_fwlog_init(struct ice_hw *hw) -+{ -+ /* only support fw log commands on PF 0 */ -+ if (hw->bus.func) -+ return -EINVAL; -+ -+ ice_fwlog_set_supported(hw); -+ -+ if (ice_fwlog_supported(hw)) { -+ int status; -+ -+ /* read the current config from the FW and store it */ -+ status = ice_fwlog_get(hw, &hw->fwlog_cfg); -+ if (status) -+ return status; -+ -+ ice_debugfs_fwlog_init(hw->back); -+ } else { -+ dev_warn(ice_hw_to_dev(hw), "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n"); -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_fwlog_deinit - unroll FW logging configuration -+ * @hw: pointer to the HW structure -+ * -+ * This function should be called in ice_deinit_hw(). -+ */ -+void ice_fwlog_deinit(struct ice_hw *hw) -+{ -+ struct ice_pf *pf = hw->back; -+ int status; -+ -+ /* only support fw log commands on PF 0 */ -+ if (hw->bus.func) -+ return; -+ -+ /* make sure FW logging is disabled to not put the FW in a weird state -+ * for the next driver load -+ */ -+ hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_ARQ_ENA; -+ status = ice_fwlog_set(hw, &hw->fwlog_cfg); -+ if (status) -+ dev_warn(ice_hw_to_dev(hw), "Unable to turn off FW logging, status: %d\n", -+ status); -+ -+ kfree(pf->ice_debugfs_pf_fwlog_modules); -+ -+ pf->ice_debugfs_pf_fwlog_modules = NULL; -+} -+ -+/** -+ * ice_fwlog_supported - Cached for whether FW supports FW logging or not -+ * @hw: pointer to the HW structure -+ * -+ * This will always return false if called before ice_init_hw(), so it must be -+ * called after ice_init_hw(). -+ */ -+bool ice_fwlog_supported(struct ice_hw *hw) -+{ -+ return hw->fwlog_supported; -+} -+ -+/** -+ * ice_aq_fwlog_set - Set FW logging configuration AQ command (0xFF30) -+ * @hw: pointer to the HW structure -+ * @entries: entries to configure -+ * @num_entries: number of @entries -+ * @options: options from ice_fwlog_cfg->options structure -+ * @log_resolution: logging resolution -+ */ -+static int -+ice_aq_fwlog_set(struct ice_hw *hw, struct ice_fwlog_module_entry *entries, -+ u16 num_entries, u16 options, u16 log_resolution) -+{ -+ struct ice_aqc_fw_log_cfg_resp *fw_modules; -+ struct ice_aqc_fw_log *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ int i; -+ -+ fw_modules = kcalloc(num_entries, sizeof(*fw_modules), GFP_KERNEL); -+ if (!fw_modules) -+ return -ENOMEM; -+ -+ for (i = 0; i < num_entries; i++) { -+ fw_modules[i].module_identifier = -+ cpu_to_le16(entries[i].module_id); -+ fw_modules[i].log_level = entries[i].log_level; -+ } -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logs_config); -+ desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD); -+ -+ cmd = &desc.params.fw_log; -+ -+ cmd->cmd_flags = ICE_AQC_FW_LOG_CONF_SET_VALID; -+ cmd->ops.cfg.log_resolution = cpu_to_le16(log_resolution); -+ cmd->ops.cfg.mdl_cnt = cpu_to_le16(num_entries); -+ -+ if (options & ICE_FWLOG_OPTION_ARQ_ENA) -+ cmd->cmd_flags |= ICE_AQC_FW_LOG_CONF_AQ_EN; -+ if (options & ICE_FWLOG_OPTION_UART_ENA) -+ cmd->cmd_flags |= ICE_AQC_FW_LOG_CONF_UART_EN; -+ -+ status = ice_aq_send_cmd(hw, &desc, fw_modules, -+ sizeof(*fw_modules) * num_entries, -+ NULL); -+ -+ kfree(fw_modules); -+ -+ return status; -+} -+ -+/** -+ * ice_fwlog_set - Set the firmware logging settings -+ * @hw: pointer to the HW structure -+ * @cfg: config used to set firmware logging -+ * -+ * This function should be called whenever the driver needs to set the firmware -+ * logging configuration. It can be called on initialization, reset, or during -+ * runtime. -+ * -+ * If the PF wishes to receive FW logging then it must register via -+ * ice_fwlog_register. Note, that ice_fwlog_register does not need to be called -+ * for init. -+ */ -+int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) -+{ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ return ice_aq_fwlog_set(hw, cfg->module_entries, -+ ICE_AQC_FW_LOG_ID_MAX, cfg->options, -+ cfg->log_resolution); -+} -+ -+/** -+ * ice_aq_fwlog_get - Get the current firmware logging configuration (0xFF32) -+ * @hw: pointer to the HW structure -+ * @cfg: firmware logging configuration to populate -+ */ -+static int ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) -+{ -+ struct ice_aqc_fw_log_cfg_resp *fw_modules; -+ struct ice_aqc_fw_log *cmd; -+ struct ice_aq_desc desc; -+ u16 module_id_cnt; -+ int status; -+ void *buf; -+ int i; -+ -+ memset(cfg, 0, sizeof(*cfg)); -+ -+ buf = kzalloc(ICE_AQ_MAX_BUF_LEN, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logs_query); -+ cmd = &desc.params.fw_log; -+ -+ cmd->cmd_flags = ICE_AQC_FW_LOG_AQ_QUERY; -+ -+ status = ice_aq_send_cmd(hw, &desc, buf, ICE_AQ_MAX_BUF_LEN, NULL); -+ if (status) { -+ ice_debug(hw, ICE_DBG_FW_LOG, "Failed to get FW log configuration\n"); -+ goto status_out; -+ } -+ -+ module_id_cnt = le16_to_cpu(cmd->ops.cfg.mdl_cnt); -+ if (module_id_cnt < ICE_AQC_FW_LOG_ID_MAX) { -+ ice_debug(hw, ICE_DBG_FW_LOG, "FW returned less than the expected number of FW log module IDs\n"); -+ } else if (module_id_cnt > ICE_AQC_FW_LOG_ID_MAX) { -+ ice_debug(hw, ICE_DBG_FW_LOG, "FW returned more than expected number of FW log module IDs, setting module_id_cnt to software expected max %u\n", -+ ICE_AQC_FW_LOG_ID_MAX); -+ module_id_cnt = ICE_AQC_FW_LOG_ID_MAX; -+ } -+ -+ cfg->log_resolution = le16_to_cpu(cmd->ops.cfg.log_resolution); -+ if (cmd->cmd_flags & ICE_AQC_FW_LOG_CONF_AQ_EN) -+ cfg->options |= ICE_FWLOG_OPTION_ARQ_ENA; -+ if (cmd->cmd_flags & ICE_AQC_FW_LOG_CONF_UART_EN) -+ cfg->options |= ICE_FWLOG_OPTION_UART_ENA; -+ -+ fw_modules = (struct ice_aqc_fw_log_cfg_resp *)buf; -+ -+ for (i = 0; i < module_id_cnt; i++) { -+ struct ice_aqc_fw_log_cfg_resp *fw_module = &fw_modules[i]; -+ -+ cfg->module_entries[i].module_id = -+ le16_to_cpu(fw_module->module_identifier); -+ cfg->module_entries[i].log_level = fw_module->log_level; -+ } -+ -+status_out: -+ kfree(buf); -+ return status; -+} -+ -+/** -+ * ice_fwlog_get - Get the firmware logging settings -+ * @hw: pointer to the HW structure -+ * @cfg: config to populate based on current firmware logging settings -+ */ -+int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) -+{ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ return ice_aq_fwlog_get(hw, cfg); -+} -+ -+/** -+ * ice_fwlog_set_supported - Set if FW logging is supported by FW -+ * @hw: pointer to the HW struct -+ * -+ * If FW returns success to the ice_aq_fwlog_get call then it supports FW -+ * logging, else it doesn't. Set the fwlog_supported flag accordingly. -+ * -+ * This function is only meant to be called during driver init to determine if -+ * the FW support FW logging. -+ */ -+void ice_fwlog_set_supported(struct ice_hw *hw) -+{ -+ struct ice_fwlog_cfg *cfg; -+ int status; -+ -+ hw->fwlog_supported = false; -+ -+ cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); -+ if (!cfg) -+ return; -+ -+ /* don't call ice_fwlog_get() because that would check to see if FW -+ * logging is supported which is what the driver is determining now -+ */ -+ status = ice_aq_fwlog_get(hw, cfg); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "ice_aq_fwlog_get failed, FW logging is not supported on this version of FW, status %d\n", -+ status); -+ else -+ hw->fwlog_supported = true; -+ -+ kfree(cfg); -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h -new file mode 100644 -index 000000000000..8e68ee02713b ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.h -@@ -0,0 +1,56 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* Copyright (C) 2022, Intel Corporation. */ -+ -+#ifndef _ICE_FWLOG_H_ -+#define _ICE_FWLOG_H_ -+#include "ice_adminq_cmd.h" -+ -+struct ice_hw; -+ -+/* Only a single log level should be set and all log levels under the set value -+ * are enabled, e.g. if log level is set to ICE_FW_LOG_LEVEL_VERBOSE, then all -+ * other log levels are included (except ICE_FW_LOG_LEVEL_NONE) -+ */ -+enum ice_fwlog_level { -+ ICE_FWLOG_LEVEL_NONE = 0, -+ ICE_FWLOG_LEVEL_ERROR = 1, -+ ICE_FWLOG_LEVEL_WARNING = 2, -+ ICE_FWLOG_LEVEL_NORMAL = 3, -+ ICE_FWLOG_LEVEL_VERBOSE = 4, -+ ICE_FWLOG_LEVEL_INVALID, /* all values >= this entry are invalid */ -+}; -+ -+struct ice_fwlog_module_entry { -+ /* module ID for the corresponding firmware logging event */ -+ u16 module_id; -+ /* verbosity level for the module_id */ -+ u8 log_level; -+}; -+ -+struct ice_fwlog_cfg { -+ /* list of modules for configuring log level */ -+ struct ice_fwlog_module_entry module_entries[ICE_AQC_FW_LOG_ID_MAX]; -+ /* options used to configure firmware logging */ -+ u16 options; -+#define ICE_FWLOG_OPTION_ARQ_ENA BIT(0) -+#define ICE_FWLOG_OPTION_UART_ENA BIT(1) -+ /* set before calling ice_fwlog_init() so the PF registers for firmware -+ * logging on initialization -+ */ -+#define ICE_FWLOG_OPTION_REGISTER_ON_INIT BIT(2) -+ /* set in the ice_fwlog_get() response if the PF is registered for FW -+ * logging events over ARQ -+ */ -+#define ICE_FWLOG_OPTION_IS_REGISTERED BIT(3) -+ -+ /* minimum number of log events sent per Admin Receive Queue event */ -+ u16 log_resolution; -+}; -+ -+void ice_fwlog_set_supported(struct ice_hw *hw); -+bool ice_fwlog_supported(struct ice_hw *hw); -+int ice_fwlog_init(struct ice_hw *hw); -+void ice_fwlog_deinit(struct ice_hw *hw); -+int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); -+int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); -+#endif /* _ICE_FWLOG_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index e5cc9790969c..614e10ab4159 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -4506,6 +4506,19 @@ static void ice_print_wake_reason(struct ice_pf *pf) - dev_info(ice_pf_to_dev(pf), "Wake reason: %s", wake_str); - } - -+/** -+ * ice_pf_fwlog_update_module - update 1 module -+ * @pf: pointer to the PF struct -+ * @log_level: log_level to use for the @module -+ * @module: module to update -+ */ -+void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module) -+{ -+ struct ice_hw *hw = &pf->hw; -+ -+ hw->fwlog_cfg.module_entries[module].log_level = log_level; -+} -+ - /** - * ice_register_netdev - register netdev - * @vsi: pointer to the VSI struct -@@ -5283,6 +5296,8 @@ static void ice_remove(struct pci_dev *pdev) - msleep(100); - } - -+ ice_debugfs_exit(); -+ - if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) { - set_bit(ICE_VF_RESETS_DISABLED, pf->state); - ice_free_vfs(pf); -@@ -5751,6 +5766,8 @@ static int __init ice_module_init(void) - goto err_dest_wq; - } - -+ ice_debugfs_init(); -+ - status = pci_register_driver(&ice_driver); - if (status) { - pr_err("failed to register PCI driver, err %d\n", status); -@@ -5761,6 +5778,7 @@ static int __init ice_module_init(void) - - err_dest_lag_wq: - destroy_workqueue(ice_lag_wq); -+ ice_debugfs_exit(); - err_dest_wq: - destroy_workqueue(ice_wq); - return status; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 6e1fed0d7384..84bb61aa7409 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -17,6 +17,7 @@ - #include "ice_protocol_type.h" - #include "ice_sbq_cmd.h" - #include "ice_vlan_mode.h" -+#include "ice_fwlog.h" - - static inline bool ice_is_tc_ena(unsigned long bitmap, u8 tc) - { -@@ -872,6 +873,9 @@ struct ice_hw { - u8 fw_patch; /* firmware patch version */ - u32 fw_build; /* firmware build number */ - -+ struct ice_fwlog_cfg fwlog_cfg; -+ bool fwlog_supported; /* does hardware support FW logging? */ -+ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the ITR/INTRL granularity during - * initialization. --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0026-ice-enable-FW-logging.patch b/kernel-std/debian/patches/ice-VDF/0026-ice-enable-FW-logging.patch deleted file mode 100644 index f61122fb..00000000 --- a/kernel-std/debian/patches/ice-VDF/0026-ice-enable-FW-logging.patch +++ /dev/null @@ -1,281 +0,0 @@ -From 189d58473481cf01b493fca4e9dd2ab8380d0ce5 Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:13 -0800 -Subject: [PATCH 26/36] ice: enable FW logging - -Once users have configured the FW logging then allow them to enable it -by writing to the 'fwlog/enable' file. The file accepts a boolean value -(0 or 1) where 1 means enable FW logging and 0 means disable FW logging. - - # echo > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/enable - -Where is 0 or 1. - -The user can read the 'fwlog/enable' file to see whether logging is -enabled or not. Reading the actual data is a separate patch. To see the -current value then: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/enable - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 73671c3162c83a689342fd57f00b5f261682e49b) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 3 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 98 +++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 67 +++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.h | 2 + - 4 files changed, 170 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 347e4fed5e0d..11391be4efc2 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2336,6 +2336,7 @@ enum ice_aqc_fw_logging_mod { - }; - - /* Set FW Logging configuration (indirect 0xFF30) -+ * Register for FW Logging (indirect 0xFF31) - * Query FW Logging (indirect 0xFF32) - */ - struct ice_aqc_fw_log { -@@ -2344,6 +2345,7 @@ struct ice_aqc_fw_log { - #define ICE_AQC_FW_LOG_CONF_AQ_EN BIT(1) - #define ICE_AQC_FW_LOG_QUERY_REGISTERED BIT(2) - #define ICE_AQC_FW_LOG_CONF_SET_VALID BIT(3) -+#define ICE_AQC_FW_LOG_AQ_REGISTER BIT(0) - #define ICE_AQC_FW_LOG_AQ_QUERY BIT(2) - - u8 rsp_flag; -@@ -2662,6 +2664,7 @@ enum ice_adminq_opc { - - /* FW Logging Commands */ - ice_aqc_opc_fw_logs_config = 0xFF30, -+ ice_aqc_opc_fw_logs_register = 0xFF31, - ice_aqc_opc_fw_logs_query = 0xFF32, - }; - -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -index 3b0d9b214fd1..3dde99969132 100644 ---- a/drivers/net/ethernet/intel/ice/ice_debugfs.c -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -281,6 +281,101 @@ static const struct file_operations ice_debugfs_nr_messages_fops = { - .write = ice_debugfs_nr_messages_write, - }; - -+/** -+ * ice_debugfs_enable_read - read from 'enable' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_enable_read(struct file *filp, -+ char __user *buffer, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char buff[32] = {}; -+ -+ snprintf(buff, sizeof(buff), "%u\n", -+ (u16)(hw->fwlog_cfg.options & -+ ICE_FWLOG_OPTION_IS_REGISTERED) >> 3); -+ -+ return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff)); -+} -+ -+/** -+ * ice_debugfs_enable_write - write into 'enable' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_enable_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char user_val[8], *cmd_buf; -+ bool enable; -+ ssize_t ret; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 2) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ ret = sscanf(cmd_buf, "%s", user_val); -+ if (ret != 1) -+ return -EINVAL; -+ -+ ret = kstrtobool(user_val, &enable); -+ if (ret) -+ goto enable_write_error; -+ -+ if (enable) -+ hw->fwlog_cfg.options |= ICE_FWLOG_OPTION_ARQ_ENA; -+ else -+ hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_ARQ_ENA; -+ -+ ret = ice_fwlog_set(hw, &hw->fwlog_cfg); -+ if (ret) -+ goto enable_write_error; -+ -+ if (enable) -+ ret = ice_fwlog_register(hw); -+ else -+ ret = ice_fwlog_unregister(hw); -+ -+ if (ret) -+ goto enable_write_error; -+ -+ /* if we get here, nothing went wrong; return count since we didn't -+ * really write anything -+ */ -+ ret = (ssize_t)count; -+ -+enable_write_error: -+ /* This function always consumes all of the written input, or produces -+ * an error. Check and enforce this. Otherwise, the write operation -+ * won't complete properly. -+ */ -+ if (WARN_ON(ret != (ssize_t)count && ret >= 0)) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static const struct file_operations ice_debugfs_enable_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_enable_read, -+ .write = ice_debugfs_enable_write, -+}; -+ - /** - * ice_debugfs_fwlog_init - setup the debugfs directory - * @pf: the ice that is starting up -@@ -332,6 +427,9 @@ void ice_debugfs_fwlog_init(struct ice_pf *pf) - - pf->ice_debugfs_pf_fwlog_modules = fw_modules; - -+ debugfs_create_file("enable", 0600, pf->ice_debugfs_pf_fwlog, -+ pf, &ice_debugfs_enable_fops); -+ - return; - - err_create_module_files: -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -index 307e0d04f3fe..25a17cbc1d34 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.c -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -63,6 +63,11 @@ void ice_fwlog_deinit(struct ice_hw *hw) - kfree(pf->ice_debugfs_pf_fwlog_modules); - - pf->ice_debugfs_pf_fwlog_modules = NULL; -+ -+ status = ice_fwlog_unregister(hw); -+ if (status) -+ dev_warn(ice_hw_to_dev(hw), "Unable to unregister FW logging, status: %d\n", -+ status); - } - - /** -@@ -197,6 +202,8 @@ static int ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) - cfg->options |= ICE_FWLOG_OPTION_ARQ_ENA; - if (cmd->cmd_flags & ICE_AQC_FW_LOG_CONF_UART_EN) - cfg->options |= ICE_FWLOG_OPTION_UART_ENA; -+ if (cmd->cmd_flags & ICE_AQC_FW_LOG_QUERY_REGISTERED) -+ cfg->options |= ICE_FWLOG_OPTION_IS_REGISTERED; - - fw_modules = (struct ice_aqc_fw_log_cfg_resp *)buf; - -@@ -226,6 +233,66 @@ int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg) - return ice_aq_fwlog_get(hw, cfg); - } - -+/** -+ * ice_aq_fwlog_register - Register PF for firmware logging events (0xFF31) -+ * @hw: pointer to the HW structure -+ * @reg: true to register and false to unregister -+ */ -+static int ice_aq_fwlog_register(struct ice_hw *hw, bool reg) -+{ -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_fw_logs_register); -+ -+ if (reg) -+ desc.params.fw_log.cmd_flags = ICE_AQC_FW_LOG_AQ_REGISTER; -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_fwlog_register - Register the PF for firmware logging -+ * @hw: pointer to the HW structure -+ * -+ * After this call the PF will start to receive firmware logging based on the -+ * configuration set in ice_fwlog_set. -+ */ -+int ice_fwlog_register(struct ice_hw *hw) -+{ -+ int status; -+ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ status = ice_aq_fwlog_register(hw, true); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "Failed to register for firmware logging events over ARQ\n"); -+ else -+ hw->fwlog_cfg.options |= ICE_FWLOG_OPTION_IS_REGISTERED; -+ -+ return status; -+} -+ -+/** -+ * ice_fwlog_unregister - Unregister the PF from firmware logging -+ * @hw: pointer to the HW structure -+ */ -+int ice_fwlog_unregister(struct ice_hw *hw) -+{ -+ int status; -+ -+ if (!ice_fwlog_supported(hw)) -+ return -EOPNOTSUPP; -+ -+ status = ice_aq_fwlog_register(hw, false); -+ if (status) -+ ice_debug(hw, ICE_DBG_FW_LOG, "Failed to unregister from firmware logging events over ARQ\n"); -+ else -+ hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_IS_REGISTERED; -+ -+ return status; -+} -+ - /** - * ice_fwlog_set_supported - Set if FW logging is supported by FW - * @hw: pointer to the HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h -index 8e68ee02713b..45865558425d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.h -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.h -@@ -53,4 +53,6 @@ int ice_fwlog_init(struct ice_hw *hw); - void ice_fwlog_deinit(struct ice_hw *hw); - int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); - int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); -+int ice_fwlog_register(struct ice_hw *hw); -+int ice_fwlog_unregister(struct ice_hw *hw); - #endif /* _ICE_FWLOG_H_ */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch b/kernel-std/debian/patches/ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch deleted file mode 100644 index 0bca4413..00000000 --- a/kernel-std/debian/patches/ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch +++ /dev/null @@ -1,572 +0,0 @@ -From a584ea88cfdc8ac3f782be1d5d67fa92c3423290 Mon Sep 17 00:00:00 2001 -From: Paul M Stillwell Jr -Date: Tue, 12 Dec 2023 21:07:14 -0800 -Subject: [PATCH 27/36] ice: add ability to read and configure FW log data - -Once logging is enabled the user should read the data from the 'data' -file. The data is in the form of a binary blob that can be sent to Intel -for decoding. To read the data use a command like: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/data > log_data.bin - -If the user wants to clear the FW log data that has been stored in the -driver then they can write any value to the 'data' file and that will clear -the data. An example is: - - # echo 34 > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/data - -In addition to being able to read the data the user can configure how -much memory is used to store FW log data. This allows the user to -increase/decrease the amount of memory based on the users situation. -The data is stored such that if the memory fills up then the oldest data -will get overwritten in a circular manner. To change the amount of -memory the user can write to the 'log_size' file like this: - - # echo > /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/log_size - -Where is one of 128K, 256K, 512K, 1M, and 2M. The default value -is 1M. - -The user can see the current value of 'log_size' by reading the file: - - # cat /sys/kernel/debug/ice/0000\:18\:00.0/fwlog/log_size - -Signed-off-by: Paul M Stillwell Jr -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 9d3535e71985beb738c4ad2b772c6f0efdce0202) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 2 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 210 ++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 142 ++++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.h | 21 ++ - drivers/net/ethernet/intel/ice/ice_main.c | 29 +++ - drivers/net/ethernet/intel/ice/ice_type.h | 1 + - 6 files changed, 405 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 11391be4efc2..f63b57ff2a3d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -2338,6 +2338,7 @@ enum ice_aqc_fw_logging_mod { - /* Set FW Logging configuration (indirect 0xFF30) - * Register for FW Logging (indirect 0xFF31) - * Query FW Logging (indirect 0xFF32) -+ * FW Log Event (indirect 0xFF33) - */ - struct ice_aqc_fw_log { - u8 cmd_flags; -@@ -2666,6 +2667,7 @@ enum ice_adminq_opc { - ice_aqc_opc_fw_logs_config = 0xFF30, - ice_aqc_opc_fw_logs_register = 0xFF31, - ice_aqc_opc_fw_logs_query = 0xFF32, -+ ice_aqc_opc_fw_logs_event = 0xFF33, - }; - - #endif /* _ICE_ADMINQ_CMD_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -index 3dde99969132..c2bfba6b9ead 100644 ---- a/drivers/net/ethernet/intel/ice/ice_debugfs.c -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -64,6 +64,17 @@ static const char * const ice_fwlog_level_string[] = { - "verbose", - }; - -+/* the order in this array is important. it matches the ordering of the -+ * values in the FW so the index is the same value as in ice_fwlog_level -+ */ -+static const char * const ice_fwlog_log_size[] = { -+ "128K", -+ "256K", -+ "512K", -+ "1M", -+ "2M", -+}; -+ - /** - * ice_fwlog_print_module_cfg - print current FW logging module configuration - * @hw: pointer to the HW structure -@@ -376,6 +387,199 @@ static const struct file_operations ice_debugfs_enable_fops = { - .write = ice_debugfs_enable_write, - }; - -+/** -+ * ice_debugfs_log_size_read - read from 'log_size' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_log_size_read(struct file *filp, -+ char __user *buffer, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ char buff[32] = {}; -+ int index; -+ -+ index = hw->fwlog_ring.index; -+ snprintf(buff, sizeof(buff), "%s\n", ice_fwlog_log_size[index]); -+ -+ return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff)); -+} -+ -+/** -+ * ice_debugfs_log_size_write - write into 'log_size' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_log_size_write(struct file *filp, const char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ char user_val[8], *cmd_buf; -+ ssize_t ret; -+ int index; -+ -+ /* don't allow partial writes or invalid input */ -+ if (*ppos != 0 || count > 5) -+ return -EINVAL; -+ -+ cmd_buf = memdup_user(buf, count); -+ if (IS_ERR(cmd_buf)) -+ return PTR_ERR(cmd_buf); -+ -+ ret = sscanf(cmd_buf, "%s", user_val); -+ if (ret != 1) -+ return -EINVAL; -+ -+ index = sysfs_match_string(ice_fwlog_log_size, user_val); -+ if (index < 0) { -+ dev_info(dev, "Invalid log size '%s'. The value must be one of 128K, 256K, 512K, 1M, 2M\n", -+ user_val); -+ ret = -EINVAL; -+ goto log_size_write_error; -+ } else if (hw->fwlog_cfg.options & ICE_FWLOG_OPTION_IS_REGISTERED) { -+ dev_info(dev, "FW logging is currently running. Please disable FW logging to change log_size\n"); -+ ret = -EINVAL; -+ goto log_size_write_error; -+ } -+ -+ /* free all the buffers and the tracking info and resize */ -+ ice_fwlog_realloc_rings(hw, index); -+ -+ /* if we get here, nothing went wrong; return count since we didn't -+ * really write anything -+ */ -+ ret = (ssize_t)count; -+ -+log_size_write_error: -+ /* This function always consumes all of the written input, or produces -+ * an error. Check and enforce this. Otherwise, the write operation -+ * won't complete properly. -+ */ -+ if (WARN_ON(ret != (ssize_t)count && ret >= 0)) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static const struct file_operations ice_debugfs_log_size_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_log_size_read, -+ .write = ice_debugfs_log_size_write, -+}; -+ -+/** -+ * ice_debugfs_data_read - read from 'data' file -+ * @filp: the opened file -+ * @buffer: where to write the data for the user to read -+ * @count: the size of the user's buffer -+ * @ppos: file position offset -+ */ -+static ssize_t ice_debugfs_data_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct ice_hw *hw = &pf->hw; -+ int data_copied = 0; -+ bool done = false; -+ -+ if (ice_fwlog_ring_empty(&hw->fwlog_ring)) -+ return 0; -+ -+ while (!ice_fwlog_ring_empty(&hw->fwlog_ring) && !done) { -+ struct ice_fwlog_data *log; -+ u16 cur_buf_len; -+ -+ log = &hw->fwlog_ring.rings[hw->fwlog_ring.head]; -+ cur_buf_len = log->data_size; -+ if (cur_buf_len >= count) { -+ done = true; -+ continue; -+ } -+ -+ if (copy_to_user(buffer, log->data, cur_buf_len)) { -+ /* if there is an error then bail and return whatever -+ * the driver has copied so far -+ */ -+ done = true; -+ continue; -+ } -+ -+ data_copied += cur_buf_len; -+ buffer += cur_buf_len; -+ count -= cur_buf_len; -+ *ppos += cur_buf_len; -+ ice_fwlog_ring_increment(&hw->fwlog_ring.head, -+ hw->fwlog_ring.size); -+ } -+ -+ return data_copied; -+} -+ -+/** -+ * ice_debugfs_data_write - write into 'data' file -+ * @filp: the opened file -+ * @buf: where to find the user's data -+ * @count: the length of the user's data -+ * @ppos: file position offset -+ */ -+static ssize_t -+ice_debugfs_data_write(struct file *filp, const char __user *buf, size_t count, -+ loff_t *ppos) -+{ -+ struct ice_pf *pf = filp->private_data; -+ struct device *dev = ice_pf_to_dev(pf); -+ struct ice_hw *hw = &pf->hw; -+ ssize_t ret; -+ -+ /* don't allow partial writes */ -+ if (*ppos != 0) -+ return 0; -+ -+ /* any value is allowed to clear the buffer so no need to even look at -+ * what the value is -+ */ -+ if (!(hw->fwlog_cfg.options & ICE_FWLOG_OPTION_IS_REGISTERED)) { -+ hw->fwlog_ring.head = 0; -+ hw->fwlog_ring.tail = 0; -+ } else { -+ dev_info(dev, "Can't clear FW log data while FW log running\n"); -+ ret = -EINVAL; -+ goto nr_buffs_write_error; -+ } -+ -+ /* if we get here, nothing went wrong; return count since we didn't -+ * really write anything -+ */ -+ ret = (ssize_t)count; -+ -+nr_buffs_write_error: -+ /* This function always consumes all of the written input, or produces -+ * an error. Check and enforce this. Otherwise, the write operation -+ * won't complete properly. -+ */ -+ if (WARN_ON(ret != (ssize_t)count && ret >= 0)) -+ ret = -EIO; -+ -+ return ret; -+} -+ -+static const struct file_operations ice_debugfs_data_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = ice_debugfs_data_read, -+ .write = ice_debugfs_data_write, -+}; -+ - /** - * ice_debugfs_fwlog_init - setup the debugfs directory - * @pf: the ice that is starting up -@@ -430,6 +634,12 @@ void ice_debugfs_fwlog_init(struct ice_pf *pf) - debugfs_create_file("enable", 0600, pf->ice_debugfs_pf_fwlog, - pf, &ice_debugfs_enable_fops); - -+ debugfs_create_file("log_size", 0600, pf->ice_debugfs_pf_fwlog, -+ pf, &ice_debugfs_log_size_fops); -+ -+ debugfs_create_file("data", 0600, pf->ice_debugfs_pf_fwlog, -+ pf, &ice_debugfs_data_fops); -+ - return; - - err_create_module_files: -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -index 25a17cbc1d34..92b5dac481cd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.c -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -1,10 +1,128 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright (c) 2022, Intel Corporation. */ - -+#include - #include "ice.h" - #include "ice_common.h" - #include "ice_fwlog.h" - -+bool ice_fwlog_ring_full(struct ice_fwlog_ring *rings) -+{ -+ u16 head, tail; -+ -+ head = rings->head; -+ tail = rings->tail; -+ -+ if (head < tail && (tail - head == (rings->size - 1))) -+ return true; -+ else if (head > tail && (tail == (head - 1))) -+ return true; -+ -+ return false; -+} -+ -+bool ice_fwlog_ring_empty(struct ice_fwlog_ring *rings) -+{ -+ return rings->head == rings->tail; -+} -+ -+void ice_fwlog_ring_increment(u16 *item, u16 size) -+{ -+ *item = (*item + 1) & (size - 1); -+} -+ -+static int ice_fwlog_alloc_ring_buffs(struct ice_fwlog_ring *rings) -+{ -+ int i, nr_bytes; -+ u8 *mem; -+ -+ nr_bytes = rings->size * ICE_AQ_MAX_BUF_LEN; -+ mem = vzalloc(nr_bytes); -+ if (!mem) -+ return -ENOMEM; -+ -+ for (i = 0; i < rings->size; i++) { -+ struct ice_fwlog_data *ring = &rings->rings[i]; -+ -+ ring->data_size = ICE_AQ_MAX_BUF_LEN; -+ ring->data = mem; -+ mem += ICE_AQ_MAX_BUF_LEN; -+ } -+ -+ return 0; -+} -+ -+static void ice_fwlog_free_ring_buffs(struct ice_fwlog_ring *rings) -+{ -+ int i; -+ -+ for (i = 0; i < rings->size; i++) { -+ struct ice_fwlog_data *ring = &rings->rings[i]; -+ -+ /* the first ring is the base memory for the whole range so -+ * free it -+ */ -+ if (!i) -+ vfree(ring->data); -+ -+ ring->data = NULL; -+ ring->data_size = 0; -+ } -+} -+ -+#define ICE_FWLOG_INDEX_TO_BYTES(n) ((128 * 1024) << (n)) -+/** -+ * ice_fwlog_realloc_rings - reallocate the FW log rings -+ * @hw: pointer to the HW structure -+ * @index: the new index to use to allocate memory for the log data -+ * -+ */ -+void ice_fwlog_realloc_rings(struct ice_hw *hw, int index) -+{ -+ struct ice_fwlog_ring ring; -+ int status, ring_size; -+ -+ /* convert the number of bytes into a number of 4K buffers. externally -+ * the driver presents the interface to the FW log data as a number of -+ * bytes because that's easy for users to understand. internally the -+ * driver uses a ring of buffers because the driver doesn't know where -+ * the beginning and end of any line of log data is so the driver has -+ * to overwrite data as complete blocks. when the data is returned to -+ * the user the driver knows that the data is correct and the FW log -+ * can be correctly parsed by the tools -+ */ -+ ring_size = ICE_FWLOG_INDEX_TO_BYTES(index) / ICE_AQ_MAX_BUF_LEN; -+ if (ring_size == hw->fwlog_ring.size) -+ return; -+ -+ /* allocate space for the new rings and buffers then release the -+ * old rings and buffers. that way if we don't have enough -+ * memory then we at least have what we had before -+ */ -+ ring.rings = kcalloc(ring_size, sizeof(*ring.rings), GFP_KERNEL); -+ if (!ring.rings) -+ return; -+ -+ ring.size = ring_size; -+ -+ status = ice_fwlog_alloc_ring_buffs(&ring); -+ if (status) { -+ dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log ring data buffers\n"); -+ ice_fwlog_free_ring_buffs(&ring); -+ kfree(ring.rings); -+ return; -+ } -+ -+ ice_fwlog_free_ring_buffs(&hw->fwlog_ring); -+ kfree(hw->fwlog_ring.rings); -+ -+ hw->fwlog_ring.rings = ring.rings; -+ hw->fwlog_ring.size = ring.size; -+ hw->fwlog_ring.index = index; -+ hw->fwlog_ring.head = 0; -+ hw->fwlog_ring.tail = 0; -+} -+ - /** - * ice_fwlog_init - Initialize FW logging configuration - * @hw: pointer to the HW structure -@@ -28,6 +146,25 @@ int ice_fwlog_init(struct ice_hw *hw) - if (status) - return status; - -+ hw->fwlog_ring.rings = kcalloc(ICE_FWLOG_RING_SIZE_DFLT, -+ sizeof(*hw->fwlog_ring.rings), -+ GFP_KERNEL); -+ if (!hw->fwlog_ring.rings) { -+ dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log rings\n"); -+ return -ENOMEM; -+ } -+ -+ hw->fwlog_ring.size = ICE_FWLOG_RING_SIZE_DFLT; -+ hw->fwlog_ring.index = ICE_FWLOG_RING_SIZE_INDEX_DFLT; -+ -+ status = ice_fwlog_alloc_ring_buffs(&hw->fwlog_ring); -+ if (status) { -+ dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log ring data buffers\n"); -+ ice_fwlog_free_ring_buffs(&hw->fwlog_ring); -+ kfree(hw->fwlog_ring.rings); -+ return status; -+ } -+ - ice_debugfs_fwlog_init(hw->back); - } else { - dev_warn(ice_hw_to_dev(hw), "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n"); -@@ -68,6 +205,11 @@ void ice_fwlog_deinit(struct ice_hw *hw) - if (status) - dev_warn(ice_hw_to_dev(hw), "Unable to unregister FW logging, status: %d\n", - status); -+ -+ if (hw->fwlog_ring.rings) { -+ ice_fwlog_free_ring_buffs(&hw->fwlog_ring); -+ kfree(hw->fwlog_ring.rings); -+ } - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h -index 45865558425d..287e71fa4b86 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.h -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.h -@@ -47,6 +47,26 @@ struct ice_fwlog_cfg { - u16 log_resolution; - }; - -+struct ice_fwlog_data { -+ u16 data_size; -+ u8 *data; -+}; -+ -+struct ice_fwlog_ring { -+ struct ice_fwlog_data *rings; -+ u16 index; -+ u16 size; -+ u16 head; -+ u16 tail; -+}; -+ -+#define ICE_FWLOG_RING_SIZE_INDEX_DFLT 3 -+#define ICE_FWLOG_RING_SIZE_DFLT 256 -+#define ICE_FWLOG_RING_SIZE_MAX 512 -+ -+bool ice_fwlog_ring_full(struct ice_fwlog_ring *rings); -+bool ice_fwlog_ring_empty(struct ice_fwlog_ring *rings); -+void ice_fwlog_ring_increment(u16 *item, u16 size); - void ice_fwlog_set_supported(struct ice_hw *hw); - bool ice_fwlog_supported(struct ice_hw *hw); - int ice_fwlog_init(struct ice_hw *hw); -@@ -55,4 +75,5 @@ int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); - int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg); - int ice_fwlog_register(struct ice_hw *hw); - int ice_fwlog_unregister(struct ice_hw *hw); -+void ice_fwlog_realloc_rings(struct ice_hw *hw, int index); - #endif /* _ICE_FWLOG_H_ */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 614e10ab4159..6c6ca5353f28 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -1254,6 +1254,32 @@ ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event) - return status; - } - -+/** -+ * ice_get_fwlog_data - copy the FW log data from ARQ event -+ * @pf: PF that the FW log event is associated with -+ * @event: event structure containing FW log data -+ */ -+static void -+ice_get_fwlog_data(struct ice_pf *pf, struct ice_rq_event_info *event) -+{ -+ struct ice_fwlog_data *fwlog; -+ struct ice_hw *hw = &pf->hw; -+ -+ fwlog = &hw->fwlog_ring.rings[hw->fwlog_ring.tail]; -+ -+ memset(fwlog->data, 0, PAGE_SIZE); -+ fwlog->data_size = le16_to_cpu(event->desc.datalen); -+ -+ memcpy(fwlog->data, event->msg_buf, fwlog->data_size); -+ ice_fwlog_ring_increment(&hw->fwlog_ring.tail, hw->fwlog_ring.size); -+ -+ if (ice_fwlog_ring_full(&hw->fwlog_ring)) { -+ /* the rings are full so bump the head to create room */ -+ ice_fwlog_ring_increment(&hw->fwlog_ring.head, -+ hw->fwlog_ring.size); -+ } -+} -+ - /** - * ice_aq_prep_for_event - Prepare to wait for an AdminQ event from firmware - * @pf: pointer to the PF private structure -@@ -1535,6 +1561,9 @@ static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type) - - ice_vc_process_vf_msg(pf, &event, &data); - break; -+ case ice_aqc_opc_fw_logs_event: -+ ice_get_fwlog_data(pf, &event); -+ break; - case ice_aqc_opc_lldp_set_mib_change: - ice_dcb_process_lldp_set_mib_change(pf, &event); - break; -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 84bb61aa7409..28e47bb78eaf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -875,6 +875,7 @@ struct ice_hw { - - struct ice_fwlog_cfg fwlog_cfg; - bool fwlog_supported; /* does hardware support FW logging? */ -+ struct ice_fwlog_ring fwlog_ring; - - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL - * register. Used for determining the ITR/INTRL granularity during --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch b/kernel-std/debian/patches/ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch deleted file mode 100644 index 4bfe7051..00000000 --- a/kernel-std/debian/patches/ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch +++ /dev/null @@ -1,98 +0,0 @@ -From 8a7f6d8b2105c39f236c51c558e21b787c223861 Mon Sep 17 00:00:00 2001 -From: Wojciech Drewek -Date: Mon, 5 Feb 2024 14:03:57 +0100 -Subject: [PATCH 28/36] ice: Fix debugfs with devlink reload - -During devlink reload it is needed to remove debugfs entries -correlated with only one PF. ice_debugfs_exit() removes all -entries created by ice driver so we can't use it. - -Introduce ice_debugfs_pf_deinit() in order to release PF's -debugfs entries. Move ice_debugfs_exit() call to ice_module_exit(), -it makes more sense since ice_debugfs_init() is called in -ice_module_init() and not in ice_probe(). - -Signed-off-by: Wojciech Drewek -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Reviewed-by: Brett Creeley -Reviewed-by: Simon Horman -Signed-off-by: Tony Nguyen -(cherry picked from commit 500d0df5b4b2394a06b949bab05f7ed0242b9858) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 + - drivers/net/ethernet/intel/ice/ice_debugfs.c | 10 ++++++++++ - drivers/net/ethernet/intel/ice/ice_fwlog.c | 2 ++ - drivers/net/ethernet/intel/ice/ice_main.c | 3 +-- - 4 files changed, 14 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 7966ac61154c..ed1c6cdedeff 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -895,6 +895,7 @@ static inline bool ice_is_adq_active(struct ice_pf *pf) - } - - void ice_debugfs_fwlog_init(struct ice_pf *pf); -+void ice_debugfs_pf_deinit(struct ice_pf *pf); - void ice_debugfs_init(void); - void ice_debugfs_exit(void); - void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module); -diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c -index c2bfba6b9ead..ba396b22bb7d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_debugfs.c -+++ b/drivers/net/ethernet/intel/ice/ice_debugfs.c -@@ -647,6 +647,16 @@ void ice_debugfs_fwlog_init(struct ice_pf *pf) - kfree(fw_modules); - } - -+/** -+ * ice_debugfs_pf_deinit - cleanup PF's debugfs -+ * @pf: pointer to the PF struct -+ */ -+void ice_debugfs_pf_deinit(struct ice_pf *pf) -+{ -+ debugfs_remove_recursive(pf->ice_debugfs_pf); -+ pf->ice_debugfs_pf = NULL; -+} -+ - /** - * ice_debugfs_init - create root directory for debugfs entries - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c -index 92b5dac481cd..4fd15387a7e5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_fwlog.c -+++ b/drivers/net/ethernet/intel/ice/ice_fwlog.c -@@ -188,6 +188,8 @@ void ice_fwlog_deinit(struct ice_hw *hw) - if (hw->bus.func) - return; - -+ ice_debugfs_pf_deinit(hw->back); -+ - /* make sure FW logging is disabled to not put the FW in a weird state - * for the next driver load - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 6c6ca5353f28..c882c218281a 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -5325,8 +5325,6 @@ static void ice_remove(struct pci_dev *pdev) - msleep(100); - } - -- ice_debugfs_exit(); -- - if (test_bit(ICE_FLAG_SRIOV_ENA, pf->flags)) { - set_bit(ICE_VF_RESETS_DISABLED, pf->state); - ice_free_vfs(pf); -@@ -5823,6 +5821,7 @@ module_init(ice_module_init); - static void __exit ice_module_exit(void) - { - pci_unregister_driver(&ice_driver); -+ ice_debugfs_exit(); - destroy_workqueue(ice_wq); - destroy_workqueue(ice_lag_wq); - pr_info("module unloaded\n"); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch b/kernel-std/debian/patches/ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch deleted file mode 100644 index 2411e9c5..00000000 --- a/kernel-std/debian/patches/ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 861015cbb4cf4cb258a1da9e80550fe991be7808 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Fri, 16 Feb 2024 14:06:38 -0800 -Subject: [PATCH 29/36] ice: remove vf->lan_vsi_num field - -The lan_vsi_num field of the VF structure is no longer used for any -purpose. Remove it. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Tested-by: Rafal Romanowski -Signed-off-by: Tony Nguyen -(cherry picked from commit 1cf94cbfc61bac89cddeb075fbc100ebd3aea81b) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_sriov.c | 1 - - drivers/net/ethernet/intel/ice/ice_vf_lib.c | 4 +--- - drivers/net/ethernet/intel/ice/ice_vf_lib.h | 5 ----- - 3 files changed, 1 insertion(+), 9 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.c b/drivers/net/ethernet/intel/ice/ice_sriov.c -index 442162be23ea..3366ac976c44 100644 ---- a/drivers/net/ethernet/intel/ice/ice_sriov.c -+++ b/drivers/net/ethernet/intel/ice/ice_sriov.c -@@ -239,7 +239,6 @@ static struct ice_vsi *ice_vf_vsi_setup(struct ice_vf *vf) - } - - vf->lan_vsi_idx = vsi->idx; -- vf->lan_vsi_num = vsi->vsi_num; - - return vsi; - } -diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.c b/drivers/net/ethernet/intel/ice/ice_vf_lib.c -index 03b9d7d74851..303fdf8555cf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_vf_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_vf_lib.c -@@ -298,7 +298,6 @@ static int ice_vf_rebuild_vsi(struct ice_vf *vf) - * vf->lan_vsi_idx - */ - vsi->vsi_num = ice_get_hw_vsi_num(&pf->hw, vsi->idx); -- vf->lan_vsi_num = vsi->vsi_num; - - return 0; - } -@@ -1299,13 +1298,12 @@ int ice_vf_init_host_cfg(struct ice_vf *vf, struct ice_vsi *vsi) - } - - /** -- * ice_vf_invalidate_vsi - invalidate vsi_idx/vsi_num to remove VSI access -+ * ice_vf_invalidate_vsi - invalidate vsi_idx to remove VSI access - * @vf: VF to remove access to VSI for - */ - void ice_vf_invalidate_vsi(struct ice_vf *vf) - { - vf->lan_vsi_idx = ICE_NO_VSI; -- vf->lan_vsi_num = ICE_NO_VSI; - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.h b/drivers/net/ethernet/intel/ice/ice_vf_lib.h -index 48fea6fa0362..1de07accbc5c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_vf_lib.h -+++ b/drivers/net/ethernet/intel/ice/ice_vf_lib.h -@@ -110,11 +110,6 @@ struct ice_vf { - u8 spoofchk:1; - u8 link_forced:1; - u8 link_up:1; /* only valid if VF link is forced */ -- /* VSI indices - actual VSI pointers are maintained in the PF structure -- * When assigned, these will be non-zero, because VSI 0 is always -- * the main LAN VSI for the PF. -- */ -- u16 lan_vsi_num; /* ID as used by firmware */ - unsigned int min_tx_rate; /* Minimum Tx bandwidth limit in Mbps */ - unsigned int max_tx_rate; /* Maximum Tx bandwidth limit in Mbps */ - DECLARE_BITMAP(vf_states, ICE_VF_STATES_NBITS); /* VF runtime states */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch b/kernel-std/debian/patches/ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch deleted file mode 100644 index 7f02562d..00000000 --- a/kernel-std/debian/patches/ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 6b7fae8669a04943af9f83ef89d39a922ed179fd Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 26 Feb 2024 16:14:54 -0800 -Subject: [PATCH 30/36] ice: rename ice_write_* functions to ice_pack_ctx_* - -In ice_common.c there are 4 functions used for converting the unpacked -software Tx and Rx context structure data into the packed format used by -hardware. These functions have extremely generic names: - - * ice_write_byte - * ice_write_word - * ice_write_dword - * ice_write_qword - -When I saw these function names my first thought was "write what? to -where?". Understanding what these functions do requires looking at the -implementation details. The functions take bits from an unpacked structure -and copy them into the packed layout used by hardware. - -As part of live migration, we will want functions which perform the inverse -operation of reading bits from the packed layout and copying them into the -unpacked format. Naming these as "ice_read_byte", etc would be very -confusing since they appear to write data. - -In preparation for adding this new inverse operation, rename the existing -functions to use the prefix "ice_pack_ctx_". This makes it clear that they -perform the bit packing while copying from the unpacked software context -structure to the packed hardware context. - -The inverse operations can then neatly be named ice_unpack_ctx_*, clearly -indicating they perform the bit unpacking while copying from the packed -hardware context to the unpacked software context structure. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Tony Nguyen -(cherry picked from commit 1260b45dbe2dbc415f3bc1e841c6c098083bcfb8) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 56 ++++++++++----------- - 1 file changed, 28 insertions(+), 28 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 6dcba0577633..17f60a98c8ed 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -4267,13 +4267,13 @@ ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps, - /* End of FW Admin Queue command wrappers */ - - /** -- * ice_write_byte - write a byte to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_byte - write a byte to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_byte(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u8 src_byte, dest_byte, mask; - u8 *from, *dest; -@@ -4306,13 +4306,13 @@ ice_write_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) - } - - /** -- * ice_write_word - write a word to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_word - write a word to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_word(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u16 src_word, mask; - __le16 dest_word; -@@ -4349,13 +4349,13 @@ ice_write_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) - } - - /** -- * ice_write_dword - write a dword to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_dword - write a dword to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_dword(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u32 src_dword, mask; - __le32 dest_dword; -@@ -4400,13 +4400,13 @@ ice_write_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) - } - - /** -- * ice_write_qword - write a qword to a packed context structure -- * @src_ctx: the context structure to read from -- * @dest_ctx: the context to be written to -- * @ce_info: a description of the struct to be filled -+ * ice_pack_ctx_qword - write a qword to a packed context structure -+ * @src_ctx: unpacked source context structure -+ * @dest_ctx: packed destination context data -+ * @ce_info: context element description - */ --static void --ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) -+static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - u64 src_qword, mask; - __le64 dest_qword; -@@ -4475,16 +4475,16 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, - } - switch (ce_info[f].size_of) { - case sizeof(u8): -- ice_write_byte(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_byte(src_ctx, dest_ctx, &ce_info[f]); - break; - case sizeof(u16): -- ice_write_word(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_word(src_ctx, dest_ctx, &ce_info[f]); - break; - case sizeof(u32): -- ice_write_dword(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_dword(src_ctx, dest_ctx, &ce_info[f]); - break; - case sizeof(u64): -- ice_write_qword(src_ctx, dest_ctx, &ce_info[f]); -+ ice_pack_ctx_qword(src_ctx, dest_ctx, &ce_info[f]); - break; - default: - return -EINVAL; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch b/kernel-std/debian/patches/ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch deleted file mode 100644 index 1c8f1877..00000000 --- a/kernel-std/debian/patches/ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch +++ /dev/null @@ -1,129 +0,0 @@ -From 619e0e61b39cf051137613459d36c4fe8f435e57 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 26 Feb 2024 16:14:55 -0800 -Subject: [PATCH 31/36] ice: use GENMASK instead of BIT(n) - 1 in pack - functions - -The functions used to pack the Tx and Rx context into the hardware format -rely on using BIT() and then subtracting 1 to get a bitmask. These -functions even have a comment about how x86 machines can't use this method -for certain widths because the SHL instructions will not work properly. - -The Linux kernel already provides the GENMASK macro for generating a -suitable bitmask. Further, GENMASK is capable of generating the mask -including the shift_width. Since width is the total field width, take care -to subtract one to get the final bit position. - -Since we now include the shifted bits as part of the mask, shift the source -value first before applying the mask. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit a45d1bf516c097bb7ae4983d3128ebf139be952c) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 44 ++++----------------- - 1 file changed, 8 insertions(+), 36 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 17f60a98c8ed..55a2e264dd69 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -4284,14 +4284,11 @@ static void ice_pack_ctx_byte(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- mask = (u8)(BIT(ce_info->width) - 1); -+ mask = GENMASK(ce_info->width - 1 + shift_width, shift_width); - - src_byte = *from; -- src_byte &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_byte <<= shift_width; -+ src_byte &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); -@@ -4324,17 +4321,14 @@ static void ice_pack_ctx_word(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- mask = BIT(ce_info->width) - 1; -+ mask = GENMASK(ce_info->width - 1 + shift_width, shift_width); - - /* don't swizzle the bits until after the mask because the mask bits - * will be in a different bit position on big endian machines - */ - src_word = *(u16 *)from; -- src_word &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_word <<= shift_width; -+ src_word &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); -@@ -4367,25 +4361,14 @@ static void ice_pack_ctx_dword(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- -- /* if the field width is exactly 32 on an x86 machine, then the shift -- * operation will not work because the SHL instructions count is masked -- * to 5 bits so the shift will do nothing -- */ -- if (ce_info->width < 32) -- mask = BIT(ce_info->width) - 1; -- else -- mask = (u32)~0; -+ mask = GENMASK(ce_info->width - 1 + shift_width, shift_width); - - /* don't swizzle the bits until after the mask because the mask bits - * will be in a different bit position on big endian machines - */ - src_dword = *(u32 *)from; -- src_dword &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_dword <<= shift_width; -+ src_dword &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); -@@ -4418,25 +4401,14 @@ static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx, - - /* prepare the bits and mask */ - shift_width = ce_info->lsb % 8; -- -- /* if the field width is exactly 64 on an x86 machine, then the shift -- * operation will not work because the SHL instructions count is masked -- * to 6 bits so the shift will do nothing -- */ -- if (ce_info->width < 64) -- mask = BIT_ULL(ce_info->width) - 1; -- else -- mask = (u64)~0; -+ mask = GENMASK_ULL(ce_info->width - 1 + shift_width, shift_width); - - /* don't swizzle the bits until after the mask because the mask bits - * will be in a different bit position on big endian machines - */ - src_qword = *(u64 *)from; -- src_qword &= mask; -- -- /* shift to correct alignment */ -- mask <<= shift_width; - src_qword <<= shift_width; -+ src_qword &= mask; - - /* get the current bits from the target bit string */ - dest = dest_ctx + (ce_info->lsb / 8); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch b/kernel-std/debian/patches/ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch deleted file mode 100644 index 4ab4b491..00000000 --- a/kernel-std/debian/patches/ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 6502dd63a7bd436c72d2ee8b328985b93fa7e2a5 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 26 Feb 2024 16:14:56 -0800 -Subject: [PATCH 32/36] ice: cleanup line splitting for context set functions - -The indentation for ice_set_ctx and ice_write_rxq_ctx breaks the function -name after the return type. This style of breaking is used a lot throughout -the ice driver, even in cases where its not actually helpful for -readability. We no longer prefer this style of line splitting in the -driver, and new code is avoiding it. - -Normally, I would leave this alone unless the actual function contents or -description needed updating. However, a future change is going to add -inverse functions for converting packed context to unpacked context -structures. To keep this code uniform with the existing set functions, fix -up the style to the modern format of keeping the type on the same line. - -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Tony Nguyen -(cherry picked from commit 979c2c049fbea107ce9f8d31f3ba9dba83ddb0a2) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 12 +++++------- - drivers/net/ethernet/intel/ice/ice_common.h | 10 ++++------ - 2 files changed, 9 insertions(+), 13 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 55a2e264dd69..59ede77a1473 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -1329,9 +1329,8 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = { - * it to HW register space and enables the hardware to prefetch descriptors - * instead of only fetching them on demand - */ --int --ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -- u32 rxq_index) -+int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -+ u32 rxq_index) - { - u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 }; - -@@ -4427,11 +4426,10 @@ static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx, - * @hw: pointer to the hardware structure - * @src_ctx: pointer to a generic non-packed context structure - * @dest_ctx: pointer to memory for the packed structure -- * @ce_info: a description of the structure to be transformed -+ * @ce_info: List of Rx context elements - */ --int --ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -- const struct ice_ctx_ele *ce_info) -+int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info) - { - int f; - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index d47e5400351f..1c3c29d30815 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -52,9 +52,8 @@ int ice_get_caps(struct ice_hw *hw); - - void ice_set_safe_mode_caps(struct ice_hw *hw); - --int --ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -- u32 rxq_index); -+int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, -+ u32 rxq_index); - - int - ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params); -@@ -71,9 +70,8 @@ bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq); - int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading); - void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode); - extern const struct ice_ctx_ele ice_tlan_ctx_info[]; --int --ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -- const struct ice_ctx_ele *ce_info); -+int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx, -+ const struct ice_ctx_ele *ce_info); - - extern struct mutex ice_global_cfg_lock_sw; - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch b/kernel-std/debian/patches/ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch deleted file mode 100644 index a740f1ff..00000000 --- a/kernel-std/debian/patches/ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 675a8843a0de1411666389eeabeea452161f8cc5 Mon Sep 17 00:00:00 2001 -From: Maciej Fijalkowski -Date: Fri, 23 Feb 2024 17:06:27 +0100 -Subject: [PATCH 33/36] ice: do not disable Tx queues twice in ice_down() - -ice_down() clears QINT_TQCTL_CAUSE_ENA_M bit twice, which is not -necessary. First clearing happens in ice_vsi_dis_irq() and second in -ice_vsi_stop_tx_ring() - remove the first one. - -While at it, make ice_vsi_dis_irq() static as ice_down() is the only -current caller of it. - -Signed-off-by: Maciej Fijalkowski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit d5926e01e3739542bb047b77f850d7f641eaa7bc) -[Adjust ice_lib.c with the context change.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_lib.c | 55 ----------------------- - drivers/net/ethernet/intel/ice/ice_lib.h | 2 - - drivers/net/ethernet/intel/ice/ice_main.c | 44 ++++++++++++++++++ - 3 files changed, 44 insertions(+), 57 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 106ef843f4b5..f23cb9c8e3dd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -2877,61 +2877,6 @@ void ice_dis_vsi(struct ice_vsi *vsi, bool locked) - } - } - --/** -- * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI -- * @vsi: the VSI being un-configured -- */ --void ice_vsi_dis_irq(struct ice_vsi *vsi) --{ -- struct ice_pf *pf = vsi->back; -- struct ice_hw *hw = &pf->hw; -- u32 val; -- int i; -- -- /* disable interrupt causation from each queue */ -- if (vsi->tx_rings) { -- ice_for_each_txq(vsi, i) { -- if (vsi->tx_rings[i]) { -- u16 reg; -- -- reg = vsi->tx_rings[i]->reg_idx; -- val = rd32(hw, QINT_TQCTL(reg)); -- val &= ~QINT_TQCTL_CAUSE_ENA_M; -- wr32(hw, QINT_TQCTL(reg), val); -- } -- } -- } -- -- if (vsi->rx_rings) { -- ice_for_each_rxq(vsi, i) { -- if (vsi->rx_rings[i]) { -- u16 reg; -- -- reg = vsi->rx_rings[i]->reg_idx; -- val = rd32(hw, QINT_RQCTL(reg)); -- val &= ~QINT_RQCTL_CAUSE_ENA_M; -- wr32(hw, QINT_RQCTL(reg), val); -- } -- } -- } -- -- /* disable each interrupt */ -- ice_for_each_q_vector(vsi, i) { -- if (!vsi->q_vectors[i]) -- continue; -- wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0); -- } -- -- ice_flush(hw); -- -- /* don't call synchronize_irq() for VF's from the host */ -- if (vsi->type == ICE_VSI_VF) -- return; -- -- ice_for_each_q_vector(vsi, i) -- synchronize_irq(vsi->q_vectors[i]->irq.virq); --} -- - /** - * ice_vsi_release - Delete a VSI and free its resources - * @vsi: the VSI being removed -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.h b/drivers/net/ethernet/intel/ice/ice_lib.h -index f24f5d1e6f9c..dbd0f3409323 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.h -+++ b/drivers/net/ethernet/intel/ice/ice_lib.h -@@ -110,8 +110,6 @@ void - ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio, - bool ena_ts); - --void ice_vsi_dis_irq(struct ice_vsi *vsi); -- - void ice_vsi_free_irq(struct ice_vsi *vsi); - - void ice_vsi_free_rx_rings(struct ice_vsi *vsi); -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index c882c218281a..685635a22616 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -7023,6 +7023,50 @@ static void ice_napi_disable_all(struct ice_vsi *vsi) - } - } - -+/** -+ * ice_vsi_dis_irq - Mask off queue interrupt generation on the VSI -+ * @vsi: the VSI being un-configured -+ */ -+static void ice_vsi_dis_irq(struct ice_vsi *vsi) -+{ -+ struct ice_pf *pf = vsi->back; -+ struct ice_hw *hw = &pf->hw; -+ u32 val; -+ int i; -+ -+ /* disable interrupt causation from each Rx queue; Tx queues are -+ * handled in ice_vsi_stop_tx_ring() -+ */ -+ if (vsi->rx_rings) { -+ ice_for_each_rxq(vsi, i) { -+ if (vsi->rx_rings[i]) { -+ u16 reg; -+ -+ reg = vsi->rx_rings[i]->reg_idx; -+ val = rd32(hw, QINT_RQCTL(reg)); -+ val &= ~QINT_RQCTL_CAUSE_ENA_M; -+ wr32(hw, QINT_RQCTL(reg), val); -+ } -+ } -+ } -+ -+ /* disable each interrupt */ -+ ice_for_each_q_vector(vsi, i) { -+ if (!vsi->q_vectors[i]) -+ continue; -+ wr32(hw, GLINT_DYN_CTL(vsi->q_vectors[i]->reg_idx), 0); -+ } -+ -+ ice_flush(hw); -+ -+ /* don't call synchronize_irq() for VF's from the host */ -+ if (vsi->type == ICE_VSI_VF) -+ return; -+ -+ ice_for_each_q_vector(vsi, i) -+ synchronize_irq(vsi->q_vectors[i]->irq.virq); -+} -+ - /** - * ice_down - Shutdown the connection - * @vsi: The VSI being stopped --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0034-ice-Fix-improper-extts-handling.patch b/kernel-std/debian/patches/ice-VDF/0034-ice-Fix-improper-extts-handling.patch deleted file mode 100644 index 928b20bf..00000000 --- a/kernel-std/debian/patches/ice-VDF/0034-ice-Fix-improper-extts-handling.patch +++ /dev/null @@ -1,274 +0,0 @@ -From e53280c20bbe58015a91178268244d5e831276f4 Mon Sep 17 00:00:00 2001 -From: Milena Olech -Date: Tue, 2 Jul 2024 10:14:54 -0700 -Subject: [PATCH 34/36] ice: Fix improper extts handling - -Extts events are disabled and enabled by the application ts2phc. -However, in case where the driver is removed when the application is -running, a specific extts event remains enabled and can cause a kernel -crash. -As a side effect, when the driver is reloaded and application is started -again, remaining extts event for the channel from a previous run will -keep firing and the message "extts on unexpected channel" might be -printed to the user. - -To avoid that, extts events shall be disabled when PTP is released. - -Fixes: 172db5f91d5f ("ice: add support for auxiliary input/output pins") -Reviewed-by: Przemek Kitszel -Co-developed-by: Jacob Keller -Signed-off-by: Jacob Keller -Signed-off-by: Milena Olech -Signed-off-by: Karol Kolacinski -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Link: https://patch.msgid.link/20240702171459.2606611-2-anthony.l.nguyen@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 00d3b4f54582d4e4a02cda5886bb336eeab268cc) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 105 ++++++++++++++++++----- - drivers/net/ethernet/intel/ice/ice_ptp.h | 8 ++ - 2 files changed, 91 insertions(+), 22 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 48ec59fc5d87..6e06c5d596b9 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1603,27 +1603,24 @@ void ice_ptp_extts_event(struct ice_pf *pf) - /** - * ice_ptp_cfg_extts - Configure EXTTS pin and channel - * @pf: Board private structure -- * @ena: true to enable; false to disable - * @chan: GPIO channel (0-3) -- * @gpio_pin: GPIO pin -- * @extts_flags: request flags from the ptp_extts_request.flags -+ * @config: desired EXTTS configuration. -+ * @store: If set to true, the values will be stored -+ * -+ * Configure an external timestamp event on the requested channel. - */ --static int --ice_ptp_cfg_extts(struct ice_pf *pf, bool ena, unsigned int chan, u32 gpio_pin, -- unsigned int extts_flags) -+static void ice_ptp_cfg_extts(struct ice_pf *pf, unsigned int chan, -+ struct ice_extts_channel *config, bool store) - { - u32 func, aux_reg, gpio_reg, irq_reg; - struct ice_hw *hw = &pf->hw; - u8 tmr_idx; - -- if (chan > (unsigned int)pf->ptp.info.n_ext_ts) -- return -EINVAL; -- - tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; - - irq_reg = rd32(hw, PFINT_OICR_ENA); - -- if (ena) { -+ if (config->ena) { - /* Enable the interrupt */ - irq_reg |= PFINT_OICR_TSYN_EVNT_M; - aux_reg = GLTSYN_AUX_IN_0_INT_ENA_M; -@@ -1632,9 +1629,9 @@ ice_ptp_cfg_extts(struct ice_pf *pf, bool ena, unsigned int chan, u32 gpio_pin, - #define GLTSYN_AUX_IN_0_EVNTLVL_FALLING_EDGE BIT(1) - - /* set event level to requested edge */ -- if (extts_flags & PTP_FALLING_EDGE) -+ if (config->flags & PTP_FALLING_EDGE) - aux_reg |= GLTSYN_AUX_IN_0_EVNTLVL_FALLING_EDGE; -- if (extts_flags & PTP_RISING_EDGE) -+ if (config->flags & PTP_RISING_EDGE) - aux_reg |= GLTSYN_AUX_IN_0_EVNTLVL_RISING_EDGE; - - /* Write GPIO CTL reg. -@@ -1656,9 +1653,47 @@ ice_ptp_cfg_extts(struct ice_pf *pf, bool ena, unsigned int chan, u32 gpio_pin, - - wr32(hw, PFINT_OICR_ENA, irq_reg); - wr32(hw, GLTSYN_AUX_IN(chan, tmr_idx), aux_reg); -- wr32(hw, GLGEN_GPIO_CTL(gpio_pin), gpio_reg); -+ wr32(hw, GLGEN_GPIO_CTL(config->gpio_pin), gpio_reg); - -- return 0; -+ if (store) -+ memcpy(&pf->ptp.extts_channels[chan], config, sizeof(*config)); -+} -+ -+/** -+ * ice_ptp_disable_all_extts - Disable all EXTTS channels -+ * @pf: Board private structure -+ */ -+static void ice_ptp_disable_all_extts(struct ice_pf *pf) -+{ -+ struct ice_extts_channel extts_cfg = {}; -+ int i; -+ -+ for (i = 0; i < pf->ptp.info.n_ext_ts; i++) { -+ if (pf->ptp.extts_channels[i].ena) { -+ extts_cfg.gpio_pin = pf->ptp.extts_channels[i].gpio_pin; -+ extts_cfg.ena = false; -+ ice_ptp_cfg_extts(pf, i, &extts_cfg, false); -+ } -+ } -+ -+ synchronize_irq(pf->oicr_irq.virq); -+} -+ -+/** -+ * ice_ptp_enable_all_extts - Enable all EXTTS channels -+ * @pf: Board private structure -+ * -+ * Called during reset to restore user configuration. -+ */ -+static void ice_ptp_enable_all_extts(struct ice_pf *pf) -+{ -+ int i; -+ -+ for (i = 0; i < pf->ptp.info.n_ext_ts; i++) { -+ if (pf->ptp.extts_channels[i].ena) -+ ice_ptp_cfg_extts(pf, i, &pf->ptp.extts_channels[i], -+ false); -+ } - } - - /** -@@ -1815,7 +1850,6 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - struct ptp_clock_request *rq, int on) - { - struct ice_pf *pf = ptp_info_to_pf(info); -- struct ice_perout_channel clk_cfg = {0}; - bool sma_pres = false; - unsigned int chan; - u32 gpio_pin; -@@ -1826,6 +1860,9 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - - switch (rq->type) { - case PTP_CLK_REQ_PEROUT: -+ { -+ struct ice_perout_channel clk_cfg = {}; -+ - chan = rq->perout.index; - if (sma_pres) { - if (chan == ice_pin_desc_e810t[SMA1].chan) -@@ -1853,7 +1890,11 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - - err = ice_ptp_cfg_clkout(pf, chan, &clk_cfg, true); - break; -+ } - case PTP_CLK_REQ_EXTTS: -+ { -+ struct ice_extts_channel extts_cfg = {}; -+ - chan = rq->extts.index; - if (sma_pres) { - if (chan < ice_pin_desc_e810t[SMA2].chan) -@@ -1869,9 +1910,13 @@ ice_ptp_gpio_enable_e810(struct ptp_clock_info *info, - gpio_pin = chan; - } - -- err = ice_ptp_cfg_extts(pf, !!on, chan, gpio_pin, -- rq->extts.flags); -- break; -+ extts_cfg.flags = rq->extts.flags; -+ extts_cfg.gpio_pin = gpio_pin; -+ extts_cfg.ena = !!on; -+ -+ ice_ptp_cfg_extts(pf, chan, &extts_cfg, true); -+ return 0; -+ } - default: - return -EOPNOTSUPP; - } -@@ -1889,21 +1934,31 @@ static int ice_ptp_gpio_enable_e823(struct ptp_clock_info *info, - struct ptp_clock_request *rq, int on) - { - struct ice_pf *pf = ptp_info_to_pf(info); -- struct ice_perout_channel clk_cfg = {0}; - int err; - - switch (rq->type) { - case PTP_CLK_REQ_PPS: -+ { -+ struct ice_perout_channel clk_cfg = {}; -+ - clk_cfg.gpio_pin = PPS_PIN_INDEX; - clk_cfg.period = NSEC_PER_SEC; - clk_cfg.ena = !!on; - - err = ice_ptp_cfg_clkout(pf, PPS_CLK_GEN_CHAN, &clk_cfg, true); - break; -+ } - case PTP_CLK_REQ_EXTTS: -- err = ice_ptp_cfg_extts(pf, !!on, rq->extts.index, -- TIME_SYNC_PIN_INDEX, rq->extts.flags); -- break; -+ { -+ struct ice_extts_channel extts_cfg = {}; -+ -+ extts_cfg.flags = rq->extts.flags; -+ extts_cfg.gpio_pin = TIME_SYNC_PIN_INDEX; -+ extts_cfg.ena = !!on; -+ -+ ice_ptp_cfg_extts(pf, rq->extts.index, &extts_cfg, true); -+ return 0; -+ } - default: - return -EOPNOTSUPP; - } -@@ -2735,6 +2790,10 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf) - ice_ptp_restart_all_phy(pf); - } - -+ /* Re-enable all periodic outputs and external timestamp events */ -+ ice_ptp_enable_all_clkout(pf); -+ ice_ptp_enable_all_extts(pf); -+ - return 0; - } - -@@ -3286,6 +3345,8 @@ void ice_ptp_release(struct ice_pf *pf) - - ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); - -+ ice_ptp_disable_all_extts(pf); -+ - kthread_cancel_delayed_work_sync(&pf->ptp.work); - - ice_ptp_port_phy_stop(&pf->ptp.port); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h -index 352405a2daf2..c6469a5a7afb 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.h -@@ -33,6 +33,12 @@ struct ice_perout_channel { - u64 start_time; - }; - -+struct ice_extts_channel { -+ bool ena; -+ u32 gpio_pin; -+ u32 flags; -+}; -+ - /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp - * is stored in a buffer of registers. Depending on the specific hardware, - * this buffer might be shared across multiple PHY ports. -@@ -226,6 +232,7 @@ enum ice_ptp_state { - * @ext_ts_irq: the external timestamp IRQ in use - * @kworker: kwork thread for handling periodic work - * @perout_channels: periodic output data -+ * @extts_channels: channels for external timestamps - * @info: structure defining PTP hardware capabilities - * @clock: pointer to registered PTP clock device - * @tstamp_config: hardware timestamping configuration -@@ -249,6 +256,7 @@ struct ice_ptp { - u8 ext_ts_irq; - struct kthread_worker *kworker; - struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX]; -+ struct ice_extts_channel extts_channels[GLTSYN_TGT_H_IDX_MAX]; - struct ptp_clock_info info; - struct ptp_clock *clock; - struct hwtstamp_config tstamp_config; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch b/kernel-std/debian/patches/ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch deleted file mode 100644 index feef0a9f..00000000 --- a/kernel-std/debian/patches/ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 6c24a32820031f9713d0c0cf7ac6f4ead6b58052 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 2 Jul 2024 10:14:55 -0700 -Subject: [PATCH 35/36] ice: Don't process extts if PTP is disabled - -The ice_ptp_extts_event() function can race with ice_ptp_release() and -result in a NULL pointer dereference which leads to a kernel panic. - -Panic occurs because the ice_ptp_extts_event() function calls -ptp_clock_event() with a NULL pointer. The ice driver has already -released the PTP clock by the time the interrupt for the next external -timestamp event occurs. - -To fix this, modify the ice_ptp_extts_event() function to check the -PTP state and bail early if PTP is not ready. - -Fixes: 172db5f91d5f ("ice: add support for auxiliary input/output pins") -Reviewed-by: Przemek Kitszel -Signed-off-by: Jacob Keller -Signed-off-by: Karol Kolacinski -Reviewed-by: Simon Horman -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Link: https://patch.msgid.link/20240702171459.2606611-3-anthony.l.nguyen@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 996422e3230e41468f652d754fefd1bdbcd4604e) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 6e06c5d596b9..ceb4ba19c511 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1578,6 +1578,10 @@ void ice_ptp_extts_event(struct ice_pf *pf) - u8 chan, tmr_idx; - u32 hi, lo; - -+ /* Don't process timestamp events if PTP is not ready */ -+ if (pf->ptp.state != ICE_PTP_READY) -+ return; -+ - tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; - /* Event time is captured by one of the two matched registers - * GLTSYN_EVNT_L: 32 LSB of sampled time event --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch b/kernel-std/debian/patches/ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch deleted file mode 100644 index 6d5456da..00000000 --- a/kernel-std/debian/patches/ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch +++ /dev/null @@ -1,628 +0,0 @@ -From 1ce01cb7cdb0bf4c18a546a62f224c8032d75ebd Mon Sep 17 00:00:00 2001 -From: Karol Kolacinski -Date: Tue, 28 May 2024 16:03:51 -0700 -Subject: [PATCH 36/36] ice: Introduce ice_ptp_hw struct - -Create new ice_ptp_hw struct and use it for all HW and PTP-related -fields from struct ice_hw. -Replace definitions with struct fields, which values are set accordingly -to a specific device. - -Reviewed-by: Przemek Kitszel -Reviewed-by: Arkadiusz Kubalewski -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy -Signed-off-by: Jacob Keller -Link: https://lore.kernel.org/r/20240528-next-2024-05-28-ptp-refactors-v1-1-c082739bb6f6@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit d551d075b043821880b8afc0010ef70d050716d0) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 24 ++++ - drivers/net/ethernet/intel/ice/ice_common.h | 1 + - drivers/net/ethernet/intel/ice/ice_ptp.c | 22 ++-- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 134 ++++++++++++-------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 4 +- - drivers/net/ethernet/intel/ice/ice_type.h | 17 ++- - 6 files changed, 126 insertions(+), 76 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 59ede77a1473..147004e0170b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -209,6 +209,30 @@ bool ice_is_e810t(struct ice_hw *hw) - return false; - } - -+/** -+ * ice_is_e822 - Check if a device is E822 family device -+ * @hw: pointer to the hardware structure -+ * -+ * Return: true if the device is E822 based, false if not. -+ */ -+bool ice_is_e822(struct ice_hw *hw) -+{ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E822C_BACKPLANE: -+ case ICE_DEV_ID_E822C_QSFP: -+ case ICE_DEV_ID_E822C_SFP: -+ case ICE_DEV_ID_E822C_10G_BASE_T: -+ case ICE_DEV_ID_E822C_SGMII: -+ case ICE_DEV_ID_E822L_BACKPLANE: -+ case ICE_DEV_ID_E822L_SFP: -+ case ICE_DEV_ID_E822L_10G_BASE_T: -+ case ICE_DEV_ID_E822L_SGMII: -+ return true; -+ default: -+ return false; -+ } -+} -+ - /** - * ice_is_e823 - * @hw: pointer to the hardware structure -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 1c3c29d30815..9d38777310e5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -245,6 +245,7 @@ void - ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, - u64 *prev_stat, u64 *cur_stat); - bool ice_is_e810t(struct ice_hw *hw); -+bool ice_is_e822(struct ice_hw *hw); - bool ice_is_e823(struct ice_hw *hw); - int - ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index ceb4ba19c511..bb1572a353d0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -812,7 +812,7 @@ static enum ice_tx_tstamp_work ice_ptp_tx_tstamp_owner(struct ice_pf *pf) - } - mutex_unlock(&pf->ptp.ports_owner.lock); - -- for (i = 0; i < ICE_MAX_QUAD; i++) { -+ for (i = 0; i < ICE_GET_QUAD_NUM(pf->hw.ptp.num_lports); i++) { - u64 tstamp_ready; - int err; - -@@ -1026,7 +1026,7 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) - static int - ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) - { -- tx->block = port / ICE_PORTS_PER_QUAD; -+ tx->block = ICE_GET_QUAD_NUM(port); - tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; - tx->len = INDEX_PER_PORT_E82X; - tx->has_ready_bitmap = 1; -@@ -1248,8 +1248,8 @@ static u64 ice_base_incval(struct ice_pf *pf) - */ - static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port) - { -- int quad = port->port_num / ICE_PORTS_PER_QUAD; - int offs = port->port_num % ICE_PORTS_PER_QUAD; -+ int quad = ICE_GET_QUAD_NUM(port->port_num); - struct ice_pf *pf; - struct ice_hw *hw; - u32 val, phy_sts; -@@ -1448,7 +1448,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - if (pf->ptp.state != ICE_PTP_READY) - return; - -- if (WARN_ON_ONCE(port >= ICE_NUM_EXTERNAL_PORTS)) -+ if (WARN_ON_ONCE(port >= hw->ptp.num_lports)) - return; - - ptp_port = &pf->ptp.port; -@@ -1458,7 +1458,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - /* Update cached link status for this port immediately */ - ptp_port->link_up = linkup; - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - /* Do not reconfigure E810 PHY */ - return; -@@ -1487,7 +1487,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold) - - ice_ptp_reset_ts_memory(hw); - -- for (quad = 0; quad < ICE_MAX_QUAD; quad++) { -+ for (quad = 0; quad < ICE_GET_QUAD_NUM(hw->ptp.num_lports); quad++) { - err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, - &val); - if (err) -@@ -2038,7 +2038,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts) - ice_ptp_enable_all_clkout(pf); - - /* Recalibrate and re-enable timestamp blocks for E822/E823 */ -- if (hw->phy_model == ICE_PHY_E82X) -+ if (hw->ptp.phy_model == ICE_PHY_E82X) - ice_ptp_restart_all_phy(pf); - exit: - if (err) { -@@ -2652,7 +2652,7 @@ static void ice_ptp_maybe_trigger_tx_interrupt(struct ice_pf *pf) - if (!ice_pf_src_tmr_owned(pf)) - return; - -- for (i = 0; i < ICE_MAX_QUAD; i++) { -+ for (i = 0; i < ICE_GET_QUAD_NUM(hw->ptp.num_lports); i++) { - u64 tstamp_ready; - int err; - -@@ -3152,7 +3152,7 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - - mutex_init(&ptp_port->ps_lock); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); - case ICE_PHY_E82X: -@@ -3245,7 +3245,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf) - */ - static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf) - { -- switch (pf->hw.phy_model) { -+ switch (pf->hw.ptp.phy_model) { - case ICE_PHY_E82X: - /* E822 based PHY has the clock owner process the interrupt - * for all ports. -@@ -3281,7 +3281,7 @@ void ice_ptp_init(struct ice_pf *pf) - - ptp->state = ICE_PTP_INITIALIZING; - -- ice_ptp_init_phy_model(hw); -+ ice_ptp_init_hw(hw); - - ice_ptp_init_tx_interrupt_mode(pf); - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 7337e7e710ed..313a72dad813 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -285,18 +285,21 @@ static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw) - - /** - * ice_fill_phy_msg_e82x - Fill message data for a PHY register access -+ * @hw: pointer to the HW struct - * @msg: the PHY message buffer to fill in - * @port: the port to access - * @offset: the register offset - */ --static void --ice_fill_phy_msg_e82x(struct ice_sbq_msg_input *msg, u8 port, u16 offset) -+static void ice_fill_phy_msg_e82x(struct ice_hw *hw, -+ struct ice_sbq_msg_input *msg, u8 port, -+ u16 offset) - { - int phy_port, phy, quadtype; - -- phy_port = port % ICE_PORTS_PER_PHY_E82X; -- phy = port / ICE_PORTS_PER_PHY_E82X; -- quadtype = (port / ICE_PORTS_PER_QUAD) % ICE_QUADS_PER_PHY_E82X; -+ phy_port = port % hw->ptp.ports_per_phy; -+ phy = port / hw->ptp.ports_per_phy; -+ quadtype = ICE_GET_QUAD_NUM(port) % -+ ICE_GET_QUAD_NUM(hw->ptp.ports_per_phy); - - if (quadtype == 0) { - msg->msg_addr_low = P_Q0_L(P_0_BASE + offset, phy_port); -@@ -427,7 +430,7 @@ ice_read_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 *val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e82x(&msg, port, offset); -+ ice_fill_phy_msg_e82x(hw, &msg, port, offset); - msg.opcode = ice_sbq_msg_rd; - - err = ice_sbq_rw_reg(hw, &msg); -@@ -504,7 +507,7 @@ ice_write_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- ice_fill_phy_msg_e82x(&msg, port, offset); -+ ice_fill_phy_msg_e82x(hw, &msg, port, offset); - msg.opcode = ice_sbq_msg_wr; - msg.data = val; - -@@ -614,24 +617,30 @@ ice_write_64b_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 low_addr, u64 val) - - /** - * ice_fill_quad_msg_e82x - Fill message data for quad register access -+ * @hw: pointer to the HW struct - * @msg: the PHY message buffer to fill in - * @quad: the quad to access - * @offset: the register offset - * - * Fill a message buffer for accessing a register in a quad shared between - * multiple PHYs. -+ * -+ * Return: -+ * * %0 - OK -+ * * %-EINVAL - invalid quad number - */ --static int --ice_fill_quad_msg_e82x(struct ice_sbq_msg_input *msg, u8 quad, u16 offset) -+static int ice_fill_quad_msg_e82x(struct ice_hw *hw, -+ struct ice_sbq_msg_input *msg, u8 quad, -+ u16 offset) - { - u32 addr; - -- if (quad >= ICE_MAX_QUAD) -+ if (quad >= ICE_GET_QUAD_NUM(hw->ptp.num_lports)) - return -EINVAL; - - msg->dest_dev = rmn_0; - -- if ((quad % ICE_QUADS_PER_PHY_E82X) == 0) -+ if (!(quad % ICE_GET_QUAD_NUM(hw->ptp.ports_per_phy))) - addr = Q_0_BASE + offset; - else - addr = Q_1_BASE + offset; -@@ -658,7 +667,7 @@ ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e82x(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(hw, &msg, quad, offset); - if (err) - return err; - -@@ -692,7 +701,7 @@ ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val) - struct ice_sbq_msg_input msg = {0}; - int err; - -- err = ice_fill_quad_msg_e82x(&msg, quad, offset); -+ err = ice_fill_quad_msg_e82x(hw, &msg, quad, offset); - if (err) - return err; - -@@ -813,7 +822,7 @@ static void ice_ptp_reset_ts_memory_e82x(struct ice_hw *hw) - { - unsigned int quad; - -- for (quad = 0; quad < ICE_MAX_QUAD; quad++) -+ for (quad = 0; quad < ICE_GET_QUAD_NUM(hw->ptp.num_lports); quad++) - ice_ptp_reset_ts_memory_quad_e82x(hw, quad); - } - -@@ -1110,7 +1119,7 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw) - { - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - int err; - - err = ice_write_phy_reg_e82x(hw, port, P_REG_WL, -@@ -1175,7 +1184,7 @@ ice_ptp_prep_phy_time_e82x(struct ice_hw *hw, u32 time) - */ - phy_time = (u64)time << 32; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - /* Tx case */ - err = ice_write_64b_phy_reg_e82x(hw, port, - P_REG_TX_TIMER_INC_PRE_L, -@@ -1278,7 +1287,7 @@ ice_ptp_prep_phy_adj_e82x(struct ice_hw *hw, s32 adj) - else - cycles = -(((s64)-adj) << 32); - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - int err; - - err = ice_ptp_prep_port_adj_e82x(hw, port, cycles); -@@ -1304,7 +1313,7 @@ ice_ptp_prep_phy_incval_e82x(struct ice_hw *hw, u64 incval) - int err; - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - err = ice_write_40b_phy_reg_e82x(hw, port, P_REG_TIMETUS_L, - incval); - if (err) -@@ -1460,7 +1469,7 @@ ice_ptp_one_port_cmd(struct ice_hw *hw, u8 configured_port, - { - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - enum ice_ptp_tmr_cmd cmd; - int err; - -@@ -1490,7 +1499,7 @@ ice_ptp_port_cmd_e82x(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - { - u8 port; - -- for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) { -+ for (port = 0; port < hw->ptp.num_lports; port++) { - int err; - - err = ice_ptp_write_port_cmd_e82x(hw, port, cmd); -@@ -1603,7 +1612,7 @@ static void ice_phy_cfg_lane_e82x(struct ice_hw *hw, u8 port) - return; - } - -- quad = port / ICE_PORTS_PER_QUAD; -+ quad = ICE_GET_QUAD_NUM(port); - - err = ice_read_quad_reg_e82x(hw, quad, Q_REG_TX_MEM_GBL_CFG, &val); - if (err) { -@@ -2632,6 +2641,17 @@ ice_get_phy_tx_tstamp_ready_e82x(struct ice_hw *hw, u8 quad, u64 *tstamp_ready) - return 0; - } - -+/** -+ * ice_ptp_init_phy_e82x - initialize PHY parameters -+ * @ptp: pointer to the PTP HW struct -+ */ -+static void ice_ptp_init_phy_e82x(struct ice_ptp_hw *ptp) -+{ -+ ptp->phy_model = ICE_PHY_E82X; -+ ptp->num_lports = 8; -+ ptp->ports_per_phy = 8; -+} -+ - /* E810 functions - * - * The following functions operate on the E810 series devices which use -@@ -2859,17 +2879,21 @@ static int ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx) - } - - /** -- * ice_ptp_init_phy_e810 - Enable PTP function on the external PHY -+ * ice_ptp_init_phc_e810 - Perform E810 specific PHC initialization - * @hw: pointer to HW struct - * -- * Enable the timesync PTP functionality for the external PHY connected to -- * this function. -+ * Perform E810-specific PTP hardware clock initialization steps. -+ * -+ * Return: 0 on success, other error codes when failed to initialize TimeSync - */ --int ice_ptp_init_phy_e810(struct ice_hw *hw) -+static int ice_ptp_init_phc_e810(struct ice_hw *hw) - { - u8 tmr_idx; - int err; - -+ /* Ensure synchronization delay is zero */ -+ wr32(hw, GLTSYN_SYNC_DLAY, 0); -+ - tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; - err = ice_write_phy_reg_e810(hw, ETH_GLTSYN_ENA(tmr_idx), - GLTSYN_ENA_TSYN_ENA_M); -@@ -2880,21 +2904,6 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw) - return err; - } - --/** -- * ice_ptp_init_phc_e810 - Perform E810 specific PHC initialization -- * @hw: pointer to HW struct -- * -- * Perform E810-specific PTP hardware clock initialization steps. -- */ --static int ice_ptp_init_phc_e810(struct ice_hw *hw) --{ -- /* Ensure synchronization delay is zero */ -- wr32(hw, GLTSYN_SYNC_DLAY, 0); -- -- /* Initialize the PHY */ -- return ice_ptp_init_phy_e810(hw); --} -- - /** - * ice_ptp_prep_phy_time_e810 - Prepare PHY port with initial time - * @hw: Board private structure -@@ -3238,6 +3247,17 @@ int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data) - return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL); - } - -+/** -+ * ice_ptp_init_phy_e810 - initialize PHY parameters -+ * @ptp: pointer to the PTP HW struct -+ */ -+static void ice_ptp_init_phy_e810(struct ice_ptp_hw *ptp) -+{ -+ ptp->phy_model = ICE_PHY_E810; -+ ptp->num_lports = 8; -+ ptp->ports_per_phy = 4; -+} -+ - /* Device agnostic functions - * - * The following functions implement shared behavior common to both E822 and -@@ -3295,18 +3315,22 @@ void ice_ptp_unlock(struct ice_hw *hw) - } - - /** -- * ice_ptp_init_phy_model - Initialize hw->phy_model based on device type -+ * ice_ptp_init_hw - Initialize hw based on device type - * @hw: pointer to the HW structure - * -- * Determine the PHY model for the device, and initialize hw->phy_model -+ * Determine the PHY model for the device, and initialize hw - * for use by other functions. - */ --void ice_ptp_init_phy_model(struct ice_hw *hw) -+void ice_ptp_init_hw(struct ice_hw *hw) - { -- if (ice_is_e810(hw)) -- hw->phy_model = ICE_PHY_E810; -+ struct ice_ptp_hw *ptp = &hw->ptp; -+ -+ if (ice_is_e822(hw) || ice_is_e823(hw)) -+ ice_ptp_init_phy_e82x(ptp); -+ else if (ice_is_e810(hw)) -+ ice_ptp_init_phy_e810(ptp); - else -- hw->phy_model = ICE_PHY_E82X; -+ ptp->phy_model = ICE_PHY_UNSUP; - } - - /** -@@ -3327,7 +3351,7 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - ice_ptp_src_cmd(hw, cmd); - - /* Next, prepare the ports */ -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_port_cmd_e810(hw, cmd); - break; -@@ -3379,7 +3403,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time) - - /* PHY timers */ - /* Fill Rx and Tx ports and send msg to PHY */ -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF); - break; -@@ -3421,7 +3445,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval)); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval)); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_prep_phy_incval_e810(hw, incval); - break; -@@ -3487,7 +3511,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - err = ice_ptp_prep_phy_adj_e810(hw, adj); - break; -@@ -3517,7 +3541,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - */ - int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_read_phy_tstamp_e810(hw, block, idx, tstamp); - case ICE_PHY_E82X: -@@ -3545,7 +3569,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - */ - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_clear_phy_tstamp_e810(hw, block, idx); - case ICE_PHY_E82X: -@@ -3606,7 +3630,7 @@ int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) - */ - void ice_ptp_reset_ts_memory(struct ice_hw *hw) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E82X: - ice_ptp_reset_ts_memory_e82x(hw); - break; -@@ -3632,7 +3656,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) - /* Clear event err indications for auxiliary pins */ - (void)rd32(hw, GLTSYN_STAT(src_idx)); - -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_ptp_init_phc_e810(hw); - case ICE_PHY_E82X: -@@ -3655,7 +3679,7 @@ int ice_ptp_init_phc(struct ice_hw *hw) - */ - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - { -- switch (hw->phy_model) { -+ switch (hw->ptp.phy_model) { - case ICE_PHY_E810: - return ice_get_phy_tx_tstamp_ready_e810(hw, block, - tstamp_ready); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 7e8fd369ef7c..d788221eba57 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -211,6 +211,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp); - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx); - void ice_ptp_reset_ts_memory(struct ice_hw *hw); - int ice_ptp_init_phc(struct ice_hw *hw); -+void ice_ptp_init_hw(struct ice_hw *hw); - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready); - - /* E822 family functions */ -@@ -265,7 +266,6 @@ int ice_phy_cfg_tx_offset_e82x(struct ice_hw *hw, u8 port); - int ice_phy_cfg_rx_offset_e82x(struct ice_hw *hw, u8 port); - - /* E810 family functions */ --int ice_ptp_init_phy_e810(struct ice_hw *hw); - int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); - int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); - int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data); -@@ -280,8 +280,6 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, - u8 *ref_state, u8 *eec_mode, s64 *phase_offset, - enum dpll_lock_status *dpll_state); - int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); -- --void ice_ptp_init_phy_model(struct ice_hw *hw); - int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, - unsigned long *caps); - -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 28e47bb78eaf..6fc4cd1030d0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -807,6 +807,9 @@ struct ice_mbx_data { - u16 async_watermark_val; - }; - -+#define ICE_PORTS_PER_QUAD 4 -+#define ICE_GET_QUAD_NUM(port) ((port) / ICE_PORTS_PER_QUAD) -+ - /* PHY model */ - enum ice_phy_model { - ICE_PHY_UNSUP = -1, -@@ -814,6 +817,12 @@ enum ice_phy_model { - ICE_PHY_E82X, - }; - -+struct ice_ptp_hw { -+ enum ice_phy_model phy_model; -+ u8 num_lports; -+ u8 ports_per_phy; -+}; -+ - /* Port hardware description */ - struct ice_hw { - u8 __iomem *hw_addr; -@@ -835,7 +844,6 @@ struct ice_hw { - u8 revision_id; - - u8 pf_id; /* device profile info */ -- enum ice_phy_model phy_model; - - u16 max_burst_size; /* driver sets this value */ - -@@ -896,12 +904,7 @@ struct ice_hw { - /* INTRL granularity in 1 us */ - u8 intrl_gran; - --#define ICE_MAX_QUAD 2 --#define ICE_QUADS_PER_PHY_E82X 2 --#define ICE_PORTS_PER_PHY_E82X 8 --#define ICE_PORTS_PER_QUAD 4 --#define ICE_PORTS_PER_PHY_E810 4 --#define ICE_NUM_EXTERNAL_PORTS (ICE_MAX_QUAD * ICE_PORTS_PER_QUAD) -+ struct ice_ptp_hw ptp; - - /* Active package version (currently active) */ - struct ice_pkg_ver active_pkg_ver; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch b/kernel-std/debian/patches/ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch deleted file mode 100644 index f7e38700..00000000 --- a/kernel-std/debian/patches/ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch +++ /dev/null @@ -1,80 +0,0 @@ -From cd12b5c8239993e395436ff9a01b524103aa0641 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Tue, 28 May 2024 16:03:56 -0700 -Subject: [PATCH] ice: Introduce ice_get_base_incval() helper - -Add a new helper for getting base clock increment value for specific HW. - -Reviewed-by: Przemek Kitszel -Reviewed-by: Arkadiusz Kubalewski -Signed-off-by: Karol Kolacinski -Tested-by: Pucha Himasekhar Reddy -Signed-off-by: Jacob Keller -Link: https://lore.kernel.org/r/20240528-next-2024-05-28-ptp-refactors-v1-6-c082739bb6f6@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 1f374d57c39386520586539641cafc999d0f3ef5) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 9 +-------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 18 ++++++++++++++++++ - 2 files changed, 19 insertions(+), 8 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index bb1572a353d0..44b8fc8021cd 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -7,8 +7,6 @@ - - #define E810_OUT_PROP_DELAY_NS 1 - --#define UNKNOWN_INCVAL_E82X 0x100000000ULL -- - static const struct ptp_pin_desc ice_pin_desc_e810t[] = { - /* name idx func chan */ - { "GNSS", GNSS, PTP_PF_EXTTS, 0, { 0, } }, -@@ -1229,12 +1227,7 @@ static u64 ice_base_incval(struct ice_pf *pf) - struct ice_hw *hw = &pf->hw; - u64 incval; - -- if (ice_is_e810(hw)) -- incval = ICE_PTP_NOMINAL_INCVAL_E810; -- else if (ice_e82x_time_ref(hw) < NUM_ICE_TIME_REF_FREQ) -- incval = ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); -- else -- incval = UNKNOWN_INCVAL_E82X; -+ incval = ice_get_base_incval(hw); - - dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", - incval); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index d788221eba57..749a3f2d8293 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -283,6 +283,24 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, - unsigned long *caps); - -+/** -+ * ice_get_base_incval - Get base clock increment value -+ * @hw: pointer to the HW struct -+ * -+ * Return: base clock increment value for supported PHYs, 0 otherwise -+ */ -+static inline u64 ice_get_base_incval(struct ice_hw *hw) -+{ -+ switch (hw->ptp.phy_model) { -+ case ICE_PHY_E810: -+ return ICE_PTP_NOMINAL_INCVAL_E810; -+ case ICE_PHY_E82X: -+ return ice_e82x_nominal_incval(ice_e82x_time_ref(hw)); -+ default: -+ return 0; -+ } -+} -+ - #define PFTSYN_SEM_BYTES 4 - - #define ICE_PTP_CLOCK_INDEX_0 0x00 --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch b/kernel-std/debian/patches/ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch deleted file mode 100644 index ee86b103..00000000 --- a/kernel-std/debian/patches/ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 437206483113743a4ef40c2f7e14f09705049672 Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Mon, 2 Sep 2024 03:18:08 +0000 -Subject: [PATCH] ice:modify the ice driver version to stx.4 - -Change the ice driver min version to stx.4 because we back ported -the upstream 36 commits to our code base to support the customer's -requirement. - -The ice driver version should be ice-6.6.40-stx.4. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 5807b310bdca..7163d25405f8 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.3" -+ICE_STX = "-stx.4" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch b/kernel-std/debian/patches/ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch deleted file mode 100644 index c599a7df..00000000 --- a/kernel-std/debian/patches/ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch +++ /dev/null @@ -1,541 +0,0 @@ -From cff205e9f2d09efb61ca647dfd01b5a229952e22 Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:35 +0100 -Subject: [PATCH 01/46] dpll: documentation on DPLL subsystem interface - -Add documentation explaining common netlink interface to configure DPLL -devices and monitoring events. Common way to implement DPLL device in -a driver is also covered. - -Co-developed-by: Bagas Sanjaya -Signed-off-by: Bagas Sanjaya -Signed-off-by: Vadim Fedorenko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit dbb291f19393b628a1d15b94a78d471b9d94e532) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 497 +++++++++++++++++++++++++++++ - Documentation/driver-api/index.rst | 1 + - 2 files changed, 498 insertions(+) - create mode 100644 Documentation/driver-api/dpll.rst - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -new file mode 100644 -index 000000000000..bb52f1b8c0be ---- /dev/null -+++ b/Documentation/driver-api/dpll.rst -@@ -0,0 +1,497 @@ -+.. SPDX-License-Identifier: GPL-2.0 -+ -+=============================== -+The Linux kernel dpll subsystem -+=============================== -+ -+DPLL -+==== -+ -+PLL - Phase Locked Loop is an electronic circuit which syntonizes clock -+signal of a device with an external clock signal. Effectively enabling -+device to run on the same clock signal beat as provided on a PLL input. -+ -+DPLL - Digital Phase Locked Loop is an integrated circuit which in -+addition to plain PLL behavior incorporates a digital phase detector -+and may have digital divider in the loop. As a result, the frequency on -+DPLL's input and output may be configurable. -+ -+Subsystem -+========= -+ -+The main purpose of dpll subsystem is to provide general interface -+to configure devices that use any kind of Digital PLL and could use -+different sources of input signal to synchronize to, as well as -+different types of outputs. -+The main interface is NETLINK_GENERIC based protocol with an event -+monitoring multicast group defined. -+ -+Device object -+============= -+ -+Single dpll device object means single Digital PLL circuit and bunch of -+connected pins. -+It reports the supported modes of operation and current status to the -+user in response to the `do` request of netlink command -+``DPLL_CMD_DEVICE_GET`` and list of dplls registered in the subsystem -+with `dump` netlink request of the same command. -+Changing the configuration of dpll device is done with `do` request of -+netlink ``DPLL_CMD_DEVICE_SET`` command. -+A device handle is ``DPLL_A_ID``, it shall be provided to get or set -+configuration of particular device in the system. It can be obtained -+with a ``DPLL_CMD_DEVICE_GET`` `dump` request or -+a ``DPLL_CMD_DEVICE_ID_GET`` `do` request, where the one must provide -+attributes that result in single device match. -+ -+Pin object -+========== -+ -+A pin is amorphic object which represents either input or output, it -+could be internal component of the device, as well as externally -+connected. -+The number of pins per dpll vary, but usually multiple pins shall be -+provided for a single dpll device. -+Pin's properties, capabilities and status is provided to the user in -+response to `do` request of netlink ``DPLL_CMD_PIN_GET`` command. -+It is also possible to list all the pins that were registered in the -+system with `dump` request of ``DPLL_CMD_PIN_GET`` command. -+Configuration of a pin can be changed by `do` request of netlink -+``DPLL_CMD_PIN_SET`` command. -+Pin handle is a ``DPLL_A_PIN_ID``, it shall be provided to get or set -+configuration of particular pin in the system. It can be obtained with -+``DPLL_CMD_PIN_GET`` `dump` request or ``DPLL_CMD_PIN_ID_GET`` `do` -+request, where user provides attributes that result in single pin match. -+ -+Pin selection -+============= -+ -+In general, selected pin (the one which signal is driving the dpll -+device) can be obtained from ``DPLL_A_PIN_STATE`` attribute, and only -+one pin shall be in ``DPLL_PIN_STATE_CONNECTED`` state for any dpll -+device. -+ -+Pin selection can be done either manually or automatically, depending -+on hardware capabilities and active dpll device work mode -+(``DPLL_A_MODE`` attribute). The consequence is that there are -+differences for each mode in terms of available pin states, as well as -+for the states the user can request for a dpll device. -+ -+In manual mode (``DPLL_MODE_MANUAL``) the user can request or receive -+one of following pin states: -+ -+- ``DPLL_PIN_STATE_CONNECTED`` - the pin is used to drive dpll device -+- ``DPLL_PIN_STATE_DISCONNECTED`` - the pin is not used to drive dpll -+ device -+ -+In automatic mode (``DPLL_MODE_AUTOMATIC``) the user can request or -+receive one of following pin states: -+ -+- ``DPLL_PIN_STATE_SELECTABLE`` - the pin shall be considered as valid -+ input for automatic selection algorithm -+- ``DPLL_PIN_STATE_DISCONNECTED`` - the pin shall be not considered as -+ a valid input for automatic selection algorithm -+ -+In automatic mode (``DPLL_MODE_AUTOMATIC``) the user can only receive -+pin state ``DPLL_PIN_STATE_CONNECTED`` once automatic selection -+algorithm locks a dpll device with one of the inputs. -+ -+Shared pins -+=========== -+ -+A single pin object can be attached to multiple dpll devices. -+Then there are two groups of configuration knobs: -+ -+1) Set on a pin - the configuration affects all dpll devices pin is -+ registered to (i.e., ``DPLL_A_PIN_FREQUENCY``), -+2) Set on a pin-dpll tuple - the configuration affects only selected -+ dpll device (i.e., ``DPLL_A_PIN_PRIO``, ``DPLL_A_PIN_STATE``, -+ ``DPLL_A_PIN_DIRECTION``). -+ -+MUX-type pins -+============= -+ -+A pin can be MUX-type, it aggregates child pins and serves as a pin -+multiplexer. One or more pins are registered with MUX-type instead of -+being directly registered to a dpll device. -+Pins registered with a MUX-type pin provide user with additional nested -+attribute ``DPLL_A_PIN_PARENT_PIN`` for each parent they were registered -+with. -+If a pin was registered with multiple parent pins, they behave like a -+multiple output multiplexer. In this case output of a -+``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested -+attributes with current state related to each parent, like: -+ -+'pin': [{{ -+ 'clock-id': 282574471561216, -+ 'module-name': 'ice', -+ 'capabilities': 4, -+ 'id': 13, -+ 'parent-pin': [ -+ {'parent-id': 2, 'state': 'connected'}, -+ {'parent-id': 3, 'state': 'disconnected'} -+ ], -+ 'type': 'synce-eth-port' -+ }}] -+ -+Only one child pin can provide its signal to the parent MUX-type pin at -+a time, the selection is done by requesting change of a child pin state -+on desired parent, with the use of ``DPLL_A_PIN_PARENT`` nested -+attribute. Example of netlink `set state on parent pin` message format: -+ -+ ========================== ============================================= -+ ``DPLL_A_PIN_ID`` child pin id -+ ``DPLL_A_PIN_PARENT_PIN`` nested attribute for requesting configuration -+ related to parent pin -+ ``DPLL_A_PIN_PARENT_ID`` parent pin id -+ ``DPLL_A_PIN_STATE`` requested pin state on parent -+ ========================== ============================================= -+ -+Pin priority -+============ -+ -+Some devices might offer a capability of automatic pin selection mode -+(enum value ``DPLL_MODE_AUTOMATIC`` of ``DPLL_A_MODE`` attribute). -+Usually, automatic selection is performed on the hardware level, which -+means only pins directly connected to the dpll can be used for automatic -+input pin selection. -+In automatic selection mode, the user cannot manually select a input -+pin for the device, instead the user shall provide all directly -+connected pins with a priority ``DPLL_A_PIN_PRIO``, the device would -+pick a highest priority valid signal and use it to control the DPLL -+device. Example of netlink `set priority on parent pin` message format: -+ -+ ============================ ============================================= -+ ``DPLL_A_PIN_ID`` configured pin id -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attribute for requesting configuration -+ related to parent dpll device -+ ``DPLL_A_PIN_PARENT_ID`` parent dpll device id -+ ``DPLL_A_PIN_PRIO`` requested pin prio on parent dpll -+ ============================ ============================================= -+ -+Child pin of MUX-type pin is not capable of automatic input pin selection, -+in order to configure active input of a MUX-type pin, the user needs to -+request desired pin state of the child pin on the parent pin, -+as described in the ``MUX-type pins`` chapter. -+ -+Configuration commands group -+============================ -+ -+Configuration commands are used to get information about registered -+dpll devices (and pins), as well as set configuration of device or pins. -+As dpll devices must be abstracted and reflect real hardware, -+there is no way to add new dpll device via netlink from user space and -+each device should be registered by its driver. -+ -+All netlink commands require ``GENL_ADMIN_PERM``. This is to prevent -+any spamming/DoS from unauthorized userspace applications. -+ -+List of netlink commands with possible attributes -+================================================= -+ -+Constants identifying command types for dpll device uses a -+``DPLL_CMD_`` prefix and suffix according to command purpose. -+The dpll device related attributes use a ``DPLL_A_`` prefix and -+suffix according to attribute purpose. -+ -+ ==================================== ================================= -+ ``DPLL_CMD_DEVICE_ID_GET`` command to get device ID -+ ``DPLL_A_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_TYPE`` attr type of dpll device -+ ==================================== ================================= -+ -+ ==================================== ================================= -+ ``DPLL_CMD_DEVICE_GET`` command to get device info or -+ dump list of available devices -+ ``DPLL_A_ID`` attr unique dpll device ID -+ ``DPLL_A_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_MODE`` attr selection mode -+ ``DPLL_A_MODE_SUPPORTED`` attr available selection modes -+ ``DPLL_A_LOCK_STATUS`` attr dpll device lock status -+ ``DPLL_A_TEMP`` attr device temperature info -+ ``DPLL_A_TYPE`` attr type of dpll device -+ ==================================== ================================= -+ -+ ==================================== ================================= -+ ``DPLL_CMD_DEVICE_SET`` command to set dpll device config -+ ``DPLL_A_ID`` attr internal dpll device index -+ ``DPLL_A_MODE`` attr selection mode to configure -+ ==================================== ================================= -+ -+Constants identifying command types for pins uses a -+``DPLL_CMD_PIN_`` prefix and suffix according to command purpose. -+The pin related attributes use a ``DPLL_A_PIN_`` prefix and suffix -+according to attribute purpose. -+ -+ ==================================== ================================= -+ ``DPLL_CMD_PIN_ID_GET`` command to get pin ID -+ ``DPLL_A_PIN_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_PIN_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided -+ by registerer -+ ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided -+ by registerer -+ ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided -+ by registerer -+ ``DPLL_A_PIN_TYPE`` attr type of a pin -+ ==================================== ================================= -+ -+ ==================================== ================================== -+ ``DPLL_CMD_PIN_GET`` command to get pin info or dump -+ list of available pins -+ ``DPLL_A_PIN_ID`` attr unique a pin ID -+ ``DPLL_A_PIN_MODULE_NAME`` attr module name of registerer -+ ``DPLL_A_PIN_CLOCK_ID`` attr Unique Clock Identifier -+ (EUI-64), as defined by the -+ IEEE 1588 standard -+ ``DPLL_A_PIN_BOARD_LABEL`` attr pin board label provided -+ by registerer -+ ``DPLL_A_PIN_PANEL_LABEL`` attr pin panel label provided -+ by registerer -+ ``DPLL_A_PIN_PACKAGE_LABEL`` attr pin package label provided -+ by registerer -+ ``DPLL_A_PIN_TYPE`` attr type of a pin -+ ``DPLL_A_PIN_FREQUENCY`` attr current frequency of a pin -+ ``DPLL_A_PIN_FREQUENCY_SUPPORTED`` nested attr provides supported -+ frequencies -+ ``DPLL_A_PIN_ANY_FREQUENCY_MIN`` attr minimum value of frequency -+ ``DPLL_A_PIN_ANY_FREQUENCY_MAX`` attr maximum value of frequency -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent device -+ the pin is connected with -+ ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id -+ ``DPLL_A_PIN_PRIO`` attr priority of pin on the -+ dpll device -+ ``DPLL_A_PIN_STATE`` attr state of pin on the parent -+ dpll device -+ ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the -+ parent dpll device -+ ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin -+ the pin is connected with -+ ``DPLL_A_PIN_PARENT_ID`` attr parent pin id -+ ``DPLL_A_PIN_STATE`` attr state of pin on the parent -+ pin -+ ``DPLL_A_PIN_CAPABILITIES`` attr bitmask of pin capabilities -+ ==================================== ================================== -+ -+ ==================================== ================================= -+ ``DPLL_CMD_PIN_SET`` command to set pins configuration -+ ``DPLL_A_PIN_ID`` attr unique a pin ID -+ ``DPLL_A_PIN_FREQUENCY`` attr requested frequency of a pin -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent dpll -+ device configuration request -+ ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id -+ ``DPLL_A_PIN_DIRECTION`` attr requested direction of a pin -+ ``DPLL_A_PIN_PRIO`` attr requested priority of pin on -+ the dpll device -+ ``DPLL_A_PIN_STATE`` attr requested state of pin on -+ the dpll device -+ ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin -+ configuration request -+ ``DPLL_A_PIN_PARENT_ID`` attr parent pin id -+ ``DPLL_A_PIN_STATE`` attr requested state of pin on -+ parent pin -+ ==================================== ================================= -+ -+Netlink dump requests -+===================== -+ -+The ``DPLL_CMD_DEVICE_GET`` and ``DPLL_CMD_PIN_GET`` commands are -+capable of dump type netlink requests, in which case the response is in -+the same format as for their ``do`` request, but every device or pin -+registered in the system is returned. -+ -+SET commands format -+=================== -+ -+``DPLL_CMD_DEVICE_SET`` - to target a dpll device, the user provides -+``DPLL_A_ID``, which is unique identifier of dpll device in the system, -+as well as parameter being configured (``DPLL_A_MODE``). -+ -+``DPLL_CMD_PIN_SET`` - to target a pin user must provide a -+``DPLL_A_PIN_ID``, which is unique identifier of a pin in the system. -+Also configured pin parameters must be added. -+If ``DPLL_A_PIN_FREQUENCY`` is configured, this affects all the dpll -+devices that are connected with the pin, that is why frequency attribute -+shall not be enclosed in ``DPLL_A_PIN_PARENT_DEVICE``. -+Other attributes: ``DPLL_A_PIN_PRIO``, ``DPLL_A_PIN_STATE`` or -+``DPLL_A_PIN_DIRECTION`` must be enclosed in -+``DPLL_A_PIN_PARENT_DEVICE`` as their configuration relates to only one -+of parent dplls, targeted by ``DPLL_A_PIN_PARENT_ID`` attribute which is -+also required inside that nest. -+For MUX-type pins the ``DPLL_A_PIN_STATE`` attribute is configured in -+similar way, by enclosing required state in ``DPLL_A_PIN_PARENT_PIN`` -+nested attribute and targeted parent pin id in ``DPLL_A_PIN_PARENT_ID``. -+ -+In general, it is possible to configure multiple parameters at once, but -+internally each parameter change will be invoked separately, where order -+of configuration is not guaranteed by any means. -+ -+Configuration pre-defined enums -+=============================== -+ -+.. kernel-doc:: include/uapi/linux/dpll.h -+ -+Notifications -+============= -+ -+dpll device can provide notifications regarding status changes of the -+device, i.e. lock status changes, input/output changes or other alarms. -+There is one multicast group that is used to notify user-space apps via -+netlink socket: ``DPLL_MCGRP_MONITOR`` -+ -+Notifications messages: -+ -+ ============================== ===================================== -+ ``DPLL_CMD_DEVICE_CREATE_NTF`` dpll device was created -+ ``DPLL_CMD_DEVICE_DELETE_NTF`` dpll device was deleted -+ ``DPLL_CMD_DEVICE_CHANGE_NTF`` dpll device has changed -+ ``DPLL_CMD_PIN_CREATE_NTF`` dpll pin was created -+ ``DPLL_CMD_PIN_DELETE_NTF`` dpll pin was deleted -+ ``DPLL_CMD_PIN_CHANGE_NTF`` dpll pin has changed -+ ============================== ===================================== -+ -+Events format is the same as for the corresponding get command. -+Format of ``DPLL_CMD_DEVICE_`` events is the same as response of -+``DPLL_CMD_DEVICE_GET``. -+Format of ``DPLL_CMD_PIN_`` events is same as response of -+``DPLL_CMD_PIN_GET``. -+ -+Device driver implementation -+============================ -+ -+Device is allocated by dpll_device_get() call. Second call with the -+same arguments will not create new object but provides pointer to -+previously created device for given arguments, it also increases -+refcount of that object. -+Device is deallocated by dpll_device_put() call, which first -+decreases the refcount, once refcount is cleared the object is -+destroyed. -+ -+Device should implement set of operations and register device via -+dpll_device_register() at which point it becomes available to the -+users. Multiple driver instances can obtain reference to it with -+dpll_device_get(), as well as register dpll device with their own -+ops and priv. -+ -+The pins are allocated separately with dpll_pin_get(), it works -+similarly to dpll_device_get(). Function first creates object and then -+for each call with the same arguments only the object refcount -+increases. Also dpll_pin_put() works similarly to dpll_device_put(). -+ -+A pin can be registered with parent dpll device or parent pin, depending -+on hardware needs. Each registration requires registerer to provide set -+of pin callbacks, and private data pointer for calling them: -+ -+- dpll_pin_register() - register pin with a dpll device, -+- dpll_pin_on_pin_register() - register pin with another MUX type pin. -+ -+Notifications of adding or removing dpll devices are created within -+subsystem itself. -+Notifications about registering/deregistering pins are also invoked by -+the subsystem. -+Notifications about status changes either of dpll device or a pin are -+invoked in two ways: -+ -+- after successful change was requested on dpll subsystem, the subsystem -+ calls corresponding notification, -+- requested by device driver with dpll_device_change_ntf() or -+ dpll_pin_change_ntf() when driver informs about the status change. -+ -+The device driver using dpll interface is not required to implement all -+the callback operation. Nevertheless, there are few required to be -+implemented. -+Required dpll device level callback operations: -+ -+- ``.mode_get``, -+- ``.lock_status_get``. -+ -+Required pin level callback operations: -+ -+- ``.state_on_dpll_get`` (pins registered with dpll device), -+- ``.state_on_pin_get`` (pins registered with parent pin), -+- ``.direction_get``. -+ -+Every other operation handler is checked for existence and -+``-EOPNOTSUPP`` is returned in case of absence of specific handler. -+ -+The simplest implementation is in the OCP TimeCard driver. The ops -+structures are defined like this: -+ -+.. code-block:: c -+ static const struct dpll_device_ops dpll_ops = { -+ .lock_status_get = ptp_ocp_dpll_lock_status_get, -+ .mode_get = ptp_ocp_dpll_mode_get, -+ .mode_supported = ptp_ocp_dpll_mode_supported, -+ }; -+ -+ static const struct dpll_pin_ops dpll_pins_ops = { -+ .frequency_get = ptp_ocp_dpll_frequency_get, -+ .frequency_set = ptp_ocp_dpll_frequency_set, -+ .direction_get = ptp_ocp_dpll_direction_get, -+ .direction_set = ptp_ocp_dpll_direction_set, -+ .state_on_dpll_get = ptp_ocp_dpll_state_get, -+ }; -+ -+The registration part is then looks like this part: -+ -+.. code-block:: c -+ clkid = pci_get_dsn(pdev); -+ bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); -+ if (IS_ERR(bp->dpll)) { -+ err = PTR_ERR(bp->dpll); -+ dev_err(&pdev->dev, "dpll_device_alloc failed\n"); -+ goto out; -+ } -+ -+ err = dpll_device_register(bp->dpll, DPLL_TYPE_PPS, &dpll_ops, bp); -+ if (err) -+ goto out; -+ -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE, &bp->sma[i].dpll_prop); -+ if (IS_ERR(bp->sma[i].dpll_pin)) { -+ err = PTR_ERR(bp->dpll); -+ goto out_dpll; -+ } -+ -+ err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, -+ &bp->sma[i]); -+ if (err) { -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ goto out_dpll; -+ } -+ } -+ -+In the error path we have to rewind every allocation in the reverse order: -+ -+.. code-block:: c -+ while (i) { -+ --i; -+ dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ } -+ dpll_device_put(bp->dpll); -+ -+More complex example can be found in Intel's ICE driver or nVidia's mlx5 driver. -+ -+SyncE enablement -+================ -+For SyncE enablement it is required to allow control over dpll device -+for a software application which monitors and configures the inputs of -+dpll device in response to current state of a dpll device and its -+inputs. -+In such scenario, dpll device input signal shall be also configurable -+to drive dpll with signal recovered from the PHY netdevice. -+This is done by exposing a pin to the netdevice - attaching pin to the -+netdevice itself with -+``netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin)``. -+Exposed pin id handle ``DPLL_A_PIN_ID`` is then identifiable by the user -+as it is attached to rtnetlink respond to get ``RTM_NEWLINK`` command in -+nested attribute ``IFLA_DPLL_PIN``. -diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst -index 1e16a40da3ba..f549a68951d7 100644 ---- a/Documentation/driver-api/index.rst -+++ b/Documentation/driver-api/index.rst -@@ -114,6 +114,7 @@ available subsections can be seen below. - zorro - hte/index - wmi -+ dpll - - .. only:: subproject and html - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch b/kernel-std/debian/patches/ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch deleted file mode 100644 index 637de31c..00000000 --- a/kernel-std/debian/patches/ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch +++ /dev/null @@ -1,956 +0,0 @@ -From 90b97a5ba43cb28a6b64e8f7e8dc469edca3ad5e Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:36 +0100 -Subject: [PATCH 02/46] dpll: spec: Add Netlink spec in YAML - -Add a protocol spec for DPLL. -Add code generated from the spec. - -Signed-off-by: Jakub Kicinski -Signed-off-by: Michal Michalik -Signed-off-by: Vadim Fedorenko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 3badff3a25d815e915d89565a0c82dec608a8d2b) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/dpll.yaml | 488 ++++++++++++++++++++++++++ - drivers/dpll/dpll_nl.c | 162 +++++++++ - drivers/dpll/dpll_nl.h | 51 +++ - include/uapi/linux/dpll.h | 201 +++++++++++ - 4 files changed, 902 insertions(+) - create mode 100644 Documentation/netlink/specs/dpll.yaml - create mode 100644 drivers/dpll/dpll_nl.c - create mode 100644 drivers/dpll/dpll_nl.h - create mode 100644 include/uapi/linux/dpll.h - -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -new file mode 100644 -index 000000000000..8b86b28b47a6 ---- /dev/null -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -0,0 +1,488 @@ -+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) -+ -+name: dpll -+ -+doc: DPLL subsystem. -+ -+definitions: -+ - -+ type: enum -+ name: mode -+ doc: | -+ working modes a dpll can support, differentiates if and how dpll selects -+ one of its inputs to syntonize with it, valid values for DPLL_A_MODE -+ attribute -+ entries: -+ - -+ name: manual -+ doc: input can be only selected by sending a request to dpll -+ value: 1 -+ - -+ name: automatic -+ doc: highest prio input pin auto selected by dpll -+ render-max: true -+ - -+ type: enum -+ name: lock-status -+ doc: | -+ provides information of dpll device lock status, valid values for -+ DPLL_A_LOCK_STATUS attribute -+ entries: -+ - -+ name: unlocked -+ doc: | -+ dpll was not yet locked to any valid input (or forced by setting -+ DPLL_A_MODE to DPLL_MODE_DETACHED) -+ value: 1 -+ - -+ name: locked -+ doc: | -+ dpll is locked to a valid signal, but no holdover available -+ - -+ name: locked-ho-acq -+ doc: | -+ dpll is locked and holdover acquired -+ - -+ name: holdover -+ doc: | -+ dpll is in holdover state - lost a valid lock or was forced -+ by disconnecting all the pins (latter possible only -+ when dpll lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ, -+ if dpll lock-state was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the -+ dpll's lock-state shall remain DPLL_LOCK_STATUS_UNLOCKED) -+ render-max: true -+ - -+ type: const -+ name: temp-divider -+ value: 1000 -+ doc: | -+ temperature divider allowing userspace to calculate the -+ temperature as float with three digit decimal precision. -+ Value of (DPLL_A_TEMP / DPLL_TEMP_DIVIDER) is integer part of -+ temperature value. -+ Value of (DPLL_A_TEMP % DPLL_TEMP_DIVIDER) is fractional part of -+ temperature value. -+ - -+ type: enum -+ name: type -+ doc: type of dpll, valid values for DPLL_A_TYPE attribute -+ entries: -+ - -+ name: pps -+ doc: dpll produces Pulse-Per-Second signal -+ value: 1 -+ - -+ name: eec -+ doc: dpll drives the Ethernet Equipment Clock -+ render-max: true -+ - -+ type: enum -+ name: pin-type -+ doc: | -+ defines possible types of a pin, valid values for DPLL_A_PIN_TYPE -+ attribute -+ entries: -+ - -+ name: mux -+ doc: aggregates another layer of selectable pins -+ value: 1 -+ - -+ name: ext -+ doc: external input -+ - -+ name: synce-eth-port -+ doc: ethernet port PHY's recovered clock -+ - -+ name: int-oscillator -+ doc: device internal oscillator -+ - -+ name: gnss -+ doc: GNSS recovered clock -+ render-max: true -+ - -+ type: enum -+ name: pin-direction -+ doc: | -+ defines possible direction of a pin, valid values for -+ DPLL_A_PIN_DIRECTION attribute -+ entries: -+ - -+ name: input -+ doc: pin used as a input of a signal -+ value: 1 -+ - -+ name: output -+ doc: pin used to output the signal -+ render-max: true -+ - -+ type: const -+ name: pin-frequency-1-hz -+ value: 1 -+ - -+ type: const -+ name: pin-frequency-10-khz -+ value: 10000 -+ - -+ type: const -+ name: pin-frequency-77_5-khz -+ value: 77500 -+ - -+ type: const -+ name: pin-frequency-10-mhz -+ value: 10000000 -+ - -+ type: enum -+ name: pin-state -+ doc: | -+ defines possible states of a pin, valid values for -+ DPLL_A_PIN_STATE attribute -+ entries: -+ - -+ name: connected -+ doc: pin connected, active input of phase locked loop -+ value: 1 -+ - -+ name: disconnected -+ doc: pin disconnected, not considered as a valid input -+ - -+ name: selectable -+ doc: pin enabled for automatic input selection -+ render-max: true -+ - -+ type: flags -+ name: pin-capabilities -+ doc: | -+ defines possible capabilities of a pin, valid flags on -+ DPLL_A_PIN_CAPABILITIES attribute -+ entries: -+ - -+ name: direction-can-change -+ doc: pin direction can be changed -+ - -+ name: priority-can-change -+ doc: pin priority can be changed -+ - -+ name: state-can-change -+ doc: pin state can be changed -+ -+attribute-sets: -+ - -+ name: dpll -+ enum-name: dpll_a -+ attributes: -+ - -+ name: id -+ type: u32 -+ - -+ name: module-name -+ type: string -+ - -+ name: pad -+ type: pad -+ - -+ name: clock-id -+ type: u64 -+ - -+ name: mode -+ type: u32 -+ enum: mode -+ - -+ name: mode-supported -+ type: u32 -+ enum: mode -+ multi-attr: true -+ - -+ name: lock-status -+ type: u32 -+ enum: lock-status -+ - -+ name: temp -+ type: s32 -+ - -+ name: type -+ type: u32 -+ enum: type -+ - -+ name: pin -+ enum-name: dpll_a_pin -+ attributes: -+ - -+ name: id -+ type: u32 -+ - -+ name: parent-id -+ type: u32 -+ - -+ name: module-name -+ type: string -+ - -+ name: pad -+ type: pad -+ - -+ name: clock-id -+ type: u64 -+ - -+ name: board-label -+ type: string -+ - -+ name: panel-label -+ type: string -+ - -+ name: package-label -+ type: string -+ - -+ name: type -+ type: u32 -+ enum: pin-type -+ - -+ name: direction -+ type: u32 -+ enum: pin-direction -+ - -+ name: frequency -+ type: u64 -+ - -+ name: frequency-supported -+ type: nest -+ multi-attr: true -+ nested-attributes: frequency-range -+ - -+ name: frequency-min -+ type: u64 -+ - -+ name: frequency-max -+ type: u64 -+ - -+ name: prio -+ type: u32 -+ - -+ name: state -+ type: u32 -+ enum: pin-state -+ - -+ name: capabilities -+ type: u32 -+ - -+ name: parent-device -+ type: nest -+ multi-attr: true -+ nested-attributes: pin-parent-device -+ - -+ name: parent-pin -+ type: nest -+ multi-attr: true -+ nested-attributes: pin-parent-pin -+ - -+ name: pin-parent-device -+ subset-of: pin -+ attributes: -+ - -+ name: parent-id -+ type: u32 -+ - -+ name: direction -+ type: u32 -+ - -+ name: prio -+ type: u32 -+ - -+ name: state -+ type: u32 -+ - -+ name: pin-parent-pin -+ subset-of: pin -+ attributes: -+ - -+ name: parent-id -+ type: u32 -+ - -+ name: state -+ type: u32 -+ - -+ name: frequency-range -+ subset-of: pin -+ attributes: -+ - -+ name: frequency-min -+ type: u64 -+ - -+ name: frequency-max -+ type: u64 -+ -+operations: -+ enum-name: dpll_cmd -+ list: -+ - -+ name: device-id-get -+ doc: | -+ Get id of dpll device that matches given attributes -+ attribute-set: dpll -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-lock-doit -+ post: dpll-unlock-doit -+ request: -+ attributes: -+ - module-name -+ - clock-id -+ - type -+ reply: -+ attributes: -+ - id -+ -+ - -+ name: device-get -+ doc: | -+ Get list of DPLL devices (dump) or attributes of a single dpll device -+ attribute-set: dpll -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pre-doit -+ post: dpll-post-doit -+ request: -+ attributes: -+ - id -+ reply: &dev-attrs -+ attributes: -+ - id -+ - module-name -+ - mode -+ - mode-supported -+ - lock-status -+ - temp -+ - clock-id -+ - type -+ -+ dump: -+ pre: dpll-lock-dumpit -+ post: dpll-unlock-dumpit -+ reply: *dev-attrs -+ -+ - -+ name: device-set -+ doc: Set attributes for a DPLL device -+ attribute-set: dpll -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pre-doit -+ post: dpll-post-doit -+ request: -+ attributes: -+ - id -+ - -+ name: device-create-ntf -+ doc: Notification about device appearing -+ notify: device-get -+ mcgrp: monitor -+ - -+ name: device-delete-ntf -+ doc: Notification about device disappearing -+ notify: device-get -+ mcgrp: monitor -+ - -+ name: device-change-ntf -+ doc: Notification about device configuration being changed -+ notify: device-get -+ mcgrp: monitor -+ - -+ name: pin-id-get -+ doc: | -+ Get id of a pin that matches given attributes -+ attribute-set: pin -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-lock-doit -+ post: dpll-unlock-doit -+ request: -+ attributes: -+ - module-name -+ - clock-id -+ - board-label -+ - panel-label -+ - package-label -+ - type -+ reply: -+ attributes: -+ - id -+ -+ - -+ name: pin-get -+ doc: | -+ Get list of pins and its attributes. -+ - dump request without any attributes given - list all the pins in the -+ system -+ - dump request with target dpll - list all the pins registered with -+ a given dpll device -+ - do request with target dpll and target pin - single pin attributes -+ attribute-set: pin -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pin-pre-doit -+ post: dpll-pin-post-doit -+ request: -+ attributes: -+ - id -+ reply: &pin-attrs -+ attributes: -+ - id -+ - board-label -+ - panel-label -+ - package-label -+ - type -+ - frequency -+ - frequency-supported -+ - capabilities -+ - parent-device -+ - parent-pin -+ -+ dump: -+ pre: dpll-lock-dumpit -+ post: dpll-unlock-dumpit -+ request: -+ attributes: -+ - id -+ reply: *pin-attrs -+ -+ - -+ name: pin-set -+ doc: Set attributes of a target pin -+ attribute-set: pin -+ flags: [ admin-perm ] -+ -+ do: -+ pre: dpll-pin-pre-doit -+ post: dpll-pin-post-doit -+ request: -+ attributes: -+ - id -+ - frequency -+ - direction -+ - prio -+ - state -+ - parent-device -+ - parent-pin -+ - -+ name: pin-create-ntf -+ doc: Notification about pin appearing -+ notify: pin-get -+ mcgrp: monitor -+ - -+ name: pin-delete-ntf -+ doc: Notification about pin disappearing -+ notify: pin-get -+ mcgrp: monitor -+ - -+ name: pin-change-ntf -+ doc: Notification about pin configuration being changed -+ notify: pin-get -+ mcgrp: monitor -+ -+mcast-groups: -+ list: -+ - -+ name: monitor -diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c -new file mode 100644 -index 000000000000..14064c8c783b ---- /dev/null -+++ b/drivers/dpll/dpll_nl.c -@@ -0,0 +1,162 @@ -+// SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) -+/* Do not edit directly, auto-generated from: */ -+/* Documentation/netlink/specs/dpll.yaml */ -+/* YNL-GEN kernel source */ -+ -+#include -+#include -+ -+#include "dpll_nl.h" -+ -+#include -+ -+/* Common nested types */ -+const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1] = { -+ [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -+ [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+}; -+ -+const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = { -+ [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+}; -+ -+/* DPLL_CMD_DEVICE_ID_GET - do */ -+static const struct nla_policy dpll_device_id_get_nl_policy[DPLL_A_TYPE + 1] = { -+ [DPLL_A_MODULE_NAME] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_CLOCK_ID] = { .type = NLA_U64, }, -+ [DPLL_A_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -+}; -+ -+/* DPLL_CMD_DEVICE_GET - do */ -+static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = { -+ [DPLL_A_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_DEVICE_SET - do */ -+static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_ID + 1] = { -+ [DPLL_A_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_PIN_ID_GET - do */ -+static const struct nla_policy dpll_pin_id_get_nl_policy[DPLL_A_PIN_TYPE + 1] = { -+ [DPLL_A_PIN_MODULE_NAME] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_CLOCK_ID] = { .type = NLA_U64, }, -+ [DPLL_A_PIN_BOARD_LABEL] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_PANEL_LABEL] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_PACKAGE_LABEL] = { .type = NLA_NUL_STRING, }, -+ [DPLL_A_PIN_TYPE] = NLA_POLICY_RANGE(NLA_U32, 1, 5), -+}; -+ -+/* DPLL_CMD_PIN_GET - do */ -+static const struct nla_policy dpll_pin_get_do_nl_policy[DPLL_A_PIN_ID + 1] = { -+ [DPLL_A_PIN_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_PIN_GET - dump */ -+static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = { -+ [DPLL_A_PIN_ID] = { .type = NLA_U32, }, -+}; -+ -+/* DPLL_CMD_PIN_SET - do */ -+static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] = { -+ [DPLL_A_PIN_ID] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, }, -+ [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -+ [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, -+ [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+ [DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy), -+ [DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy), -+}; -+ -+/* Ops table for dpll */ -+static const struct genl_split_ops dpll_nl_ops[] = { -+ { -+ .cmd = DPLL_CMD_DEVICE_ID_GET, -+ .pre_doit = dpll_lock_doit, -+ .doit = dpll_nl_device_id_get_doit, -+ .post_doit = dpll_unlock_doit, -+ .policy = dpll_device_id_get_nl_policy, -+ .maxattr = DPLL_A_TYPE, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_DEVICE_GET, -+ .pre_doit = dpll_pre_doit, -+ .doit = dpll_nl_device_get_doit, -+ .post_doit = dpll_post_doit, -+ .policy = dpll_device_get_nl_policy, -+ .maxattr = DPLL_A_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_DEVICE_GET, -+ .start = dpll_lock_dumpit, -+ .dumpit = dpll_nl_device_get_dumpit, -+ .done = dpll_unlock_dumpit, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, -+ }, -+ { -+ .cmd = DPLL_CMD_DEVICE_SET, -+ .pre_doit = dpll_pre_doit, -+ .doit = dpll_nl_device_set_doit, -+ .post_doit = dpll_post_doit, -+ .policy = dpll_device_set_nl_policy, -+ .maxattr = DPLL_A_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_ID_GET, -+ .pre_doit = dpll_lock_doit, -+ .doit = dpll_nl_pin_id_get_doit, -+ .post_doit = dpll_unlock_doit, -+ .policy = dpll_pin_id_get_nl_policy, -+ .maxattr = DPLL_A_PIN_TYPE, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_GET, -+ .pre_doit = dpll_pin_pre_doit, -+ .doit = dpll_nl_pin_get_doit, -+ .post_doit = dpll_pin_post_doit, -+ .policy = dpll_pin_get_do_nl_policy, -+ .maxattr = DPLL_A_PIN_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_GET, -+ .start = dpll_lock_dumpit, -+ .dumpit = dpll_nl_pin_get_dumpit, -+ .done = dpll_unlock_dumpit, -+ .policy = dpll_pin_get_dump_nl_policy, -+ .maxattr = DPLL_A_PIN_ID, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, -+ }, -+ { -+ .cmd = DPLL_CMD_PIN_SET, -+ .pre_doit = dpll_pin_pre_doit, -+ .doit = dpll_nl_pin_set_doit, -+ .post_doit = dpll_pin_post_doit, -+ .policy = dpll_pin_set_nl_policy, -+ .maxattr = DPLL_A_PIN_PARENT_PIN, -+ .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, -+ }, -+}; -+ -+static const struct genl_multicast_group dpll_nl_mcgrps[] = { -+ [DPLL_NLGRP_MONITOR] = { "monitor", }, -+}; -+ -+struct genl_family dpll_nl_family __ro_after_init = { -+ .name = DPLL_FAMILY_NAME, -+ .version = DPLL_FAMILY_VERSION, -+ .netnsok = true, -+ .parallel_ops = true, -+ .module = THIS_MODULE, -+ .split_ops = dpll_nl_ops, -+ .n_split_ops = ARRAY_SIZE(dpll_nl_ops), -+ .mcgrps = dpll_nl_mcgrps, -+ .n_mcgrps = ARRAY_SIZE(dpll_nl_mcgrps), -+}; -diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h -new file mode 100644 -index 000000000000..1f67aaed4742 ---- /dev/null -+++ b/drivers/dpll/dpll_nl.h -@@ -0,0 +1,51 @@ -+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ -+/* Do not edit directly, auto-generated from: */ -+/* Documentation/netlink/specs/dpll.yaml */ -+/* YNL-GEN kernel header */ -+ -+#ifndef _LINUX_DPLL_GEN_H -+#define _LINUX_DPLL_GEN_H -+ -+#include -+#include -+ -+#include -+ -+/* Common nested types */ -+extern const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1]; -+extern const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1]; -+ -+int dpll_lock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+int dpll_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+void -+dpll_unlock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+void -+dpll_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+void -+dpll_pin_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info); -+int dpll_lock_dumpit(struct netlink_callback *cb); -+int dpll_unlock_dumpit(struct netlink_callback *cb); -+ -+int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb); -+int dpll_nl_device_set_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info); -+int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb); -+int dpll_nl_pin_set_doit(struct sk_buff *skb, struct genl_info *info); -+ -+enum { -+ DPLL_NLGRP_MONITOR, -+}; -+ -+extern struct genl_family dpll_nl_family; -+ -+#endif /* _LINUX_DPLL_GEN_H */ -diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h -new file mode 100644 -index 000000000000..20ef0718f8dc ---- /dev/null -+++ b/include/uapi/linux/dpll.h -@@ -0,0 +1,201 @@ -+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ -+/* Do not edit directly, auto-generated from: */ -+/* Documentation/netlink/specs/dpll.yaml */ -+/* YNL-GEN uapi header */ -+ -+#ifndef _UAPI_LINUX_DPLL_H -+#define _UAPI_LINUX_DPLL_H -+ -+#define DPLL_FAMILY_NAME "dpll" -+#define DPLL_FAMILY_VERSION 1 -+ -+/** -+ * enum dpll_mode - working modes a dpll can support, differentiates if and how -+ * dpll selects one of its inputs to syntonize with it, valid values for -+ * DPLL_A_MODE attribute -+ * @DPLL_MODE_MANUAL: input can be only selected by sending a request to dpll -+ * @DPLL_MODE_AUTOMATIC: highest prio input pin auto selected by dpll -+ */ -+enum dpll_mode { -+ DPLL_MODE_MANUAL = 1, -+ DPLL_MODE_AUTOMATIC, -+ -+ /* private: */ -+ __DPLL_MODE_MAX, -+ DPLL_MODE_MAX = (__DPLL_MODE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_lock_status - provides information of dpll device lock status, -+ * valid values for DPLL_A_LOCK_STATUS attribute -+ * @DPLL_LOCK_STATUS_UNLOCKED: dpll was not yet locked to any valid input (or -+ * forced by setting DPLL_A_MODE to DPLL_MODE_DETACHED) -+ * @DPLL_LOCK_STATUS_LOCKED: dpll is locked to a valid signal, but no holdover -+ * available -+ * @DPLL_LOCK_STATUS_LOCKED_HO_ACQ: dpll is locked and holdover acquired -+ * @DPLL_LOCK_STATUS_HOLDOVER: dpll is in holdover state - lost a valid lock or -+ * was forced by disconnecting all the pins (latter possible only when dpll -+ * lock-state was already DPLL_LOCK_STATUS_LOCKED_HO_ACQ, if dpll lock-state -+ * was not DPLL_LOCK_STATUS_LOCKED_HO_ACQ, the dpll's lock-state shall remain -+ * DPLL_LOCK_STATUS_UNLOCKED) -+ */ -+enum dpll_lock_status { -+ DPLL_LOCK_STATUS_UNLOCKED = 1, -+ DPLL_LOCK_STATUS_LOCKED, -+ DPLL_LOCK_STATUS_LOCKED_HO_ACQ, -+ DPLL_LOCK_STATUS_HOLDOVER, -+ -+ /* private: */ -+ __DPLL_LOCK_STATUS_MAX, -+ DPLL_LOCK_STATUS_MAX = (__DPLL_LOCK_STATUS_MAX - 1) -+}; -+ -+#define DPLL_TEMP_DIVIDER 1000 -+ -+/** -+ * enum dpll_type - type of dpll, valid values for DPLL_A_TYPE attribute -+ * @DPLL_TYPE_PPS: dpll produces Pulse-Per-Second signal -+ * @DPLL_TYPE_EEC: dpll drives the Ethernet Equipment Clock -+ */ -+enum dpll_type { -+ DPLL_TYPE_PPS = 1, -+ DPLL_TYPE_EEC, -+ -+ /* private: */ -+ __DPLL_TYPE_MAX, -+ DPLL_TYPE_MAX = (__DPLL_TYPE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_pin_type - defines possible types of a pin, valid values for -+ * DPLL_A_PIN_TYPE attribute -+ * @DPLL_PIN_TYPE_MUX: aggregates another layer of selectable pins -+ * @DPLL_PIN_TYPE_EXT: external input -+ * @DPLL_PIN_TYPE_SYNCE_ETH_PORT: ethernet port PHY's recovered clock -+ * @DPLL_PIN_TYPE_INT_OSCILLATOR: device internal oscillator -+ * @DPLL_PIN_TYPE_GNSS: GNSS recovered clock -+ */ -+enum dpll_pin_type { -+ DPLL_PIN_TYPE_MUX = 1, -+ DPLL_PIN_TYPE_EXT, -+ DPLL_PIN_TYPE_SYNCE_ETH_PORT, -+ DPLL_PIN_TYPE_INT_OSCILLATOR, -+ DPLL_PIN_TYPE_GNSS, -+ -+ /* private: */ -+ __DPLL_PIN_TYPE_MAX, -+ DPLL_PIN_TYPE_MAX = (__DPLL_PIN_TYPE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_pin_direction - defines possible direction of a pin, valid values -+ * for DPLL_A_PIN_DIRECTION attribute -+ * @DPLL_PIN_DIRECTION_INPUT: pin used as a input of a signal -+ * @DPLL_PIN_DIRECTION_OUTPUT: pin used to output the signal -+ */ -+enum dpll_pin_direction { -+ DPLL_PIN_DIRECTION_INPUT = 1, -+ DPLL_PIN_DIRECTION_OUTPUT, -+ -+ /* private: */ -+ __DPLL_PIN_DIRECTION_MAX, -+ DPLL_PIN_DIRECTION_MAX = (__DPLL_PIN_DIRECTION_MAX - 1) -+}; -+ -+#define DPLL_PIN_FREQUENCY_1_HZ 1 -+#define DPLL_PIN_FREQUENCY_10_KHZ 10000 -+#define DPLL_PIN_FREQUENCY_77_5_KHZ 77500 -+#define DPLL_PIN_FREQUENCY_10_MHZ 10000000 -+ -+/** -+ * enum dpll_pin_state - defines possible states of a pin, valid values for -+ * DPLL_A_PIN_STATE attribute -+ * @DPLL_PIN_STATE_CONNECTED: pin connected, active input of phase locked loop -+ * @DPLL_PIN_STATE_DISCONNECTED: pin disconnected, not considered as a valid -+ * input -+ * @DPLL_PIN_STATE_SELECTABLE: pin enabled for automatic input selection -+ */ -+enum dpll_pin_state { -+ DPLL_PIN_STATE_CONNECTED = 1, -+ DPLL_PIN_STATE_DISCONNECTED, -+ DPLL_PIN_STATE_SELECTABLE, -+ -+ /* private: */ -+ __DPLL_PIN_STATE_MAX, -+ DPLL_PIN_STATE_MAX = (__DPLL_PIN_STATE_MAX - 1) -+}; -+ -+/** -+ * enum dpll_pin_capabilities - defines possible capabilities of a pin, valid -+ * flags on DPLL_A_PIN_CAPABILITIES attribute -+ * @DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE: pin direction can be changed -+ * @DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE: pin priority can be changed -+ * @DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE: pin state can be changed -+ */ -+enum dpll_pin_capabilities { -+ DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE = 1, -+ DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE = 2, -+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE = 4, -+}; -+ -+enum dpll_a { -+ DPLL_A_ID = 1, -+ DPLL_A_MODULE_NAME, -+ DPLL_A_PAD, -+ DPLL_A_CLOCK_ID, -+ DPLL_A_MODE, -+ DPLL_A_MODE_SUPPORTED, -+ DPLL_A_LOCK_STATUS, -+ DPLL_A_TEMP, -+ DPLL_A_TYPE, -+ -+ __DPLL_A_MAX, -+ DPLL_A_MAX = (__DPLL_A_MAX - 1) -+}; -+ -+enum dpll_a_pin { -+ DPLL_A_PIN_ID = 1, -+ DPLL_A_PIN_PARENT_ID, -+ DPLL_A_PIN_MODULE_NAME, -+ DPLL_A_PIN_PAD, -+ DPLL_A_PIN_CLOCK_ID, -+ DPLL_A_PIN_BOARD_LABEL, -+ DPLL_A_PIN_PANEL_LABEL, -+ DPLL_A_PIN_PACKAGE_LABEL, -+ DPLL_A_PIN_TYPE, -+ DPLL_A_PIN_DIRECTION, -+ DPLL_A_PIN_FREQUENCY, -+ DPLL_A_PIN_FREQUENCY_SUPPORTED, -+ DPLL_A_PIN_FREQUENCY_MIN, -+ DPLL_A_PIN_FREQUENCY_MAX, -+ DPLL_A_PIN_PRIO, -+ DPLL_A_PIN_STATE, -+ DPLL_A_PIN_CAPABILITIES, -+ DPLL_A_PIN_PARENT_DEVICE, -+ DPLL_A_PIN_PARENT_PIN, -+ -+ __DPLL_A_PIN_MAX, -+ DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1) -+}; -+ -+enum dpll_cmd { -+ DPLL_CMD_DEVICE_ID_GET = 1, -+ DPLL_CMD_DEVICE_GET, -+ DPLL_CMD_DEVICE_SET, -+ DPLL_CMD_DEVICE_CREATE_NTF, -+ DPLL_CMD_DEVICE_DELETE_NTF, -+ DPLL_CMD_DEVICE_CHANGE_NTF, -+ DPLL_CMD_PIN_ID_GET, -+ DPLL_CMD_PIN_GET, -+ DPLL_CMD_PIN_SET, -+ DPLL_CMD_PIN_CREATE_NTF, -+ DPLL_CMD_PIN_DELETE_NTF, -+ DPLL_CMD_PIN_CHANGE_NTF, -+ -+ __DPLL_CMD_MAX, -+ DPLL_CMD_MAX = (__DPLL_CMD_MAX - 1) -+}; -+ -+#define DPLL_MCGRP_MONITOR "monitor" -+ -+#endif /* _UAPI_LINUX_DPLL_H */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch b/kernel-std/debian/patches/ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch deleted file mode 100644 index 925079da..00000000 --- a/kernel-std/debian/patches/ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch +++ /dev/null @@ -1,1145 +0,0 @@ -From 42459316b61c38862e2046d4bd3071e559c668eb Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:37 +0100 -Subject: [PATCH 03/46] dpll: core: Add DPLL framework base functions - -DPLL framework is used to represent and configure DPLL devices -in systems. Each device that has DPLL and can configure inputs -and outputs can use this framework. - -Implement core framework functions for further interactions -with device drivers implementing dpll subsystem, as well as for -interactions of DPLL netlink framework part with the subsystem -itself. - -Co-developed-by: Milena Olech -Signed-off-by: Milena Olech -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Signed-off-by: Vadim Fedorenko -Co-developed-by: Arkadiusz Kubalewski -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 9431063ad323ac864750aeba4d304389bc42ca4e) -Signed-off-by: Jiping Ma ---- - MAINTAINERS | 11 + - drivers/Kconfig | 2 + - drivers/Makefile | 1 + - drivers/dpll/Kconfig | 7 + - drivers/dpll/Makefile | 9 + - drivers/dpll/dpll_core.c | 789 +++++++++++++++++++++++++++++++++++++++ - drivers/dpll/dpll_core.h | 89 +++++ - include/linux/dpll.h | 133 +++++++ - 8 files changed, 1041 insertions(+) - create mode 100644 drivers/dpll/Kconfig - create mode 100644 drivers/dpll/Makefile - create mode 100644 drivers/dpll/dpll_core.c - create mode 100644 drivers/dpll/dpll_core.h - create mode 100644 include/linux/dpll.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index c030e0ba1fc7..531d44ed1e7b 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -6365,6 +6365,17 @@ F: Documentation/networking/device_drivers/ethernet/freescale/dpaa2/switch-drive - F: drivers/net/ethernet/freescale/dpaa2/dpaa2-switch* - F: drivers/net/ethernet/freescale/dpaa2/dpsw* - -+DPLL SUBSYSTEM -+M: Vadim Fedorenko -+M: Arkadiusz Kubalewski -+M: Jiri Pirko -+L: netdev@vger.kernel.org -+S: Supported -+F: Documentation/driver-api/dpll.rst -+F: drivers/dpll/* -+F: include/net/dpll.h -+F: include/uapi/linux/dpll.h -+ - DRBD DRIVER - M: Philipp Reisner - M: Lars Ellenberg -diff --git a/drivers/Kconfig b/drivers/Kconfig -index efb66e25fa2d..8ba3e8b9ad72 100644 ---- a/drivers/Kconfig -+++ b/drivers/Kconfig -@@ -243,4 +243,6 @@ source "drivers/hte/Kconfig" - - source "drivers/cdx/Kconfig" - -+source "drivers/dpll/Kconfig" -+ - endmenu -diff --git a/drivers/Makefile b/drivers/Makefile -index 1bec7819a837..722d15be0eb7 100644 ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -197,5 +197,6 @@ obj-$(CONFIG_PECI) += peci/ - obj-$(CONFIG_HTE) += hte/ - obj-$(CONFIG_DRM_ACCEL) += accel/ - obj-$(CONFIG_CDX_BUS) += cdx/ -+obj-$(CONFIG_DPLL) += dpll/ - - obj-$(CONFIG_S390) += s390/ -diff --git a/drivers/dpll/Kconfig b/drivers/dpll/Kconfig -new file mode 100644 -index 000000000000..a4cae73f20d3 ---- /dev/null -+++ b/drivers/dpll/Kconfig -@@ -0,0 +1,7 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+# -+# Generic DPLL drivers configuration -+# -+ -+config DPLL -+ bool -diff --git a/drivers/dpll/Makefile b/drivers/dpll/Makefile -new file mode 100644 -index 000000000000..2e5b27850110 ---- /dev/null -+++ b/drivers/dpll/Makefile -@@ -0,0 +1,9 @@ -+# SPDX-License-Identifier: GPL-2.0 -+# -+# Makefile for DPLL drivers. -+# -+ -+obj-$(CONFIG_DPLL) += dpll.o -+dpll-y += dpll_core.o -+dpll-y += dpll_netlink.o -+dpll-y += dpll_nl.o -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -new file mode 100644 -index 000000000000..6449ba6a383b ---- /dev/null -+++ b/drivers/dpll/dpll_core.c -@@ -0,0 +1,789 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * dpll_core.c - DPLL subsystem kernel-space interface implementation. -+ * -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel Corporation. -+ */ -+ -+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -+ -+#include -+#include -+#include -+#include -+ -+#include "dpll_core.h" -+ -+/* Mutex lock to protect DPLL subsystem devices and pins */ -+DEFINE_MUTEX(dpll_lock); -+ -+DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC); -+DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC); -+ -+static u32 dpll_xa_id; -+ -+#define ASSERT_DPLL_REGISTERED(d) \ -+ WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -+#define ASSERT_DPLL_NOT_REGISTERED(d) \ -+ WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -+#define ASSERT_PIN_REGISTERED(p) \ -+ WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED)) -+ -+struct dpll_device_registration { -+ struct list_head list; -+ const struct dpll_device_ops *ops; -+ void *priv; -+}; -+ -+struct dpll_pin_registration { -+ struct list_head list; -+ const struct dpll_pin_ops *ops; -+ void *priv; -+}; -+ -+struct dpll_device *dpll_device_get_by_id(int id) -+{ -+ if (xa_get_mark(&dpll_device_xa, id, DPLL_REGISTERED)) -+ return xa_load(&dpll_device_xa, id); -+ -+ return NULL; -+} -+ -+static struct dpll_pin_registration * -+dpll_pin_registration_find(struct dpll_pin_ref *ref, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ -+ list_for_each_entry(reg, &ref->registration_list, list) { -+ if (reg->ops == ops && reg->priv == priv) -+ return reg; -+ } -+ return NULL; -+} -+ -+static int -+dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ bool ref_exists = false; -+ unsigned long i; -+ int ret; -+ -+ xa_for_each(xa_pins, i, ref) { -+ if (ref->pin != pin) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (reg) { -+ refcount_inc(&ref->refcount); -+ return 0; -+ } -+ ref_exists = true; -+ break; -+ } -+ -+ if (!ref_exists) { -+ ref = kzalloc(sizeof(*ref), GFP_KERNEL); -+ if (!ref) -+ return -ENOMEM; -+ ref->pin = pin; -+ INIT_LIST_HEAD(&ref->registration_list); -+ ret = xa_insert(xa_pins, pin->pin_idx, ref, GFP_KERNEL); -+ if (ret) { -+ kfree(ref); -+ return ret; -+ } -+ refcount_set(&ref->refcount, 1); -+ } -+ -+ reg = kzalloc(sizeof(*reg), GFP_KERNEL); -+ if (!reg) { -+ if (!ref_exists) { -+ xa_erase(xa_pins, pin->pin_idx); -+ kfree(ref); -+ } -+ return -ENOMEM; -+ } -+ reg->ops = ops; -+ reg->priv = priv; -+ if (ref_exists) -+ refcount_inc(&ref->refcount); -+ list_add_tail(®->list, &ref->registration_list); -+ -+ return 0; -+} -+ -+static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ -+ xa_for_each(xa_pins, i, ref) { -+ if (ref->pin != pin) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (WARN_ON(!reg)) -+ return -EINVAL; -+ if (refcount_dec_and_test(&ref->refcount)) { -+ list_del(®->list); -+ kfree(reg); -+ xa_erase(xa_pins, i); -+ WARN_ON(!list_empty(&ref->registration_list)); -+ kfree(ref); -+ } -+ return 0; -+ } -+ -+ return -EINVAL; -+} -+ -+static int -+dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ bool ref_exists = false; -+ unsigned long i; -+ int ret; -+ -+ xa_for_each(xa_dplls, i, ref) { -+ if (ref->dpll != dpll) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (reg) { -+ refcount_inc(&ref->refcount); -+ return 0; -+ } -+ ref_exists = true; -+ break; -+ } -+ -+ if (!ref_exists) { -+ ref = kzalloc(sizeof(*ref), GFP_KERNEL); -+ if (!ref) -+ return -ENOMEM; -+ ref->dpll = dpll; -+ INIT_LIST_HEAD(&ref->registration_list); -+ ret = xa_insert(xa_dplls, dpll->id, ref, GFP_KERNEL); -+ if (ret) { -+ kfree(ref); -+ return ret; -+ } -+ refcount_set(&ref->refcount, 1); -+ } -+ -+ reg = kzalloc(sizeof(*reg), GFP_KERNEL); -+ if (!reg) { -+ if (!ref_exists) { -+ xa_erase(xa_dplls, dpll->id); -+ kfree(ref); -+ } -+ return -ENOMEM; -+ } -+ reg->ops = ops; -+ reg->priv = priv; -+ if (ref_exists) -+ refcount_inc(&ref->refcount); -+ list_add_tail(®->list, &ref->registration_list); -+ -+ return 0; -+} -+ -+static void -+dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ -+ xa_for_each(xa_dplls, i, ref) { -+ if (ref->dpll != dpll) -+ continue; -+ reg = dpll_pin_registration_find(ref, ops, priv); -+ if (WARN_ON(!reg)) -+ return; -+ if (refcount_dec_and_test(&ref->refcount)) { -+ list_del(®->list); -+ kfree(reg); -+ xa_erase(xa_dplls, i); -+ WARN_ON(!list_empty(&ref->registration_list)); -+ kfree(ref); -+ } -+ return; -+ } -+} -+ -+struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs) -+{ -+ struct dpll_pin_ref *ref; -+ unsigned long i = 0; -+ -+ ref = xa_find(xa_refs, &i, ULONG_MAX, XA_PRESENT); -+ WARN_ON(!ref); -+ return ref; -+} -+ -+static struct dpll_device * -+dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module) -+{ -+ struct dpll_device *dpll; -+ int ret; -+ -+ dpll = kzalloc(sizeof(*dpll), GFP_KERNEL); -+ if (!dpll) -+ return ERR_PTR(-ENOMEM); -+ refcount_set(&dpll->refcount, 1); -+ INIT_LIST_HEAD(&dpll->registration_list); -+ dpll->device_idx = device_idx; -+ dpll->clock_id = clock_id; -+ dpll->module = module; -+ ret = xa_alloc_cyclic(&dpll_device_xa, &dpll->id, dpll, xa_limit_32b, -+ &dpll_xa_id, GFP_KERNEL); -+ if (ret < 0) { -+ kfree(dpll); -+ return ERR_PTR(ret); -+ } -+ xa_init_flags(&dpll->pin_refs, XA_FLAGS_ALLOC); -+ -+ return dpll; -+} -+ -+/** -+ * dpll_device_get - find existing or create new dpll device -+ * @clock_id: clock_id of creator -+ * @device_idx: idx given by device driver -+ * @module: reference to registering module -+ * -+ * Get existing object of a dpll device, unique for given arguments. -+ * Create new if doesn't exist yet. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * valid dpll_device struct pointer if succeeded -+ * * ERR_PTR(X) - error -+ */ -+struct dpll_device * -+dpll_device_get(u64 clock_id, u32 device_idx, struct module *module) -+{ -+ struct dpll_device *dpll, *ret = NULL; -+ unsigned long index; -+ -+ mutex_lock(&dpll_lock); -+ xa_for_each(&dpll_device_xa, index, dpll) { -+ if (dpll->clock_id == clock_id && -+ dpll->device_idx == device_idx && -+ dpll->module == module) { -+ ret = dpll; -+ refcount_inc(&ret->refcount); -+ break; -+ } -+ } -+ if (!ret) -+ ret = dpll_device_alloc(clock_id, device_idx, module); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_device_get); -+ -+/** -+ * dpll_device_put - decrease the refcount and free memory if possible -+ * @dpll: dpll_device struct pointer -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Drop reference for a dpll device, if all references are gone, delete -+ * dpll device object. -+ */ -+void dpll_device_put(struct dpll_device *dpll) -+{ -+ mutex_lock(&dpll_lock); -+ if (refcount_dec_and_test(&dpll->refcount)) { -+ ASSERT_DPLL_NOT_REGISTERED(dpll); -+ WARN_ON_ONCE(!xa_empty(&dpll->pin_refs)); -+ xa_destroy(&dpll->pin_refs); -+ xa_erase(&dpll_device_xa, dpll->id); -+ WARN_ON(!list_empty(&dpll->registration_list)); -+ kfree(dpll); -+ } -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_device_put); -+ -+static struct dpll_device_registration * -+dpll_device_registration_find(struct dpll_device *dpll, -+ const struct dpll_device_ops *ops, void *priv) -+{ -+ struct dpll_device_registration *reg; -+ -+ list_for_each_entry(reg, &dpll->registration_list, list) { -+ if (reg->ops == ops && reg->priv == priv) -+ return reg; -+ } -+ return NULL; -+} -+ -+/** -+ * dpll_device_register - register the dpll device in the subsystem -+ * @dpll: pointer to a dpll -+ * @type: type of a dpll -+ * @ops: ops for a dpll device -+ * @priv: pointer to private information of owner -+ * -+ * Make dpll device available for user space. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * 0 on success -+ * * negative - error value -+ */ -+int dpll_device_register(struct dpll_device *dpll, enum dpll_type type, -+ const struct dpll_device_ops *ops, void *priv) -+{ -+ struct dpll_device_registration *reg; -+ bool first_registration = false; -+ -+ if (WARN_ON(!ops)) -+ return -EINVAL; -+ if (WARN_ON(!ops->mode_get)) -+ return -EINVAL; -+ if (WARN_ON(!ops->lock_status_get)) -+ return -EINVAL; -+ if (WARN_ON(type < DPLL_TYPE_PPS || type > DPLL_TYPE_MAX)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ reg = dpll_device_registration_find(dpll, ops, priv); -+ if (reg) { -+ mutex_unlock(&dpll_lock); -+ return -EEXIST; -+ } -+ -+ reg = kzalloc(sizeof(*reg), GFP_KERNEL); -+ if (!reg) { -+ mutex_unlock(&dpll_lock); -+ return -ENOMEM; -+ } -+ reg->ops = ops; -+ reg->priv = priv; -+ dpll->type = type; -+ first_registration = list_empty(&dpll->registration_list); -+ list_add_tail(®->list, &dpll->registration_list); -+ if (!first_registration) { -+ mutex_unlock(&dpll_lock); -+ return 0; -+ } -+ -+ xa_set_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED); -+ mutex_unlock(&dpll_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(dpll_device_register); -+ -+/** -+ * dpll_device_unregister - unregister dpll device -+ * @dpll: registered dpll pointer -+ * @ops: ops for a dpll device -+ * @priv: pointer to private information of owner -+ * -+ * Unregister device, make it unavailable for userspace. -+ * Note: It does not free the memory -+ * Context: Acquires a lock (dpll_lock) -+ */ -+void dpll_device_unregister(struct dpll_device *dpll, -+ const struct dpll_device_ops *ops, void *priv) -+{ -+ struct dpll_device_registration *reg; -+ -+ mutex_lock(&dpll_lock); -+ ASSERT_DPLL_REGISTERED(dpll); -+ reg = dpll_device_registration_find(dpll, ops, priv); -+ if (WARN_ON(!reg)) { -+ mutex_unlock(&dpll_lock); -+ return; -+ } -+ list_del(®->list); -+ kfree(reg); -+ -+ if (!list_empty(&dpll->registration_list)) { -+ mutex_unlock(&dpll_lock); -+ return; -+ } -+ xa_clear_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED); -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_device_unregister); -+ -+static struct dpll_pin * -+dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, -+ const struct dpll_pin_properties *prop) -+{ -+ struct dpll_pin *pin; -+ int ret; -+ -+ pin = kzalloc(sizeof(*pin), GFP_KERNEL); -+ if (!pin) -+ return ERR_PTR(-ENOMEM); -+ pin->pin_idx = pin_idx; -+ pin->clock_id = clock_id; -+ pin->module = module; -+ if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX || -+ prop->type > DPLL_PIN_TYPE_MAX)) { -+ ret = -EINVAL; -+ goto err; -+ } -+ pin->prop = prop; -+ refcount_set(&pin->refcount, 1); -+ xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); -+ xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); -+ ret = xa_alloc(&dpll_pin_xa, &pin->id, pin, xa_limit_16b, GFP_KERNEL); -+ if (ret) -+ goto err; -+ return pin; -+err: -+ xa_destroy(&pin->dpll_refs); -+ xa_destroy(&pin->parent_refs); -+ kfree(pin); -+ return ERR_PTR(ret); -+} -+ -+/** -+ * dpll_pin_get - find existing or create new dpll pin -+ * @clock_id: clock_id of creator -+ * @pin_idx: idx given by dev driver -+ * @module: reference to registering module -+ * @prop: dpll pin properties -+ * -+ * Get existing object of a pin (unique for given arguments) or create new -+ * if doesn't exist yet. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * valid allocated dpll_pin struct pointer if succeeded -+ * * ERR_PTR(X) - error -+ */ -+struct dpll_pin * -+dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module, -+ const struct dpll_pin_properties *prop) -+{ -+ struct dpll_pin *pos, *ret = NULL; -+ unsigned long i; -+ -+ mutex_lock(&dpll_lock); -+ xa_for_each(&dpll_pin_xa, i, pos) { -+ if (pos->clock_id == clock_id && -+ pos->pin_idx == pin_idx && -+ pos->module == module) { -+ ret = pos; -+ refcount_inc(&ret->refcount); -+ break; -+ } -+ } -+ if (!ret) -+ ret = dpll_pin_alloc(clock_id, pin_idx, module, prop); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_get); -+ -+/** -+ * dpll_pin_put - decrease the refcount and free memory if possible -+ * @pin: pointer to a pin to be put -+ * -+ * Drop reference for a pin, if all references are gone, delete pin object. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ */ -+void dpll_pin_put(struct dpll_pin *pin) -+{ -+ mutex_lock(&dpll_lock); -+ if (refcount_dec_and_test(&pin->refcount)) { -+ xa_destroy(&pin->dpll_refs); -+ xa_destroy(&pin->parent_refs); -+ xa_erase(&dpll_pin_xa, pin->id); -+ kfree(pin); -+ } -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_pin_put); -+ -+static int -+__dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ int ret; -+ -+ ret = dpll_xa_ref_pin_add(&dpll->pin_refs, pin, ops, priv); -+ if (ret) -+ return ret; -+ ret = dpll_xa_ref_dpll_add(&pin->dpll_refs, dpll, ops, priv); -+ if (ret) -+ goto ref_pin_del; -+ xa_set_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); -+ -+ return ret; -+ -+ref_pin_del: -+ dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv); -+ return ret; -+} -+ -+/** -+ * dpll_pin_register - register the dpll pin in the subsystem -+ * @dpll: pointer to a dpll -+ * @pin: pointer to a dpll pin -+ * @ops: ops for a dpll pin ops -+ * @priv: pointer to private information of owner -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * 0 on success -+ * * negative - error value -+ */ -+int -+dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ int ret; -+ -+ if (WARN_ON(!ops) || -+ WARN_ON(!ops->state_on_dpll_get) || -+ WARN_ON(!ops->direction_get)) -+ return -EINVAL; -+ if (ASSERT_DPLL_REGISTERED(dpll)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ if (WARN_ON(!(dpll->module == pin->module && -+ dpll->clock_id == pin->clock_id))) -+ ret = -EINVAL; -+ else -+ ret = __dpll_pin_register(dpll, pin, ops, priv); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_register); -+ -+static void -+__dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ dpll_xa_ref_pin_del(&dpll->pin_refs, pin, ops, priv); -+ dpll_xa_ref_dpll_del(&pin->dpll_refs, dpll, ops, priv); -+ if (xa_empty(&pin->dpll_refs)) -+ xa_clear_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); -+} -+ -+/** -+ * dpll_pin_unregister - unregister dpll pin from dpll device -+ * @dpll: registered dpll pointer -+ * @pin: pointer to a pin -+ * @ops: ops for a dpll pin -+ * @priv: pointer to private information of owner -+ * -+ * Note: It does not free the memory -+ * Context: Acquires a lock (dpll_lock) -+ */ -+void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ if (WARN_ON(xa_empty(&dpll->pin_refs))) -+ return; -+ if (WARN_ON(!xa_empty(&pin->parent_refs))) -+ return; -+ -+ mutex_lock(&dpll_lock); -+ __dpll_pin_unregister(dpll, pin, ops, priv); -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_pin_unregister); -+ -+/** -+ * dpll_pin_on_pin_register - register a pin with a parent pin -+ * @parent: pointer to a parent pin -+ * @pin: pointer to a pin -+ * @ops: ops for a dpll pin -+ * @priv: pointer to private information of owner -+ * -+ * Register a pin with a parent pin, create references between them and -+ * between newly registered pin and dplls connected with a parent pin. -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Return: -+ * * 0 on success -+ * * negative - error value -+ */ -+int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_ref *ref; -+ unsigned long i, stop; -+ int ret; -+ -+ if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX)) -+ return -EINVAL; -+ -+ if (WARN_ON(!ops) || -+ WARN_ON(!ops->state_on_pin_get) || -+ WARN_ON(!ops->direction_get)) -+ return -EINVAL; -+ if (ASSERT_PIN_REGISTERED(parent)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv); -+ if (ret) -+ goto unlock; -+ refcount_inc(&pin->refcount); -+ xa_for_each(&parent->dpll_refs, i, ref) { -+ ret = __dpll_pin_register(ref->dpll, pin, ops, priv); -+ if (ret) { -+ stop = i; -+ goto dpll_unregister; -+ } -+ } -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+ -+dpll_unregister: -+ xa_for_each(&parent->dpll_refs, i, ref) -+ if (i < stop) -+ __dpll_pin_unregister(ref->dpll, pin, ops, priv); -+ refcount_dec(&pin->refcount); -+ dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); -+unlock: -+ mutex_unlock(&dpll_lock); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_on_pin_register); -+ -+/** -+ * dpll_pin_on_pin_unregister - unregister dpll pin from a parent pin -+ * @parent: pointer to a parent pin -+ * @pin: pointer to a pin -+ * @ops: ops for a dpll pin -+ * @priv: pointer to private information of owner -+ * -+ * Context: Acquires a lock (dpll_lock) -+ * Note: It does not free the memory -+ */ -+void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv) -+{ -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ -+ mutex_lock(&dpll_lock); -+ dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); -+ refcount_dec(&pin->refcount); -+ xa_for_each(&pin->dpll_refs, i, ref) -+ __dpll_pin_unregister(ref->dpll, pin, ops, priv); -+ mutex_unlock(&dpll_lock); -+} -+EXPORT_SYMBOL_GPL(dpll_pin_on_pin_unregister); -+ -+static struct dpll_device_registration * -+dpll_device_registration_first(struct dpll_device *dpll) -+{ -+ struct dpll_device_registration *reg; -+ -+ reg = list_first_entry_or_null((struct list_head *)&dpll->registration_list, -+ struct dpll_device_registration, list); -+ WARN_ON(!reg); -+ return reg; -+} -+ -+void *dpll_priv(struct dpll_device *dpll) -+{ -+ struct dpll_device_registration *reg; -+ -+ reg = dpll_device_registration_first(dpll); -+ return reg->priv; -+} -+ -+const struct dpll_device_ops *dpll_device_ops(struct dpll_device *dpll) -+{ -+ struct dpll_device_registration *reg; -+ -+ reg = dpll_device_registration_first(dpll); -+ return reg->ops; -+} -+ -+static struct dpll_pin_registration * -+dpll_pin_registration_first(struct dpll_pin_ref *ref) -+{ -+ struct dpll_pin_registration *reg; -+ -+ reg = list_first_entry_or_null(&ref->registration_list, -+ struct dpll_pin_registration, list); -+ WARN_ON(!reg); -+ return reg; -+} -+ -+void *dpll_pin_on_dpll_priv(struct dpll_device *dpll, -+ struct dpll_pin *pin) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ -+ ref = xa_load(&dpll->pin_refs, pin->pin_idx); -+ if (!ref) -+ return NULL; -+ reg = dpll_pin_registration_first(ref); -+ return reg->priv; -+} -+ -+void *dpll_pin_on_pin_priv(struct dpll_pin *parent, -+ struct dpll_pin *pin) -+{ -+ struct dpll_pin_registration *reg; -+ struct dpll_pin_ref *ref; -+ -+ ref = xa_load(&pin->parent_refs, parent->pin_idx); -+ if (!ref) -+ return NULL; -+ reg = dpll_pin_registration_first(ref); -+ return reg->priv; -+} -+ -+const struct dpll_pin_ops *dpll_pin_ops(struct dpll_pin_ref *ref) -+{ -+ struct dpll_pin_registration *reg; -+ -+ reg = dpll_pin_registration_first(ref); -+ return reg->ops; -+} -+ -+static int __init dpll_init(void) -+{ -+ int ret; -+ -+ ret = genl_register_family(&dpll_nl_family); -+ if (ret) -+ goto error; -+ -+ return 0; -+ -+error: -+ mutex_destroy(&dpll_lock); -+ return ret; -+} -+ -+static void __exit dpll_exit(void) -+{ -+ genl_unregister_family(&dpll_nl_family); -+ mutex_destroy(&dpll_lock); -+} -+ -+subsys_initcall(dpll_init); -+module_exit(dpll_exit); -diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h -new file mode 100644 -index 000000000000..5585873c5c1b ---- /dev/null -+++ b/drivers/dpll/dpll_core.h -@@ -0,0 +1,89 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ */ -+ -+#ifndef __DPLL_CORE_H__ -+#define __DPLL_CORE_H__ -+ -+#include -+#include -+#include -+#include "dpll_nl.h" -+ -+#define DPLL_REGISTERED XA_MARK_1 -+ -+/** -+ * struct dpll_device - stores DPLL device internal data -+ * @id: unique id number for device given by dpll subsystem -+ * @device_idx: id given by dev driver -+ * @clock_id: unique identifier (clock_id) of a dpll -+ * @module: module of creator -+ * @type: type of a dpll -+ * @pin_refs: stores pins registered within a dpll -+ * @refcount: refcount -+ * @registration_list: list of registered ops and priv data of dpll owners -+ **/ -+struct dpll_device { -+ u32 id; -+ u32 device_idx; -+ u64 clock_id; -+ struct module *module; -+ enum dpll_type type; -+ struct xarray pin_refs; -+ refcount_t refcount; -+ struct list_head registration_list; -+}; -+ -+/** -+ * struct dpll_pin - structure for a dpll pin -+ * @id: unique id number for pin given by dpll subsystem -+ * @pin_idx: index of a pin given by dev driver -+ * @clock_id: clock_id of creator -+ * @module: module of creator -+ * @dpll_refs: hold referencees to dplls pin was registered with -+ * @parent_refs: hold references to parent pins pin was registered with -+ * @prop: pointer to pin properties given by registerer -+ * @rclk_dev_name: holds name of device when pin can recover clock from it -+ * @refcount: refcount -+ **/ -+struct dpll_pin { -+ u32 id; -+ u32 pin_idx; -+ u64 clock_id; -+ struct module *module; -+ struct xarray dpll_refs; -+ struct xarray parent_refs; -+ const struct dpll_pin_properties *prop; -+ refcount_t refcount; -+}; -+ -+/** -+ * struct dpll_pin_ref - structure for referencing either dpll or pins -+ * @dpll: pointer to a dpll -+ * @pin: pointer to a pin -+ * @registration_list: list of ops and priv data registered with the ref -+ * @refcount: refcount -+ **/ -+struct dpll_pin_ref { -+ union { -+ struct dpll_device *dpll; -+ struct dpll_pin *pin; -+ }; -+ struct list_head registration_list; -+ refcount_t refcount; -+}; -+ -+void *dpll_priv(struct dpll_device *dpll); -+void *dpll_pin_on_dpll_priv(struct dpll_device *dpll, struct dpll_pin *pin); -+void *dpll_pin_on_pin_priv(struct dpll_pin *parent, struct dpll_pin *pin); -+ -+const struct dpll_device_ops *dpll_device_ops(struct dpll_device *dpll); -+struct dpll_device *dpll_device_get_by_id(int id); -+const struct dpll_pin_ops *dpll_pin_ops(struct dpll_pin_ref *ref); -+struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs); -+extern struct xarray dpll_device_xa; -+extern struct xarray dpll_pin_xa; -+extern struct mutex dpll_lock; -+#endif -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -new file mode 100644 -index 000000000000..b47c3560b937 ---- /dev/null -+++ b/include/linux/dpll.h -@@ -0,0 +1,133 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ */ -+ -+#ifndef __DPLL_H__ -+#define __DPLL_H__ -+ -+#include -+#include -+#include -+ -+struct dpll_device; -+struct dpll_pin; -+ -+struct dpll_device_ops { -+ int (*mode_get)(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_mode *mode, struct netlink_ext_ack *extack); -+ bool (*mode_supported)(const struct dpll_device *dpll, void *dpll_priv, -+ const enum dpll_mode mode, -+ struct netlink_ext_ack *extack); -+ int (*lock_status_get)(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack); -+ int (*temp_get)(const struct dpll_device *dpll, void *dpll_priv, -+ s32 *temp, struct netlink_ext_ack *extack); -+}; -+ -+struct dpll_pin_ops { -+ int (*frequency_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const u64 frequency, -+ struct netlink_ext_ack *extack); -+ int (*frequency_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack); -+ int (*direction_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const enum dpll_pin_direction direction, -+ struct netlink_ext_ack *extack); -+ int (*direction_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack); -+ int (*state_on_pin_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack); -+ int (*state_on_dpll_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack); -+ int (*state_on_pin_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ const enum dpll_pin_state state, -+ struct netlink_ext_ack *extack); -+ int (*state_on_dpll_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ const enum dpll_pin_state state, -+ struct netlink_ext_ack *extack); -+ int (*prio_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u32 *prio, struct netlink_ext_ack *extack); -+ int (*prio_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const u32 prio, struct netlink_ext_ack *extack); -+}; -+ -+struct dpll_pin_frequency { -+ u64 min; -+ u64 max; -+}; -+ -+#define DPLL_PIN_FREQUENCY_RANGE(_min, _max) \ -+ { \ -+ .min = _min, \ -+ .max = _max, \ -+ } -+ -+#define DPLL_PIN_FREQUENCY(_val) DPLL_PIN_FREQUENCY_RANGE(_val, _val) -+#define DPLL_PIN_FREQUENCY_1PPS \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_1_HZ) -+#define DPLL_PIN_FREQUENCY_10MHZ \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_MHZ) -+#define DPLL_PIN_FREQUENCY_IRIG_B \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_10_KHZ) -+#define DPLL_PIN_FREQUENCY_DCF77 \ -+ DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ) -+ -+struct dpll_pin_properties { -+ const char *board_label; -+ const char *panel_label; -+ const char *package_label; -+ enum dpll_pin_type type; -+ unsigned long capabilities; -+ u32 freq_supported_num; -+ struct dpll_pin_frequency *freq_supported; -+}; -+ -+struct dpll_device * -+dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module); -+ -+void dpll_device_put(struct dpll_device *dpll); -+ -+int dpll_device_register(struct dpll_device *dpll, enum dpll_type type, -+ const struct dpll_device_ops *ops, void *priv); -+ -+void dpll_device_unregister(struct dpll_device *dpll, -+ const struct dpll_device_ops *ops, void *priv); -+ -+struct dpll_pin * -+dpll_pin_get(u64 clock_id, u32 dev_driver_id, struct module *module, -+ const struct dpll_pin_properties *prop); -+ -+int dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+void dpll_pin_put(struct dpll_pin *pin); -+ -+int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, -+ const struct dpll_pin_ops *ops, void *priv); -+ -+#endif --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch b/kernel-std/debian/patches/ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch deleted file mode 100644 index 79676a08..00000000 --- a/kernel-std/debian/patches/ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch +++ /dev/null @@ -1,1386 +0,0 @@ -From 692ed446afde68c556c94710aa10cd2ee4395f0d Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:38 +0100 -Subject: [PATCH 04/46] dpll: netlink: Add DPLL framework base functions - -DPLL framework is used to represent and configure DPLL devices -in systems. Each device that has DPLL and can configure inputs -and outputs can use this framework. - -Implement dpll netlink framework functions for enablement of dpll -subsystem netlink family. - -Co-developed-by: Milena Olech -Signed-off-by: Milena Olech -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Signed-off-by: Vadim Fedorenko -Co-developed-by: Arkadiusz Kubalewski -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 9d71b54b65b1fb6c0d3a6c5c88ba9b915c783fbc) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 11 +- - drivers/dpll/dpll_netlink.c | 1241 +++++++++++++++++++++++++++++++++++ - drivers/dpll/dpll_netlink.h | 13 + - include/linux/dpll.h | 4 + - 4 files changed, 1268 insertions(+), 1 deletion(-) - create mode 100644 drivers/dpll/dpll_netlink.c - create mode 100644 drivers/dpll/dpll_netlink.h - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 6449ba6a383b..3568149b9562 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -14,6 +14,7 @@ - #include - - #include "dpll_core.h" -+#include "dpll_netlink.h" - - /* Mutex lock to protect DPLL subsystem devices and pins */ - DEFINE_MUTEX(dpll_lock); -@@ -381,6 +382,7 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type, - } - - xa_set_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED); -+ dpll_device_create_ntf(dpll); - mutex_unlock(&dpll_lock); - - return 0; -@@ -404,6 +406,7 @@ void dpll_device_unregister(struct dpll_device *dpll, - - mutex_lock(&dpll_lock); - ASSERT_DPLL_REGISTERED(dpll); -+ dpll_device_delete_ntf(dpll); - reg = dpll_device_registration_find(dpll, ops, priv); - if (WARN_ON(!reg)) { - mutex_unlock(&dpll_lock); -@@ -528,6 +531,7 @@ __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, - if (ret) - goto ref_pin_del; - xa_set_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED); -+ dpll_pin_create_ntf(pin); - - return ret; - -@@ -602,6 +606,7 @@ void dpll_pin_unregister(struct dpll_device *dpll, struct dpll_pin *pin, - return; - - mutex_lock(&dpll_lock); -+ dpll_pin_delete_ntf(pin); - __dpll_pin_unregister(dpll, pin, ops, priv); - mutex_unlock(&dpll_lock); - } -@@ -650,6 +655,7 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - stop = i; - goto dpll_unregister; - } -+ dpll_pin_create_ntf(pin); - } - mutex_unlock(&dpll_lock); - -@@ -657,8 +663,10 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - - dpll_unregister: - xa_for_each(&parent->dpll_refs, i, ref) -- if (i < stop) -+ if (i < stop) { - __dpll_pin_unregister(ref->dpll, pin, ops, priv); -+ dpll_pin_delete_ntf(pin); -+ } - refcount_dec(&pin->refcount); - dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); - unlock: -@@ -684,6 +692,7 @@ void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, - unsigned long i; - - mutex_lock(&dpll_lock); -+ dpll_pin_delete_ntf(pin); - dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv); - refcount_dec(&pin->refcount); - xa_for_each(&pin->dpll_refs, i, ref) -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -new file mode 100644 -index 000000000000..9464a6865977 ---- /dev/null -+++ b/drivers/dpll/dpll_netlink.c -@@ -0,0 +1,1241 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Generic netlink for DPLL management framework -+ * -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ * -+ */ -+#include -+#include -+#include -+#include "dpll_core.h" -+#include "dpll_netlink.h" -+#include "dpll_nl.h" -+#include -+ -+#define ASSERT_NOT_NULL(ptr) (WARN_ON(!ptr)) -+ -+#define xa_for_each_marked_start(xa, index, entry, filter, start) \ -+ for (index = start, entry = xa_find(xa, &index, ULONG_MAX, filter); \ -+ entry; entry = xa_find_after(xa, &index, ULONG_MAX, filter)) -+ -+struct dpll_dump_ctx { -+ unsigned long idx; -+}; -+ -+static struct dpll_dump_ctx *dpll_dump_context(struct netlink_callback *cb) -+{ -+ return (struct dpll_dump_ctx *)cb->ctx; -+} -+ -+static int -+dpll_msg_add_dev_handle(struct sk_buff *msg, struct dpll_device *dpll) -+{ -+ if (nla_put_u32(msg, DPLL_A_ID, dpll->id)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id) -+{ -+ if (nla_put_u32(msg, DPLL_A_PIN_PARENT_ID, id)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+/** -+ * dpll_msg_add_pin_handle - attach pin handle attribute to a given message -+ * @msg: pointer to sk_buff message to attach a pin handle -+ * @pin: pin pointer -+ * -+ * Return: -+ * * 0 - success -+ * * -EMSGSIZE - no space in message to attach pin handle -+ */ -+static int -+dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) -+{ -+ if (!pin) -+ return 0; -+ if (nla_put_u32(msg, DPLL_A_PIN_ID, pin->id)) -+ return -EMSGSIZE; -+ return 0; -+} -+ -+static int -+dpll_msg_add_mode(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ enum dpll_mode mode; -+ int ret; -+ -+ ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_MODE, mode)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_mode_supported(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ enum dpll_mode mode; -+ -+ if (!ops->mode_supported) -+ return 0; -+ for (mode = DPLL_MODE_MANUAL; mode <= DPLL_MODE_MAX; mode++) -+ if (ops->mode_supported(dpll, dpll_priv(dpll), mode, extack)) -+ if (nla_put_u32(msg, DPLL_A_MODE_SUPPORTED, mode)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_lock_status(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ enum dpll_lock_status status; -+ int ret; -+ -+ ret = ops->lock_status_get(dpll, dpll_priv(dpll), &status, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_LOCK_STATUS, status)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_temp(struct sk_buff *msg, struct dpll_device *dpll, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_device_ops *ops = dpll_device_ops(dpll); -+ s32 temp; -+ int ret; -+ -+ if (!ops->temp_get) -+ return 0; -+ ret = ops->temp_get(dpll, dpll_priv(dpll), &temp, extack); -+ if (ret) -+ return ret; -+ if (nla_put_s32(msg, DPLL_A_TEMP, temp)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_prio(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ u32 prio; -+ int ret; -+ -+ if (!ops->prio_get) -+ return 0; -+ ret = ops->prio_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &prio, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_PIN_PRIO, prio)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_on_dpll_state(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ enum dpll_pin_state state; -+ int ret; -+ -+ if (!ops->state_on_dpll_get) -+ return 0; -+ ret = ops->state_on_dpll_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), &state, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_PIN_STATE, state)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_direction(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ enum dpll_pin_direction direction; -+ int ret; -+ -+ ret = ops->direction_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &direction, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_PIN_DIRECTION, direction)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ struct nlattr *nest; -+ int fs, ret; -+ u64 freq; -+ -+ if (!ops->frequency_get) -+ return 0; -+ ret = ops->frequency_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &freq, extack); -+ if (ret) -+ return ret; -+ if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY, sizeof(freq), &freq, -+ DPLL_A_PIN_PAD)) -+ return -EMSGSIZE; -+ for (fs = 0; fs < pin->prop->freq_supported_num; fs++) { -+ nest = nla_nest_start(msg, DPLL_A_PIN_FREQUENCY_SUPPORTED); -+ if (!nest) -+ return -EMSGSIZE; -+ freq = pin->prop->freq_supported[fs].min; -+ if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, sizeof(freq), -+ &freq, DPLL_A_PIN_PAD)) { -+ nla_nest_cancel(msg, nest); -+ return -EMSGSIZE; -+ } -+ freq = pin->prop->freq_supported[fs].max; -+ if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, sizeof(freq), -+ &freq, DPLL_A_PIN_PAD)) { -+ nla_nest_cancel(msg, nest); -+ return -EMSGSIZE; -+ } -+ nla_nest_end(msg, nest); -+ } -+ -+ return 0; -+} -+ -+static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) -+{ -+ int fs; -+ -+ for (fs = 0; fs < pin->prop->freq_supported_num; fs++) -+ if (freq >= pin->prop->freq_supported[fs].min && -+ freq <= pin->prop->freq_supported[fs].max) -+ return true; -+ return false; -+} -+ -+static int -+dpll_msg_add_pin_parents(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *dpll_ref, -+ struct netlink_ext_ack *extack) -+{ -+ enum dpll_pin_state state; -+ struct dpll_pin_ref *ref; -+ struct dpll_pin *ppin; -+ struct nlattr *nest; -+ unsigned long index; -+ int ret; -+ -+ xa_for_each(&pin->parent_refs, index, ref) { -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ void *parent_priv; -+ -+ ppin = ref->pin; -+ parent_priv = dpll_pin_on_dpll_priv(dpll_ref->dpll, ppin); -+ ret = ops->state_on_pin_get(pin, -+ dpll_pin_on_pin_priv(ppin, pin), -+ ppin, parent_priv, &state, extack); -+ if (ret) -+ return ret; -+ nest = nla_nest_start(msg, DPLL_A_PIN_PARENT_PIN); -+ if (!nest) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_dev_parent_handle(msg, ppin->id); -+ if (ret) -+ goto nest_cancel; -+ if (nla_put_u32(msg, DPLL_A_PIN_STATE, state)) { -+ ret = -EMSGSIZE; -+ goto nest_cancel; -+ } -+ nla_nest_end(msg, nest); -+ } -+ -+ return 0; -+ -+nest_cancel: -+ nla_nest_cancel(msg, nest); -+ return ret; -+} -+ -+static int -+dpll_msg_add_pin_dplls(struct sk_buff *msg, struct dpll_pin *pin, -+ struct netlink_ext_ack *extack) -+{ -+ struct dpll_pin_ref *ref; -+ struct nlattr *attr; -+ unsigned long index; -+ int ret; -+ -+ xa_for_each(&pin->dpll_refs, index, ref) { -+ attr = nla_nest_start(msg, DPLL_A_PIN_PARENT_DEVICE); -+ if (!attr) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_dev_parent_handle(msg, ref->dpll->id); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_pin_on_dpll_state(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_pin_prio(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_pin_direction(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ nla_nest_end(msg, attr); -+ } -+ -+ return 0; -+ -+nest_cancel: -+ nla_nest_end(msg, attr); -+ return ret; -+} -+ -+static int -+dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_properties *prop = pin->prop; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); -+ ASSERT_NOT_NULL(ref); -+ -+ ret = dpll_msg_add_pin_handle(msg, pin); -+ if (ret) -+ return ret; -+ if (nla_put_string(msg, DPLL_A_PIN_MODULE_NAME, -+ module_name(pin->module))) -+ return -EMSGSIZE; -+ if (nla_put_64bit(msg, DPLL_A_PIN_CLOCK_ID, sizeof(pin->clock_id), -+ &pin->clock_id, DPLL_A_PIN_PAD)) -+ return -EMSGSIZE; -+ if (prop->board_label && -+ nla_put_string(msg, DPLL_A_PIN_BOARD_LABEL, prop->board_label)) -+ return -EMSGSIZE; -+ if (prop->panel_label && -+ nla_put_string(msg, DPLL_A_PIN_PANEL_LABEL, prop->panel_label)) -+ return -EMSGSIZE; -+ if (prop->package_label && -+ nla_put_string(msg, DPLL_A_PIN_PACKAGE_LABEL, -+ prop->package_label)) -+ return -EMSGSIZE; -+ if (nla_put_u32(msg, DPLL_A_PIN_TYPE, prop->type)) -+ return -EMSGSIZE; -+ if (nla_put_u32(msg, DPLL_A_PIN_CAPABILITIES, prop->capabilities)) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_pin_freq(msg, pin, ref, extack); -+ if (ret) -+ return ret; -+ if (xa_empty(&pin->parent_refs)) -+ ret = dpll_msg_add_pin_dplls(msg, pin, extack); -+ else -+ ret = dpll_msg_add_pin_parents(msg, pin, ref, extack); -+ -+ return ret; -+} -+ -+static int -+dpll_device_get_one(struct dpll_device *dpll, struct sk_buff *msg, -+ struct netlink_ext_ack *extack) -+{ -+ int ret; -+ -+ ret = dpll_msg_add_dev_handle(msg, dpll); -+ if (ret) -+ return ret; -+ if (nla_put_string(msg, DPLL_A_MODULE_NAME, module_name(dpll->module))) -+ return -EMSGSIZE; -+ if (nla_put_64bit(msg, DPLL_A_CLOCK_ID, sizeof(dpll->clock_id), -+ &dpll->clock_id, DPLL_A_PAD)) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_temp(msg, dpll, extack); -+ if (ret) -+ return ret; -+ ret = dpll_msg_add_lock_status(msg, dpll, extack); -+ if (ret) -+ return ret; -+ ret = dpll_msg_add_mode(msg, dpll, extack); -+ if (ret) -+ return ret; -+ ret = dpll_msg_add_mode_supported(msg, dpll, extack); -+ if (ret) -+ return ret; -+ if (nla_put_u32(msg, DPLL_A_TYPE, dpll->type)) -+ return -EMSGSIZE; -+ -+ return ret; -+} -+ -+static int -+dpll_device_event_send(enum dpll_cmd event, struct dpll_device *dpll) -+{ -+ struct sk_buff *msg; -+ int ret = -ENOMEM; -+ void *hdr; -+ -+ if (WARN_ON(!xa_get_mark(&dpll_device_xa, dpll->id, DPLL_REGISTERED))) -+ return -ENODEV; -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put(msg, 0, 0, &dpll_nl_family, 0, event); -+ if (!hdr) -+ goto err_free_msg; -+ ret = dpll_device_get_one(dpll, msg, NULL); -+ if (ret) -+ goto err_cancel_msg; -+ genlmsg_end(msg, hdr); -+ genlmsg_multicast(&dpll_nl_family, msg, 0, 0, GFP_KERNEL); -+ -+ return 0; -+ -+err_cancel_msg: -+ genlmsg_cancel(msg, hdr); -+err_free_msg: -+ nlmsg_free(msg); -+ -+ return ret; -+} -+ -+int dpll_device_create_ntf(struct dpll_device *dpll) -+{ -+ return dpll_device_event_send(DPLL_CMD_DEVICE_CREATE_NTF, dpll); -+} -+ -+int dpll_device_delete_ntf(struct dpll_device *dpll) -+{ -+ return dpll_device_event_send(DPLL_CMD_DEVICE_DELETE_NTF, dpll); -+} -+ -+static int -+__dpll_device_change_ntf(struct dpll_device *dpll) -+{ -+ return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll); -+} -+ -+/** -+ * dpll_device_change_ntf - notify that the dpll device has been changed -+ * @dpll: registered dpll pointer -+ * -+ * Context: acquires and holds a dpll_lock. -+ * Return: 0 if succeeds, error code otherwise. -+ */ -+int dpll_device_change_ntf(struct dpll_device *dpll) -+{ -+ int ret; -+ -+ mutex_lock(&dpll_lock); -+ ret = __dpll_device_change_ntf(dpll); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_device_change_ntf); -+ -+static int -+dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) -+{ -+ struct sk_buff *msg; -+ int ret = -ENOMEM; -+ void *hdr; -+ -+ if (WARN_ON(!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))) -+ return -ENODEV; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ -+ hdr = genlmsg_put(msg, 0, 0, &dpll_nl_family, 0, event); -+ if (!hdr) -+ goto err_free_msg; -+ ret = dpll_cmd_pin_get_one(msg, pin, NULL); -+ if (ret) -+ goto err_cancel_msg; -+ genlmsg_end(msg, hdr); -+ genlmsg_multicast(&dpll_nl_family, msg, 0, 0, GFP_KERNEL); -+ -+ return 0; -+ -+err_cancel_msg: -+ genlmsg_cancel(msg, hdr); -+err_free_msg: -+ nlmsg_free(msg); -+ -+ return ret; -+} -+ -+int dpll_pin_create_ntf(struct dpll_pin *pin) -+{ -+ return dpll_pin_event_send(DPLL_CMD_PIN_CREATE_NTF, pin); -+} -+ -+int dpll_pin_delete_ntf(struct dpll_pin *pin) -+{ -+ return dpll_pin_event_send(DPLL_CMD_PIN_DELETE_NTF, pin); -+} -+ -+static int __dpll_pin_change_ntf(struct dpll_pin *pin) -+{ -+ return dpll_pin_event_send(DPLL_CMD_PIN_CHANGE_NTF, pin); -+} -+ -+/** -+ * dpll_pin_change_ntf - notify that the pin has been changed -+ * @pin: registered pin pointer -+ * -+ * Context: acquires and holds a dpll_lock. -+ * Return: 0 if succeeds, error code otherwise. -+ */ -+int dpll_pin_change_ntf(struct dpll_pin *pin) -+{ -+ int ret; -+ -+ mutex_lock(&dpll_lock); -+ ret = __dpll_pin_change_ntf(pin); -+ mutex_unlock(&dpll_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(dpll_pin_change_ntf); -+ -+static int -+dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, -+ struct netlink_ext_ack *extack) -+{ -+ u64 freq = nla_get_u64(a); -+ struct dpll_pin_ref *ref; -+ unsigned long i; -+ int ret; -+ -+ if (!dpll_pin_is_freq_supported(pin, freq)) { -+ NL_SET_ERR_MSG_ATTR(extack, a, "frequency is not supported by the device"); -+ return -EINVAL; -+ } -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ -+ if (!ops->frequency_set) -+ return -EOPNOTSUPP; -+ ret = ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), freq, extack); -+ if (ret) -+ return ret; -+ } -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ struct dpll_pin_ref *parent_ref; -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *dpll_ref; -+ void *pin_priv, *parent_priv; -+ struct dpll_pin *parent; -+ unsigned long i; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "state changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ parent = xa_load(&dpll_pin_xa, parent_idx); -+ if (!parent) -+ return -EINVAL; -+ parent_ref = xa_load(&pin->parent_refs, parent->pin_idx); -+ if (!parent_ref) -+ return -EINVAL; -+ xa_for_each(&parent->dpll_refs, i, dpll_ref) { -+ ops = dpll_pin_ops(parent_ref); -+ if (!ops->state_on_pin_set) -+ return -EOPNOTSUPP; -+ pin_priv = dpll_pin_on_pin_priv(parent, pin); -+ parent_priv = dpll_pin_on_dpll_priv(dpll_ref->dpll, parent); -+ ret = ops->state_on_pin_set(pin, pin_priv, parent, parent_priv, -+ state, extack); -+ if (ret) -+ return ret; -+ } -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "state changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ ASSERT_NOT_NULL(ref); -+ ops = dpll_pin_ops(ref); -+ if (!ops->state_on_dpll_set) -+ return -EOPNOTSUPP; -+ ret = ops->state_on_dpll_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), state, extack); -+ if (ret) -+ return ret; -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, -+ u32 prio, struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "prio changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ ASSERT_NOT_NULL(ref); -+ ops = dpll_pin_ops(ref); -+ if (!ops->prio_set) -+ return -EOPNOTSUPP; -+ ret = ops->prio_set(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), prio, extack); -+ if (ret) -+ return ret; -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, -+ enum dpll_pin_direction direction, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops; -+ struct dpll_pin_ref *ref; -+ int ret; -+ -+ if (!(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE & -+ pin->prop->capabilities)) { -+ NL_SET_ERR_MSG(extack, "direction changing is not allowed"); -+ return -EOPNOTSUPP; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ ASSERT_NOT_NULL(ref); -+ ops = dpll_pin_ops(ref); -+ if (!ops->direction_set) -+ return -EOPNOTSUPP; -+ ret = ops->direction_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), direction, extack); -+ if (ret) -+ return ret; -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+} -+ -+static int -+dpll_pin_parent_device_set(struct dpll_pin *pin, struct nlattr *parent_nest, -+ struct netlink_ext_ack *extack) -+{ -+ struct nlattr *tb[DPLL_A_PIN_MAX + 1]; -+ enum dpll_pin_direction direction; -+ enum dpll_pin_state state; -+ struct dpll_pin_ref *ref; -+ struct dpll_device *dpll; -+ u32 pdpll_idx, prio; -+ int ret; -+ -+ nla_parse_nested(tb, DPLL_A_PIN_MAX, parent_nest, -+ dpll_pin_parent_device_nl_policy, extack); -+ if (!tb[DPLL_A_PIN_PARENT_ID]) { -+ NL_SET_ERR_MSG(extack, "device parent id expected"); -+ return -EINVAL; -+ } -+ pdpll_idx = nla_get_u32(tb[DPLL_A_PIN_PARENT_ID]); -+ dpll = xa_load(&dpll_device_xa, pdpll_idx); -+ if (!dpll) { -+ NL_SET_ERR_MSG(extack, "parent device not found"); -+ return -EINVAL; -+ } -+ ref = xa_load(&pin->dpll_refs, dpll->id); -+ if (!ref) { -+ NL_SET_ERR_MSG(extack, "pin not connected to given parent device"); -+ return -EINVAL; -+ } -+ if (tb[DPLL_A_PIN_STATE]) { -+ state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -+ ret = dpll_pin_state_set(dpll, pin, state, extack); -+ if (ret) -+ return ret; -+ } -+ if (tb[DPLL_A_PIN_PRIO]) { -+ prio = nla_get_u32(tb[DPLL_A_PIN_PRIO]); -+ ret = dpll_pin_prio_set(dpll, pin, prio, extack); -+ if (ret) -+ return ret; -+ } -+ if (tb[DPLL_A_PIN_DIRECTION]) { -+ direction = nla_get_u32(tb[DPLL_A_PIN_DIRECTION]); -+ ret = dpll_pin_direction_set(pin, dpll, direction, extack); -+ if (ret) -+ return ret; -+ } -+ return 0; -+} -+ -+static int -+dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, -+ struct netlink_ext_ack *extack) -+{ -+ struct nlattr *tb[DPLL_A_PIN_MAX + 1]; -+ enum dpll_pin_state state; -+ u32 ppin_idx; -+ int ret; -+ -+ nla_parse_nested(tb, DPLL_A_PIN_MAX, parent_nest, -+ dpll_pin_parent_pin_nl_policy, extack); -+ if (!tb[DPLL_A_PIN_PARENT_ID]) { -+ NL_SET_ERR_MSG(extack, "device parent id expected"); -+ return -EINVAL; -+ } -+ ppin_idx = nla_get_u32(tb[DPLL_A_PIN_PARENT_ID]); -+ state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -+ ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int -+dpll_pin_set_from_nlattr(struct dpll_pin *pin, struct genl_info *info) -+{ -+ struct nlattr *a; -+ int rem, ret; -+ -+ nla_for_each_attr(a, genlmsg_data(info->genlhdr), -+ genlmsg_len(info->genlhdr), rem) { -+ switch (nla_type(a)) { -+ case DPLL_A_PIN_FREQUENCY: -+ ret = dpll_pin_freq_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; -+ case DPLL_A_PIN_PARENT_DEVICE: -+ ret = dpll_pin_parent_device_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; -+ case DPLL_A_PIN_PARENT_PIN: -+ ret = dpll_pin_parent_pin_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; -+ } -+ } -+ -+ return 0; -+} -+ -+static struct dpll_pin * -+dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, -+ enum dpll_pin_type type, struct nlattr *board_label, -+ struct nlattr *panel_label, struct nlattr *package_label, -+ struct netlink_ext_ack *extack) -+{ -+ bool board_match, panel_match, package_match; -+ struct dpll_pin *pin_match = NULL, *pin; -+ const struct dpll_pin_properties *prop; -+ bool cid_match, mod_match, type_match; -+ unsigned long i; -+ -+ xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) { -+ prop = pin->prop; -+ cid_match = clock_id ? pin->clock_id == clock_id : true; -+ mod_match = mod_name_attr && module_name(pin->module) ? -+ !nla_strcmp(mod_name_attr, -+ module_name(pin->module)) : true; -+ type_match = type ? prop->type == type : true; -+ board_match = board_label ? (prop->board_label ? -+ !nla_strcmp(board_label, prop->board_label) : false) : -+ true; -+ panel_match = panel_label ? (prop->panel_label ? -+ !nla_strcmp(panel_label, prop->panel_label) : false) : -+ true; -+ package_match = package_label ? (prop->package_label ? -+ !nla_strcmp(package_label, prop->package_label) : -+ false) : true; -+ if (cid_match && mod_match && type_match && board_match && -+ panel_match && package_match) { -+ if (pin_match) { -+ NL_SET_ERR_MSG(extack, "multiple matches"); -+ return ERR_PTR(-EINVAL); -+ } -+ pin_match = pin; -+ }; -+ } -+ if (!pin_match) { -+ NL_SET_ERR_MSG(extack, "not found"); -+ return ERR_PTR(-ENODEV); -+ } -+ return pin_match; -+} -+ -+static struct dpll_pin *dpll_pin_find_from_nlattr(struct genl_info *info) -+{ -+ struct nlattr *attr, *mod_name_attr = NULL, *board_label_attr = NULL, -+ *panel_label_attr = NULL, *package_label_attr = NULL; -+ enum dpll_pin_type type = 0; -+ u64 clock_id = 0; -+ int rem = 0; -+ -+ nla_for_each_attr(attr, genlmsg_data(info->genlhdr), -+ genlmsg_len(info->genlhdr), rem) { -+ switch (nla_type(attr)) { -+ case DPLL_A_PIN_CLOCK_ID: -+ if (clock_id) -+ goto duplicated_attr; -+ clock_id = nla_get_u64(attr); -+ break; -+ case DPLL_A_PIN_MODULE_NAME: -+ if (mod_name_attr) -+ goto duplicated_attr; -+ mod_name_attr = attr; -+ break; -+ case DPLL_A_PIN_TYPE: -+ if (type) -+ goto duplicated_attr; -+ type = nla_get_u32(attr); -+ break; -+ case DPLL_A_PIN_BOARD_LABEL: -+ if (board_label_attr) -+ goto duplicated_attr; -+ board_label_attr = attr; -+ break; -+ case DPLL_A_PIN_PANEL_LABEL: -+ if (panel_label_attr) -+ goto duplicated_attr; -+ panel_label_attr = attr; -+ break; -+ case DPLL_A_PIN_PACKAGE_LABEL: -+ if (package_label_attr) -+ goto duplicated_attr; -+ package_label_attr = attr; -+ break; -+ default: -+ break; -+ } -+ } -+ if (!(clock_id || mod_name_attr || board_label_attr || -+ panel_label_attr || package_label_attr)) { -+ NL_SET_ERR_MSG(info->extack, "missing attributes"); -+ return ERR_PTR(-EINVAL); -+ } -+ return dpll_pin_find(clock_id, mod_name_attr, type, board_label_attr, -+ panel_label_attr, package_label_attr, -+ info->extack); -+duplicated_attr: -+ NL_SET_ERR_MSG(info->extack, "duplicated attribute"); -+ return ERR_PTR(-EINVAL); -+} -+ -+int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_pin *pin; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_PIN_ID_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ -+ pin = dpll_pin_find_from_nlattr(info); -+ if (!IS_ERR(pin)) { -+ ret = dpll_msg_add_pin_handle(msg, pin); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_pin *pin = info->user_ptr[0]; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ if (!pin) -+ return -ENODEV; -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_PIN_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ ret = dpll_cmd_pin_get_one(msg, pin, info->extack); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) -+{ -+ struct dpll_dump_ctx *ctx = dpll_dump_context(cb); -+ struct dpll_pin *pin; -+ struct nlattr *hdr; -+ unsigned long i; -+ int ret = 0; -+ -+ xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, -+ ctx->idx) { -+ hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, -+ cb->nlh->nlmsg_seq, -+ &dpll_nl_family, NLM_F_MULTI, -+ DPLL_CMD_PIN_GET); -+ if (!hdr) { -+ ret = -EMSGSIZE; -+ break; -+ } -+ ret = dpll_cmd_pin_get_one(skb, pin, cb->extack); -+ if (ret) { -+ genlmsg_cancel(skb, hdr); -+ break; -+ } -+ genlmsg_end(skb, hdr); -+ } -+ if (ret == -EMSGSIZE) { -+ ctx->idx = i; -+ return skb->len; -+ } -+ return ret; -+} -+ -+int dpll_nl_pin_set_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_pin *pin = info->user_ptr[0]; -+ -+ return dpll_pin_set_from_nlattr(pin, info); -+} -+ -+static struct dpll_device * -+dpll_device_find(u64 clock_id, struct nlattr *mod_name_attr, -+ enum dpll_type type, struct netlink_ext_ack *extack) -+{ -+ struct dpll_device *dpll_match = NULL, *dpll; -+ bool cid_match, mod_match, type_match; -+ unsigned long i; -+ -+ xa_for_each_marked(&dpll_device_xa, i, dpll, DPLL_REGISTERED) { -+ cid_match = clock_id ? dpll->clock_id == clock_id : true; -+ mod_match = mod_name_attr ? (module_name(dpll->module) ? -+ !nla_strcmp(mod_name_attr, -+ module_name(dpll->module)) : false) : true; -+ type_match = type ? dpll->type == type : true; -+ if (cid_match && mod_match && type_match) { -+ if (dpll_match) { -+ NL_SET_ERR_MSG(extack, "multiple matches"); -+ return ERR_PTR(-EINVAL); -+ } -+ dpll_match = dpll; -+ } -+ } -+ if (!dpll_match) { -+ NL_SET_ERR_MSG(extack, "not found"); -+ return ERR_PTR(-ENODEV); -+ } -+ -+ return dpll_match; -+} -+ -+static struct dpll_device * -+dpll_device_find_from_nlattr(struct genl_info *info) -+{ -+ struct nlattr *attr, *mod_name_attr = NULL; -+ enum dpll_type type = 0; -+ u64 clock_id = 0; -+ int rem = 0; -+ -+ nla_for_each_attr(attr, genlmsg_data(info->genlhdr), -+ genlmsg_len(info->genlhdr), rem) { -+ switch (nla_type(attr)) { -+ case DPLL_A_CLOCK_ID: -+ if (clock_id) -+ goto duplicated_attr; -+ clock_id = nla_get_u64(attr); -+ break; -+ case DPLL_A_MODULE_NAME: -+ if (mod_name_attr) -+ goto duplicated_attr; -+ mod_name_attr = attr; -+ break; -+ case DPLL_A_TYPE: -+ if (type) -+ goto duplicated_attr; -+ type = nla_get_u32(attr); -+ break; -+ default: -+ break; -+ } -+ } -+ if (!clock_id && !mod_name_attr && !type) { -+ NL_SET_ERR_MSG(info->extack, "missing attributes"); -+ return ERR_PTR(-EINVAL); -+ } -+ return dpll_device_find(clock_id, mod_name_attr, type, info->extack); -+duplicated_attr: -+ NL_SET_ERR_MSG(info->extack, "duplicated attribute"); -+ return ERR_PTR(-EINVAL); -+} -+ -+int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_device *dpll; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_DEVICE_ID_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ -+ dpll = dpll_device_find_from_nlattr(info); -+ if (!IS_ERR(dpll)) { -+ ret = dpll_msg_add_dev_handle(msg, dpll); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct dpll_device *dpll = info->user_ptr[0]; -+ struct sk_buff *msg; -+ struct nlattr *hdr; -+ int ret; -+ -+ msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ return -ENOMEM; -+ hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, -+ DPLL_CMD_DEVICE_GET); -+ if (!hdr) -+ return -EMSGSIZE; -+ -+ ret = dpll_device_get_one(dpll, msg, info->extack); -+ if (ret) { -+ nlmsg_free(msg); -+ return ret; -+ } -+ genlmsg_end(msg, hdr); -+ -+ return genlmsg_reply(msg, info); -+} -+ -+int dpll_nl_device_set_doit(struct sk_buff *skb, struct genl_info *info) -+{ -+ /* placeholder for set command */ -+ return 0; -+} -+ -+int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) -+{ -+ struct dpll_dump_ctx *ctx = dpll_dump_context(cb); -+ struct dpll_device *dpll; -+ struct nlattr *hdr; -+ unsigned long i; -+ int ret = 0; -+ -+ xa_for_each_marked_start(&dpll_device_xa, i, dpll, DPLL_REGISTERED, -+ ctx->idx) { -+ hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, -+ cb->nlh->nlmsg_seq, &dpll_nl_family, -+ NLM_F_MULTI, DPLL_CMD_DEVICE_GET); -+ if (!hdr) { -+ ret = -EMSGSIZE; -+ break; -+ } -+ ret = dpll_device_get_one(dpll, skb, cb->extack); -+ if (ret) { -+ genlmsg_cancel(skb, hdr); -+ break; -+ } -+ genlmsg_end(skb, hdr); -+ } -+ if (ret == -EMSGSIZE) { -+ ctx->idx = i; -+ return skb->len; -+ } -+ return ret; -+} -+ -+int dpll_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ u32 id; -+ -+ if (GENL_REQ_ATTR_CHECK(info, DPLL_A_ID)) -+ return -EINVAL; -+ -+ mutex_lock(&dpll_lock); -+ id = nla_get_u32(info->attrs[DPLL_A_ID]); -+ info->user_ptr[0] = dpll_device_get_by_id(id); -+ if (!info->user_ptr[0]) { -+ NL_SET_ERR_MSG(info->extack, "device not found"); -+ goto unlock; -+ } -+ return 0; -+unlock: -+ mutex_unlock(&dpll_lock); -+ return -ENODEV; -+} -+ -+void dpll_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_unlock(&dpll_lock); -+} -+ -+int -+dpll_lock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_lock(&dpll_lock); -+ -+ return 0; -+} -+ -+void -+dpll_unlock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_unlock(&dpll_lock); -+} -+ -+int dpll_lock_dumpit(struct netlink_callback *cb) -+{ -+ mutex_lock(&dpll_lock); -+ -+ return 0; -+} -+ -+int dpll_unlock_dumpit(struct netlink_callback *cb) -+{ -+ mutex_unlock(&dpll_lock); -+ -+ return 0; -+} -+ -+int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ int ret; -+ -+ mutex_lock(&dpll_lock); -+ if (GENL_REQ_ATTR_CHECK(info, DPLL_A_PIN_ID)) { -+ ret = -EINVAL; -+ goto unlock_dev; -+ } -+ info->user_ptr[0] = xa_load(&dpll_pin_xa, -+ nla_get_u32(info->attrs[DPLL_A_PIN_ID])); -+ if (!info->user_ptr[0]) { -+ NL_SET_ERR_MSG(info->extack, "pin not found"); -+ ret = -ENODEV; -+ goto unlock_dev; -+ } -+ -+ return 0; -+ -+unlock_dev: -+ mutex_unlock(&dpll_lock); -+ return ret; -+} -+ -+void dpll_pin_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -+ struct genl_info *info) -+{ -+ mutex_unlock(&dpll_lock); -+} -diff --git a/drivers/dpll/dpll_netlink.h b/drivers/dpll/dpll_netlink.h -new file mode 100644 -index 000000000000..a9cfd55f57fc ---- /dev/null -+++ b/drivers/dpll/dpll_netlink.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Copyright (c) 2023 Meta Platforms, Inc. and affiliates -+ * Copyright (c) 2023 Intel and affiliates -+ */ -+ -+int dpll_device_create_ntf(struct dpll_device *dpll); -+ -+int dpll_device_delete_ntf(struct dpll_device *dpll); -+ -+int dpll_pin_create_ntf(struct dpll_pin *pin); -+ -+int dpll_pin_delete_ntf(struct dpll_pin *pin); -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -index b47c3560b937..2202310c10cd 100644 ---- a/include/linux/dpll.h -+++ b/include/linux/dpll.h -@@ -130,4 +130,8 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin, - const struct dpll_pin_ops *ops, void *priv); - -+int dpll_device_change_ntf(struct dpll_device *dpll); -+ -+int dpll_pin_change_ntf(struct dpll_pin *pin); -+ - #endif --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch b/kernel-std/debian/patches/ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch deleted file mode 100644 index 2a8f52fc..00000000 --- a/kernel-std/debian/patches/ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 41ef885df68771af53969ce6ce97016bc2fc418b Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 13 Sep 2023 21:49:39 +0100 -Subject: [PATCH 05/46] netdev: expose DPLL pin handle for netdevice - -In case netdevice represents a SyncE port, the user needs to understand -the connection between netdevice and associated DPLL pin. There might me -multiple netdevices pointing to the same pin, in case of VF/SF -implementation. - -Add a IFLA Netlink attribute to nest the DPLL pin handle, similar to -how it is implemented for devlink port. Add a struct dpll_pin pointer -to netdev and protect access to it by RTNL. Expose netdev_dpll_pin_set() -and netdev_dpll_pin_clear() helpers to the drivers so they can set/clear -the DPLL pin relationship to netdev. - -Note that during the lifetime of struct dpll_pin the pin handle does not -change. Therefore it is save to access it lockless. It is drivers -responsibility to call netdev_dpll_pin_clear() before dpll_pin_put(). - -Signed-off-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: David S. Miller -(cherry picked from commit 5f18426928800c59fb0f9bc8fb0c182bb6f5ee24) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 16 ++++++++++++++-- - include/linux/dpll.h | 15 +++++++++++++++ - include/linux/netdevice.h | 21 +++++++++++++++++++++ - include/uapi/linux/if_link.h | 2 +- - net/core/dev.c | 22 ++++++++++++++++++++++ - net/core/rtnetlink.c | 36 ++++++++++++++++++++++++++++++++++++ - 6 files changed, 109 insertions(+), 3 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 9464a6865977..764437a0661b 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -47,6 +47,18 @@ dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id) - return 0; - } - -+/** -+ * dpll_msg_pin_handle_size - get size of pin handle attribute for given pin -+ * @pin: pin pointer -+ * -+ * Return: byte size of pin handle attribute for given pin. -+ */ -+size_t dpll_msg_pin_handle_size(struct dpll_pin *pin) -+{ -+ return pin ? nla_total_size(4) : 0; /* DPLL_A_PIN_ID */ -+} -+EXPORT_SYMBOL_GPL(dpll_msg_pin_handle_size); -+ - /** - * dpll_msg_add_pin_handle - attach pin handle attribute to a given message - * @msg: pointer to sk_buff message to attach a pin handle -@@ -56,8 +68,7 @@ dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id) - * * 0 - success - * * -EMSGSIZE - no space in message to attach pin handle - */ --static int --dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) -+int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) - { - if (!pin) - return 0; -@@ -65,6 +76,7 @@ dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) - return -EMSGSIZE; - return 0; - } -+EXPORT_SYMBOL_GPL(dpll_msg_add_pin_handle); - - static int - dpll_msg_add_mode(struct sk_buff *msg, struct dpll_device *dpll, -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -index 2202310c10cd..bbc480cd2932 100644 ---- a/include/linux/dpll.h -+++ b/include/linux/dpll.h -@@ -101,6 +101,21 @@ struct dpll_pin_properties { - struct dpll_pin_frequency *freq_supported; - }; - -+#if IS_ENABLED(CONFIG_DPLL) -+size_t dpll_msg_pin_handle_size(struct dpll_pin *pin); -+int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin); -+#else -+static inline size_t dpll_msg_pin_handle_size(struct dpll_pin *pin) -+{ -+ return 0; -+} -+ -+static inline int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin) -+{ -+ return 0; -+} -+#endif -+ - struct dpll_device * - dpll_device_get(u64 clock_id, u32 dev_driver_id, struct module *module); - -diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h -index b8e60a20416b..272c44030449 100644 ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -79,6 +79,8 @@ struct xdp_buff; - struct xdp_frame; - struct xdp_metadata_ops; - struct xdp_md; -+/* DPLL specific */ -+struct dpll_pin; - - typedef u32 xdp_features_t; - -@@ -2060,6 +2062,9 @@ enum netdev_stat_type { - * SET_NETDEV_DEVLINK_PORT macro. This pointer is static - * during the time netdevice is registered. - * -+ * @dpll_pin: Pointer to the SyncE source pin of a DPLL subsystem, -+ * where the clock is recovered. -+ * - * FIXME: cleanup struct net_device such that network protocol info - * moves out. - */ -@@ -2417,6 +2422,10 @@ struct net_device { - struct rtnl_hw_stats64 *offload_xstats_l3; - - struct devlink_port *devlink_port; -+ -+#if IS_ENABLED(CONFIG_DPLL) -+ struct dpll_pin *dpll_pin; -+#endif - }; - #define to_net_dev(d) container_of(d, struct net_device, dev) - -@@ -3962,6 +3971,18 @@ int dev_get_mac_address(struct sockaddr *sa, struct net *net, char *dev_name); - int dev_get_port_parent_id(struct net_device *dev, - struct netdev_phys_item_id *ppid, bool recurse); - bool netdev_port_same_parent_id(struct net_device *a, struct net_device *b); -+void netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin); -+void netdev_dpll_pin_clear(struct net_device *dev); -+ -+static inline struct dpll_pin *netdev_dpll_pin(const struct net_device *dev) -+{ -+#if IS_ENABLED(CONFIG_DPLL) -+ return dev->dpll_pin; -+#else -+ return NULL; -+#endif -+} -+ - struct sk_buff *validate_xmit_skb_list(struct sk_buff *skb, struct net_device *dev, bool *again); - struct sk_buff *dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev, - struct netdev_queue *txq, int *ret); -diff --git a/include/uapi/linux/if_link.h b/include/uapi/linux/if_link.h -index ce3117df9cec..fac351a93aed 100644 ---- a/include/uapi/linux/if_link.h -+++ b/include/uapi/linux/if_link.h -@@ -376,7 +376,7 @@ enum { - - IFLA_GSO_IPV4_MAX_SIZE, - IFLA_GRO_IPV4_MAX_SIZE, -- -+ IFLA_DPLL_PIN, - __IFLA_MAX - }; - -diff --git a/net/core/dev.c b/net/core/dev.c -index 890b3b758d3f..5895bf5fab4b 100644 ---- a/net/core/dev.c -+++ b/net/core/dev.c -@@ -9064,6 +9064,28 @@ bool netdev_port_same_parent_id(struct net_device *a, struct net_device *b) - } - EXPORT_SYMBOL(netdev_port_same_parent_id); - -+static void netdev_dpll_pin_assign(struct net_device *dev, struct dpll_pin *dpll_pin) -+{ -+#if IS_ENABLED(CONFIG_DPLL) -+ rtnl_lock(); -+ dev->dpll_pin = dpll_pin; -+ rtnl_unlock(); -+#endif -+} -+ -+void netdev_dpll_pin_set(struct net_device *dev, struct dpll_pin *dpll_pin) -+{ -+ WARN_ON(!dpll_pin); -+ netdev_dpll_pin_assign(dev, dpll_pin); -+} -+EXPORT_SYMBOL(netdev_dpll_pin_set); -+ -+void netdev_dpll_pin_clear(struct net_device *dev) -+{ -+ netdev_dpll_pin_assign(dev, NULL); -+} -+EXPORT_SYMBOL(netdev_dpll_pin_clear); -+ - /** - * dev_change_proto_down - set carrier according to proto_down. - * -diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c -index 7ea66de1442c..bb004419d318 100644 ---- a/net/core/rtnetlink.c -+++ b/net/core/rtnetlink.c -@@ -57,6 +57,7 @@ - #if IS_ENABLED(CONFIG_IPV6) - #include - #endif -+#include - - #include "dev.h" - -@@ -1055,6 +1056,15 @@ static size_t rtnl_devlink_port_size(const struct net_device *dev) - return size; - } - -+static size_t rtnl_dpll_pin_size(const struct net_device *dev) -+{ -+ size_t size = nla_total_size(0); /* nest IFLA_DPLL_PIN */ -+ -+ size += dpll_msg_pin_handle_size(netdev_dpll_pin(dev)); -+ -+ return size; -+} -+ - static noinline size_t if_nlmsg_size(const struct net_device *dev, - u32 ext_filter_mask) - { -@@ -1111,6 +1121,7 @@ static noinline size_t if_nlmsg_size(const struct net_device *dev, - + rtnl_prop_list_size(dev) - + nla_total_size(MAX_ADDR_LEN) /* IFLA_PERM_ADDRESS */ - + rtnl_devlink_port_size(dev) -+ + rtnl_dpll_pin_size(dev) - + 0; - } - -@@ -1774,6 +1785,28 @@ static int rtnl_fill_devlink_port(struct sk_buff *skb, - return ret; - } - -+static int rtnl_fill_dpll_pin(struct sk_buff *skb, -+ const struct net_device *dev) -+{ -+ struct nlattr *dpll_pin_nest; -+ int ret; -+ -+ dpll_pin_nest = nla_nest_start(skb, IFLA_DPLL_PIN); -+ if (!dpll_pin_nest) -+ return -EMSGSIZE; -+ -+ ret = dpll_msg_add_pin_handle(skb, netdev_dpll_pin(dev)); -+ if (ret < 0) -+ goto nest_cancel; -+ -+ nla_nest_end(skb, dpll_pin_nest); -+ return 0; -+ -+nest_cancel: -+ nla_nest_cancel(skb, dpll_pin_nest); -+ return ret; -+} -+ - static int rtnl_fill_ifinfo(struct sk_buff *skb, - struct net_device *dev, struct net *src_net, - int type, u32 pid, u32 seq, u32 change, -@@ -1916,6 +1949,9 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, - if (rtnl_fill_devlink_port(skb, dev)) - goto nla_put_failure; - -+ if (rtnl_fill_dpll_pin(skb, dev)) -+ goto nla_put_failure; -+ - nlmsg_end(skb, nlh); - return 0; - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch b/kernel-std/debian/patches/ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch deleted file mode 100644 index 8c919f2b..00000000 --- a/kernel-std/debian/patches/ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch +++ /dev/null @@ -1,1643 +0,0 @@ -From e342f0214c4e4e0245b95c02acaea029c256edfb Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 13 Sep 2023 21:49:40 +0100 -Subject: [PATCH 06/46] ice: add admin commands to access cgu configuration - -Add firmware admin command to access clock generation unit -configuration, it is required to enable Extended PTP and SyncE features -in the driver. -Add definitions of possible hardware variations of input and output pins -related to clock generation unit and functions to access the data. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 8a3a565ff210a02a4db270a2e61c37b6687b15aa) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 2 + - .../net/ethernet/intel/ice/ice_adminq_cmd.h | 246 +++++++- - drivers/net/ethernet/intel/ice/ice_common.c | 492 +++++++++++++++- - drivers/net/ethernet/intel/ice/ice_common.h | 44 ++ - drivers/net/ethernet/intel/ice/ice_lib.c | 17 +- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 530 ++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 86 +++ - drivers/net/ethernet/intel/ice/ice_type.h | 1 + - 8 files changed, 1385 insertions(+), 33 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 2695794a5df7..72c296722e41 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -199,7 +199,9 @@ extern const char ice_drv_ver[]; - enum ice_feature { - ICE_F_DSCP, - ICE_F_PTP_EXTTS, -+ ICE_F_PHY_RCLK, - ICE_F_SMA_CTRL, -+ ICE_F_CGU, - ICE_F_GNSS, - ICE_F_ROCE_LAG, - ICE_F_SRIOV_LAG, -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index 72ca2199c957..aa532bfa1957 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -1352,6 +1352,30 @@ struct ice_aqc_set_mac_lb { - u8 reserved[15]; - }; - -+/* Set PHY recovered clock output (direct 0x0630) */ -+struct ice_aqc_set_phy_rec_clk_out { -+ u8 phy_output; -+ u8 port_num; -+#define ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT 0xFF -+ u8 flags; -+#define ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN BIT(0) -+ u8 rsvd; -+ __le32 freq; -+ u8 rsvd2[6]; -+ __le16 node_handle; -+}; -+ -+/* Get PHY recovered clock output (direct 0x0631) */ -+struct ice_aqc_get_phy_rec_clk_out { -+ u8 phy_output; -+ u8 port_num; -+#define ICE_AQC_GET_PHY_REC_CLK_OUT_CURR_PORT 0xFF -+ u8 flags; -+#define ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN BIT(0) -+ u8 rsvd[11]; -+ __le16 node_handle; -+}; -+ - struct ice_aqc_link_topo_params { - u8 lport_num; - u8 lport_num_valid; -@@ -1368,6 +1392,8 @@ struct ice_aqc_link_topo_params { - #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 -+#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 -+#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 - #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 - #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ - (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) -@@ -1404,8 +1430,12 @@ struct ice_aqc_link_topo_addr { - struct ice_aqc_get_link_topo { - struct ice_aqc_link_topo_addr addr; - u8 node_part_num; --#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 --#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 0x24 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 0x25 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY 0x30 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 - u8 rsvd[9]; - }; - -@@ -2126,6 +2156,193 @@ struct ice_aqc_get_pkg_info_resp { - struct ice_aqc_get_pkg_info pkg_info[]; - }; - -+/* Get CGU abilities command response data structure (indirect 0x0C61) */ -+struct ice_aqc_get_cgu_abilities { -+ u8 num_inputs; -+ u8 num_outputs; -+ u8 pps_dpll_idx; -+ u8 eec_dpll_idx; -+ __le32 max_in_freq; -+ __le32 max_in_phase_adj; -+ __le32 max_out_freq; -+ __le32 max_out_phase_adj; -+ u8 cgu_part_num; -+ u8 rsvd[3]; -+}; -+ -+/* Set CGU input config (direct 0x0C62) */ -+struct ice_aqc_set_cgu_input_config { -+ u8 input_idx; -+ u8 flags1; -+#define ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_FREQ BIT(6) -+#define ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY BIT(7) -+ u8 flags2; -+#define ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5) -+#define ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6) -+ u8 rsvd; -+ __le32 freq; -+ __le32 phase_delay; -+ u8 rsvd2[2]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU input config response descriptor structure (direct 0x0C63) */ -+struct ice_aqc_get_cgu_input_config { -+ u8 input_idx; -+ u8 status; -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_LOS BIT(0) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_SCM_FAIL BIT(1) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_CFM_FAIL BIT(2) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_GST_FAIL BIT(3) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_PFM_FAIL BIT(4) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_ESYNC_FAIL BIT(6) -+#define ICE_AQC_GET_CGU_IN_CFG_STATUS_ESYNC_CAP BIT(7) -+ u8 type; -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_READ_ONLY BIT(0) -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_GPS BIT(4) -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_EXTERNAL BIT(5) -+#define ICE_AQC_GET_CGU_IN_CFG_TYPE_PHY BIT(6) -+ u8 flags1; -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_PHASE_DELAY_SUPP BIT(0) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_1PPS_SUPP BIT(2) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_10MHZ_SUPP BIT(3) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG1_ANYFREQ BIT(7) -+ __le32 freq; -+ __le32 phase_delay; -+ u8 flags2; -+#define ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5) -+#define ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6) -+ u8 rsvd[1]; -+ __le16 node_handle; -+}; -+ -+/* Set CGU output config (direct 0x0C64) */ -+struct ice_aqc_set_cgu_output_config { -+ u8 output_idx; -+ u8 flags; -+#define ICE_AQC_SET_CGU_OUT_CFG_OUT_EN BIT(0) -+#define ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN BIT(1) -+#define ICE_AQC_SET_CGU_OUT_CFG_UPDATE_FREQ BIT(2) -+#define ICE_AQC_SET_CGU_OUT_CFG_UPDATE_PHASE BIT(3) -+#define ICE_AQC_SET_CGU_OUT_CFG_UPDATE_SRC_SEL BIT(4) -+ u8 src_sel; -+#define ICE_AQC_SET_CGU_OUT_CFG_DPLL_SRC_SEL ICE_M(0x1F, 0) -+ u8 rsvd; -+ __le32 freq; -+ __le32 phase_delay; -+ u8 rsvd2[2]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU output config (direct 0x0C65) */ -+struct ice_aqc_get_cgu_output_config { -+ u8 output_idx; -+ u8 flags; -+#define ICE_AQC_GET_CGU_OUT_CFG_OUT_EN BIT(0) -+#define ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN BIT(1) -+#define ICE_AQC_GET_CGU_OUT_CFG_ESYNC_ABILITY BIT(2) -+ u8 src_sel; -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT 0 -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL \ -+ ICE_M(0x1F, ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT) -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT 5 -+#define ICE_AQC_GET_CGU_OUT_CFG_DPLL_MODE \ -+ ICE_M(0x7, ICE_AQC_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT) -+ u8 rsvd; -+ __le32 freq; -+ __le32 src_freq; -+ u8 rsvd2[2]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU DPLL status (direct 0x0C66) */ -+struct ice_aqc_get_cgu_dpll_status { -+ u8 dpll_num; -+ u8 ref_state; -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_LOS BIT(0) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_SCM BIT(1) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_CFM BIT(2) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_GST BIT(3) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_PFM BIT(4) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_FAST_LOCK_EN BIT(5) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_REF_SW_ESYNC BIT(6) -+ u8 dpll_state; -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK BIT(0) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO BIT(1) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY BIT(2) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_FLHIT BIT(5) -+#define ICE_AQC_GET_CGU_DPLL_STATUS_STATE_PSLHIT BIT(7) -+ u8 config; -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_CLK_REF_SEL ICE_M(0x1F, 0) -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_SHIFT 5 -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE \ -+ ICE_M(0x7, ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_SHIFT) -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_FREERUN 0 -+#define ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_AUTOMATIC \ -+ ICE_M(0x3, ICE_AQC_GET_CGU_DPLL_CONFIG_MODE_SHIFT) -+ __le32 phase_offset_h; -+ __le32 phase_offset_l; -+ u8 eec_mode; -+#define ICE_AQC_GET_CGU_DPLL_STATUS_EEC_MODE_1 0xA -+#define ICE_AQC_GET_CGU_DPLL_STATUS_EEC_MODE_2 0xB -+#define ICE_AQC_GET_CGU_DPLL_STATUS_EEC_MODE_UNKNOWN 0xF -+ u8 rsvd[1]; -+ __le16 node_handle; -+}; -+ -+/* Set CGU DPLL config (direct 0x0C67) */ -+struct ice_aqc_set_cgu_dpll_config { -+ u8 dpll_num; -+ u8 ref_state; -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_LOS BIT(0) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_SCM BIT(1) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_CFM BIT(2) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_GST BIT(3) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_PFM BIT(4) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_FLOCK_EN BIT(5) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_REF_SW_ESYNC BIT(6) -+ u8 rsvd; -+ u8 config; -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_CLK_REF_SEL ICE_M(0x1F, 0) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_SHIFT 5 -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE \ -+ ICE_M(0x7, ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_SHIFT) -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_FREERUN 0 -+#define ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_AUTOMATIC \ -+ ICE_M(0x3, ICE_AQC_SET_CGU_DPLL_CONFIG_MODE_SHIFT) -+ u8 rsvd2[8]; -+ u8 eec_mode; -+ u8 rsvd3[1]; -+ __le16 node_handle; -+}; -+ -+/* Set CGU reference priority (direct 0x0C68) */ -+struct ice_aqc_set_cgu_ref_prio { -+ u8 dpll_num; -+ u8 ref_idx; -+ u8 ref_priority; -+ u8 rsvd[11]; -+ __le16 node_handle; -+}; -+ -+/* Get CGU reference priority (direct 0x0C69) */ -+struct ice_aqc_get_cgu_ref_prio { -+ u8 dpll_num; -+ u8 ref_idx; -+ u8 ref_priority; /* Valid only in response */ -+ u8 rsvd[13]; -+}; -+ -+/* Get CGU info (direct 0x0C6A) */ -+struct ice_aqc_get_cgu_info { -+ __le32 cgu_id; -+ __le32 cgu_cfg_ver; -+ __le32 cgu_fw_ver; -+ u8 node_part_num; -+ u8 dev_rev; -+ __le16 node_handle; -+}; -+ - /* Driver Shared Parameters (direct, 0x0C90) */ - struct ice_aqc_driver_shared_params { - u8 set_or_get_op; -@@ -2195,6 +2412,8 @@ struct ice_aq_desc { - struct ice_aqc_get_phy_caps get_phy; - struct ice_aqc_set_phy_cfg set_phy; - struct ice_aqc_restart_an restart_an; -+ struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out; -+ struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out; - struct ice_aqc_gpio read_write_gpio; - struct ice_aqc_sff_eeprom read_write_sff_param; - struct ice_aqc_set_port_id_led set_port_id_led; -@@ -2235,6 +2454,15 @@ struct ice_aq_desc { - struct ice_aqc_fw_logging fw_logging; - struct ice_aqc_get_clear_fw_log get_clear_fw_log; - struct ice_aqc_download_pkg download_pkg; -+ struct ice_aqc_set_cgu_input_config set_cgu_input_config; -+ struct ice_aqc_get_cgu_input_config get_cgu_input_config; -+ struct ice_aqc_set_cgu_output_config set_cgu_output_config; -+ struct ice_aqc_get_cgu_output_config get_cgu_output_config; -+ struct ice_aqc_get_cgu_dpll_status get_cgu_dpll_status; -+ struct ice_aqc_set_cgu_dpll_config set_cgu_dpll_config; -+ struct ice_aqc_set_cgu_ref_prio set_cgu_ref_prio; -+ struct ice_aqc_get_cgu_ref_prio get_cgu_ref_prio; -+ struct ice_aqc_get_cgu_info get_cgu_info; - struct ice_aqc_driver_shared_params drv_shared_params; - struct ice_aqc_set_mac_lb set_mac_lb; - struct ice_aqc_alloc_free_res_cmd sw_res_ctrl; -@@ -2359,6 +2587,8 @@ enum ice_adminq_opc { - ice_aqc_opc_get_link_status = 0x0607, - ice_aqc_opc_set_event_mask = 0x0613, - ice_aqc_opc_set_mac_lb = 0x0620, -+ ice_aqc_opc_set_phy_rec_clk_out = 0x0630, -+ ice_aqc_opc_get_phy_rec_clk_out = 0x0631, - ice_aqc_opc_get_link_topo = 0x06E0, - ice_aqc_opc_read_i2c = 0x06E2, - ice_aqc_opc_write_i2c = 0x06E3, -@@ -2414,6 +2644,18 @@ enum ice_adminq_opc { - ice_aqc_opc_update_pkg = 0x0C42, - ice_aqc_opc_get_pkg_info_list = 0x0C43, - -+ /* 1588/SyncE commands/events */ -+ ice_aqc_opc_get_cgu_abilities = 0x0C61, -+ ice_aqc_opc_set_cgu_input_config = 0x0C62, -+ ice_aqc_opc_get_cgu_input_config = 0x0C63, -+ ice_aqc_opc_set_cgu_output_config = 0x0C64, -+ ice_aqc_opc_get_cgu_output_config = 0x0C65, -+ ice_aqc_opc_get_cgu_dpll_status = 0x0C66, -+ ice_aqc_opc_set_cgu_dpll_config = 0x0C67, -+ ice_aqc_opc_set_cgu_ref_prio = 0x0C68, -+ ice_aqc_opc_get_cgu_ref_prio = 0x0C69, -+ ice_aqc_opc_get_cgu_info = 0x0C6A, -+ - ice_aqc_opc_driver_shared_params = 0x0C90, - - /* Standalone Commands/Events */ -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 80deca45ab59..089558b3b1ae 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -8,6 +8,7 @@ - #include "ice_ptp_hw.h" - - #define ICE_PF_RESET_WAIT_COUNT 300 -+#define ICE_MAX_NETLIST_SIZE 10 - - static const char * const ice_link_mode_str_low[] = { - [0] = "100BASE_TX", -@@ -435,6 +436,81 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, - return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); - } - -+/** -+ * ice_aq_get_netlist_node -+ * @hw: pointer to the hw struct -+ * @cmd: get_link_topo AQ structure -+ * @node_part_number: output node part number if node found -+ * @node_handle: output node handle parameter if node found -+ * -+ * Get netlist node handle. -+ */ -+int -+ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, -+ u8 *node_part_number, u16 *node_handle) -+{ -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); -+ desc.params.get_link_topo = *cmd; -+ -+ if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL)) -+ return -EINTR; -+ -+ if (node_handle) -+ *node_handle = -+ le16_to_cpu(desc.params.get_link_topo.addr.handle); -+ if (node_part_number) -+ *node_part_number = desc.params.get_link_topo.node_part_num; -+ -+ return 0; -+} -+ -+/** -+ * ice_find_netlist_node -+ * @hw: pointer to the hw struct -+ * @node_type_ctx: type of netlist node to look for -+ * @node_part_number: node part number to look for -+ * @node_handle: output parameter if node found - optional -+ * -+ * Find and return the node handle for a given node type and part number in the -+ * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST -+ * otherwise. If node_handle provided, it would be set to found node handle. -+ */ -+int -+ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -+ u16 *node_handle) -+{ -+ struct ice_aqc_get_link_topo cmd; -+ u8 rec_node_part_number; -+ u16 rec_node_handle; -+ u8 idx; -+ -+ for (idx = 0; idx < ICE_MAX_NETLIST_SIZE; idx++) { -+ int status; -+ -+ memset(&cmd, 0, sizeof(cmd)); -+ -+ cmd.addr.topo_params.node_type_ctx = -+ (node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S); -+ cmd.addr.topo_params.index = idx; -+ -+ status = ice_aq_get_netlist_node(hw, &cmd, -+ &rec_node_part_number, -+ &rec_node_handle); -+ if (status) -+ return status; -+ -+ if (rec_node_part_number == node_part_number) { -+ if (node_handle) -+ *node_handle = rec_node_handle; -+ return 0; -+ } -+ } -+ -+ return -ENOTBLK; -+} -+ - /** - * ice_is_media_cage_present - * @pi: port information structure -@@ -2654,33 +2730,6 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, - ice_recalc_port_limited_caps(hw, &dev_p->common_cap); - } - --/** -- * ice_aq_get_netlist_node -- * @hw: pointer to the hw struct -- * @cmd: get_link_topo AQ structure -- * @node_part_number: output node part number if node found -- * @node_handle: output node handle parameter if node found -- */ --static int --ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, -- u8 *node_part_number, u16 *node_handle) --{ -- struct ice_aq_desc desc; -- -- ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); -- desc.params.get_link_topo = *cmd; -- -- if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL)) -- return -EIO; -- -- if (node_handle) -- *node_handle = le16_to_cpu(desc.params.get_link_topo.addr.handle); -- if (node_part_number) -- *node_part_number = desc.params.get_link_topo.node_part_num; -- -- return 0; --} -- - /** - * ice_is_pf_c827 - check if pf contains c827 phy - * @hw: pointer to the hw struct -@@ -4998,6 +5047,395 @@ ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid, - return status; - } - -+/** -+ * ice_aq_get_cgu_abilities - get cgu abilities -+ * @hw: pointer to the HW struct -+ * @abilities: CGU abilities -+ * -+ * Get CGU abilities (0x0C61) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_abilities(struct ice_hw *hw, -+ struct ice_aqc_get_cgu_abilities *abilities) -+{ -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_abilities); -+ return ice_aq_send_cmd(hw, &desc, abilities, sizeof(*abilities), NULL); -+} -+ -+/** -+ * ice_aq_set_input_pin_cfg - set input pin config -+ * @hw: pointer to the HW struct -+ * @input_idx: Input index -+ * @flags1: Input flags -+ * @flags2: Input flags -+ * @freq: Frequency in Hz -+ * @phase_delay: Delay in ps -+ * -+ * Set CGU input config (0x0C62) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2, -+ u32 freq, s32 phase_delay) -+{ -+ struct ice_aqc_set_cgu_input_config *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_input_config); -+ cmd = &desc.params.set_cgu_input_config; -+ cmd->input_idx = input_idx; -+ cmd->flags1 = flags1; -+ cmd->flags2 = flags2; -+ cmd->freq = cpu_to_le32(freq); -+ cmd->phase_delay = cpu_to_le32(phase_delay); -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_get_input_pin_cfg - get input pin config -+ * @hw: pointer to the HW struct -+ * @input_idx: Input index -+ * @status: Pin status -+ * @type: Pin type -+ * @flags1: Input flags -+ * @flags2: Input flags -+ * @freq: Frequency in Hz -+ * @phase_delay: Delay in ps -+ * -+ * Get CGU input config (0x0C63) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type, -+ u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay) -+{ -+ struct ice_aqc_get_cgu_input_config *cmd; -+ struct ice_aq_desc desc; -+ int ret; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_input_config); -+ cmd = &desc.params.get_cgu_input_config; -+ cmd->input_idx = input_idx; -+ -+ ret = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!ret) { -+ if (status) -+ *status = cmd->status; -+ if (type) -+ *type = cmd->type; -+ if (flags1) -+ *flags1 = cmd->flags1; -+ if (flags2) -+ *flags2 = cmd->flags2; -+ if (freq) -+ *freq = le32_to_cpu(cmd->freq); -+ if (phase_delay) -+ *phase_delay = le32_to_cpu(cmd->phase_delay); -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_aq_set_output_pin_cfg - set output pin config -+ * @hw: pointer to the HW struct -+ * @output_idx: Output index -+ * @flags: Output flags -+ * @src_sel: Index of DPLL block -+ * @freq: Output frequency -+ * @phase_delay: Output phase compensation -+ * -+ * Set CGU output config (0x0C64) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags, -+ u8 src_sel, u32 freq, s32 phase_delay) -+{ -+ struct ice_aqc_set_cgu_output_config *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_output_config); -+ cmd = &desc.params.set_cgu_output_config; -+ cmd->output_idx = output_idx; -+ cmd->flags = flags; -+ cmd->src_sel = src_sel; -+ cmd->freq = cpu_to_le32(freq); -+ cmd->phase_delay = cpu_to_le32(phase_delay); -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_get_output_pin_cfg - get output pin config -+ * @hw: pointer to the HW struct -+ * @output_idx: Output index -+ * @flags: Output flags -+ * @src_sel: Internal DPLL source -+ * @freq: Output frequency -+ * @src_freq: Source frequency -+ * -+ * Get CGU output config (0x0C65) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 *flags, -+ u8 *src_sel, u32 *freq, u32 *src_freq) -+{ -+ struct ice_aqc_get_cgu_output_config *cmd; -+ struct ice_aq_desc desc; -+ int ret; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_output_config); -+ cmd = &desc.params.get_cgu_output_config; -+ cmd->output_idx = output_idx; -+ -+ ret = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!ret) { -+ if (flags) -+ *flags = cmd->flags; -+ if (src_sel) -+ *src_sel = cmd->src_sel; -+ if (freq) -+ *freq = le32_to_cpu(cmd->freq); -+ if (src_freq) -+ *src_freq = le32_to_cpu(cmd->src_freq); -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_aq_get_cgu_dpll_status - get dpll status -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_state: Reference clock state -+ * @config: current DPLL config -+ * @dpll_state: current DPLL state -+ * @phase_offset: Phase offset in ns -+ * @eec_mode: EEC_mode -+ * -+ * Get CGU DPLL status (0x0C66) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, -+ u8 *dpll_state, u8 *config, s64 *phase_offset, -+ u8 *eec_mode) -+{ -+ struct ice_aqc_get_cgu_dpll_status *cmd; -+ const s64 nsec_per_psec = 1000LL; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_dpll_status); -+ cmd = &desc.params.get_cgu_dpll_status; -+ cmd->dpll_num = dpll_num; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) { -+ *ref_state = cmd->ref_state; -+ *dpll_state = cmd->dpll_state; -+ *config = cmd->config; -+ *phase_offset = le32_to_cpu(cmd->phase_offset_h); -+ *phase_offset <<= 32; -+ *phase_offset += le32_to_cpu(cmd->phase_offset_l); -+ *phase_offset = div64_s64(sign_extend64(*phase_offset, 47), -+ nsec_per_psec); -+ *eec_mode = cmd->eec_mode; -+ } -+ -+ return status; -+} -+ -+/** -+ * ice_aq_set_cgu_dpll_config - set dpll config -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_state: Reference clock state -+ * @config: DPLL config -+ * @eec_mode: EEC mode -+ * -+ * Set CGU DPLL config (0x0C67) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_cgu_dpll_config(struct ice_hw *hw, u8 dpll_num, u8 ref_state, -+ u8 config, u8 eec_mode) -+{ -+ struct ice_aqc_set_cgu_dpll_config *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_dpll_config); -+ cmd = &desc.params.set_cgu_dpll_config; -+ cmd->dpll_num = dpll_num; -+ cmd->ref_state = ref_state; -+ cmd->config = config; -+ cmd->eec_mode = eec_mode; -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_set_cgu_ref_prio - set input reference priority -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_idx: Reference pin index -+ * @ref_priority: Reference input priority -+ * -+ * Set CGU reference priority (0x0C68) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 ref_priority) -+{ -+ struct ice_aqc_set_cgu_ref_prio *cmd; -+ struct ice_aq_desc desc; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_cgu_ref_prio); -+ cmd = &desc.params.set_cgu_ref_prio; -+ cmd->dpll_num = dpll_num; -+ cmd->ref_idx = ref_idx; -+ cmd->ref_priority = ref_priority; -+ -+ return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+} -+ -+/** -+ * ice_aq_get_cgu_ref_prio - get input reference priority -+ * @hw: pointer to the HW struct -+ * @dpll_num: DPLL index -+ * @ref_idx: Reference pin index -+ * @ref_prio: Reference input priority -+ * -+ * Get CGU reference priority (0x0C69) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 *ref_prio) -+{ -+ struct ice_aqc_get_cgu_ref_prio *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_ref_prio); -+ cmd = &desc.params.get_cgu_ref_prio; -+ cmd->dpll_num = dpll_num; -+ cmd->ref_idx = ref_idx; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) -+ *ref_prio = cmd->ref_priority; -+ -+ return status; -+} -+ -+/** -+ * ice_aq_get_cgu_info - get cgu info -+ * @hw: pointer to the HW struct -+ * @cgu_id: CGU ID -+ * @cgu_cfg_ver: CGU config version -+ * @cgu_fw_ver: CGU firmware version -+ * -+ * Get CGU info (0x0C6A) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_cgu_info(struct ice_hw *hw, u32 *cgu_id, u32 *cgu_cfg_ver, -+ u32 *cgu_fw_ver) -+{ -+ struct ice_aqc_get_cgu_info *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cgu_info); -+ cmd = &desc.params.get_cgu_info; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) { -+ *cgu_id = le32_to_cpu(cmd->cgu_id); -+ *cgu_cfg_ver = le32_to_cpu(cmd->cgu_cfg_ver); -+ *cgu_fw_ver = le32_to_cpu(cmd->cgu_fw_ver); -+ } -+ -+ return status; -+} -+ -+/** -+ * ice_aq_set_phy_rec_clk_out - set RCLK phy out -+ * @hw: pointer to the HW struct -+ * @phy_output: PHY reference clock output pin -+ * @enable: GPIO state to be applied -+ * @freq: PHY output frequency -+ * -+ * Set phy recovered clock as reference (0x0630) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, -+ u32 *freq) -+{ -+ struct ice_aqc_set_phy_rec_clk_out *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_rec_clk_out); -+ cmd = &desc.params.set_phy_rec_clk_out; -+ cmd->phy_output = phy_output; -+ cmd->port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; -+ cmd->flags = enable & ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN; -+ cmd->freq = cpu_to_le32(*freq); -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) -+ *freq = le32_to_cpu(cmd->freq); -+ -+ return status; -+} -+ -+/** -+ * ice_aq_get_phy_rec_clk_out - get phy recovered signal info -+ * @hw: pointer to the HW struct -+ * @phy_output: PHY reference clock output pin -+ * @port_num: Port number -+ * @flags: PHY flags -+ * @node_handle: PHY output frequency -+ * -+ * Get PHY recovered clock output info (0x0631) -+ * Return: 0 on success or negative value on failure. -+ */ -+int -+ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, u8 *port_num, -+ u8 *flags, u16 *node_handle) -+{ -+ struct ice_aqc_get_phy_rec_clk_out *cmd; -+ struct ice_aq_desc desc; -+ int status; -+ -+ ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_rec_clk_out); -+ cmd = &desc.params.get_phy_rec_clk_out; -+ cmd->phy_output = *phy_output; -+ -+ status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL); -+ if (!status) { -+ *phy_output = cmd->phy_output; -+ if (port_num) -+ *port_num = cmd->port_num; -+ if (flags) -+ *flags = cmd->flags; -+ if (node_handle) -+ *node_handle = le16_to_cpu(cmd->node_handle); -+ } -+ -+ return status; -+} -+ - /** - * ice_replay_pre_init - replay pre initialization - * @hw: pointer to the HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 226b81f97a92..74e44b450de4 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -94,6 +94,12 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, - struct ice_sq_cd *cd); - bool ice_is_pf_c827(struct ice_hw *hw); - int -+ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -+ u16 *node_handle); -+int -+ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, -+ u8 *node_part_number, u16 *node_handle); -+int - ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count, - enum ice_adminq_opc opc, struct ice_sq_cd *cd); - int -@@ -196,6 +202,44 @@ void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf); - struct ice_q_ctx * - ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle); - int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in); -+int -+ice_aq_get_cgu_abilities(struct ice_hw *hw, -+ struct ice_aqc_get_cgu_abilities *abilities); -+int -+ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2, -+ u32 freq, s32 phase_delay); -+int -+ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type, -+ u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay); -+int -+ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags, -+ u8 src_sel, u32 freq, s32 phase_delay); -+int -+ice_aq_get_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 *flags, -+ u8 *src_sel, u32 *freq, u32 *src_freq); -+int -+ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, -+ u8 *dpll_state, u8 *config, s64 *phase_offset, -+ u8 *eec_mode); -+int -+ice_aq_set_cgu_dpll_config(struct ice_hw *hw, u8 dpll_num, u8 ref_state, -+ u8 config, u8 eec_mode); -+int -+ice_aq_set_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 ref_priority); -+int -+ice_aq_get_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx, -+ u8 *ref_prio); -+int -+ice_aq_get_cgu_info(struct ice_hw *hw, u32 *cgu_id, u32 *cgu_cfg_ver, -+ u32 *cgu_fw_ver); -+ -+int -+ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable, -+ u32 *freq); -+int -+ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, u8 *port_num, -+ u8 *flags, u16 *node_handle); - void - ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, - u64 *prev_stat, u64 *cur_stat); -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 13ca3342a0ce..2847fc17d224 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4003,13 +4003,22 @@ void ice_init_feature_support(struct ice_pf *pf) - case ICE_DEV_ID_E810C_BACKPLANE: - case ICE_DEV_ID_E810C_QSFP: - case ICE_DEV_ID_E810C_SFP: -+ case ICE_DEV_ID_E810_XXV_BACKPLANE: -+ case ICE_DEV_ID_E810_XXV_QSFP: -+ case ICE_DEV_ID_E810_XXV_SFP: - ice_set_feature_support(pf, ICE_F_DSCP); - ice_set_feature_support(pf, ICE_F_PTP_EXTTS); -- if (ice_is_e810t(&pf->hw)) { -+ if (ice_is_phy_rclk_present(&pf->hw)) -+ ice_set_feature_support(pf, ICE_F_PHY_RCLK); -+ /* If we don't own the timer - don't enable other caps */ -+ if (!pf->hw.func_caps.ts_func_info.src_tmr_owned) -+ break; -+ if (ice_is_cgu_present(&pf->hw)) -+ ice_set_feature_support(pf, ICE_F_CGU); -+ if (ice_is_clock_mux_present_e810t(&pf->hw)) - ice_set_feature_support(pf, ICE_F_SMA_CTRL); -- if (ice_gnss_is_gps_present(&pf->hw)) -- ice_set_feature_support(pf, ICE_F_GNSS); -- } -+ if (ice_gnss_is_gps_present(&pf->hw)) -+ ice_set_feature_support(pf, ICE_F_GNSS); - break; - default: - break; -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index f818dd215c05..00ddf37296cc 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -7,6 +7,132 @@ - #include "ice_ptp_consts.h" - #include "ice_cgu_regs.h" - -+static struct dpll_pin_frequency ice_cgu_pin_freq_common[] = { -+ DPLL_PIN_FREQUENCY_1PPS, -+ DPLL_PIN_FREQUENCY_10MHZ, -+}; -+ -+static struct dpll_pin_frequency ice_cgu_pin_freq_1_hz[] = { -+ DPLL_PIN_FREQUENCY_1PPS, -+}; -+ -+static struct dpll_pin_frequency ice_cgu_pin_freq_10_mhz[] = { -+ DPLL_PIN_FREQUENCY_10MHZ, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_sfp_cgu_inputs[] = { -+ { "CVL-SDP22", ZL_REF0P, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "CVL-SDP20", ZL_REF0N, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "C827_0-RCLKA", ZL_REF1P, DPLL_PIN_TYPE_MUX, 0, }, -+ { "C827_0-RCLKB", ZL_REF1N, DPLL_PIN_TYPE_MUX, 0, }, -+ { "SMA1", ZL_REF3P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "SMA2/U.FL2", ZL_REF3N, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "GNSS-1PPS", ZL_REF4P, DPLL_PIN_TYPE_GNSS, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "OCXO", ZL_REF4N, DPLL_PIN_TYPE_INT_OSCILLATOR, 0, }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_qsfp_cgu_inputs[] = { -+ { "CVL-SDP22", ZL_REF0P, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "CVL-SDP20", ZL_REF0N, DPLL_PIN_TYPE_INT_OSCILLATOR, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "C827_0-RCLKA", ZL_REF1P, DPLL_PIN_TYPE_MUX, }, -+ { "C827_0-RCLKB", ZL_REF1N, DPLL_PIN_TYPE_MUX, }, -+ { "C827_1-RCLKA", ZL_REF2P, DPLL_PIN_TYPE_MUX, }, -+ { "C827_1-RCLKB", ZL_REF2N, DPLL_PIN_TYPE_MUX, }, -+ { "SMA1", ZL_REF3P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "SMA2/U.FL2", ZL_REF3N, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "GNSS-1PPS", ZL_REF4P, DPLL_PIN_TYPE_GNSS, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "OCXO", ZL_REF4N, DPLL_PIN_TYPE_INT_OSCILLATOR, }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_sfp_cgu_outputs[] = { -+ { "REF-SMA1", ZL_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "REF-SMA2/U.FL2", ZL_OUT1, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "PHY-CLK", ZL_OUT2, DPLL_PIN_TYPE_SYNCE_ETH_PORT, }, -+ { "MAC-CLK", ZL_OUT3, DPLL_PIN_TYPE_SYNCE_ETH_PORT, }, -+ { "CVL-SDP21", ZL_OUT4, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "CVL-SDP23", ZL_OUT5, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e810t_qsfp_cgu_outputs[] = { -+ { "REF-SMA1", ZL_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "REF-SMA2/U.FL2", ZL_OUT1, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "PHY-CLK", ZL_OUT2, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "PHY2-CLK", ZL_OUT3, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "MAC-CLK", ZL_OUT4, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "CVL-SDP21", ZL_OUT5, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "CVL-SDP23", ZL_OUT6, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_si_cgu_inputs[] = { -+ { "NONE", SI_REF0P, 0, 0 }, -+ { "NONE", SI_REF0N, 0, 0 }, -+ { "SYNCE0_DP", SI_REF1P, DPLL_PIN_TYPE_MUX, 0 }, -+ { "SYNCE0_DN", SI_REF1N, DPLL_PIN_TYPE_MUX, 0 }, -+ { "EXT_CLK_SYNC", SI_REF2P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "NONE", SI_REF2N, 0, 0 }, -+ { "EXT_PPS_OUT", SI_REF3, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "INT_PPS_OUT", SI_REF4, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_si_cgu_outputs[] = { -+ { "1588-TIME_SYNC", SI_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "PHY-CLK", SI_OUT1, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "10MHZ-SMA2", SI_OUT2, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_10_mhz), ice_cgu_pin_freq_10_mhz }, -+ { "PPS-SMA1", SI_OUT3, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_zl_cgu_inputs[] = { -+ { "NONE", ZL_REF0P, 0, 0 }, -+ { "INT_PPS_OUT", ZL_REF0N, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "SYNCE0_DP", ZL_REF1P, DPLL_PIN_TYPE_MUX, 0 }, -+ { "SYNCE0_DN", ZL_REF1N, DPLL_PIN_TYPE_MUX, 0 }, -+ { "NONE", ZL_REF2P, 0, 0 }, -+ { "NONE", ZL_REF2N, 0, 0 }, -+ { "EXT_CLK_SYNC", ZL_REF3P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "NONE", ZL_REF3N, 0, 0 }, -+ { "EXT_PPS_OUT", ZL_REF4P, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "OCXO", ZL_REF4N, DPLL_PIN_TYPE_INT_OSCILLATOR, 0 }, -+}; -+ -+static const struct ice_cgu_pin_desc ice_e823_zl_cgu_outputs[] = { -+ { "PPS-SMA1", ZL_OUT0, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_1_hz), ice_cgu_pin_freq_1_hz }, -+ { "10MHZ-SMA2", ZL_OUT1, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_10_mhz), ice_cgu_pin_freq_10_mhz }, -+ { "PHY-CLK", ZL_OUT2, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "1588-TIME_REF", ZL_OUT3, DPLL_PIN_TYPE_SYNCE_ETH_PORT, 0 }, -+ { "CPK-TIME_SYNC", ZL_OUT4, DPLL_PIN_TYPE_EXT, -+ ARRAY_SIZE(ice_cgu_pin_freq_common), ice_cgu_pin_freq_common }, -+ { "NONE", ZL_OUT5, 0, 0 }, -+}; -+ - /* Low level functions for interacting with and managing the device clock used - * for the Precision Time Protocol. - * -@@ -3353,6 +3479,90 @@ int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - return ice_clear_phy_tstamp_e822(hw, block, idx); - } - -+/** -+ * ice_is_phy_rclk_present - check recovered clk presence -+ * @hw: pointer to the hw struct -+ * -+ * Check if the PHY Recovered Clock device is present in the netlist -+ * Return: -+ * * true - device found in netlist -+ * * false - device not found -+ */ -+bool ice_is_phy_rclk_present(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && -+ ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_is_clock_mux_present_e810t -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Multiplexer device is present in the netlist -+ * Return: -+ * * true - device found in netlist -+ * * false - device not found -+ */ -+bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, -+ NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_get_pf_c827_idx - find and return the C827 index for the current pf -+ * @hw: pointer to the hw struct -+ * @idx: index of the found C827 PHY -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) -+{ -+ struct ice_aqc_get_link_topo cmd; -+ u8 node_part_number; -+ u16 node_handle; -+ int status; -+ u8 ctx; -+ -+ if (hw->mac_type != ICE_MAC_E810) -+ return -ENODEV; -+ -+ if (hw->device_id != ICE_DEV_ID_E810C_QSFP) { -+ *idx = C827_0; -+ return 0; -+ } -+ -+ memset(&cmd, 0, sizeof(cmd)); -+ -+ ctx = ICE_AQC_LINK_TOPO_NODE_TYPE_PHY << ICE_AQC_LINK_TOPO_NODE_TYPE_S; -+ ctx |= ICE_AQC_LINK_TOPO_NODE_CTX_PORT << ICE_AQC_LINK_TOPO_NODE_CTX_S; -+ cmd.addr.topo_params.node_type_ctx = ctx; -+ -+ status = ice_aq_get_netlist_node(hw, &cmd, &node_part_number, -+ &node_handle); -+ if (status || node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_C827) -+ return -ENOENT; -+ -+ if (node_handle == E810C_QSFP_C827_0_HANDLE) -+ *idx = C827_0; -+ else if (node_handle == E810C_QSFP_C827_1_HANDLE) -+ *idx = C827_1; -+ else -+ return -EIO; -+ -+ return 0; -+} -+ - /** - * ice_ptp_reset_ts_memory - Reset timestamp memory for all blocks - * @hw: pointer to the HW struct -@@ -3407,3 +3617,323 @@ int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - return ice_get_phy_tx_tstamp_ready_e822(hw, block, - tstamp_ready); - } -+ -+/** -+ * ice_is_cgu_present - check for CGU presence -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Generation Unit (CGU) device is present in the netlist -+ * Return: -+ * * true - cgu is present -+ * * false - cgu is not present -+ */ -+bool ice_is_cgu_present(struct ice_hw *hw) -+{ -+ if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; -+ return true; -+ } else if (!ice_find_netlist_node(hw, -+ ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; -+ return true; -+ } -+ -+ return false; -+} -+ -+/** -+ * ice_cgu_get_pin_desc_e823 - get pin description array -+ * @hw: pointer to the hw struct -+ * @input: if request is done against input or output pin -+ * @size: number of inputs/outputs -+ * -+ * Return: pointer to pin description array associated to given hw. -+ */ -+static const struct ice_cgu_pin_desc * -+ice_cgu_get_pin_desc_e823(struct ice_hw *hw, bool input, int *size) -+{ -+ static const struct ice_cgu_pin_desc *t; -+ -+ if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032) { -+ if (input) { -+ t = ice_e823_zl_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e823_zl_cgu_inputs); -+ } else { -+ t = ice_e823_zl_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e823_zl_cgu_outputs); -+ } -+ } else if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384) { -+ if (input) { -+ t = ice_e823_si_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e823_si_cgu_inputs); -+ } else { -+ t = ice_e823_si_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e823_si_cgu_outputs); -+ } -+ } else { -+ t = NULL; -+ *size = 0; -+ } -+ -+ return t; -+} -+ -+/** -+ * ice_cgu_get_pin_desc - get pin description array -+ * @hw: pointer to the hw struct -+ * @input: if request is done against input or output pins -+ * @size: size of array returned by function -+ * -+ * Return: pointer to pin description array associated to given hw. -+ */ -+static const struct ice_cgu_pin_desc * -+ice_cgu_get_pin_desc(struct ice_hw *hw, bool input, int *size) -+{ -+ const struct ice_cgu_pin_desc *t = NULL; -+ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E810C_SFP: -+ if (input) { -+ t = ice_e810t_sfp_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e810t_sfp_cgu_inputs); -+ } else { -+ t = ice_e810t_sfp_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e810t_sfp_cgu_outputs); -+ } -+ break; -+ case ICE_DEV_ID_E810C_QSFP: -+ if (input) { -+ t = ice_e810t_qsfp_cgu_inputs; -+ *size = ARRAY_SIZE(ice_e810t_qsfp_cgu_inputs); -+ } else { -+ t = ice_e810t_qsfp_cgu_outputs; -+ *size = ARRAY_SIZE(ice_e810t_qsfp_cgu_outputs); -+ } -+ break; -+ case ICE_DEV_ID_E823L_10G_BASE_T: -+ case ICE_DEV_ID_E823L_1GBE: -+ case ICE_DEV_ID_E823L_BACKPLANE: -+ case ICE_DEV_ID_E823L_QSFP: -+ case ICE_DEV_ID_E823L_SFP: -+ case ICE_DEV_ID_E823C_10G_BASE_T: -+ case ICE_DEV_ID_E823C_BACKPLANE: -+ case ICE_DEV_ID_E823C_QSFP: -+ case ICE_DEV_ID_E823C_SFP: -+ case ICE_DEV_ID_E823C_SGMII: -+ t = ice_cgu_get_pin_desc_e823(hw, input, size); -+ break; -+ default: -+ break; -+ } -+ -+ return t; -+} -+ -+/** -+ * ice_cgu_get_pin_type - get pin's type -+ * @hw: pointer to the hw struct -+ * @pin: pin index -+ * @input: if request is done against input or output pin -+ * -+ * Return: type of a pin. -+ */ -+enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input) -+{ -+ const struct ice_cgu_pin_desc *t; -+ int t_size; -+ -+ t = ice_cgu_get_pin_desc(hw, input, &t_size); -+ -+ if (!t) -+ return 0; -+ -+ if (pin >= t_size) -+ return 0; -+ -+ return t[pin].type; -+} -+ -+/** -+ * ice_cgu_get_pin_freq_supp - get pin's supported frequency -+ * @hw: pointer to the hw struct -+ * @pin: pin index -+ * @input: if request is done against input or output pin -+ * @num: output number of supported frequencies -+ * -+ * Get frequency supported number and array of supported frequencies. -+ * -+ * Return: array of supported frequencies for given pin. -+ */ -+struct dpll_pin_frequency * -+ice_cgu_get_pin_freq_supp(struct ice_hw *hw, u8 pin, bool input, u8 *num) -+{ -+ const struct ice_cgu_pin_desc *t; -+ int t_size; -+ -+ *num = 0; -+ t = ice_cgu_get_pin_desc(hw, input, &t_size); -+ if (!t) -+ return NULL; -+ if (pin >= t_size) -+ return NULL; -+ *num = t[pin].freq_supp_num; -+ -+ return t[pin].freq_supp; -+} -+ -+/** -+ * ice_cgu_get_pin_name - get pin's name -+ * @hw: pointer to the hw struct -+ * @pin: pin index -+ * @input: if request is done against input or output pin -+ * -+ * Return: -+ * * null terminated char array with name -+ * * NULL in case of failure -+ */ -+const char *ice_cgu_get_pin_name(struct ice_hw *hw, u8 pin, bool input) -+{ -+ const struct ice_cgu_pin_desc *t; -+ int t_size; -+ -+ t = ice_cgu_get_pin_desc(hw, input, &t_size); -+ -+ if (!t) -+ return NULL; -+ -+ if (pin >= t_size) -+ return NULL; -+ -+ return t[pin].name; -+} -+ -+/** -+ * ice_get_cgu_state - get the state of the DPLL -+ * @hw: pointer to the hw struct -+ * @dpll_idx: Index of internal DPLL unit -+ * @last_dpll_state: last known state of DPLL -+ * @pin: pointer to a buffer for returning currently active pin -+ * @ref_state: reference clock state -+ * @eec_mode: eec mode of the DPLL -+ * @phase_offset: pointer to a buffer for returning phase offset -+ * @dpll_state: state of the DPLL (output) -+ * -+ * This function will read the state of the DPLL(dpll_idx). Non-null -+ * 'pin', 'ref_state', 'eec_mode' and 'phase_offset' parameters are used to -+ * retrieve currently active pin, state, mode and phase_offset respectively. -+ * -+ * Return: state of the DPLL -+ */ -+int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, -+ enum dpll_lock_status last_dpll_state, u8 *pin, -+ u8 *ref_state, u8 *eec_mode, s64 *phase_offset, -+ enum dpll_lock_status *dpll_state) -+{ -+ u8 hw_ref_state, hw_dpll_state, hw_eec_mode, hw_config; -+ s64 hw_phase_offset; -+ int status; -+ -+ status = ice_aq_get_cgu_dpll_status(hw, dpll_idx, &hw_ref_state, -+ &hw_dpll_state, &hw_config, -+ &hw_phase_offset, &hw_eec_mode); -+ if (status) -+ return status; -+ -+ if (pin) -+ /* current ref pin in dpll_state_refsel_status_X register */ -+ *pin = hw_config & ICE_AQC_GET_CGU_DPLL_CONFIG_CLK_REF_SEL; -+ if (phase_offset) -+ *phase_offset = hw_phase_offset; -+ if (ref_state) -+ *ref_state = hw_ref_state; -+ if (eec_mode) -+ *eec_mode = hw_eec_mode; -+ if (!dpll_state) -+ return 0; -+ -+ /* According to ZL DPLL documentation, once state reach LOCKED_HO_ACQ -+ * it would never return to FREERUN. This aligns to ITU-T G.781 -+ * Recommendation. We cannot report HOLDOVER as HO memory is cleared -+ * while switching to another reference. -+ * Only for situations where previous state was either: "LOCKED without -+ * HO_ACQ" or "HOLDOVER" we actually back to FREERUN. -+ */ -+ if (hw_dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_LOCK) { -+ if (hw_dpll_state & ICE_AQC_GET_CGU_DPLL_STATUS_STATE_HO_READY) -+ *dpll_state = DPLL_LOCK_STATUS_LOCKED_HO_ACQ; -+ else -+ *dpll_state = DPLL_LOCK_STATUS_LOCKED; -+ } else if (last_dpll_state == DPLL_LOCK_STATUS_LOCKED_HO_ACQ || -+ last_dpll_state == DPLL_LOCK_STATUS_HOLDOVER) { -+ *dpll_state = DPLL_LOCK_STATUS_HOLDOVER; -+ } else { -+ *dpll_state = DPLL_LOCK_STATUS_UNLOCKED; -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_get_cgu_rclk_pin_info - get info on available recovered clock pins -+ * @hw: pointer to the hw struct -+ * @base_idx: returns index of first recovered clock pin on device -+ * @pin_num: returns number of recovered clock pins available on device -+ * -+ * Based on hw provide caller info about recovery clock pins available on the -+ * board. -+ * -+ * Return: -+ * * 0 - success, information is valid -+ * * negative - failure, information is not valid -+ */ -+int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) -+{ -+ u8 phy_idx; -+ int ret; -+ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E810C_SFP: -+ case ICE_DEV_ID_E810C_QSFP: -+ -+ ret = ice_get_pf_c827_idx(hw, &phy_idx); -+ if (ret) -+ return ret; -+ *base_idx = E810T_CGU_INPUT_C827(phy_idx, ICE_RCLKA_PIN); -+ *pin_num = ICE_E810_RCLK_PINS_NUM; -+ ret = 0; -+ break; -+ case ICE_DEV_ID_E823L_10G_BASE_T: -+ case ICE_DEV_ID_E823L_1GBE: -+ case ICE_DEV_ID_E823L_BACKPLANE: -+ case ICE_DEV_ID_E823L_QSFP: -+ case ICE_DEV_ID_E823L_SFP: -+ case ICE_DEV_ID_E823C_10G_BASE_T: -+ case ICE_DEV_ID_E823C_BACKPLANE: -+ case ICE_DEV_ID_E823C_QSFP: -+ case ICE_DEV_ID_E823C_SFP: -+ case ICE_DEV_ID_E823C_SGMII: -+ *pin_num = ICE_E822_RCLK_PINS_NUM; -+ ret = 0; -+ if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032) -+ *base_idx = ZL_REF1P; -+ else if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384) -+ *base_idx = SI_REF1P; -+ else -+ ret = -ENODEV; -+ -+ break; -+ default: -+ ret = -ENODEV; -+ break; -+ } -+ -+ return ret; -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 9aa10b0426fd..594cc6875a95 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -3,6 +3,7 @@ - - #ifndef _ICE_PTP_HW_H_ - #define _ICE_PTP_HW_H_ -+#include - - enum ice_ptp_tmr_cmd { - INIT_TIME, -@@ -110,6 +111,77 @@ struct ice_cgu_pll_params_e822 { - u32 post_pll_div; - }; - -+#define E810C_QSFP_C827_0_HANDLE 2 -+#define E810C_QSFP_C827_1_HANDLE 3 -+enum ice_e810_c827_idx { -+ C827_0, -+ C827_1 -+}; -+ -+enum ice_phy_rclk_pins { -+ ICE_RCLKA_PIN = 0, /* SCL pin */ -+ ICE_RCLKB_PIN, /* SDA pin */ -+}; -+ -+#define ICE_E810_RCLK_PINS_NUM (ICE_RCLKB_PIN + 1) -+#define ICE_E822_RCLK_PINS_NUM (ICE_RCLKA_PIN + 1) -+#define E810T_CGU_INPUT_C827(_phy, _pin) ((_phy) * ICE_E810_RCLK_PINS_NUM + \ -+ (_pin) + ZL_REF1P) -+ -+enum ice_zl_cgu_in_pins { -+ ZL_REF0P = 0, -+ ZL_REF0N, -+ ZL_REF1P, -+ ZL_REF1N, -+ ZL_REF2P, -+ ZL_REF2N, -+ ZL_REF3P, -+ ZL_REF3N, -+ ZL_REF4P, -+ ZL_REF4N, -+ NUM_ZL_CGU_INPUT_PINS -+}; -+ -+enum ice_zl_cgu_out_pins { -+ ZL_OUT0 = 0, -+ ZL_OUT1, -+ ZL_OUT2, -+ ZL_OUT3, -+ ZL_OUT4, -+ ZL_OUT5, -+ ZL_OUT6, -+ NUM_ZL_CGU_OUTPUT_PINS -+}; -+ -+enum ice_si_cgu_in_pins { -+ SI_REF0P = 0, -+ SI_REF0N, -+ SI_REF1P, -+ SI_REF1N, -+ SI_REF2P, -+ SI_REF2N, -+ SI_REF3, -+ SI_REF4, -+ NUM_SI_CGU_INPUT_PINS -+}; -+ -+enum ice_si_cgu_out_pins { -+ SI_OUT0 = 0, -+ SI_OUT1, -+ SI_OUT2, -+ SI_OUT3, -+ SI_OUT4, -+ NUM_SI_CGU_OUTPUT_PINS -+}; -+ -+struct ice_cgu_pin_desc { -+ char *name; -+ u8 index; -+ enum dpll_pin_type type; -+ u32 freq_supp_num; -+ struct dpll_pin_frequency *freq_supp; -+}; -+ - extern const struct - ice_cgu_pll_params_e822 e822_cgu_params[NUM_ICE_TIME_REF_FREQ]; - -@@ -197,6 +269,20 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw); - int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); - int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); - int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data); -+bool ice_is_pca9575_present(struct ice_hw *hw); -+bool ice_is_phy_rclk_present(struct ice_hw *hw); -+bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); -+int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx); -+bool ice_is_cgu_present(struct ice_hw *hw); -+enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input); -+struct dpll_pin_frequency * -+ice_cgu_get_pin_freq_supp(struct ice_hw *hw, u8 pin, bool input, u8 *num); -+const char *ice_cgu_get_pin_name(struct ice_hw *hw, u8 pin, bool input); -+int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, -+ enum dpll_lock_status last_dpll_state, u8 *pin, -+ u8 *ref_state, u8 *eec_mode, s64 *phase_offset, -+ enum dpll_lock_status *dpll_state); -+int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - - #define PFTSYN_SEM_BYTES 4 - -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 5e353b0cbe6f..5eb778d9ae64 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -965,6 +965,7 @@ struct ice_hw { - DECLARE_BITMAP(hw_ptype, ICE_FLOW_PTYPE_MAX); - u8 dvm_ena; - u16 io_expander_handle; -+ u8 cgu_part_number; - }; - - /* Statistics collected by each port, VSI, VEB, and S-channel */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch b/kernel-std/debian/patches/ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch deleted file mode 100644 index 28f51fc7..00000000 --- a/kernel-std/debian/patches/ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch +++ /dev/null @@ -1,2132 +0,0 @@ -From 91572478afe0c6537bf7a0d52dbd7062bacbb13a Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 13 Sep 2023 21:49:41 +0100 -Subject: [PATCH 07/46] ice: implement dpll interface to control cgu - -Control over clock generation unit is required for further development -of Synchronous Ethernet feature. Interface provides ability to obtain -current state of a dpll, its sources and outputs which are pins, and -allows their configuration. - -Co-developed-by: Milena Olech -Signed-off-by: Milena Olech -Co-developed-by: Michal Michalik -Signed-off-by: Michal Michalik -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit d7999f5ea64bb10d2857b8cbfe973be373bac7c9) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/Kconfig | 1 + - drivers/net/ethernet/intel/ice/Makefile | 3 +- - drivers/net/ethernet/intel/ice/ice.h | 3 + - drivers/net/ethernet/intel/ice/ice_dpll.c | 1904 +++++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_dpll.h | 104 ++ - drivers/net/ethernet/intel/ice/ice_main.c | 6 + - 6 files changed, 2020 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/intel/ice/ice_dpll.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_dpll.h - -diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig -index 9bc0a9519899..913dcf928d15 100644 ---- a/drivers/net/ethernet/intel/Kconfig -+++ b/drivers/net/ethernet/intel/Kconfig -@@ -284,6 +284,7 @@ config ICE - select DIMLIB - select NET_DEVLINK - select PLDMFW -+ select DPLL - help - This driver supports Intel(R) Ethernet Connection E800 Series of - devices. For more information on how to identify your adapter, go -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 960277d78e09..00806ddf5bf0 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -34,7 +34,8 @@ ice-y := ice_main.o \ - ice_lag.o \ - ice_ethtool.o \ - ice_repr.o \ -- ice_tc_lib.o -+ ice_tc_lib.o \ -+ ice_dpll.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 72c296722e41..537d5939c28e 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -76,6 +76,7 @@ - #include "ice_vsi_vlan_ops.h" - #include "ice_gnss.h" - #include "ice_irq.h" -+#include "ice_dpll.h" - - extern const char ice_drv_ver[]; - #define ICE_BAR0 0 -@@ -510,6 +511,7 @@ enum ice_pf_flags { - ICE_FLAG_UNPLUG_AUX_DEV, - ICE_FLAG_MTU_CHANGED, - ICE_FLAG_GNSS, /* GNSS successfully initialized */ -+ ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ - ICE_PF_FLAGS_NBITS /* must be last */ - }; - -@@ -642,6 +644,7 @@ struct ice_pf { - #define ICE_VF_AGG_NODE_ID_START 65 - #define ICE_MAX_VF_AGG_NODES 32 - struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; -+ struct ice_dplls dplls; - }; - - extern struct workqueue_struct *ice_lag_wq; -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -new file mode 100644 -index 000000000000..1faee9cb944d ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -0,0 +1,1904 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* Copyright (C) 2022, Intel Corporation. */ -+ -+#include "ice.h" -+#include "ice_lib.h" -+#include "ice_trace.h" -+#include -+ -+#define ICE_CGU_STATE_ACQ_ERR_THRESHOLD 50 -+#define ICE_DPLL_PIN_IDX_INVALID 0xff -+#define ICE_DPLL_RCLK_NUM_PER_PF 1 -+ -+/** -+ * enum ice_dpll_pin_type - enumerate ice pin types: -+ * @ICE_DPLL_PIN_INVALID: invalid pin type -+ * @ICE_DPLL_PIN_TYPE_INPUT: input pin -+ * @ICE_DPLL_PIN_TYPE_OUTPUT: output pin -+ * @ICE_DPLL_PIN_TYPE_RCLK_INPUT: recovery clock input pin -+ */ -+enum ice_dpll_pin_type { -+ ICE_DPLL_PIN_INVALID, -+ ICE_DPLL_PIN_TYPE_INPUT, -+ ICE_DPLL_PIN_TYPE_OUTPUT, -+ ICE_DPLL_PIN_TYPE_RCLK_INPUT, -+}; -+ -+static const char * const pin_type_name[] = { -+ [ICE_DPLL_PIN_TYPE_INPUT] = "input", -+ [ICE_DPLL_PIN_TYPE_OUTPUT] = "output", -+ [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input", -+}; -+ -+/** -+ * ice_dpll_pin_freq_set - set pin's frequency -+ * @pf: private board structure -+ * @pin: pointer to a pin -+ * @pin_type: type of pin being configured -+ * @freq: frequency to be set -+ * @extack: error reporting -+ * -+ * Set requested frequency on a pin. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error on AQ or wrong pin type given -+ */ -+static int -+ice_dpll_pin_freq_set(struct ice_pf *pf, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, const u32 freq, -+ struct netlink_ext_ack *extack) -+{ -+ u8 flags; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ flags = ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_FREQ; -+ ret = ice_aq_set_input_pin_cfg(&pf->hw, pin->idx, flags, -+ pin->flags[0], freq, 0); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ flags = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_FREQ; -+ ret = ice_aq_set_output_pin_cfg(&pf->hw, pin->idx, flags, -+ 0, freq, 0); -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (ret) { -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin freq:%u on pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ freq, pin->idx); -+ return ret; -+ } -+ pin->freq = freq; -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_frequency_set - wrapper for pin callback for set frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: frequency to be set -+ * @extack: error reporting -+ * @pin_type: type of pin being configured -+ * -+ * Wraps internal set frequency command on a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't set in hw -+ */ -+static int -+ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const u32 frequency, -+ struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_pin_freq_set(pf, p, pin_type, frequency, extack); -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_input_frequency_set - input pin callback for set frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: frequency to be set -+ * @extack: error reporting -+ * -+ * Wraps internal set frequency command on a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't set in hw -+ */ -+static int -+ice_dpll_input_frequency_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_set(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_output_frequency_set - output pin callback for set frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: frequency to be set -+ * @extack: error reporting -+ * -+ * Wraps internal set frequency command on a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't set in hw -+ */ -+static int -+ice_dpll_output_frequency_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_set(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_frequency_get - wrapper for pin callback for get frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: on success holds pin's frequency -+ * @extack: error reporting -+ * @pin_type: type of pin being configured -+ * -+ * Wraps internal get frequency command of a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't get from hw -+ */ -+static int -+ice_dpll_frequency_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *frequency = p->freq; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_input_frequency_get - input pin callback for get frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: on success holds pin's frequency -+ * @extack: error reporting -+ * -+ * Wraps internal get frequency command of a input pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't get from hw -+ */ -+static int -+ice_dpll_input_frequency_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_get(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_output_frequency_get - output pin callback for get frequency -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: pointer to dpll -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @frequency: on success holds pin's frequency -+ * @extack: error reporting -+ * -+ * Wraps internal get frequency command of a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error pin not found or couldn't get from hw -+ */ -+static int -+ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u64 *frequency, struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_frequency_get(pin, pin_priv, dpll, dpll_priv, frequency, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_pin_enable - enable a pin on dplls -+ * @hw: board private hw structure -+ * @pin: pointer to a pin -+ * @pin_type: type of pin being enabled -+ * @extack: error reporting -+ * -+ * Enable a pin on both dplls. Store current state in pin->flags. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - OK -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, -+ struct netlink_ext_ack *extack) -+{ -+ u8 flags = 0; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; -+ flags |= ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN; -+ ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; -+ flags |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; -+ ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0); -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to enable %s pin:%u\n", -+ ret, ice_aq_str(hw->adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_pin_disable - disable a pin on dplls -+ * @hw: board private hw structure -+ * @pin: pointer to a pin -+ * @pin_type: type of pin being disabled -+ * @extack: error reporting -+ * -+ * Disable a pin on both dplls. Store current state in pin->flags. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - OK -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_disable(struct ice_hw *hw, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, -+ struct netlink_ext_ack *extack) -+{ -+ u8 flags = 0; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; -+ ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) -+ flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; -+ ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0); -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to disable %s pin:%u\n", -+ ret, ice_aq_str(hw->adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_pin_state_update - update pin's state -+ * @pf: private board struct -+ * @pin: structure with pin attributes to be updated -+ * @pin_type: type of pin being updated -+ * @extack: error reporting -+ * -+ * Determine pin current state and frequency, then update struct -+ * holding the pin info. For input pin states are separated for each -+ * dpll, for rclk pins states are separated for each parent. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - OK -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, -+ enum ice_dpll_pin_type pin_type, -+ struct netlink_ext_ack *extack) -+{ -+ u8 parent, port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; -+ int ret; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ ret = ice_aq_get_input_pin_cfg(&pf->hw, pin->idx, NULL, NULL, -+ NULL, &pin->flags[0], -+ &pin->freq, NULL); -+ if (ret) -+ goto err; -+ if (ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN & pin->flags[0]) { -+ if (pin->pin) { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ pin->pin == pf->dplls.eec.active_input ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_SELECTABLE; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ pin->pin == pf->dplls.pps.active_input ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_SELECTABLE; -+ } else { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ DPLL_PIN_STATE_SELECTABLE; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ DPLL_PIN_STATE_SELECTABLE; -+ } -+ } else { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ } -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ ret = ice_aq_get_output_pin_cfg(&pf->hw, pin->idx, -+ &pin->flags[0], NULL, -+ &pin->freq, NULL); -+ if (ret) -+ goto err; -+ if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) -+ pin->state[0] = DPLL_PIN_STATE_CONNECTED; -+ else -+ pin->state[0] = DPLL_PIN_STATE_DISCONNECTED; -+ break; -+ case ICE_DPLL_PIN_TYPE_RCLK_INPUT: -+ for (parent = 0; parent < pf->dplls.rclk.num_parents; -+ parent++) { -+ u8 p = parent; -+ -+ ret = ice_aq_get_phy_rec_clk_out(&pf->hw, &p, -+ &port_num, -+ &pin->flags[parent], -+ NULL); -+ if (ret) -+ goto err; -+ if (ICE_AQC_GET_PHY_REC_CLK_OUT_OUT_EN & -+ pin->flags[parent]) -+ pin->state[parent] = DPLL_PIN_STATE_CONNECTED; -+ else -+ pin->state[parent] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ } -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+err: -+ if (extack) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to update %s pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ else -+ dev_err_ratelimited(ice_pf_to_dev(pf), -+ "err:%d %s failed to update %s pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ pin_type_name[pin_type], pin->idx); -+ return ret; -+} -+ -+/** -+ * ice_dpll_hw_input_prio_set - set input priority value in hardware -+ * @pf: board private structure -+ * @dpll: ice dpll pointer -+ * @pin: ice pin pointer -+ * @prio: priority value being set on a dpll -+ * @extack: error reporting -+ * -+ * Internal wrapper for setting the priority in the hardware. -+ * -+ * Context: Called under pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_hw_input_prio_set(struct ice_pf *pf, struct ice_dpll *dpll, -+ struct ice_dpll_pin *pin, const u32 prio, -+ struct netlink_ext_ack *extack) -+{ -+ int ret; -+ -+ ret = ice_aq_set_cgu_ref_prio(&pf->hw, dpll->dpll_idx, pin->idx, -+ (u8)prio); -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin prio:%u on pin:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ prio, pin->idx); -+ else -+ dpll->input_prio[pin->idx] = prio; -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_lock_status_get - get dpll lock status callback -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @status: on success holds dpll's lock status -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback, provides dpll's lock status. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_lock_status_get(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *status = d->dpll_state; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_mode_supported - check if dpll's working mode is supported -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @mode: mode to be checked for support -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Provides information if working mode is supported -+ * by dpll. -+ * -+ * Return: -+ * * true - mode is supported -+ * * false - mode is not supported -+ */ -+static bool ice_dpll_mode_supported(const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_mode mode, -+ struct netlink_ext_ack *extack) -+{ -+ if (mode == DPLL_MODE_AUTOMATIC) -+ return true; -+ -+ return false; -+} -+ -+/** -+ * ice_dpll_mode_get - get dpll's working mode -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @mode: on success holds current working mode of dpll -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Provides working mode of dpll. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int ice_dpll_mode_get(const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_mode *mode, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *mode = d->mode; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_pin_state_set - set pin's state on dpll -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @enable: if pin shalll be enabled -+ * @extack: error reporting -+ * @pin_type: type of a pin -+ * -+ * Set pin state on a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - OK or no change required -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ bool enable, struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ if (enable) -+ ret = ice_dpll_pin_enable(&pf->hw, p, pin_type, extack); -+ else -+ ret = ice_dpll_pin_disable(&pf->hw, p, pin_type, extack); -+ if (!ret) -+ ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_output_state_set - enable/disable output pin on dpll device -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: dpll being configured -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: state of pin to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Set given state on output type pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - successfully enabled mode -+ * * negative - failed to enable mode -+ */ -+static int -+ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ bool enable = state == DPLL_PIN_STATE_CONNECTED; -+ -+ return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_input_state_set - enable/disable input pin on dpll levice -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: dpll being configured -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: state of pin to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Enables given mode on input type pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - successfully enabled mode -+ * * negative - failed to enable mode -+ */ -+static int -+ice_dpll_input_state_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ bool enable = state == DPLL_PIN_STATE_SELECTABLE; -+ -+ return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_pin_state_get - set pin's state on dpll -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: on success holds state of the pin -+ * @extack: error reporting -+ * @pin_type: type of questioned pin -+ * -+ * Determine pin state set it on a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failed to get state -+ */ -+static int -+ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); -+ if (ret) -+ goto unlock; -+ if (pin_type == ICE_DPLL_PIN_TYPE_INPUT) -+ *state = p->state[d->dpll_idx]; -+ else if (pin_type == ICE_DPLL_PIN_TYPE_OUTPUT) -+ *state = p->state[0]; -+ ret = 0; -+unlock: -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_output_state_get - get output pin state on dpll device -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: on success holds state of the pin -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Check state of a pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failed to get state -+ */ -+static int -+ice_dpll_output_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_state_get(pin, pin_priv, dpll, dpll_priv, state, -+ extack, ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+/** -+ * ice_dpll_input_state_get - get input pin state on dpll device -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @state: on success holds state of the pin -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Check state of a input pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failed to get state -+ */ -+static int -+ice_dpll_input_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_state_get(pin, pin_priv, dpll, dpll_priv, state, -+ extack, ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_input_prio_get - get dpll's input prio -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @prio: on success - returns input priority on dpll -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting priority of a input pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_input_prio_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u32 *prio, struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *prio = d->input_prio[p->idx]; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_input_prio_set - set dpll input prio -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @prio: input priority to be set on dpll -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for setting priority of a input pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ u32 prio, struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ int ret; -+ -+ if (prio > ICE_DPLL_PRIO_MAX) { -+ NL_SET_ERR_MSG_FMT(extack, "prio out of supported range 0-%d", -+ ICE_DPLL_PRIO_MAX); -+ return -EINVAL; -+ } -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_input_direction - callback for get input pin direction -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @direction: holds input pin direction -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting direction of a input pin. -+ * -+ * Return: -+ * * 0 - success -+ */ -+static int -+ice_dpll_input_direction(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ *direction = DPLL_PIN_DIRECTION_INPUT; -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_output_direction - callback for get output pin direction -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @direction: holds output pin direction -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting direction of an output pin. -+ * -+ * Return: -+ * * 0 - success -+ */ -+static int -+ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ *direction = DPLL_PIN_DIRECTION_OUTPUT; -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_rclk_state_on_pin_set - set a state on rclk pin -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @parent_pin: pin parent pointer -+ * @parent_pin_priv: parent private data pointer passed on pin registration -+ * @state: state to be set on pin -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback, set a state of a rclk pin on a parent pin -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv, *parent = parent_pin_priv; -+ bool enable = state == DPLL_PIN_STATE_CONNECTED; -+ struct ice_pf *pf = p->pf; -+ int ret = -EINVAL; -+ u32 hw_idx; -+ -+ mutex_lock(&pf->dplls.lock); -+ hw_idx = parent->idx - pf->dplls.base_rclk_idx; -+ if (hw_idx >= pf->dplls.num_inputs) -+ goto unlock; -+ -+ if ((enable && p->state[hw_idx] == DPLL_PIN_STATE_CONNECTED) || -+ (!enable && p->state[hw_idx] == DPLL_PIN_STATE_DISCONNECTED)) { -+ NL_SET_ERR_MSG_FMT(extack, -+ "pin:%u state:%u on parent:%u already set", -+ p->idx, state, parent->idx); -+ goto unlock; -+ } -+ ret = ice_aq_set_phy_rec_clk_out(&pf->hw, hw_idx, enable, -+ &p->freq); -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin state:%u for pin:%u on parent:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ state, p->idx, parent->idx); -+unlock: -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_rclk_state_on_pin_get - get a state of rclk pin -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @parent_pin: pin parent pointer -+ * @parent_pin_priv: pin parent priv data pointer passed on pin registration -+ * @state: on success holds pin state on parent pin -+ * @extack: error reporting -+ * -+ * dpll subsystem callback, get a state of a recovered clock pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - failure -+ */ -+static int -+ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_pin *parent_pin, -+ void *parent_pin_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv, *parent = parent_pin_priv; -+ struct ice_pf *pf = p->pf; -+ int ret = -EINVAL; -+ u32 hw_idx; -+ -+ mutex_lock(&pf->dplls.lock); -+ hw_idx = parent->idx - pf->dplls.base_rclk_idx; -+ if (hw_idx >= pf->dplls.num_inputs) -+ goto unlock; -+ -+ ret = ice_dpll_pin_state_update(pf, p, ICE_DPLL_PIN_TYPE_RCLK_INPUT, -+ extack); -+ if (ret) -+ goto unlock; -+ -+ *state = p->state[hw_idx]; -+ ret = 0; -+unlock: -+ mutex_unlock(&pf->dplls.lock); -+ -+ return ret; -+} -+ -+static const struct dpll_pin_ops ice_dpll_rclk_ops = { -+ .state_on_pin_set = ice_dpll_rclk_state_on_pin_set, -+ .state_on_pin_get = ice_dpll_rclk_state_on_pin_get, -+ .direction_get = ice_dpll_input_direction, -+}; -+ -+static const struct dpll_pin_ops ice_dpll_input_ops = { -+ .frequency_get = ice_dpll_input_frequency_get, -+ .frequency_set = ice_dpll_input_frequency_set, -+ .state_on_dpll_get = ice_dpll_input_state_get, -+ .state_on_dpll_set = ice_dpll_input_state_set, -+ .prio_get = ice_dpll_input_prio_get, -+ .prio_set = ice_dpll_input_prio_set, -+ .direction_get = ice_dpll_input_direction, -+}; -+ -+static const struct dpll_pin_ops ice_dpll_output_ops = { -+ .frequency_get = ice_dpll_output_frequency_get, -+ .frequency_set = ice_dpll_output_frequency_set, -+ .state_on_dpll_get = ice_dpll_output_state_get, -+ .state_on_dpll_set = ice_dpll_output_state_set, -+ .direction_get = ice_dpll_output_direction, -+}; -+ -+static const struct dpll_device_ops ice_dpll_ops = { -+ .lock_status_get = ice_dpll_lock_status_get, -+ .mode_supported = ice_dpll_mode_supported, -+ .mode_get = ice_dpll_mode_get, -+}; -+ -+/** -+ * ice_generate_clock_id - generates unique clock_id for registering dpll. -+ * @pf: board private structure -+ * -+ * Generates unique (per board) clock_id for allocation and search of dpll -+ * devices in Linux dpll subsystem. -+ * -+ * Return: generated clock id for the board -+ */ -+static u64 ice_generate_clock_id(struct ice_pf *pf) -+{ -+ return pci_get_dsn(pf->pdev); -+} -+ -+/** -+ * ice_dpll_notify_changes - notify dpll subsystem about changes -+ * @d: pointer do dpll -+ * -+ * Once change detected appropriate event is submitted to the dpll subsystem. -+ */ -+static void ice_dpll_notify_changes(struct ice_dpll *d) -+{ -+ if (d->prev_dpll_state != d->dpll_state) { -+ d->prev_dpll_state = d->dpll_state; -+ dpll_device_change_ntf(d->dpll); -+ } -+ if (d->prev_input != d->active_input) { -+ if (d->prev_input) -+ dpll_pin_change_ntf(d->prev_input); -+ d->prev_input = d->active_input; -+ if (d->active_input) -+ dpll_pin_change_ntf(d->active_input); -+ } -+} -+ -+/** -+ * ice_dpll_update_state - update dpll state -+ * @pf: pf private structure -+ * @d: pointer to queried dpll device -+ * @init: if function called on initialization of ice dpll -+ * -+ * Poll current state of dpll from hw and update ice_dpll struct. -+ * -+ * Context: Called by kworker under pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - AQ failure -+ */ -+static int -+ice_dpll_update_state(struct ice_pf *pf, struct ice_dpll *d, bool init) -+{ -+ struct ice_dpll_pin *p = NULL; -+ int ret; -+ -+ ret = ice_get_cgu_state(&pf->hw, d->dpll_idx, d->prev_dpll_state, -+ &d->input_idx, &d->ref_state, &d->eec_mode, -+ &d->phase_shift, &d->dpll_state); -+ -+ dev_dbg(ice_pf_to_dev(pf), -+ "update dpll=%d, prev_src_idx:%u, src_idx:%u, state:%d, prev:%d mode:%d\n", -+ d->dpll_idx, d->prev_input_idx, d->input_idx, -+ d->dpll_state, d->prev_dpll_state, d->mode); -+ if (ret) { -+ dev_err(ice_pf_to_dev(pf), -+ "update dpll=%d state failed, ret=%d %s\n", -+ d->dpll_idx, ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status)); -+ return ret; -+ } -+ if (init) { -+ if (d->dpll_state == DPLL_LOCK_STATUS_LOCKED || -+ d->dpll_state == DPLL_LOCK_STATUS_LOCKED_HO_ACQ) -+ d->active_input = pf->dplls.inputs[d->input_idx].pin; -+ p = &pf->dplls.inputs[d->input_idx]; -+ return ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, NULL); -+ } -+ if (d->dpll_state == DPLL_LOCK_STATUS_HOLDOVER || -+ d->dpll_state == DPLL_LOCK_STATUS_UNLOCKED) { -+ d->active_input = NULL; -+ if (d->input_idx != ICE_DPLL_PIN_IDX_INVALID) -+ p = &pf->dplls.inputs[d->input_idx]; -+ d->prev_input_idx = ICE_DPLL_PIN_IDX_INVALID; -+ d->input_idx = ICE_DPLL_PIN_IDX_INVALID; -+ if (!p) -+ return 0; -+ ret = ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, NULL); -+ } else if (d->input_idx != d->prev_input_idx) { -+ if (d->prev_input_idx != ICE_DPLL_PIN_IDX_INVALID) { -+ p = &pf->dplls.inputs[d->prev_input_idx]; -+ ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, -+ NULL); -+ } -+ if (d->input_idx != ICE_DPLL_PIN_IDX_INVALID) { -+ p = &pf->dplls.inputs[d->input_idx]; -+ d->active_input = p->pin; -+ ice_dpll_pin_state_update(pf, p, -+ ICE_DPLL_PIN_TYPE_INPUT, -+ NULL); -+ } -+ d->prev_input_idx = d->input_idx; -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_periodic_work - DPLLs periodic worker -+ * @work: pointer to kthread_work structure -+ * -+ * DPLLs periodic worker is responsible for polling state of dpll. -+ * Context: Holds pf->dplls.lock -+ */ -+static void ice_dpll_periodic_work(struct kthread_work *work) -+{ -+ struct ice_dplls *d = container_of(work, struct ice_dplls, work.work); -+ struct ice_pf *pf = container_of(d, struct ice_pf, dplls); -+ struct ice_dpll *de = &pf->dplls.eec; -+ struct ice_dpll *dp = &pf->dplls.pps; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ ret = ice_dpll_update_state(pf, de, false); -+ if (!ret) -+ ret = ice_dpll_update_state(pf, dp, false); -+ if (ret) { -+ d->cgu_state_acq_err_num++; -+ /* stop rescheduling this worker */ -+ if (d->cgu_state_acq_err_num > -+ ICE_CGU_STATE_ACQ_ERR_THRESHOLD) { -+ dev_err(ice_pf_to_dev(pf), -+ "EEC/PPS DPLLs periodic work disabled\n"); -+ mutex_unlock(&pf->dplls.lock); -+ return; -+ } -+ } -+ mutex_unlock(&pf->dplls.lock); -+ ice_dpll_notify_changes(de); -+ ice_dpll_notify_changes(dp); -+ -+ /* Run twice a second or reschedule if update failed */ -+ kthread_queue_delayed_work(d->kworker, &d->work, -+ ret ? msecs_to_jiffies(10) : -+ msecs_to_jiffies(500)); -+} -+ -+/** -+ * ice_dpll_release_pins - release pins resources from dpll subsystem -+ * @pins: pointer to pins array -+ * @count: number of pins -+ * -+ * Release resources of given pins array in the dpll subsystem. -+ */ -+static void ice_dpll_release_pins(struct ice_dpll_pin *pins, int count) -+{ -+ int i; -+ -+ for (i = 0; i < count; i++) -+ dpll_pin_put(pins[i].pin); -+} -+ -+/** -+ * ice_dpll_get_pins - get pins from dpll subsystem -+ * @pf: board private structure -+ * @pins: pointer to pins array -+ * @start_idx: get starts from this pin idx value -+ * @count: number of pins -+ * @clock_id: clock_id of dpll device -+ * -+ * Get pins - allocate - in dpll subsystem, store them in pin field of given -+ * pins array. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - allocation failure reason -+ */ -+static int -+ice_dpll_get_pins(struct ice_pf *pf, struct ice_dpll_pin *pins, -+ int start_idx, int count, u64 clock_id) -+{ -+ int i, ret; -+ -+ for (i = 0; i < count; i++) { -+ pins[i].pin = dpll_pin_get(clock_id, i + start_idx, THIS_MODULE, -+ &pins[i].prop); -+ if (IS_ERR(pins[i].pin)) { -+ ret = PTR_ERR(pins[i].pin); -+ goto release_pins; -+ } -+ } -+ -+ return 0; -+ -+release_pins: -+ while (--i >= 0) -+ dpll_pin_put(pins[i].pin); -+ return ret; -+} -+ -+/** -+ * ice_dpll_unregister_pins - unregister pins from a dpll -+ * @dpll: dpll device pointer -+ * @pins: pointer to pins array -+ * @ops: callback ops registered with the pins -+ * @count: number of pins -+ * -+ * Unregister pins of a given array of pins from given dpll device registered in -+ * dpll subsystem. -+ */ -+static void -+ice_dpll_unregister_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins, -+ const struct dpll_pin_ops *ops, int count) -+{ -+ int i; -+ -+ for (i = 0; i < count; i++) -+ dpll_pin_unregister(dpll, pins[i].pin, ops, &pins[i]); -+} -+ -+/** -+ * ice_dpll_register_pins - register pins with a dpll -+ * @dpll: dpll pointer to register pins with -+ * @pins: pointer to pins array -+ * @ops: callback ops registered with the pins -+ * @count: number of pins -+ * -+ * Register pins of a given array with given dpll in dpll subsystem. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - registration failure reason -+ */ -+static int -+ice_dpll_register_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins, -+ const struct dpll_pin_ops *ops, int count) -+{ -+ int ret, i; -+ -+ for (i = 0; i < count; i++) { -+ ret = dpll_pin_register(dpll, pins[i].pin, ops, &pins[i]); -+ if (ret) -+ goto unregister_pins; -+ } -+ -+ return 0; -+ -+unregister_pins: -+ while (--i >= 0) -+ dpll_pin_unregister(dpll, pins[i].pin, ops, &pins[i]); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_direct_pins - deinitialize direct pins -+ * @cgu: if cgu is present and controlled by this NIC -+ * @pins: pointer to pins array -+ * @count: number of pins -+ * @ops: callback ops registered with the pins -+ * @first: dpll device pointer -+ * @second: dpll device pointer -+ * -+ * If cgu is owned unregister pins from given dplls. -+ * Release pins resources to the dpll subsystem. -+ */ -+static void -+ice_dpll_deinit_direct_pins(bool cgu, struct ice_dpll_pin *pins, int count, -+ const struct dpll_pin_ops *ops, -+ struct dpll_device *first, -+ struct dpll_device *second) -+{ -+ if (cgu) { -+ ice_dpll_unregister_pins(first, pins, ops, count); -+ ice_dpll_unregister_pins(second, pins, ops, count); -+ } -+ ice_dpll_release_pins(pins, count); -+} -+ -+/** -+ * ice_dpll_init_direct_pins - initialize direct pins -+ * @pf: board private structure -+ * @cgu: if cgu is present and controlled by this NIC -+ * @pins: pointer to pins array -+ * @start_idx: on which index shall allocation start in dpll subsystem -+ * @count: number of pins -+ * @ops: callback ops registered with the pins -+ * @first: dpll device pointer -+ * @second: dpll device pointer -+ * -+ * Allocate directly connected pins of a given array in dpll subsystem. -+ * If cgu is owned register allocated pins with given dplls. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - registration failure reason -+ */ -+static int -+ice_dpll_init_direct_pins(struct ice_pf *pf, bool cgu, -+ struct ice_dpll_pin *pins, int start_idx, int count, -+ const struct dpll_pin_ops *ops, -+ struct dpll_device *first, struct dpll_device *second) -+{ -+ int ret; -+ -+ ret = ice_dpll_get_pins(pf, pins, start_idx, count, pf->dplls.clock_id); -+ if (ret) -+ return ret; -+ if (cgu) { -+ ret = ice_dpll_register_pins(first, pins, ops, count); -+ if (ret) -+ goto release_pins; -+ ret = ice_dpll_register_pins(second, pins, ops, count); -+ if (ret) -+ goto unregister_first; -+ } -+ -+ return 0; -+ -+unregister_first: -+ ice_dpll_unregister_pins(first, pins, ops, count); -+release_pins: -+ ice_dpll_release_pins(pins, count); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_rclk_pin - release rclk pin resources -+ * @pf: board private structure -+ * -+ * Deregister rclk pin from parent pins and release resources in dpll subsystem. -+ */ -+static void ice_dpll_deinit_rclk_pin(struct ice_pf *pf) -+{ -+ struct ice_dpll_pin *rclk = &pf->dplls.rclk; -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ struct dpll_pin *parent; -+ int i; -+ -+ for (i = 0; i < rclk->num_parents; i++) { -+ parent = pf->dplls.inputs[rclk->parent_idx[i]].pin; -+ if (!parent) -+ continue; -+ dpll_pin_on_pin_unregister(parent, rclk->pin, -+ &ice_dpll_rclk_ops, rclk); -+ } -+ if (WARN_ON_ONCE(!vsi || !vsi->netdev)) -+ return; -+ netdev_dpll_pin_clear(vsi->netdev); -+ dpll_pin_put(rclk->pin); -+} -+ -+/** -+ * ice_dpll_init_rclk_pins - initialize recovered clock pin -+ * @pf: board private structure -+ * @pin: pin to register -+ * @start_idx: on which index shall allocation start in dpll subsystem -+ * @ops: callback ops registered with the pins -+ * -+ * Allocate resource for recovered clock pin in dpll subsystem. Register the -+ * pin with the parents it has in the info. Register pin with the pf's main vsi -+ * netdev. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - registration failure reason -+ */ -+static int -+ice_dpll_init_rclk_pins(struct ice_pf *pf, struct ice_dpll_pin *pin, -+ int start_idx, const struct dpll_pin_ops *ops) -+{ -+ struct ice_vsi *vsi = ice_get_main_vsi(pf); -+ struct dpll_pin *parent; -+ int ret, i; -+ -+ ret = ice_dpll_get_pins(pf, pin, start_idx, ICE_DPLL_RCLK_NUM_PER_PF, -+ pf->dplls.clock_id); -+ if (ret) -+ return ret; -+ for (i = 0; i < pf->dplls.rclk.num_parents; i++) { -+ parent = pf->dplls.inputs[pf->dplls.rclk.parent_idx[i]].pin; -+ if (!parent) { -+ ret = -ENODEV; -+ goto unregister_pins; -+ } -+ ret = dpll_pin_on_pin_register(parent, pf->dplls.rclk.pin, -+ ops, &pf->dplls.rclk); -+ if (ret) -+ goto unregister_pins; -+ } -+ if (WARN_ON((!vsi || !vsi->netdev))) -+ return -EINVAL; -+ netdev_dpll_pin_set(vsi->netdev, pf->dplls.rclk.pin); -+ -+ return 0; -+ -+unregister_pins: -+ while (i) { -+ parent = pf->dplls.inputs[pf->dplls.rclk.parent_idx[--i]].pin; -+ dpll_pin_on_pin_unregister(parent, pf->dplls.rclk.pin, -+ &ice_dpll_rclk_ops, &pf->dplls.rclk); -+ } -+ ice_dpll_release_pins(pin, ICE_DPLL_RCLK_NUM_PER_PF); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_pins - deinitialize direct pins -+ * @pf: board private structure -+ * @cgu: if cgu is controlled by this pf -+ * -+ * If cgu is owned unregister directly connected pins from the dplls. -+ * Release resources of directly connected pins from the dpll subsystem. -+ */ -+static void ice_dpll_deinit_pins(struct ice_pf *pf, bool cgu) -+{ -+ struct ice_dpll_pin *outputs = pf->dplls.outputs; -+ struct ice_dpll_pin *inputs = pf->dplls.inputs; -+ int num_outputs = pf->dplls.num_outputs; -+ int num_inputs = pf->dplls.num_inputs; -+ struct ice_dplls *d = &pf->dplls; -+ struct ice_dpll *de = &d->eec; -+ struct ice_dpll *dp = &d->pps; -+ -+ ice_dpll_deinit_rclk_pin(pf); -+ if (cgu) { -+ ice_dpll_unregister_pins(dp->dpll, inputs, &ice_dpll_input_ops, -+ num_inputs); -+ ice_dpll_unregister_pins(de->dpll, inputs, &ice_dpll_input_ops, -+ num_inputs); -+ } -+ ice_dpll_release_pins(inputs, num_inputs); -+ if (cgu) { -+ ice_dpll_unregister_pins(dp->dpll, outputs, -+ &ice_dpll_output_ops, num_outputs); -+ ice_dpll_unregister_pins(de->dpll, outputs, -+ &ice_dpll_output_ops, num_outputs); -+ ice_dpll_release_pins(outputs, num_outputs); -+ } -+} -+ -+/** -+ * ice_dpll_init_pins - init pins and register pins with a dplls -+ * @pf: board private structure -+ * @cgu: if cgu is present and controlled by this NIC -+ * -+ * Initialize directly connected pf's pins within pf's dplls in a Linux dpll -+ * subsystem. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - initialization failure reason -+ */ -+static int ice_dpll_init_pins(struct ice_pf *pf, bool cgu) -+{ -+ u32 rclk_idx; -+ int ret; -+ -+ ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.inputs, 0, -+ pf->dplls.num_inputs, -+ &ice_dpll_input_ops, -+ pf->dplls.eec.dpll, pf->dplls.pps.dpll); -+ if (ret) -+ return ret; -+ if (cgu) { -+ ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.outputs, -+ pf->dplls.num_inputs, -+ pf->dplls.num_outputs, -+ &ice_dpll_output_ops, -+ pf->dplls.eec.dpll, -+ pf->dplls.pps.dpll); -+ if (ret) -+ goto deinit_inputs; -+ } -+ rclk_idx = pf->dplls.num_inputs + pf->dplls.num_outputs + pf->hw.pf_id; -+ ret = ice_dpll_init_rclk_pins(pf, &pf->dplls.rclk, rclk_idx, -+ &ice_dpll_rclk_ops); -+ if (ret) -+ goto deinit_outputs; -+ -+ return 0; -+deinit_outputs: -+ ice_dpll_deinit_direct_pins(cgu, pf->dplls.outputs, -+ pf->dplls.num_outputs, -+ &ice_dpll_output_ops, pf->dplls.pps.dpll, -+ pf->dplls.eec.dpll); -+deinit_inputs: -+ ice_dpll_deinit_direct_pins(cgu, pf->dplls.inputs, pf->dplls.num_inputs, -+ &ice_dpll_input_ops, pf->dplls.pps.dpll, -+ pf->dplls.eec.dpll); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit_dpll - deinitialize dpll device -+ * @pf: board private structure -+ * @d: pointer to ice_dpll -+ * @cgu: if cgu is present and controlled by this NIC -+ * -+ * If cgu is owned unregister the dpll from dpll subsystem. -+ * Release resources of dpll device from dpll subsystem. -+ */ -+static void -+ice_dpll_deinit_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu) -+{ -+ if (cgu) -+ dpll_device_unregister(d->dpll, &ice_dpll_ops, d); -+ dpll_device_put(d->dpll); -+} -+ -+/** -+ * ice_dpll_init_dpll - initialize dpll device in dpll subsystem -+ * @pf: board private structure -+ * @d: dpll to be initialized -+ * @cgu: if cgu is present and controlled by this NIC -+ * @type: type of dpll being initialized -+ * -+ * Allocate dpll instance for this board in dpll subsystem, if cgu is controlled -+ * by this NIC, register dpll with the callback ops. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - initialization failure reason -+ */ -+static int -+ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu, -+ enum dpll_type type) -+{ -+ u64 clock_id = pf->dplls.clock_id; -+ int ret; -+ -+ d->dpll = dpll_device_get(clock_id, d->dpll_idx, THIS_MODULE); -+ if (IS_ERR(d->dpll)) { -+ ret = PTR_ERR(d->dpll); -+ dev_err(ice_pf_to_dev(pf), -+ "dpll_device_get failed (%p) err=%d\n", d, ret); -+ return ret; -+ } -+ d->pf = pf; -+ if (cgu) { -+ ret = dpll_device_register(d->dpll, type, &ice_dpll_ops, d); -+ if (ret) { -+ dpll_device_put(d->dpll); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_deinit_worker - deinitialize dpll kworker -+ * @pf: board private structure -+ * -+ * Stop dpll's kworker, release it's resources. -+ */ -+static void ice_dpll_deinit_worker(struct ice_pf *pf) -+{ -+ struct ice_dplls *d = &pf->dplls; -+ -+ kthread_cancel_delayed_work_sync(&d->work); -+ kthread_destroy_worker(d->kworker); -+} -+ -+/** -+ * ice_dpll_init_worker - Initialize DPLLs periodic worker -+ * @pf: board private structure -+ * -+ * Create and start DPLLs periodic worker. -+ * -+ * Context: Shall be called after pf->dplls.lock is initialized. -+ * Return: -+ * * 0 - success -+ * * negative - create worker failure -+ */ -+static int ice_dpll_init_worker(struct ice_pf *pf) -+{ -+ struct ice_dplls *d = &pf->dplls; -+ struct kthread_worker *kworker; -+ -+ ice_dpll_update_state(pf, &d->eec, true); -+ ice_dpll_update_state(pf, &d->pps, true); -+ kthread_init_delayed_work(&d->work, ice_dpll_periodic_work); -+ kworker = kthread_create_worker(0, "ice-dplls-%s", -+ dev_name(ice_pf_to_dev(pf))); -+ if (IS_ERR(kworker)) -+ return PTR_ERR(kworker); -+ d->kworker = kworker; -+ d->cgu_state_acq_err_num = 0; -+ kthread_queue_delayed_work(d->kworker, &d->work, 0); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_init_info_direct_pins - initializes direct pins info -+ * @pf: board private structure -+ * @pin_type: type of pins being initialized -+ * -+ * Init information for directly connected pins, cache them in pf's pins -+ * structures. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int -+ice_dpll_init_info_direct_pins(struct ice_pf *pf, -+ enum ice_dpll_pin_type pin_type) -+{ -+ struct ice_dpll *de = &pf->dplls.eec, *dp = &pf->dplls.pps; -+ int num_pins, i, ret = -EINVAL; -+ struct ice_hw *hw = &pf->hw; -+ struct ice_dpll_pin *pins; -+ u8 freq_supp_num; -+ bool input; -+ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ pins = pf->dplls.inputs; -+ num_pins = pf->dplls.num_inputs; -+ input = true; -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ pins = pf->dplls.outputs; -+ num_pins = pf->dplls.num_outputs; -+ input = false; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ for (i = 0; i < num_pins; i++) { -+ pins[i].idx = i; -+ pins[i].prop.board_label = ice_cgu_get_pin_name(hw, i, input); -+ pins[i].prop.type = ice_cgu_get_pin_type(hw, i, input); -+ if (input) { -+ ret = ice_aq_get_cgu_ref_prio(hw, de->dpll_idx, i, -+ &de->input_prio[i]); -+ if (ret) -+ return ret; -+ ret = ice_aq_get_cgu_ref_prio(hw, dp->dpll_idx, i, -+ &dp->input_prio[i]); -+ if (ret) -+ return ret; -+ pins[i].prop.capabilities |= -+ DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE; -+ } -+ pins[i].prop.capabilities |= -+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ ret = ice_dpll_pin_state_update(pf, &pins[i], pin_type, NULL); -+ if (ret) -+ return ret; -+ pins[i].prop.freq_supported = -+ ice_cgu_get_pin_freq_supp(hw, i, input, &freq_supp_num); -+ pins[i].prop.freq_supported_num = freq_supp_num; -+ pins[i].pf = pf; -+ } -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_init_info_rclk_pin - initializes rclk pin information -+ * @pf: board private structure -+ * -+ * Init information for rclk pin, cache them in pf->dplls.rclk. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int ice_dpll_init_info_rclk_pin(struct ice_pf *pf) -+{ -+ struct ice_dpll_pin *pin = &pf->dplls.rclk; -+ -+ pin->prop.type = DPLL_PIN_TYPE_SYNCE_ETH_PORT; -+ pin->prop.capabilities |= DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ pin->pf = pf; -+ -+ return ice_dpll_pin_state_update(pf, pin, -+ ICE_DPLL_PIN_TYPE_RCLK_INPUT, NULL); -+} -+ -+/** -+ * ice_dpll_init_pins_info - init pins info wrapper -+ * @pf: board private structure -+ * @pin_type: type of pins being initialized -+ * -+ * Wraps functions for pin initialization. -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int -+ice_dpll_init_pins_info(struct ice_pf *pf, enum ice_dpll_pin_type pin_type) -+{ -+ switch (pin_type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ return ice_dpll_init_info_direct_pins(pf, pin_type); -+ case ICE_DPLL_PIN_TYPE_RCLK_INPUT: -+ return ice_dpll_init_info_rclk_pin(pf); -+ default: -+ return -EINVAL; -+ } -+} -+ -+/** -+ * ice_dpll_deinit_info - release memory allocated for pins info -+ * @pf: board private structure -+ * -+ * Release memory allocated for pins by ice_dpll_init_info function. -+ */ -+static void ice_dpll_deinit_info(struct ice_pf *pf) -+{ -+ kfree(pf->dplls.inputs); -+ kfree(pf->dplls.outputs); -+ kfree(pf->dplls.eec.input_prio); -+ kfree(pf->dplls.pps.input_prio); -+} -+ -+/** -+ * ice_dpll_init_info - prepare pf's dpll information structure -+ * @pf: board private structure -+ * @cgu: if cgu is present and controlled by this NIC -+ * -+ * Acquire (from HW) and set basic dpll information (on pf->dplls struct). -+ * -+ * Return: -+ * * 0 - success -+ * * negative - init failure reason -+ */ -+static int ice_dpll_init_info(struct ice_pf *pf, bool cgu) -+{ -+ struct ice_aqc_get_cgu_abilities abilities; -+ struct ice_dpll *de = &pf->dplls.eec; -+ struct ice_dpll *dp = &pf->dplls.pps; -+ struct ice_dplls *d = &pf->dplls; -+ struct ice_hw *hw = &pf->hw; -+ int ret, alloc_size, i; -+ -+ d->clock_id = ice_generate_clock_id(pf); -+ ret = ice_aq_get_cgu_abilities(hw, &abilities); -+ if (ret) { -+ dev_err(ice_pf_to_dev(pf), -+ "err:%d %s failed to read cgu abilities\n", -+ ret, ice_aq_str(hw->adminq.sq_last_status)); -+ return ret; -+ } -+ -+ de->dpll_idx = abilities.eec_dpll_idx; -+ dp->dpll_idx = abilities.pps_dpll_idx; -+ d->num_inputs = abilities.num_inputs; -+ d->num_outputs = abilities.num_outputs; -+ d->input_phase_adj_max = le32_to_cpu(abilities.max_in_phase_adj); -+ d->output_phase_adj_max = le32_to_cpu(abilities.max_out_phase_adj); -+ -+ alloc_size = sizeof(*d->inputs) * d->num_inputs; -+ d->inputs = kzalloc(alloc_size, GFP_KERNEL); -+ if (!d->inputs) -+ return -ENOMEM; -+ -+ alloc_size = sizeof(*de->input_prio) * d->num_inputs; -+ de->input_prio = kzalloc(alloc_size, GFP_KERNEL); -+ if (!de->input_prio) -+ return -ENOMEM; -+ -+ dp->input_prio = kzalloc(alloc_size, GFP_KERNEL); -+ if (!dp->input_prio) -+ return -ENOMEM; -+ -+ ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_INPUT); -+ if (ret) -+ goto deinit_info; -+ -+ if (cgu) { -+ alloc_size = sizeof(*d->outputs) * d->num_outputs; -+ d->outputs = kzalloc(alloc_size, GFP_KERNEL); -+ if (!d->outputs) { -+ ret = -ENOMEM; -+ goto deinit_info; -+ } -+ -+ ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_OUTPUT); -+ if (ret) -+ goto deinit_info; -+ } -+ -+ ret = ice_get_cgu_rclk_pin_info(&pf->hw, &d->base_rclk_idx, -+ &pf->dplls.rclk.num_parents); -+ if (ret) -+ return ret; -+ for (i = 0; i < pf->dplls.rclk.num_parents; i++) -+ pf->dplls.rclk.parent_idx[i] = d->base_rclk_idx + i; -+ ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_RCLK_INPUT); -+ if (ret) -+ return ret; -+ de->mode = DPLL_MODE_AUTOMATIC; -+ dp->mode = DPLL_MODE_AUTOMATIC; -+ -+ dev_dbg(ice_pf_to_dev(pf), -+ "%s - success, inputs:%u, outputs:%u rclk-parents:%u\n", -+ __func__, d->num_inputs, d->num_outputs, d->rclk.num_parents); -+ -+ return 0; -+ -+deinit_info: -+ dev_err(ice_pf_to_dev(pf), -+ "%s - fail: d->inputs:%p, de->input_prio:%p, dp->input_prio:%p, d->outputs:%p\n", -+ __func__, d->inputs, de->input_prio, -+ dp->input_prio, d->outputs); -+ ice_dpll_deinit_info(pf); -+ return ret; -+} -+ -+/** -+ * ice_dpll_deinit - Disable the driver/HW support for dpll subsystem -+ * the dpll device. -+ * @pf: board private structure -+ * -+ * Handles the cleanup work required after dpll initialization, freeing -+ * resources and unregistering the dpll, pin and all resources used for -+ * handling them. -+ * -+ * Context: Destroys pf->dplls.lock mutex. Call only if ICE_FLAG_DPLL was set. -+ */ -+void ice_dpll_deinit(struct ice_pf *pf) -+{ -+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU); -+ -+ clear_bit(ICE_FLAG_DPLL, pf->flags); -+ if (cgu) -+ ice_dpll_deinit_worker(pf); -+ -+ ice_dpll_deinit_pins(pf, cgu); -+ ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu); -+ ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu); -+ ice_dpll_deinit_info(pf); -+ mutex_destroy(&pf->dplls.lock); -+} -+ -+/** -+ * ice_dpll_init - initialize support for dpll subsystem -+ * @pf: board private structure -+ * -+ * Set up the device dplls, register them and pins connected within Linux dpll -+ * subsystem. Allow userspace to obtain state of DPLL and handling of DPLL -+ * configuration requests. -+ * -+ * Context: Initializes pf->dplls.lock mutex. -+ */ -+void ice_dpll_init(struct ice_pf *pf) -+{ -+ bool cgu = ice_is_feature_supported(pf, ICE_F_CGU); -+ struct ice_dplls *d = &pf->dplls; -+ int err = 0; -+ -+ err = ice_dpll_init_info(pf, cgu); -+ if (err) -+ goto err_exit; -+ err = ice_dpll_init_dpll(pf, &pf->dplls.eec, cgu, DPLL_TYPE_EEC); -+ if (err) -+ goto deinit_info; -+ err = ice_dpll_init_dpll(pf, &pf->dplls.pps, cgu, DPLL_TYPE_PPS); -+ if (err) -+ goto deinit_eec; -+ err = ice_dpll_init_pins(pf, cgu); -+ if (err) -+ goto deinit_pps; -+ mutex_init(&d->lock); -+ if (cgu) { -+ err = ice_dpll_init_worker(pf); -+ if (err) -+ goto deinit_pins; -+ } -+ set_bit(ICE_FLAG_DPLL, pf->flags); -+ -+ return; -+ -+deinit_pins: -+ ice_dpll_deinit_pins(pf, cgu); -+deinit_pps: -+ ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu); -+deinit_eec: -+ ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu); -+deinit_info: -+ ice_dpll_deinit_info(pf); -+err_exit: -+ mutex_destroy(&d->lock); -+ dev_warn(ice_pf_to_dev(pf), "DPLLs init failure err:%d\n", err); -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -new file mode 100644 -index 000000000000..9c524c4bdfd7 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -0,0 +1,104 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* Copyright (C) 2022, Intel Corporation. */ -+ -+#ifndef _ICE_DPLL_H_ -+#define _ICE_DPLL_H_ -+ -+#include "ice.h" -+ -+#define ICE_DPLL_PRIO_MAX 0xF -+#define ICE_DPLL_RCLK_NUM_MAX 4 -+ -+/** ice_dpll_pin - store info about pins -+ * @pin: dpll pin structure -+ * @pf: pointer to pf, which has registered the dpll_pin -+ * @idx: ice pin private idx -+ * @num_parents: hols number of parent pins -+ * @parent_idx: hold indexes of parent pins -+ * @flags: pin flags returned from HW -+ * @state: state of a pin -+ * @prop: pin properties -+ * @freq: current frequency of a pin -+ */ -+struct ice_dpll_pin { -+ struct dpll_pin *pin; -+ struct ice_pf *pf; -+ u8 idx; -+ u8 num_parents; -+ u8 parent_idx[ICE_DPLL_RCLK_NUM_MAX]; -+ u8 flags[ICE_DPLL_RCLK_NUM_MAX]; -+ u8 state[ICE_DPLL_RCLK_NUM_MAX]; -+ struct dpll_pin_properties prop; -+ u32 freq; -+}; -+ -+/** ice_dpll - store info required for DPLL control -+ * @dpll: pointer to dpll dev -+ * @pf: pointer to pf, which has registered the dpll_device -+ * @dpll_idx: index of dpll on the NIC -+ * @input_idx: currently selected input index -+ * @prev_input_idx: previously selected input index -+ * @ref_state: state of dpll reference signals -+ * @eec_mode: eec_mode dpll is configured for -+ * @phase_shift: phase shift delay of a dpll -+ * @input_prio: priorities of each input -+ * @dpll_state: current dpll sync state -+ * @prev_dpll_state: last dpll sync state -+ * @active_input: pointer to active input pin -+ * @prev_input: pointer to previous active input pin -+ */ -+struct ice_dpll { -+ struct dpll_device *dpll; -+ struct ice_pf *pf; -+ u8 dpll_idx; -+ u8 input_idx; -+ u8 prev_input_idx; -+ u8 ref_state; -+ u8 eec_mode; -+ s64 phase_shift; -+ u8 *input_prio; -+ enum dpll_lock_status dpll_state; -+ enum dpll_lock_status prev_dpll_state; -+ enum dpll_mode mode; -+ struct dpll_pin *active_input; -+ struct dpll_pin *prev_input; -+}; -+ -+/** ice_dplls - store info required for CCU (clock controlling unit) -+ * @kworker: periodic worker -+ * @work: periodic work -+ * @lock: locks access to configuration of a dpll -+ * @eec: pointer to EEC dpll dev -+ * @pps: pointer to PPS dpll dev -+ * @inputs: input pins pointer -+ * @outputs: output pins pointer -+ * @rclk: recovered pins pointer -+ * @num_inputs: number of input pins available on dpll -+ * @num_outputs: number of output pins available on dpll -+ * @cgu_state_acq_err_num: number of errors returned during periodic work -+ * @base_rclk_idx: idx of first pin used for clock revocery pins -+ * @clock_id: clock_id of dplls -+ */ -+struct ice_dplls { -+ struct kthread_worker *kworker; -+ struct kthread_delayed_work work; -+ struct mutex lock; -+ struct ice_dpll eec; -+ struct ice_dpll pps; -+ struct ice_dpll_pin *inputs; -+ struct ice_dpll_pin *outputs; -+ struct ice_dpll_pin rclk; -+ u8 num_inputs; -+ u8 num_outputs; -+ int cgu_state_acq_err_num; -+ u8 base_rclk_idx; -+ u64 clock_id; -+ s32 input_phase_adj_max; -+ s32 output_phase_adj_max; -+}; -+ -+void ice_dpll_init(struct ice_pf *pf); -+ -+void ice_dpll_deinit(struct ice_pf *pf); -+ -+#endif -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index c5ef2f422c34..6d75284301cc 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -4679,6 +4679,10 @@ static void ice_init_features(struct ice_pf *pf) - if (ice_is_feature_supported(pf, ICE_F_GNSS)) - ice_gnss_init(pf); - -+ if (ice_is_feature_supported(pf, ICE_F_CGU) || -+ ice_is_feature_supported(pf, ICE_F_PHY_RCLK)) -+ ice_dpll_init(pf); -+ - /* Note: Flow director init failure is non-fatal to load */ - if (ice_init_fdir(pf)) - dev_err(dev, "could not initialize flow director\n"); -@@ -4708,6 +4712,8 @@ static void ice_deinit_features(struct ice_pf *pf) - ice_gnss_exit(pf); - if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) - ice_ptp_release(pf); -+ if (test_bit(ICE_FLAG_DPLL, pf->flags)) -+ ice_dpll_deinit(pf); - } - - static void ice_init_wakeup(struct ice_pf *pf) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch b/kernel-std/debian/patches/ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch deleted file mode 100644 index 0fb63982..00000000 --- a/kernel-std/debian/patches/ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch +++ /dev/null @@ -1,651 +0,0 @@ -From b0564f1f3105dde3373d0c68a17c8016c23b0aae Mon Sep 17 00:00:00 2001 -From: Vadim Fedorenko -Date: Wed, 13 Sep 2023 21:49:42 +0100 -Subject: [PATCH 08/46] ptp_ocp: implement DPLL ops - -Implement basic DPLL operations in ptp_ocp driver as the -simplest example of using new subsystem. - -Signed-off-by: Vadim Fedorenko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 09eeb3aecc6c74c9a911396f9ab46b1a41fcd7b8) -Signed-off-by: Jiping Ma ---- - drivers/ptp/Kconfig | 1 + - drivers/ptp/ptp_ocp.c | 369 +++++++++++++++++++++++++++++++++++------- - 2 files changed, 310 insertions(+), 60 deletions(-) - -diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig -index ed9d97a032f1..5dd5f188e14f 100644 ---- a/drivers/ptp/Kconfig -+++ b/drivers/ptp/Kconfig -@@ -188,6 +188,7 @@ config PTP_1588_CLOCK_OCP - depends on COMMON_CLK - select NET_DEVLINK - select CRC16 -+ select DPLL - help - This driver adds support for an OpenCompute time card. - -diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c -index a7a6947ab4bc..41eaffcae462 100644 ---- a/drivers/ptp/ptp_ocp.c -+++ b/drivers/ptp/ptp_ocp.c -@@ -23,6 +23,7 @@ - #include - #include - #include -+#include - - #define PCI_VENDOR_ID_FACEBOOK 0x1d9b - #define PCI_DEVICE_ID_FACEBOOK_TIMECARD 0x0400 -@@ -260,12 +261,21 @@ enum ptp_ocp_sma_mode { - SMA_MODE_OUT, - }; - -+static struct dpll_pin_frequency ptp_ocp_sma_freq[] = { -+ DPLL_PIN_FREQUENCY_1PPS, -+ DPLL_PIN_FREQUENCY_10MHZ, -+ DPLL_PIN_FREQUENCY_IRIG_B, -+ DPLL_PIN_FREQUENCY_DCF77, -+}; -+ - struct ptp_ocp_sma_connector { - enum ptp_ocp_sma_mode mode; - bool fixed_fcn; - bool fixed_dir; - bool disabled; - u8 default_fcn; -+ struct dpll_pin *dpll_pin; -+ struct dpll_pin_properties dpll_prop; - }; - - struct ocp_attr_group { -@@ -294,6 +304,7 @@ struct ptp_ocp_serial_port { - - #define OCP_BOARD_ID_LEN 13 - #define OCP_SERIAL_LEN 6 -+#define OCP_SMA_NUM 4 - - struct ptp_ocp { - struct pci_dev *pdev; -@@ -331,7 +342,9 @@ struct ptp_ocp { - const struct attribute_group **attr_group; - const struct ptp_ocp_eeprom_map *eeprom_map; - struct dentry *debug_root; -+ bool sync; - time64_t gnss_lost; -+ struct delayed_work sync_work; - int id; - int n_irqs; - struct ptp_ocp_serial_port gnss_port; -@@ -350,8 +363,9 @@ struct ptp_ocp { - u32 ts_window_adjust; - u64 fw_cap; - struct ptp_ocp_signal signal[4]; -- struct ptp_ocp_sma_connector sma[4]; -+ struct ptp_ocp_sma_connector sma[OCP_SMA_NUM]; - const struct ocp_sma_op *sma_op; -+ struct dpll_device *dpll; - }; - - #define OCP_REQ_TIMESTAMP BIT(0) -@@ -835,6 +849,7 @@ static DEFINE_IDR(ptp_ocp_idr); - struct ocp_selector { - const char *name; - int value; -+ u64 frequency; - }; - - static const struct ocp_selector ptp_ocp_clock[] = { -@@ -855,31 +870,31 @@ static const struct ocp_selector ptp_ocp_clock[] = { - #define SMA_SELECT_MASK GENMASK(14, 0) - - static const struct ocp_selector ptp_ocp_sma_in[] = { -- { .name = "10Mhz", .value = 0x0000 }, -- { .name = "PPS1", .value = 0x0001 }, -- { .name = "PPS2", .value = 0x0002 }, -- { .name = "TS1", .value = 0x0004 }, -- { .name = "TS2", .value = 0x0008 }, -- { .name = "IRIG", .value = 0x0010 }, -- { .name = "DCF", .value = 0x0020 }, -- { .name = "TS3", .value = 0x0040 }, -- { .name = "TS4", .value = 0x0080 }, -- { .name = "FREQ1", .value = 0x0100 }, -- { .name = "FREQ2", .value = 0x0200 }, -- { .name = "FREQ3", .value = 0x0400 }, -- { .name = "FREQ4", .value = 0x0800 }, -- { .name = "None", .value = SMA_DISABLE }, -+ { .name = "10Mhz", .value = 0x0000, .frequency = 10000000 }, -+ { .name = "PPS1", .value = 0x0001, .frequency = 1 }, -+ { .name = "PPS2", .value = 0x0002, .frequency = 1 }, -+ { .name = "TS1", .value = 0x0004, .frequency = 0 }, -+ { .name = "TS2", .value = 0x0008, .frequency = 0 }, -+ { .name = "IRIG", .value = 0x0010, .frequency = 10000 }, -+ { .name = "DCF", .value = 0x0020, .frequency = 77500 }, -+ { .name = "TS3", .value = 0x0040, .frequency = 0 }, -+ { .name = "TS4", .value = 0x0080, .frequency = 0 }, -+ { .name = "FREQ1", .value = 0x0100, .frequency = 0 }, -+ { .name = "FREQ2", .value = 0x0200, .frequency = 0 }, -+ { .name = "FREQ3", .value = 0x0400, .frequency = 0 }, -+ { .name = "FREQ4", .value = 0x0800, .frequency = 0 }, -+ { .name = "None", .value = SMA_DISABLE, .frequency = 0 }, - { } - }; - - static const struct ocp_selector ptp_ocp_sma_out[] = { -- { .name = "10Mhz", .value = 0x0000 }, -- { .name = "PHC", .value = 0x0001 }, -- { .name = "MAC", .value = 0x0002 }, -- { .name = "GNSS1", .value = 0x0004 }, -- { .name = "GNSS2", .value = 0x0008 }, -- { .name = "IRIG", .value = 0x0010 }, -- { .name = "DCF", .value = 0x0020 }, -+ { .name = "10Mhz", .value = 0x0000, .frequency = 10000000 }, -+ { .name = "PHC", .value = 0x0001, .frequency = 1 }, -+ { .name = "MAC", .value = 0x0002, .frequency = 1 }, -+ { .name = "GNSS1", .value = 0x0004, .frequency = 1 }, -+ { .name = "GNSS2", .value = 0x0008, .frequency = 1 }, -+ { .name = "IRIG", .value = 0x0010, .frequency = 10000 }, -+ { .name = "DCF", .value = 0x0020, .frequency = 77000 }, - { .name = "GEN1", .value = 0x0040 }, - { .name = "GEN2", .value = 0x0080 }, - { .name = "GEN3", .value = 0x0100 }, -@@ -890,15 +905,15 @@ static const struct ocp_selector ptp_ocp_sma_out[] = { - }; - - static const struct ocp_selector ptp_ocp_art_sma_in[] = { -- { .name = "PPS1", .value = 0x0001 }, -- { .name = "10Mhz", .value = 0x0008 }, -+ { .name = "PPS1", .value = 0x0001, .frequency = 1 }, -+ { .name = "10Mhz", .value = 0x0008, .frequency = 1000000 }, - { } - }; - - static const struct ocp_selector ptp_ocp_art_sma_out[] = { -- { .name = "PHC", .value = 0x0002 }, -- { .name = "GNSS", .value = 0x0004 }, -- { .name = "10Mhz", .value = 0x0010 }, -+ { .name = "PHC", .value = 0x0002, .frequency = 1 }, -+ { .name = "GNSS", .value = 0x0004, .frequency = 1 }, -+ { .name = "10Mhz", .value = 0x0010, .frequency = 10000000 }, - { } - }; - -@@ -1351,7 +1366,6 @@ static int - ptp_ocp_init_clock(struct ptp_ocp *bp) - { - struct timespec64 ts; -- bool sync; - u32 ctrl; - - ctrl = OCP_CTRL_ENABLE; -@@ -1375,8 +1389,8 @@ ptp_ocp_init_clock(struct ptp_ocp *bp) - - ptp_ocp_estimate_pci_timing(bp); - -- sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; -- if (!sync) { -+ bp->sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; -+ if (!bp->sync) { - ktime_get_clocktai_ts64(&ts); - ptp_ocp_settime(&bp->ptp_info, &ts); - } -@@ -2289,22 +2303,35 @@ ptp_ocp_sma_fb_set_inputs(struct ptp_ocp *bp, int sma_nr, u32 val) - static void - ptp_ocp_sma_fb_init(struct ptp_ocp *bp) - { -+ struct dpll_pin_properties prop = { -+ .board_label = NULL, -+ .type = DPLL_PIN_TYPE_EXT, -+ .capabilities = DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE, -+ .freq_supported_num = ARRAY_SIZE(ptp_ocp_sma_freq), -+ .freq_supported = ptp_ocp_sma_freq, -+ -+ }; - u32 reg; - int i; - - /* defaults */ -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ bp->sma[i].default_fcn = i & 1; -+ bp->sma[i].dpll_prop = prop; -+ bp->sma[i].dpll_prop.board_label = -+ bp->ptp_info.pin_config[i].name; -+ } - bp->sma[0].mode = SMA_MODE_IN; - bp->sma[1].mode = SMA_MODE_IN; - bp->sma[2].mode = SMA_MODE_OUT; - bp->sma[3].mode = SMA_MODE_OUT; -- for (i = 0; i < 4; i++) -- bp->sma[i].default_fcn = i & 1; -- - /* If no SMA1 map, the pin functions and directions are fixed. */ - if (!bp->sma_map1) { -- for (i = 0; i < 4; i++) { -+ for (i = 0; i < OCP_SMA_NUM; i++) { - bp->sma[i].fixed_fcn = true; - bp->sma[i].fixed_dir = true; -+ bp->sma[1].dpll_prop.capabilities &= -+ ~DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE; - } - return; - } -@@ -2314,7 +2341,7 @@ ptp_ocp_sma_fb_init(struct ptp_ocp *bp) - */ - reg = ioread32(&bp->sma_map2->gpio2); - if (reg == 0xffffffff) { -- for (i = 0; i < 4; i++) -+ for (i = 0; i < OCP_SMA_NUM; i++) - bp->sma[i].fixed_dir = true; - } else { - reg = ioread32(&bp->sma_map1->gpio1); -@@ -2336,7 +2363,7 @@ static const struct ocp_sma_op ocp_fb_sma_op = { - }; - - static int --ptp_ocp_fb_set_pins(struct ptp_ocp *bp) -+ptp_ocp_set_pins(struct ptp_ocp *bp) - { - struct ptp_pin_desc *config; - int i; -@@ -2403,16 +2430,16 @@ ptp_ocp_fb_board_init(struct ptp_ocp *bp, struct ocp_resource *r) - - ptp_ocp_tod_init(bp); - ptp_ocp_nmea_out_init(bp); -- ptp_ocp_sma_init(bp); - ptp_ocp_signal_init(bp); - - err = ptp_ocp_attr_group_add(bp, fb_timecard_groups); - if (err) - return err; - -- err = ptp_ocp_fb_set_pins(bp); -+ err = ptp_ocp_set_pins(bp); - if (err) - return err; -+ ptp_ocp_sma_init(bp); - - return ptp_ocp_init_clock(bp); - } -@@ -2452,6 +2479,14 @@ ptp_ocp_register_resources(struct ptp_ocp *bp, kernel_ulong_t driver_data) - static void - ptp_ocp_art_sma_init(struct ptp_ocp *bp) - { -+ struct dpll_pin_properties prop = { -+ .board_label = NULL, -+ .type = DPLL_PIN_TYPE_EXT, -+ .capabilities = 0, -+ .freq_supported_num = ARRAY_SIZE(ptp_ocp_sma_freq), -+ .freq_supported = ptp_ocp_sma_freq, -+ -+ }; - u32 reg; - int i; - -@@ -2466,16 +2501,16 @@ ptp_ocp_art_sma_init(struct ptp_ocp *bp) - bp->sma[2].default_fcn = 0x10; /* OUT: 10Mhz */ - bp->sma[3].default_fcn = 0x02; /* OUT: PHC */ - -- /* If no SMA map, the pin functions and directions are fixed. */ -- if (!bp->art_sma) { -- for (i = 0; i < 4; i++) { -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ /* If no SMA map, the pin functions and directions are fixed. */ -+ bp->sma[i].dpll_prop = prop; -+ bp->sma[i].dpll_prop.board_label = -+ bp->ptp_info.pin_config[i].name; -+ if (!bp->art_sma) { - bp->sma[i].fixed_fcn = true; - bp->sma[i].fixed_dir = true; -+ continue; - } -- return; -- } -- -- for (i = 0; i < 4; i++) { - reg = ioread32(&bp->art_sma->map[i].gpio); - - switch (reg & 0xff) { -@@ -2486,9 +2521,13 @@ ptp_ocp_art_sma_init(struct ptp_ocp *bp) - case 1: - case 8: - bp->sma[i].mode = SMA_MODE_IN; -+ bp->sma[i].dpll_prop.capabilities = -+ DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE; - break; - default: - bp->sma[i].mode = SMA_MODE_OUT; -+ bp->sma[i].dpll_prop.capabilities = -+ DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE; - break; - } - } -@@ -2555,6 +2594,9 @@ ptp_ocp_art_board_init(struct ptp_ocp *bp, struct ocp_resource *r) - /* Enable MAC serial port during initialisation */ - iowrite32(1, &bp->board_config->mro50_serial_activate); - -+ err = ptp_ocp_set_pins(bp); -+ if (err) -+ return err; - ptp_ocp_sma_init(bp); - - err = ptp_ocp_attr_group_add(bp, art_timecard_groups); -@@ -2696,16 +2738,9 @@ sma4_show(struct device *dev, struct device_attribute *attr, char *buf) - } - - static int --ptp_ocp_sma_store(struct ptp_ocp *bp, const char *buf, int sma_nr) -+ptp_ocp_sma_store_val(struct ptp_ocp *bp, int val, enum ptp_ocp_sma_mode mode, int sma_nr) - { - struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; -- enum ptp_ocp_sma_mode mode; -- int val; -- -- mode = sma->mode; -- val = sma_parse_inputs(bp->sma_op->tbl, buf, &mode); -- if (val < 0) -- return val; - - if (sma->fixed_dir && (mode != sma->mode || val & SMA_DISABLE)) - return -EOPNOTSUPP; -@@ -2740,6 +2775,20 @@ ptp_ocp_sma_store(struct ptp_ocp *bp, const char *buf, int sma_nr) - return val; - } - -+static int -+ptp_ocp_sma_store(struct ptp_ocp *bp, const char *buf, int sma_nr) -+{ -+ struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; -+ enum ptp_ocp_sma_mode mode; -+ int val; -+ -+ mode = sma->mode; -+ val = sma_parse_inputs(bp->sma_op->tbl, buf, &mode); -+ if (val < 0) -+ return val; -+ return ptp_ocp_sma_store_val(bp, val, mode, sma_nr); -+} -+ - static ssize_t - sma1_store(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) -@@ -3834,9 +3883,8 @@ ptp_ocp_summary_show(struct seq_file *s, void *data) - strcpy(buf, "unknown"); - break; - } -- val = ioread32(&bp->reg->status); - seq_printf(s, "%7s: %s, state: %s\n", "PHC src", buf, -- val & OCP_STATUS_IN_SYNC ? "sync" : "unsynced"); -+ bp->sync ? "sync" : "unsynced"); - - if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, &sts)) { - struct timespec64 sys_ts; -@@ -4067,7 +4115,6 @@ ptp_ocp_phc_info(struct ptp_ocp *bp) - { - struct timespec64 ts; - u32 version, select; -- bool sync; - - version = ioread32(&bp->reg->version); - select = ioread32(&bp->reg->select); -@@ -4076,11 +4123,10 @@ ptp_ocp_phc_info(struct ptp_ocp *bp) - ptp_ocp_select_name_from_val(ptp_ocp_clock, select >> 16), - ptp_clock_index(bp->ptp)); - -- sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; - if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, NULL)) - dev_info(&bp->pdev->dev, "Time: %lld.%ld, %s\n", - ts.tv_sec, ts.tv_nsec, -- sync ? "in-sync" : "UNSYNCED"); -+ bp->sync ? "in-sync" : "UNSYNCED"); - } - - static void -@@ -4177,12 +4223,168 @@ ptp_ocp_detach(struct ptp_ocp *bp) - device_unregister(&bp->dev); - } - -+static int ptp_ocp_dpll_lock_status_get(const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp *bp = priv; -+ -+ *status = bp->sync ? DPLL_LOCK_STATUS_LOCKED : DPLL_LOCK_STATUS_UNLOCKED; -+ -+ return 0; -+} -+ -+static int ptp_ocp_dpll_state_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp *bp = priv; -+ int idx; -+ -+ if (bp->pps_select) { -+ idx = ioread32(&bp->pps_select->gpio1); -+ *state = (&bp->sma[idx] == pin_priv) ? DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_SELECTABLE; -+ return 0; -+ } -+ NL_SET_ERR_MSG(extack, "pin selection is not supported on current HW"); -+ return -EINVAL; -+} -+ -+static int ptp_ocp_dpll_mode_get(const struct dpll_device *dpll, void *priv, -+ u32 *mode, struct netlink_ext_ack *extack) -+{ -+ *mode = DPLL_MODE_AUTOMATIC; -+ return 0; -+} -+ -+static bool ptp_ocp_dpll_mode_supported(const struct dpll_device *dpll, -+ void *priv, const enum dpll_mode mode, -+ struct netlink_ext_ack *extack) -+{ -+ return mode == DPLL_MODE_AUTOMATIC; -+} -+ -+static int ptp_ocp_dpll_direction_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ -+ *direction = sma->mode == SMA_MODE_IN ? -+ DPLL_PIN_DIRECTION_INPUT : -+ DPLL_PIN_DIRECTION_OUTPUT; -+ return 0; -+} -+ -+static int ptp_ocp_dpll_direction_set(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_direction direction, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ struct ptp_ocp *bp = dpll_priv; -+ enum ptp_ocp_sma_mode mode; -+ int sma_nr = (sma - bp->sma); -+ -+ if (sma->fixed_dir) -+ return -EOPNOTSUPP; -+ mode = direction == DPLL_PIN_DIRECTION_INPUT ? -+ SMA_MODE_IN : SMA_MODE_OUT; -+ return ptp_ocp_sma_store_val(bp, 0, mode, sma_nr); -+} -+ -+static int ptp_ocp_dpll_frequency_set(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, u64 frequency, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ struct ptp_ocp *bp = dpll_priv; -+ const struct ocp_selector *tbl; -+ int sma_nr = (sma - bp->sma); -+ int i; -+ -+ if (sma->fixed_fcn) -+ return -EOPNOTSUPP; -+ -+ tbl = bp->sma_op->tbl[sma->mode]; -+ for (i = 0; tbl[i].name; i++) -+ if (tbl[i].frequency == frequency) -+ return ptp_ocp_sma_store_val(bp, i, sma->mode, sma_nr); -+ return -EINVAL; -+} -+ -+static int ptp_ocp_dpll_frequency_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, u64 *frequency, -+ struct netlink_ext_ack *extack) -+{ -+ struct ptp_ocp_sma_connector *sma = pin_priv; -+ struct ptp_ocp *bp = dpll_priv; -+ const struct ocp_selector *tbl; -+ int sma_nr = (sma - bp->sma); -+ u32 val; -+ int i; -+ -+ val = bp->sma_op->get(bp, sma_nr); -+ tbl = bp->sma_op->tbl[sma->mode]; -+ for (i = 0; tbl[i].name; i++) -+ if (val == tbl[i].value) { -+ *frequency = tbl[i].frequency; -+ return 0; -+ } -+ -+ return -EINVAL; -+} -+ -+static const struct dpll_device_ops dpll_ops = { -+ .lock_status_get = ptp_ocp_dpll_lock_status_get, -+ .mode_get = ptp_ocp_dpll_mode_get, -+ .mode_supported = ptp_ocp_dpll_mode_supported, -+}; -+ -+static const struct dpll_pin_ops dpll_pins_ops = { -+ .frequency_get = ptp_ocp_dpll_frequency_get, -+ .frequency_set = ptp_ocp_dpll_frequency_set, -+ .direction_get = ptp_ocp_dpll_direction_get, -+ .direction_set = ptp_ocp_dpll_direction_set, -+ .state_on_dpll_get = ptp_ocp_dpll_state_get, -+}; -+ -+static void -+ptp_ocp_sync_work(struct work_struct *work) -+{ -+ struct ptp_ocp *bp; -+ bool sync; -+ -+ bp = container_of(work, struct ptp_ocp, sync_work.work); -+ sync = !!(ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC); -+ -+ if (bp->sync != sync) -+ dpll_device_change_ntf(bp->dpll); -+ -+ bp->sync = sync; -+ -+ queue_delayed_work(system_power_efficient_wq, &bp->sync_work, HZ); -+} -+ - static int - ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id) - { - struct devlink *devlink; - struct ptp_ocp *bp; -- int err; -+ int err, i; -+ u64 clkid; - - devlink = devlink_alloc(&ptp_ocp_devlink_ops, sizeof(*bp), &pdev->dev); - if (!devlink) { -@@ -4201,6 +4403,8 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id) - if (err) - goto out_disable; - -+ INIT_DELAYED_WORK(&bp->sync_work, ptp_ocp_sync_work); -+ - /* compat mode. - * Older FPGA firmware only returns 2 irq's. - * allow this - if not all of the IRQ's are returned, skip the -@@ -4232,8 +4436,43 @@ ptp_ocp_probe(struct pci_dev *pdev, const struct pci_device_id *id) - - ptp_ocp_info(bp); - devlink_register(devlink); -- return 0; - -+ clkid = pci_get_dsn(pdev); -+ bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); -+ if (IS_ERR(bp->dpll)) { -+ err = PTR_ERR(bp->dpll); -+ dev_err(&pdev->dev, "dpll_device_alloc failed\n"); -+ goto out; -+ } -+ -+ err = dpll_device_register(bp->dpll, DPLL_TYPE_PPS, &dpll_ops, bp); -+ if (err) -+ goto out; -+ -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE, &bp->sma[i].dpll_prop); -+ if (IS_ERR(bp->sma[i].dpll_pin)) { -+ err = PTR_ERR(bp->dpll); -+ goto out_dpll; -+ } -+ -+ err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, -+ &bp->sma[i]); -+ if (err) { -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ goto out_dpll; -+ } -+ } -+ queue_delayed_work(system_power_efficient_wq, &bp->sync_work, HZ); -+ -+ return 0; -+out_dpll: -+ while (i) { -+ --i; -+ dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ } -+ dpll_device_put(bp->dpll); - out: - ptp_ocp_detach(bp); - out_disable: -@@ -4248,7 +4487,17 @@ ptp_ocp_remove(struct pci_dev *pdev) - { - struct ptp_ocp *bp = pci_get_drvdata(pdev); - struct devlink *devlink = priv_to_devlink(bp); -+ int i; - -+ cancel_delayed_work_sync(&bp->sync_work); -+ for (i = 0; i < OCP_SMA_NUM; i++) { -+ if (bp->sma[i].dpll_pin) { -+ dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, bp); -+ dpll_pin_put(bp->sma[i].dpll_pin); -+ } -+ } -+ dpll_device_unregister(bp->dpll, &dpll_ops, bp); -+ dpll_device_put(bp->dpll); - devlink_unregister(devlink); - ptp_ocp_detach(bp); - pci_disable_device(pdev); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch b/kernel-std/debian/patches/ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch deleted file mode 100644 index c609aacb..00000000 --- a/kernel-std/debian/patches/ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch +++ /dev/null @@ -1,624 +0,0 @@ -From 5f8d07324a98db8f49c8ff40b71c62eba801b0eb Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 13 Sep 2023 21:49:43 +0100 -Subject: [PATCH 09/46] mlx5: Implement SyncE support using DPLL infrastructure - -Implement SyncE support using newly introduced DPLL support. -Make sure that each PFs/VFs/SFs probed with appropriate capability -will spawn a dpll auxiliary device and register appropriate dpll device -and pin instances. - -Signed-off-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: Vadim Fedorenko -Signed-off-by: David S. Miller -(cherry picked from commit 496fd0a26bbf73b6b12407ee4fbe5ff49d659a6d) -Signed-off-by: Jiping Ma ---- - .../net/ethernet/mellanox/mlx5/core/Kconfig | 8 + - .../net/ethernet/mellanox/mlx5/core/Makefile | 3 + - drivers/net/ethernet/mellanox/mlx5/core/dev.c | 17 + - .../net/ethernet/mellanox/mlx5/core/dpll.c | 432 ++++++++++++++++++ - include/linux/mlx5/driver.h | 2 + - include/linux/mlx5/mlx5_ifc.h | 59 ++- - 6 files changed, 520 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/mellanox/mlx5/core/dpll.c - -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig -index c4f4de82e29e..685335832a93 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig -+++ b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig -@@ -189,3 +189,11 @@ config MLX5_SF_MANAGER - port is managed through devlink. A subfunction supports RDMA, netdevice - and vdpa device. It is similar to a SRIOV VF but it doesn't require - SRIOV support. -+ -+config MLX5_DPLL -+ tristate "Mellanox 5th generation network adapters (ConnectX series) DPLL support" -+ depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE -+ select DPLL -+ help -+ DPLL support in Mellanox Technologies ConnectX NICs. -+ -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile -index 7e94caca4888..c44870b175f9 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile -+++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile -@@ -128,3 +128,6 @@ mlx5_core-$(CONFIG_MLX5_SF) += sf/vhca_event.o sf/dev/dev.o sf/dev/driver.o irq_ - # SF manager - # - mlx5_core-$(CONFIG_MLX5_SF_MANAGER) += sf/cmd.o sf/hw_table.o sf/devlink.o -+ -+obj-$(CONFIG_MLX5_DPLL) += mlx5_dpll.o -+mlx5_dpll-y := dpll.o -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/dev.c -index 7909f378dc93..1fc03480c2ff 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/dev.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/dev.c -@@ -206,6 +206,19 @@ static bool is_ib_enabled(struct mlx5_core_dev *dev) - return err ? false : val.vbool; - } - -+static bool is_dpll_supported(struct mlx5_core_dev *dev) -+{ -+ if (!IS_ENABLED(CONFIG_MLX5_DPLL)) -+ return false; -+ -+ if (!MLX5_CAP_MCAM_REG2(dev, synce_registers)) { -+ mlx5_core_warn(dev, "Missing SyncE capability\n"); -+ return false; -+ } -+ -+ return true; -+} -+ - enum { - MLX5_INTERFACE_PROTOCOL_ETH, - MLX5_INTERFACE_PROTOCOL_ETH_REP, -@@ -215,6 +228,8 @@ enum { - MLX5_INTERFACE_PROTOCOL_MPIB, - - MLX5_INTERFACE_PROTOCOL_VNET, -+ -+ MLX5_INTERFACE_PROTOCOL_DPLL, - }; - - static const struct mlx5_adev_device { -@@ -237,6 +252,8 @@ static const struct mlx5_adev_device { - .is_supported = &is_ib_rep_supported }, - [MLX5_INTERFACE_PROTOCOL_MPIB] = { .suffix = "multiport", - .is_supported = &is_mp_supported }, -+ [MLX5_INTERFACE_PROTOCOL_DPLL] = { .suffix = "dpll", -+ .is_supported = &is_dpll_supported }, - }; - - int mlx5_adev_idx_alloc(void) -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -new file mode 100644 -index 000000000000..74f0c7867120 ---- /dev/null -+++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -@@ -0,0 +1,432 @@ -+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB -+/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ -+ -+#include -+#include -+ -+/* This structure represents a reference to DPLL, one is created -+ * per mdev instance. -+ */ -+struct mlx5_dpll { -+ struct dpll_device *dpll; -+ struct dpll_pin *dpll_pin; -+ struct mlx5_core_dev *mdev; -+ struct workqueue_struct *wq; -+ struct delayed_work work; -+ struct { -+ bool valid; -+ enum dpll_lock_status lock_status; -+ enum dpll_pin_state pin_state; -+ } last; -+ struct notifier_block mdev_nb; -+ struct net_device *tracking_netdev; -+}; -+ -+static int mlx5_dpll_clock_id_get(struct mlx5_core_dev *mdev, u64 *clock_id) -+{ -+ u32 out[MLX5_ST_SZ_DW(msecq_reg)] = {}; -+ u32 in[MLX5_ST_SZ_DW(msecq_reg)] = {}; -+ int err; -+ -+ err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), -+ MLX5_REG_MSECQ, 0, 0); -+ if (err) -+ return err; -+ *clock_id = MLX5_GET64(msecq_reg, out, local_clock_identity); -+ return 0; -+} -+ -+static int -+mlx5_dpll_synce_status_get(struct mlx5_core_dev *mdev, -+ enum mlx5_msees_admin_status *admin_status, -+ enum mlx5_msees_oper_status *oper_status, -+ bool *ho_acq) -+{ -+ u32 out[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ u32 in[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ int err; -+ -+ err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), -+ MLX5_REG_MSEES, 0, 0); -+ if (err) -+ return err; -+ if (admin_status) -+ *admin_status = MLX5_GET(msees_reg, out, admin_status); -+ *oper_status = MLX5_GET(msees_reg, out, oper_status); -+ if (ho_acq) -+ *ho_acq = MLX5_GET(msees_reg, out, ho_acq); -+ return 0; -+} -+ -+static int -+mlx5_dpll_synce_status_set(struct mlx5_core_dev *mdev, -+ enum mlx5_msees_admin_status admin_status) -+{ -+ u32 out[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ u32 in[MLX5_ST_SZ_DW(msees_reg)] = {}; -+ -+ MLX5_SET(msees_reg, in, field_select, -+ MLX5_MSEES_FIELD_SELECT_ENABLE | -+ MLX5_MSEES_FIELD_SELECT_ADMIN_STATUS); -+ MLX5_SET(msees_reg, in, admin_status, admin_status); -+ return mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), -+ MLX5_REG_MSEES, 0, 1); -+} -+ -+static enum dpll_lock_status -+mlx5_dpll_lock_status_get(enum mlx5_msees_oper_status oper_status, bool ho_acq) -+{ -+ switch (oper_status) { -+ case MLX5_MSEES_OPER_STATUS_SELF_TRACK: -+ fallthrough; -+ case MLX5_MSEES_OPER_STATUS_OTHER_TRACK: -+ return ho_acq ? DPLL_LOCK_STATUS_LOCKED_HO_ACQ : -+ DPLL_LOCK_STATUS_LOCKED; -+ case MLX5_MSEES_OPER_STATUS_HOLDOVER: -+ fallthrough; -+ case MLX5_MSEES_OPER_STATUS_FAIL_HOLDOVER: -+ return DPLL_LOCK_STATUS_HOLDOVER; -+ default: -+ return DPLL_LOCK_STATUS_UNLOCKED; -+ } -+} -+ -+static enum dpll_pin_state -+mlx5_dpll_pin_state_get(enum mlx5_msees_admin_status admin_status, -+ enum mlx5_msees_oper_status oper_status) -+{ -+ return (admin_status == MLX5_MSEES_ADMIN_STATUS_TRACK && -+ (oper_status == MLX5_MSEES_OPER_STATUS_SELF_TRACK || -+ oper_status == MLX5_MSEES_OPER_STATUS_OTHER_TRACK)) ? -+ DPLL_PIN_STATE_CONNECTED : DPLL_PIN_STATE_DISCONNECTED; -+} -+ -+static int mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_lock_status *status, -+ struct netlink_ext_ack *extack) -+{ -+ enum mlx5_msees_oper_status oper_status; -+ struct mlx5_dpll *mdpll = priv; -+ bool ho_acq; -+ int err; -+ -+ err = mlx5_dpll_synce_status_get(mdpll->mdev, NULL, -+ &oper_status, &ho_acq); -+ if (err) -+ return err; -+ -+ *status = mlx5_dpll_lock_status_get(oper_status, ho_acq); -+ return 0; -+} -+ -+static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, -+ void *priv, -+ u32 *mode, struct netlink_ext_ack *extack) -+{ -+ *mode = DPLL_MODE_MANUAL; -+ return 0; -+} -+ -+static bool mlx5_dpll_device_mode_supported(const struct dpll_device *dpll, -+ void *priv, -+ enum dpll_mode mode, -+ struct netlink_ext_ack *extack) -+{ -+ return mode == DPLL_MODE_MANUAL; -+} -+ -+static const struct dpll_device_ops mlx5_dpll_device_ops = { -+ .lock_status_get = mlx5_dpll_device_lock_status_get, -+ .mode_get = mlx5_dpll_device_mode_get, -+ .mode_supported = mlx5_dpll_device_mode_supported, -+}; -+ -+static int mlx5_dpll_pin_direction_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_direction *direction, -+ struct netlink_ext_ack *extack) -+{ -+ *direction = DPLL_PIN_DIRECTION_INPUT; -+ return 0; -+} -+ -+static int mlx5_dpll_state_on_dpll_get(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_state *state, -+ struct netlink_ext_ack *extack) -+{ -+ enum mlx5_msees_admin_status admin_status; -+ enum mlx5_msees_oper_status oper_status; -+ struct mlx5_dpll *mdpll = pin_priv; -+ int err; -+ -+ err = mlx5_dpll_synce_status_get(mdpll->mdev, &admin_status, -+ &oper_status, NULL); -+ if (err) -+ return err; -+ *state = mlx5_dpll_pin_state_get(admin_status, oper_status); -+ return 0; -+} -+ -+static int mlx5_dpll_state_on_dpll_set(const struct dpll_pin *pin, -+ void *pin_priv, -+ const struct dpll_device *dpll, -+ void *dpll_priv, -+ enum dpll_pin_state state, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlx5_dpll *mdpll = pin_priv; -+ -+ return mlx5_dpll_synce_status_set(mdpll->mdev, -+ state == DPLL_PIN_STATE_CONNECTED ? -+ MLX5_MSEES_ADMIN_STATUS_TRACK : -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING); -+} -+ -+static const struct dpll_pin_ops mlx5_dpll_pins_ops = { -+ .direction_get = mlx5_dpll_pin_direction_get, -+ .state_on_dpll_get = mlx5_dpll_state_on_dpll_get, -+ .state_on_dpll_set = mlx5_dpll_state_on_dpll_set, -+}; -+ -+static const struct dpll_pin_properties mlx5_dpll_pin_properties = { -+ .type = DPLL_PIN_TYPE_SYNCE_ETH_PORT, -+ .capabilities = DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE, -+}; -+ -+#define MLX5_DPLL_PERIODIC_WORK_INTERVAL 500 /* ms */ -+ -+static void mlx5_dpll_periodic_work_queue(struct mlx5_dpll *mdpll) -+{ -+ queue_delayed_work(mdpll->wq, &mdpll->work, -+ msecs_to_jiffies(MLX5_DPLL_PERIODIC_WORK_INTERVAL)); -+} -+ -+static void mlx5_dpll_periodic_work(struct work_struct *work) -+{ -+ struct mlx5_dpll *mdpll = container_of(work, struct mlx5_dpll, -+ work.work); -+ enum mlx5_msees_admin_status admin_status; -+ enum mlx5_msees_oper_status oper_status; -+ enum dpll_lock_status lock_status; -+ enum dpll_pin_state pin_state; -+ bool ho_acq; -+ int err; -+ -+ err = mlx5_dpll_synce_status_get(mdpll->mdev, &admin_status, -+ &oper_status, &ho_acq); -+ if (err) -+ goto err_out; -+ lock_status = mlx5_dpll_lock_status_get(oper_status, ho_acq); -+ pin_state = mlx5_dpll_pin_state_get(admin_status, oper_status); -+ -+ if (!mdpll->last.valid) -+ goto invalid_out; -+ -+ if (mdpll->last.lock_status != lock_status) -+ dpll_device_change_ntf(mdpll->dpll); -+ if (mdpll->last.pin_state != pin_state) -+ dpll_pin_change_ntf(mdpll->dpll_pin); -+ -+invalid_out: -+ mdpll->last.lock_status = lock_status; -+ mdpll->last.pin_state = pin_state; -+ mdpll->last.valid = true; -+err_out: -+ mlx5_dpll_periodic_work_queue(mdpll); -+} -+ -+static void mlx5_dpll_netdev_dpll_pin_set(struct mlx5_dpll *mdpll, -+ struct net_device *netdev) -+{ -+ if (mdpll->tracking_netdev) -+ return; -+ netdev_dpll_pin_set(netdev, mdpll->dpll_pin); -+ mdpll->tracking_netdev = netdev; -+} -+ -+static void mlx5_dpll_netdev_dpll_pin_clear(struct mlx5_dpll *mdpll) -+{ -+ if (!mdpll->tracking_netdev) -+ return; -+ netdev_dpll_pin_clear(mdpll->tracking_netdev); -+ mdpll->tracking_netdev = NULL; -+} -+ -+static int mlx5_dpll_mdev_notifier_event(struct notifier_block *nb, -+ unsigned long event, void *data) -+{ -+ struct mlx5_dpll *mdpll = container_of(nb, struct mlx5_dpll, mdev_nb); -+ struct net_device *netdev = data; -+ -+ switch (event) { -+ case MLX5_DRIVER_EVENT_UPLINK_NETDEV: -+ if (netdev) -+ mlx5_dpll_netdev_dpll_pin_set(mdpll, netdev); -+ else -+ mlx5_dpll_netdev_dpll_pin_clear(mdpll); -+ break; -+ default: -+ return NOTIFY_DONE; -+ } -+ -+ return NOTIFY_OK; -+} -+ -+static void mlx5_dpll_mdev_netdev_track(struct mlx5_dpll *mdpll, -+ struct mlx5_core_dev *mdev) -+{ -+ mdpll->mdev_nb.notifier_call = mlx5_dpll_mdev_notifier_event; -+ mlx5_blocking_notifier_register(mdev, &mdpll->mdev_nb); -+ mlx5_core_uplink_netdev_event_replay(mdev); -+} -+ -+static void mlx5_dpll_mdev_netdev_untrack(struct mlx5_dpll *mdpll, -+ struct mlx5_core_dev *mdev) -+{ -+ mlx5_blocking_notifier_unregister(mdev, &mdpll->mdev_nb); -+ mlx5_dpll_netdev_dpll_pin_clear(mdpll); -+} -+ -+static int mlx5_dpll_probe(struct auxiliary_device *adev, -+ const struct auxiliary_device_id *id) -+{ -+ struct mlx5_adev *edev = container_of(adev, struct mlx5_adev, adev); -+ struct mlx5_core_dev *mdev = edev->mdev; -+ struct mlx5_dpll *mdpll; -+ u64 clock_id; -+ int err; -+ -+ err = mlx5_dpll_synce_status_set(mdev, -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING); -+ if (err) -+ return err; -+ -+ err = mlx5_dpll_clock_id_get(mdev, &clock_id); -+ if (err) -+ return err; -+ -+ mdpll = kzalloc(sizeof(*mdpll), GFP_KERNEL); -+ if (!mdpll) -+ return -ENOMEM; -+ mdpll->mdev = mdev; -+ auxiliary_set_drvdata(adev, mdpll); -+ -+ /* Multiple mdev instances might share one DPLL device. */ -+ mdpll->dpll = dpll_device_get(clock_id, 0, THIS_MODULE); -+ if (IS_ERR(mdpll->dpll)) { -+ err = PTR_ERR(mdpll->dpll); -+ goto err_free_mdpll; -+ } -+ -+ err = dpll_device_register(mdpll->dpll, DPLL_TYPE_EEC, -+ &mlx5_dpll_device_ops, mdpll); -+ if (err) -+ goto err_put_dpll_device; -+ -+ /* Multiple mdev instances might share one DPLL pin. */ -+ mdpll->dpll_pin = dpll_pin_get(clock_id, mlx5_get_dev_index(mdev), -+ THIS_MODULE, &mlx5_dpll_pin_properties); -+ if (IS_ERR(mdpll->dpll_pin)) { -+ err = PTR_ERR(mdpll->dpll_pin); -+ goto err_unregister_dpll_device; -+ } -+ -+ err = dpll_pin_register(mdpll->dpll, mdpll->dpll_pin, -+ &mlx5_dpll_pins_ops, mdpll); -+ if (err) -+ goto err_put_dpll_pin; -+ -+ mdpll->wq = create_singlethread_workqueue("mlx5_dpll"); -+ if (!mdpll->wq) { -+ err = -ENOMEM; -+ goto err_unregister_dpll_pin; -+ } -+ -+ mlx5_dpll_mdev_netdev_track(mdpll, mdev); -+ -+ INIT_DELAYED_WORK(&mdpll->work, &mlx5_dpll_periodic_work); -+ mlx5_dpll_periodic_work_queue(mdpll); -+ -+ return 0; -+ -+err_unregister_dpll_pin: -+ dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin, -+ &mlx5_dpll_pins_ops, mdpll); -+err_put_dpll_pin: -+ dpll_pin_put(mdpll->dpll_pin); -+err_unregister_dpll_device: -+ dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll); -+err_put_dpll_device: -+ dpll_device_put(mdpll->dpll); -+err_free_mdpll: -+ kfree(mdpll); -+ return err; -+} -+ -+static void mlx5_dpll_remove(struct auxiliary_device *adev) -+{ -+ struct mlx5_dpll *mdpll = auxiliary_get_drvdata(adev); -+ struct mlx5_core_dev *mdev = mdpll->mdev; -+ -+ cancel_delayed_work(&mdpll->work); -+ mlx5_dpll_mdev_netdev_untrack(mdpll, mdev); -+ destroy_workqueue(mdpll->wq); -+ dpll_pin_unregister(mdpll->dpll, mdpll->dpll_pin, -+ &mlx5_dpll_pins_ops, mdpll); -+ dpll_pin_put(mdpll->dpll_pin); -+ dpll_device_unregister(mdpll->dpll, &mlx5_dpll_device_ops, mdpll); -+ dpll_device_put(mdpll->dpll); -+ kfree(mdpll); -+ -+ mlx5_dpll_synce_status_set(mdev, -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING); -+} -+ -+static int mlx5_dpll_suspend(struct auxiliary_device *adev, pm_message_t state) -+{ -+ return 0; -+} -+ -+static int mlx5_dpll_resume(struct auxiliary_device *adev) -+{ -+ return 0; -+} -+ -+static const struct auxiliary_device_id mlx5_dpll_id_table[] = { -+ { .name = MLX5_ADEV_NAME ".dpll", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(auxiliary, mlx5_dpll_id_table); -+ -+static struct auxiliary_driver mlx5_dpll_driver = { -+ .name = "dpll", -+ .probe = mlx5_dpll_probe, -+ .remove = mlx5_dpll_remove, -+ .suspend = mlx5_dpll_suspend, -+ .resume = mlx5_dpll_resume, -+ .id_table = mlx5_dpll_id_table, -+}; -+ -+static int __init mlx5_dpll_init(void) -+{ -+ return auxiliary_driver_register(&mlx5_dpll_driver); -+} -+ -+static void __exit mlx5_dpll_exit(void) -+{ -+ auxiliary_driver_unregister(&mlx5_dpll_driver); -+} -+ -+module_init(mlx5_dpll_init); -+module_exit(mlx5_dpll_exit); -+ -+MODULE_AUTHOR("Jiri Pirko "); -+MODULE_DESCRIPTION("Mellanox 5th generation network adapters (ConnectX series) DPLL driver"); -+MODULE_LICENSE("Dual BSD/GPL"); -diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h -index ffb98bc43b2d..8829fc8646e0 100644 ---- a/include/linux/mlx5/driver.h -+++ b/include/linux/mlx5/driver.h -@@ -155,6 +155,8 @@ enum { - MLX5_REG_MCC = 0x9062, - MLX5_REG_MCDA = 0x9063, - MLX5_REG_MCAM = 0x907f, -+ MLX5_REG_MSECQ = 0x9155, -+ MLX5_REG_MSEES = 0x9156, - MLX5_REG_MIRC = 0x9162, - MLX5_REG_SBCAM = 0xB01F, - MLX5_REG_RESOURCE_DUMP = 0xC000, -diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h -index 3d1cd726df34..c959a2a654df 100644 ---- a/include/linux/mlx5/mlx5_ifc.h -+++ b/include/linux/mlx5/mlx5_ifc.h -@@ -10178,7 +10178,9 @@ struct mlx5_ifc_mcam_access_reg_bits2 { - u8 mirc[0x1]; - u8 regs_97_to_96[0x2]; - -- u8 regs_95_to_64[0x20]; -+ u8 regs_95_to_87[0x09]; -+ u8 synce_registers[0x2]; -+ u8 regs_84_to_64[0x15]; - - u8 regs_63_to_32[0x20]; - -@@ -12558,4 +12560,59 @@ struct mlx5_ifc_modify_page_track_obj_in_bits { - struct mlx5_ifc_page_track_bits obj_context; - }; - -+struct mlx5_ifc_msecq_reg_bits { -+ u8 reserved_at_0[0x20]; -+ -+ u8 reserved_at_20[0x12]; -+ u8 network_option[0x2]; -+ u8 local_ssm_code[0x4]; -+ u8 local_enhanced_ssm_code[0x8]; -+ -+ u8 local_clock_identity[0x40]; -+ -+ u8 reserved_at_80[0x180]; -+}; -+ -+enum { -+ MLX5_MSEES_FIELD_SELECT_ENABLE = BIT(0), -+ MLX5_MSEES_FIELD_SELECT_ADMIN_STATUS = BIT(1), -+ MLX5_MSEES_FIELD_SELECT_ADMIN_FREQ_MEASURE = BIT(2), -+}; -+ -+enum mlx5_msees_admin_status { -+ MLX5_MSEES_ADMIN_STATUS_FREE_RUNNING = 0x0, -+ MLX5_MSEES_ADMIN_STATUS_TRACK = 0x1, -+}; -+ -+enum mlx5_msees_oper_status { -+ MLX5_MSEES_OPER_STATUS_FREE_RUNNING = 0x0, -+ MLX5_MSEES_OPER_STATUS_SELF_TRACK = 0x1, -+ MLX5_MSEES_OPER_STATUS_OTHER_TRACK = 0x2, -+ MLX5_MSEES_OPER_STATUS_HOLDOVER = 0x3, -+ MLX5_MSEES_OPER_STATUS_FAIL_HOLDOVER = 0x4, -+ MLX5_MSEES_OPER_STATUS_FAIL_FREE_RUNNING = 0x5, -+}; -+ -+struct mlx5_ifc_msees_reg_bits { -+ u8 reserved_at_0[0x8]; -+ u8 local_port[0x8]; -+ u8 pnat[0x2]; -+ u8 lp_msb[0x2]; -+ u8 reserved_at_14[0xc]; -+ -+ u8 field_select[0x20]; -+ -+ u8 admin_status[0x4]; -+ u8 oper_status[0x4]; -+ u8 ho_acq[0x1]; -+ u8 reserved_at_49[0xc]; -+ u8 admin_freq_measure[0x1]; -+ u8 oper_freq_measure[0x1]; -+ u8 failure_reason[0x9]; -+ -+ u8 frequency_diff[0x20]; -+ -+ u8 reserved_at_80[0x180]; -+}; -+ - #endif /* MLX5_IFC_H */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch b/kernel-std/debian/patches/ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch deleted file mode 100644 index d7713467..00000000 --- a/kernel-std/debian/patches/ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 3d465acb6c1390963cef5bfc5d6fc6c957294104 Mon Sep 17 00:00:00 2001 -From: Yang Li -Date: Tue, 19 Sep 2023 09:03:05 +0800 -Subject: [PATCH 10/46] netdev: Remove unneeded semicolon - -./drivers/dpll/dpll_netlink.c:847:3-4: Unneeded semicolon - -Reported-by: Abaci Robot -Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=6605 -Signed-off-by: Yang Li -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202309190540.RFwfIgO7-lkp@intel.com/ -Link: https://lore.kernel.org/r/20230919010305.120991-1-yang.lee@linux.alibaba.com -Signed-off-by: Paolo Abeni -(cherry picked from commit f20161cf51657bf4c85380c0c1c80188a74f168d) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 764437a0661b..e20daba6896a 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -844,7 +844,7 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, - return ERR_PTR(-EINVAL); - } - pin_match = pin; -- }; -+ } - } - if (!pin_match) { - NL_SET_ERR_MSG(extack, "not found"); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch b/kernel-std/debian/patches/ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch deleted file mode 100644 index 928da450..00000000 --- a/kernel-std/debian/patches/ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 44ad8b2bd48e3a01f46e10aebb59e8e0a52dc9b1 Mon Sep 17 00:00:00 2001 -From: Lukas Bulwahn -Date: Mon, 25 Sep 2023 07:43:05 +0200 -Subject: [PATCH 11/46] MAINTAINERS: adjust header file entry in DPLL SUBSYSTEM - -Commit 9431063ad323 ("dpll: core: Add DPLL framework base functions") adds -the section DPLL SUBSYSTEM in MAINTAINERS and includes a file entry to the -non-existing file 'include/net/dpll.h'. - -Hence, ./scripts/get_maintainer.pl --self-test=patterns complains about a -broken reference. Looking at the file stat of the commit above, this entry -clearly intended to refer to 'include/linux/dpll.h'. - -Adjust this header file entry in DPLL SUBSYSTEM. - -Signed-off-by: Lukas Bulwahn -Reviewed-by: Vadim Fedorenko -Signed-off-by: David S. Miller -(cherry picked from commit 20f7cce7cf18020cd2b052a6441a7d1623f0e352) -Signed-off-by: Jiping Ma ---- - MAINTAINERS | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/MAINTAINERS b/MAINTAINERS -index 531d44ed1e7b..ba98a1973524 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -6373,7 +6373,7 @@ L: netdev@vger.kernel.org - S: Supported - F: Documentation/driver-api/dpll.rst - F: drivers/dpll/* --F: include/net/dpll.h -+F: include/linux/dpll.h - F: include/uapi/linux/dpll.h - - DRBD DRIVER --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch b/kernel-std/debian/patches/ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch deleted file mode 100644 index fd2c12c2..00000000 --- a/kernel-std/debian/patches/ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 28fb3199a16a20f9939236fb7cbd5821046de923 Mon Sep 17 00:00:00 2001 -From: Bagas Sanjaya -Date: Thu, 28 Sep 2023 12:27:07 +0700 -Subject: [PATCH 12/46] Documentation: dpll: Fix code blocks - -kernel test robot and Stephen Rothwell report htmldocs warnings: - -Documentation/driver-api/dpll.rst:427: WARNING: Error in "code-block" directive: -maximum 1 argument(s) allowed, 18 supplied. - -.. code-block:: c - ... -Documentation/driver-api/dpll.rst:444: WARNING: Error in "code-block" directive: -maximum 1 argument(s) allowed, 21 supplied. - -.. code-block:: c - ... -Documentation/driver-api/dpll.rst:474: WARNING: Error in "code-block" directive: -maximum 1 argument(s) allowed, 12 supplied. - -.. code-block:: c - ... - -Fix these above by adding missing blank line separator after code-block -directive. - -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202309180456.lOhxy9gS-lkp@intel.com/ -Reported-by: Stephen Rothwell -Closes: https://lore.kernel.org/linux-next/20230918131521.155e9e63@canb.auug.org.au/ -Fixes: dbb291f19393b6 ("dpll: documentation on DPLL subsystem interface") -Signed-off-by: Bagas Sanjaya -Acked-by: Randy Dunlap -Tested-by: Randy Dunlap -Reviewed-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20230928052708.44820-2-bagasdotme@gmail.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 92425d08a60814b4a2e91626f1e24e4fd5fd5c7e) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -index bb52f1b8c0be..01eb4de86703 100644 ---- a/Documentation/driver-api/dpll.rst -+++ b/Documentation/driver-api/dpll.rst -@@ -425,6 +425,7 @@ The simplest implementation is in the OCP TimeCard driver. The ops - structures are defined like this: - - .. code-block:: c -+ - static const struct dpll_device_ops dpll_ops = { - .lock_status_get = ptp_ocp_dpll_lock_status_get, - .mode_get = ptp_ocp_dpll_mode_get, -@@ -442,6 +443,7 @@ structures are defined like this: - The registration part is then looks like this part: - - .. code-block:: c -+ - clkid = pci_get_dsn(pdev); - bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); - if (IS_ERR(bp->dpll)) { -@@ -472,6 +474,7 @@ The registration part is then looks like this part: - In the error path we have to rewind every allocation in the reverse order: - - .. code-block:: c -+ - while (i) { - --i; - dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch b/kernel-std/debian/patches/ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch deleted file mode 100644 index 7eb50453..00000000 --- a/kernel-std/debian/patches/ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch +++ /dev/null @@ -1,61 +0,0 @@ -From d77ae1b7c63966150bf19653579623f532e8cafb Mon Sep 17 00:00:00 2001 -From: Bagas Sanjaya -Date: Thu, 28 Sep 2023 12:27:08 +0700 -Subject: [PATCH 13/46] Documentation: dpll: wrap DPLL_CMD_PIN_GET output in a - code block - -DPLL_CMD_PIN_GET netlink command output for mux-type pins looks ugly -with normal paragraph formatting. Format it as a code block instead. - -Signed-off-by: Bagas Sanjaya -Acked-by: Randy Dunlap -Tested-by: Randy Dunlap -Reviewed-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20230928052708.44820-3-bagasdotme@gmail.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit c8afdc01832943fab030103bd027ce021d26ddcf) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 26 +++++++++++++------------- - 1 file changed, 13 insertions(+), 13 deletions(-) - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -index 01eb4de86703..69670deb8c4e 100644 ---- a/Documentation/driver-api/dpll.rst -+++ b/Documentation/driver-api/dpll.rst -@@ -119,19 +119,19 @@ with. - If a pin was registered with multiple parent pins, they behave like a - multiple output multiplexer. In this case output of a - ``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested --attributes with current state related to each parent, like: -- --'pin': [{{ -- 'clock-id': 282574471561216, -- 'module-name': 'ice', -- 'capabilities': 4, -- 'id': 13, -- 'parent-pin': [ -- {'parent-id': 2, 'state': 'connected'}, -- {'parent-id': 3, 'state': 'disconnected'} -- ], -- 'type': 'synce-eth-port' -- }}] -+attributes with current state related to each parent, like:: -+ -+ 'pin': [{{ -+ 'clock-id': 282574471561216, -+ 'module-name': 'ice', -+ 'capabilities': 4, -+ 'id': 13, -+ 'parent-pin': [ -+ {'parent-id': 2, 'state': 'connected'}, -+ {'parent-id': 3, 'state': 'disconnected'} -+ ], -+ 'type': 'synce-eth-port' -+ }}] - - Only one child pin can provide its signal to the parent MUX-type pin at - a time, the selection is done by requesting change of a child pin state --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch b/kernel-std/debian/patches/ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch deleted file mode 100644 index 60f6384c..00000000 --- a/kernel-std/debian/patches/ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch +++ /dev/null @@ -1,54 +0,0 @@ -From a04c89a000d99aef7d7e9ba9180cd70789250dee Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Wed, 16 Aug 2023 17:00:54 -0700 -Subject: [PATCH 14/46] ice: remove ICE_F_PTP_EXTTS feature flag - -The ICE_F_PTP_EXTTS feature flag is ostensibly intended to support checking -whether the device supports external timestamp pins. It is only checked in -E810-specific code flows, and is enabled for all E810-based devices. E822 -and E823 flows unconditionally enable external timestamp support. - -This makes the feature flag meaningless, as it is always enabled. Just -unconditionally enable support for external timestamp pins and remove this -unnecessary flag. - -Signed-off-by: Jacob Keller -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 12a5a28b565bfb5abab7ab17fe3c6a3c02a2affe) -[jma: Adjust the code for context changes, because https://git.yoctoproject.org/ - linux-yocto/commit/?h=v6.6.40&id=0d1b22367ec2 already included the part - of code.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice.h | 1 - - drivers/net/ethernet/intel/ice/ice_lib.c | 1 - - 2 files changed, 2 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index 537d5939c28e..b9cd0113b859 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -199,7 +199,6 @@ extern const char ice_drv_ver[]; - - enum ice_feature { - ICE_F_DSCP, -- ICE_F_PTP_EXTTS, - ICE_F_PHY_RCLK, - ICE_F_SMA_CTRL, - ICE_F_CGU, -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index 2847fc17d224..f7a0dd570b34 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4007,7 +4007,6 @@ void ice_init_feature_support(struct ice_pf *pf) - case ICE_DEV_ID_E810_XXV_QSFP: - case ICE_DEV_ID_E810_XXV_SFP: - ice_set_feature_support(pf, ICE_F_DSCP); -- ice_set_feature_support(pf, ICE_F_PTP_EXTTS); - if (ice_is_phy_rclk_present(&pf->hw)) - ice_set_feature_support(pf, ICE_F_PHY_RCLK); - /* If we don't own the timer - don't enable other caps */ --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch b/kernel-std/debian/patches/ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch deleted file mode 100644 index ad475e83..00000000 --- a/kernel-std/debian/patches/ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 24aee90e5bf889b197efdd2b0bdb3676d68c7ded Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Wed, 16 Aug 2023 17:00:58 -0700 -Subject: [PATCH 15/46] ice: check netlist before enabling ICE_F_GNSS - -Similar to the change made for ICE_F_SMA_CTRL, check the netlist before -enabling support for ICE_F_GNSS. This ensures that the driver only enables -the GNSS feature on devices which actually have the feature enabled in the -firmware device configuration. - -Signed-off-by: Jacob Keller -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 89776a6a702e9b7bf9ae1691621f9699b2c18cc1) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 2 ++ - drivers/net/ethernet/intel/ice/ice_common.c | 15 +++++++++++++++ - drivers/net/ethernet/intel/ice/ice_common.h | 1 + - drivers/net/ethernet/intel/ice/ice_gnss.c | 3 +++ - 4 files changed, 21 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -index aa532bfa1957..353ac55bdb9d 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h -@@ -1394,6 +1394,7 @@ struct ice_aqc_link_topo_params { - #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 - #define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 -+#define ICE_AQC_LINK_TOPO_NODE_TYPE_GPS 11 - #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 - #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ - (0xF << ICE_AQC_LINK_TOPO_NODE_CTX_S) -@@ -1436,6 +1437,7 @@ struct ice_aqc_get_link_topo { - #define ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY 0x30 - #define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 - #define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 -+#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48 - u8 rsvd[9]; - }; - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 089558b3b1ae..8f31ae449948 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -2764,6 +2764,21 @@ bool ice_is_pf_c827(struct ice_hw *hw) - return false; - } - -+/** -+ * ice_is_gps_in_netlist -+ * @hw: pointer to the hw struct -+ * -+ * Check if the GPS generic device is present in the netlist -+ */ -+bool ice_is_gps_in_netlist(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL)) -+ return false; -+ -+ return true; -+} -+ - /** - * ice_aq_list_caps - query function/device capabilities - * @hw: pointer to the HW struct -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 74e44b450de4..47a75651ca38 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -93,6 +93,7 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, - struct ice_aqc_get_phy_caps_data *caps, - struct ice_sq_cd *cd); - bool ice_is_pf_c827(struct ice_hw *hw); -+bool ice_is_gps_in_netlist(struct ice_hw *hw); - int - ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, - u16 *node_handle); -diff --git a/drivers/net/ethernet/intel/ice/ice_gnss.c b/drivers/net/ethernet/intel/ice/ice_gnss.c -index 75c9de675f20..c8ea1af51ad3 100644 ---- a/drivers/net/ethernet/intel/ice/ice_gnss.c -+++ b/drivers/net/ethernet/intel/ice/ice_gnss.c -@@ -389,6 +389,9 @@ bool ice_gnss_is_gps_present(struct ice_hw *hw) - if (!hw->func_caps.ts_func_info.src_tmr_owned) - return false; - -+ if (!ice_is_gps_in_netlist(hw)) -+ return false; -+ - #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) - if (ice_is_e810t(hw)) { - int err; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch b/kernel-std/debian/patches/ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch deleted file mode 100644 index b5a8ceab..00000000 --- a/kernel-std/debian/patches/ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch +++ /dev/null @@ -1,347 +0,0 @@ -From 97de9017c0311e01f354af4f70edb94d7dc58f80 Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 2 Oct 2023 11:51:32 -0700 -Subject: [PATCH 16/46] ice: fix linking when CONFIG_PTP_1588_CLOCK=n - -The recent support for DPLL introduced by commit 8a3a565ff210 ("ice: add -admin commands to access cgu configuration") and commit d7999f5ea64b ("ice: -implement dpll interface to control cgu") broke linking the ice driver if -CONFIG_PTP_1588_CLOCK=n: - -ld: vmlinux.o: in function `ice_init_feature_support': -(.text+0x8702b8): undefined reference to `ice_is_phy_rclk_present' -ld: (.text+0x8702cd): undefined reference to `ice_is_cgu_present' -ld: (.text+0x8702d9): undefined reference to `ice_is_clock_mux_present_e810t' -ld: vmlinux.o: in function `ice_dpll_init_info_direct_pins': -ice_dpll.c:(.text+0x894167): undefined reference to `ice_cgu_get_pin_freq_supp' -ld: ice_dpll.c:(.text+0x894197): undefined reference to `ice_cgu_get_pin_name' -ld: ice_dpll.c:(.text+0x8941a8): undefined reference to `ice_cgu_get_pin_type' -ld: vmlinux.o: in function `ice_dpll_update_state': -ice_dpll.c:(.text+0x894494): undefined reference to `ice_get_cgu_state' -ld: vmlinux.o: in function `ice_dpll_init': -(.text+0x8953d5): undefined reference to `ice_get_cgu_rclk_pin_info' - -The first commit broke things by calling functions in -ice_init_feature_support that are compiled as part of ice_ptp_hw.o, -including: - -* ice_is_phy_rclk_present -* ice_is_clock_mux_present_e810t -* ice_is_cgU_present - -The second commit continued the break by calling several CGU functions -defined in ice_ptp_hw.c in the DPLL code. -Because the ice_dpll.c file is compiled unconditionally, it will not -link when CONFIG_PTP_1588_CLOCK=n. - -It might be possible to break this dependency and expose those functions -without CONFIG_PTP_1588_CLOCK, but that is not clear to me. - -For the DPLL case, simply compile ice_dpll.o only when we have -CONFIG_PTP_1588_CLOCK. Add stub no-op implementation of ice_dpll_init() and -ice_dpll_uninit() when CONFIG_PTP_1588_CLOCK=n into ice_dpll.h - -The other functions are part of checking the netlist to see if hardware -features are enabled. These checks don't really belong in ice_ptp_hw.c, and -make more sense as part of the ice_common.c file. We already have -ice_is_gps_in_netlist() in ice_common.c which is doing a similar check. - -Move the functions into ice_common.c and rename them to have the similar -postfix of "in_netlist()" to be more expressive of what they are actually -checking. - -This also makes the ice_find_netlist_node only called from within -ice_common.c, so its safe to mark it static and stop declaring it in the -ice_common.h header as well. - -Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reported-by: kernel test robot -Closes: https://lore.kernel.org/oe-kbuild-all/202309191214.TaYEct4H-lkp@intel.com -Signed-off-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Tony Nguyen -Reviewed-by: Simon Horman -Tested-by: Simon Horman # build-tested -Link: https://lore.kernel.org/r/20231002185132.1575271-1-anthony.l.nguyen@intel.com -Signed-off-by: Jakub Kicinski -(cherry picked from commit 91e43ca0090b5fd59302c3d150835299785f30ea) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/Makefile | 5 +- - drivers/net/ethernet/intel/ice/ice_common.c | 66 ++++++++++++++++++++- - drivers/net/ethernet/intel/ice/ice_common.h | 6 +- - drivers/net/ethernet/intel/ice/ice_dpll.h | 6 +- - drivers/net/ethernet/intel/ice/ice_lib.c | 6 +- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 66 --------------------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 3 - - 7 files changed, 76 insertions(+), 82 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 00806ddf5bf0..0679907980f7 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -34,8 +34,7 @@ ice-y := ice_main.o \ - ice_lag.o \ - ice_ethtool.o \ - ice_repr.o \ -- ice_tc_lib.o \ -- ice_dpll.o -+ ice_tc_lib.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -@@ -44,7 +43,7 @@ ice-$(CONFIG_PCI_IOV) += \ - ice_vf_mbx.o \ - ice_vf_vsi_vlan_ops.o \ - ice_vf_lib.o --ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o -+ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o ice_dpll.o - ice-$(CONFIG_DCB) += ice_dcb.o ice_dcb_nl.o ice_dcb_lib.o - ice-$(CONFIG_RFS_ACCEL) += ice_arfs.o - ice-$(CONFIG_XDP_SOCKETS) += ice_xsk.o -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index 8f31ae449948..a1f1f037f327 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -477,9 +477,8 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, - * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST - * otherwise. If node_handle provided, it would be set to found node handle. - */ --int --ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -- u16 *node_handle) -+static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, -+ u8 node_part_number, u16 *node_handle) - { - struct ice_aqc_get_link_topo cmd; - u8 rec_node_part_number; -@@ -2764,6 +2763,67 @@ bool ice_is_pf_c827(struct ice_hw *hw) - return false; - } - -+/** -+ * ice_is_phy_rclk_in_netlist -+ * @hw: pointer to the hw struct -+ * -+ * Check if the PHY Recovered Clock device is present in the netlist -+ */ -+bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && -+ ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_is_clock_mux_in_netlist -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Multiplexer device is present in the netlist -+ */ -+bool ice_is_clock_mux_in_netlist(struct ice_hw *hw) -+{ -+ if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, -+ NULL)) -+ return false; -+ -+ return true; -+} -+ -+/** -+ * ice_is_cgu_in_netlist - check for CGU presence -+ * @hw: pointer to the hw struct -+ * -+ * Check if the Clock Generation Unit (CGU) device is present in the netlist. -+ * Save the CGU part number in the hw structure for later use. -+ * Return: -+ * * true - cgu is present -+ * * false - cgu is not present -+ */ -+bool ice_is_cgu_in_netlist(struct ice_hw *hw) -+{ -+ if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; -+ return true; -+ } else if (!ice_find_netlist_node(hw, -+ ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, -+ NULL)) { -+ hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; -+ return true; -+ } -+ -+ return false; -+} -+ - /** - * ice_is_gps_in_netlist - * @hw: pointer to the hw struct -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 47a75651ca38..7a966a0c224f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -93,11 +93,11 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode, - struct ice_aqc_get_phy_caps_data *caps, - struct ice_sq_cd *cd); - bool ice_is_pf_c827(struct ice_hw *hw); -+bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw); -+bool ice_is_clock_mux_in_netlist(struct ice_hw *hw); -+bool ice_is_cgu_in_netlist(struct ice_hw *hw); - bool ice_is_gps_in_netlist(struct ice_hw *hw); - int --ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number, -- u16 *node_handle); --int - ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd, - u8 *node_part_number, u16 *node_handle); - int -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -index 9c524c4bdfd7..2dfe764b81e1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.h -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -97,8 +97,12 @@ struct ice_dplls { - s32 output_phase_adj_max; - }; - -+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) - void ice_dpll_init(struct ice_pf *pf); -- - void ice_dpll_deinit(struct ice_pf *pf); -+#else -+static inline void ice_dpll_init(struct ice_pf *pf) { } -+static inline void ice_dpll_deinit(struct ice_pf *pf) { } -+#endif - - #endif -diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c -index f7a0dd570b34..632091487413 100644 ---- a/drivers/net/ethernet/intel/ice/ice_lib.c -+++ b/drivers/net/ethernet/intel/ice/ice_lib.c -@@ -4007,14 +4007,14 @@ void ice_init_feature_support(struct ice_pf *pf) - case ICE_DEV_ID_E810_XXV_QSFP: - case ICE_DEV_ID_E810_XXV_SFP: - ice_set_feature_support(pf, ICE_F_DSCP); -- if (ice_is_phy_rclk_present(&pf->hw)) -+ if (ice_is_phy_rclk_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_PHY_RCLK); - /* If we don't own the timer - don't enable other caps */ - if (!pf->hw.func_caps.ts_func_info.src_tmr_owned) - break; -- if (ice_is_cgu_present(&pf->hw)) -+ if (ice_is_cgu_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_CGU); -- if (ice_is_clock_mux_present_e810t(&pf->hw)) -+ if (ice_is_clock_mux_in_netlist(&pf->hw)) - ice_set_feature_support(pf, ICE_F_SMA_CTRL); - if (ice_gnss_is_gps_present(&pf->hw)) - ice_set_feature_support(pf, ICE_F_GNSS); -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 00ddf37296cc..8ccd633d9c2e 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -3479,45 +3479,6 @@ int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - return ice_clear_phy_tstamp_e822(hw, block, idx); - } - --/** -- * ice_is_phy_rclk_present - check recovered clk presence -- * @hw: pointer to the hw struct -- * -- * Check if the PHY Recovered Clock device is present in the netlist -- * Return: -- * * true - device found in netlist -- * * false - device not found -- */ --bool ice_is_phy_rclk_present(struct ice_hw *hw) --{ -- if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) && -- ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL)) -- return false; -- -- return true; --} -- --/** -- * ice_is_clock_mux_present_e810t -- * @hw: pointer to the hw struct -- * -- * Check if the Clock Multiplexer device is present in the netlist -- * Return: -- * * true - device found in netlist -- * * false - device not found -- */ --bool ice_is_clock_mux_present_e810t(struct ice_hw *hw) --{ -- if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX, -- NULL)) -- return false; -- -- return true; --} -- - /** - * ice_get_pf_c827_idx - find and return the C827 index for the current pf - * @hw: pointer to the hw struct -@@ -3618,33 +3579,6 @@ int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - tstamp_ready); - } - --/** -- * ice_is_cgu_present - check for CGU presence -- * @hw: pointer to the hw struct -- * -- * Check if the Clock Generation Unit (CGU) device is present in the netlist -- * Return: -- * * true - cgu is present -- * * false - cgu is not present -- */ --bool ice_is_cgu_present(struct ice_hw *hw) --{ -- if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032, -- NULL)) { -- hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; -- return true; -- } else if (!ice_find_netlist_node(hw, -- ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL, -- ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384, -- NULL)) { -- hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; -- return true; -- } -- -- return false; --} -- - /** - * ice_cgu_get_pin_desc_e823 - get pin description array - * @hw: pointer to the hw struct -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 594cc6875a95..d81e77386b54 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -270,10 +270,7 @@ int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data); - int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data); - int ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data); - bool ice_is_pca9575_present(struct ice_hw *hw); --bool ice_is_phy_rclk_present(struct ice_hw *hw); --bool ice_is_clock_mux_present_e810t(struct ice_hw *hw); - int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx); --bool ice_is_cgu_present(struct ice_hw *hw); - enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input); - struct dpll_pin_frequency * - ice_cgu_get_pin_freq_supp(struct ice_hw *hw, u8 pin, bool input, u8 *num); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch b/kernel-std/debian/patches/ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch deleted file mode 100644 index 1c29b719..00000000 --- a/kernel-std/debian/patches/ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch +++ /dev/null @@ -1,48 +0,0 @@ -From c5af08d5854c37d5c12bc048e83024e552a3c438 Mon Sep 17 00:00:00 2001 -From: Nathan Chancellor -Date: Mon, 2 Oct 2023 13:55:20 -0700 -Subject: [PATCH 17/46] ptp: Fix type of mode parameter in - ptp_ocp_dpll_mode_get() - -When building with -Wincompatible-function-pointer-types-strict, a -warning designed to catch potential kCFI failures at build time rather -than run time due to incorrect function pointer types, there is a -warning due to a mismatch between the type of the mode parameter in -ptp_ocp_dpll_mode_get() vs. what the function pointer prototype for -->mode_get() in 'struct dpll_device_ops' expects. - - drivers/ptp/ptp_ocp.c:4353:14: error: incompatible function pointer types initializing 'int (*)(const struct dpll_device *, void *, enum dpll_mode *, struct netlink_ext_ack *)' with an expression of type 'int (const struct dpll_device *, void *, u32 *, struct netlink_ext_ack *)' (aka 'int (const struct dpll_device *, void *, unsigned int *, struct netlink_ext_ack *)') [-Werror,-Wincompatible-function-pointer-types-strict] - 4353 | .mode_get = ptp_ocp_dpll_mode_get, - | ^~~~~~~~~~~~~~~~~~~~~ - 1 error generated. - -Change the type of the mode parameter in ptp_ocp_dpll_mode_get() to -clear up the warning and avoid kCFI failures at run time. - -Fixes: 09eeb3aecc6c ("ptp_ocp: implement DPLL ops") -Signed-off-by: Nathan Chancellor -Reviewed-by: Simon Horman -Link: https://lore.kernel.org/r/20231002-net-wifpts-dpll_mode_get-v1-1-a356a16413cf@kernel.org -Signed-off-by: Jakub Kicinski -(cherry picked from commit 26cc115d590c70e66d8399f39e4d9973d26439bc) -Signed-off-by: Jiping Ma ---- - drivers/ptp/ptp_ocp.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c -index 41eaffcae462..30a7d08ef912 100644 ---- a/drivers/ptp/ptp_ocp.c -+++ b/drivers/ptp/ptp_ocp.c -@@ -4254,7 +4254,7 @@ static int ptp_ocp_dpll_state_get(const struct dpll_pin *pin, void *pin_priv, - } - - static int ptp_ocp_dpll_mode_get(const struct dpll_device *dpll, void *priv, -- u32 *mode, struct netlink_ext_ack *extack) -+ enum dpll_mode *mode, struct netlink_ext_ack *extack) - { - *mode = DPLL_MODE_AUTOMATIC; - return 0; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch b/kernel-std/debian/patches/ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch deleted file mode 100644 index b8531771..00000000 --- a/kernel-std/debian/patches/ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 3455575d5b1777e520c1b7157d5d6cca3b5bb30b Mon Sep 17 00:00:00 2001 -From: Nathan Chancellor -Date: Mon, 2 Oct 2023 13:55:21 -0700 -Subject: [PATCH 18/46] mlx5: Fix type of mode parameter in - mlx5_dpll_device_mode_get() - -When building with -Wincompatible-function-pointer-types-strict, a -warning designed to catch potential kCFI failures at build time rather -than run time due to incorrect function pointer types, there is a -warning due to a mismatch between the type of the mode parameter in -mlx5_dpll_device_mode_get() vs. what the function pointer prototype for -->mode_get() in 'struct dpll_device_ops' expects. - - drivers/net/ethernet/mellanox/mlx5/core/dpll.c:141:14: error: incompatible function pointer types initializing 'int (*)(const struct dpll_device *, void *, enum dpll_mode *, struct netlink_ext_ack *)' with an expression of type 'int (const struct dpll_device *, void *, u32 *, struct netlink_ext_ack *)' (aka 'int (const struct dpll_device *, void *, unsigned int *, struct netlink_ext_ack *)') [-Werror,-Wincompatible-function-pointer-types-strict] - 141 | .mode_get = mlx5_dpll_device_mode_get, - | ^~~~~~~~~~~~~~~~~~~~~~~~~ - 1 error generated. - -Change the type of the mode parameter in mlx5_dpll_device_mode_get() to -clear up the warning and avoid kCFI failures at run time. - -Fixes: 496fd0a26bbf ("mlx5: Implement SyncE support using DPLL infrastructure") -Signed-off-by: Nathan Chancellor -Reviewed-by: Simon Horman -Link: https://lore.kernel.org/r/20231002-net-wifpts-dpll_mode_get-v1-2-a356a16413cf@kernel.org -Signed-off-by: Jakub Kicinski -(cherry picked from commit f4ecb3d44a117b16029485325bda1bc98c26de36) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/mellanox/mlx5/core/dpll.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -index 74f0c7867120..2cd81bb32c66 100644 ---- a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -+++ b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c -@@ -121,8 +121,8 @@ static int mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, - } - - static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, -- void *priv, -- u32 *mode, struct netlink_ext_ack *extack) -+ void *priv, enum dpll_mode *mode, -+ struct netlink_ext_ack *extack) - { - *mode = DPLL_MODE_MANUAL; - return 0; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch b/kernel-std/debian/patches/ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch deleted file mode 100644 index 6d95b174..00000000 --- a/kernel-std/debian/patches/ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch +++ /dev/null @@ -1,177 +0,0 @@ -From a90e48a7c15fd31fe0a74ef674d3c483e4138e64 Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Fri, 6 Oct 2023 13:44:35 +0200 -Subject: [PATCH 19/46] tools: ynl-gen: lift type requirement for attribute - subsets - -In case an attribute is used in a subset, the type has to be currently -specified. As the attribute is already defined in the original set, this -is a redundant information in yaml file, moreover, may lead to -inconsistencies. - -Example: -attribute-sets: - ... - name: pin - enum-name: dpll_a_pin - attributes: - ... - - - name: parent-id - type: u32 - ... - - - name: pin-parent-device - subset-of: pin - attributes: - - - name: parent-id - type: u32 <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< - -Remove the requirement from schema files to specify the "type" for -attribute subsets. - -Signed-off-by: Jiri Pirko -Reviewed-by: Jakub Kicinski -Link: https://lore.kernel.org/r/20231006114436.1725425-2-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit e18f3dc2beaa5055e27334cd2d8b492bc3e9b3a4) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/genetlink-c.yaml | 14 +++++++++++++- - Documentation/netlink/genetlink-legacy.yaml | 14 +++++++++++++- - Documentation/netlink/genetlink.yaml | 14 +++++++++++++- - Documentation/netlink/netlink-raw.yaml | 14 +++++++++++++- - 4 files changed, 52 insertions(+), 4 deletions(-) - -diff --git a/Documentation/netlink/genetlink-c.yaml b/Documentation/netlink/genetlink-c.yaml -index 9806c44f604c..32736b2d8ae8 100644 ---- a/Documentation/netlink/genetlink-c.yaml -+++ b/Documentation/netlink/genetlink-c.yaml -@@ -142,7 +142,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -215,6 +215,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object -diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml -index 12a0a045605d..25fe1379b180 100644 ---- a/Documentation/netlink/genetlink-legacy.yaml -+++ b/Documentation/netlink/genetlink-legacy.yaml -@@ -180,7 +180,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -254,6 +254,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object -diff --git a/Documentation/netlink/genetlink.yaml b/Documentation/netlink/genetlink.yaml -index 3d338c48bf21..6ea1c947ce51 100644 ---- a/Documentation/netlink/genetlink.yaml -+++ b/Documentation/netlink/genetlink.yaml -@@ -115,7 +115,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -184,6 +184,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object -diff --git a/Documentation/netlink/netlink-raw.yaml b/Documentation/netlink/netlink-raw.yaml -index 896797876414..d976851b80f8 100644 ---- a/Documentation/netlink/netlink-raw.yaml -+++ b/Documentation/netlink/netlink-raw.yaml -@@ -187,7 +187,7 @@ properties: - type: array - items: - type: object -- required: [ name, type ] -+ required: [ name ] - additionalProperties: False - properties: - name: -@@ -261,6 +261,18 @@ properties: - not: - required: [ name-prefix ] - -+ # type property is only required if not in subset definition -+ if: -+ properties: -+ subset-of: -+ not: -+ type: string -+ then: -+ properties: -+ attributes: -+ items: -+ required: [ type ] -+ - operations: - description: Operations supported by the protocol. - type: object --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch b/kernel-std/debian/patches/ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch deleted file mode 100644 index 5edaa13d..00000000 --- a/kernel-std/debian/patches/ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch +++ /dev/null @@ -1,107 +0,0 @@ -From c6f3d22b1cdb4abcf53e2901974361bac7310635 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:32 +0200 -Subject: [PATCH 20/46] dpll: docs: add support for pin signal phase - offset/adjust - -Add documentation on: -- measurement of phase of signal between pin and dpll -- adjustment of pin signal phase - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 27ed30d1f861315719bd8c2b2e81576d71750331) -Signed-off-by: Jiping Ma ---- - Documentation/driver-api/dpll.rst | 53 ++++++++++++++++++++++++++++++- - 1 file changed, 52 insertions(+), 1 deletion(-) - -diff --git a/Documentation/driver-api/dpll.rst b/Documentation/driver-api/dpll.rst -index 69670deb8c4e..e3d593841aa7 100644 ---- a/Documentation/driver-api/dpll.rst -+++ b/Documentation/driver-api/dpll.rst -@@ -173,6 +173,47 @@ in order to configure active input of a MUX-type pin, the user needs to - request desired pin state of the child pin on the parent pin, - as described in the ``MUX-type pins`` chapter. - -+Phase offset measurement and adjustment -+======================================== -+ -+Device may provide ability to measure a phase difference between signals -+on a pin and its parent dpll device. If pin-dpll phase offset measurement -+is supported, it shall be provided with ``DPLL_A_PIN_PHASE_OFFSET`` -+attribute for each parent dpll device. -+ -+Device may also provide ability to adjust a signal phase on a pin. -+If pin phase adjustment is supported, minimal and maximal values that pin -+handle shall be provide to the user on ``DPLL_CMD_PIN_GET`` respond -+with ``DPLL_A_PIN_PHASE_ADJUST_MIN`` and ``DPLL_A_PIN_PHASE_ADJUST_MAX`` -+attributes. Configured phase adjust value is provided with -+``DPLL_A_PIN_PHASE_ADJUST`` attribute of a pin, and value change can be -+requested with the same attribute with ``DPLL_CMD_PIN_SET`` command. -+ -+ =============================== ====================================== -+ ``DPLL_A_PIN_ID`` configured pin id -+ ``DPLL_A_PIN_PHASE_ADJUST_MIN`` attr minimum value of phase adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST_MAX`` attr maximum value of phase adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST`` attr configured value of phase -+ adjustment on parent dpll device -+ ``DPLL_A_PIN_PARENT_DEVICE`` nested attribute for requesting -+ configuration on given parent dpll -+ device -+ ``DPLL_A_PIN_PARENT_ID`` parent dpll device id -+ ``DPLL_A_PIN_PHASE_OFFSET`` attr measured phase difference -+ between a pin and parent dpll device -+ =============================== ====================================== -+ -+All phase related values are provided in pico seconds, which represents -+time difference between signals phase. The negative value means that -+phase of signal on pin is earlier in time than dpll's signal. Positive -+value means that phase of signal on pin is later in time than signal of -+a dpll. -+ -+Phase adjust (also min and max) values are integers, but measured phase -+offset values are fractional with 3-digit decimal places and shell be -+divided with ``DPLL_PIN_PHASE_OFFSET_DIVIDER`` to get integer part and -+modulo divided to get fractional part. -+ - Configuration commands group - ============================ - -@@ -263,6 +304,12 @@ according to attribute purpose. - frequencies - ``DPLL_A_PIN_ANY_FREQUENCY_MIN`` attr minimum value of frequency - ``DPLL_A_PIN_ANY_FREQUENCY_MAX`` attr maximum value of frequency -+ ``DPLL_A_PIN_PHASE_ADJUST_MIN`` attr minimum value of phase -+ adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST_MAX`` attr maximum value of phase -+ adjustment -+ ``DPLL_A_PIN_PHASE_ADJUST`` attr configured value of phase -+ adjustment on parent device - ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent device - the pin is connected with - ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id -@@ -270,8 +317,10 @@ according to attribute purpose. - dpll device - ``DPLL_A_PIN_STATE`` attr state of pin on the parent - dpll device -- ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the -+ ``DPLL_A_PIN_DIRECTION`` attr direction of a pin on the - parent dpll device -+ ``DPLL_A_PIN_PHASE_OFFSET`` attr measured phase difference -+ between a pin and parent dpll - ``DPLL_A_PIN_PARENT_PIN`` nested attr for each parent pin - the pin is connected with - ``DPLL_A_PIN_PARENT_ID`` attr parent pin id -@@ -284,6 +333,8 @@ according to attribute purpose. - ``DPLL_CMD_PIN_SET`` command to set pins configuration - ``DPLL_A_PIN_ID`` attr unique a pin ID - ``DPLL_A_PIN_FREQUENCY`` attr requested frequency of a pin -+ ``DPLL_A_PIN_PHASE_ADJUST`` attr requested value of phase -+ adjustment on parent device - ``DPLL_A_PIN_PARENT_DEVICE`` nested attr for each parent dpll - device configuration request - ``DPLL_A_PIN_PARENT_ID`` attr parent dpll device id --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch b/kernel-std/debian/patches/ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch deleted file mode 100644 index bd61c7ae..00000000 --- a/kernel-std/debian/patches/ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch +++ /dev/null @@ -1,141 +0,0 @@ -From 99c6ac37b209ab9c87c25d5b81318faa96eb47fb Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Fri, 6 Oct 2023 13:44:36 +0200 -Subject: [PATCH 21/46] netlink: specs: remove redundant type keys from - attributes in subsets - -No longer needed to define type for subset attributes. Remove those. - -Signed-off-by: Jiri Pirko -Reviewed-by: Jakub Kicinski -Link: https://lore.kernel.org/r/20231006114436.1725425-3-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 7049fd5df78cf0e7463d8e8bb41db60b6762df6c) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/devlink.yaml | 10 ---------- - Documentation/netlink/specs/dpll.yaml | 8 -------- - Documentation/netlink/specs/ethtool.yaml | 3 --- - 3 files changed, 21 deletions(-) - -diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml -index 065661acb878..dec130d2507c 100644 ---- a/Documentation/netlink/specs/devlink.yaml -+++ b/Documentation/netlink/specs/devlink.yaml -@@ -199,54 +199,44 @@ attribute-sets: - attributes: - - - name: reload-stats -- type: nest - - - name: remote-reload-stats -- type: nest - - - name: dl-reload-stats - subset-of: devlink - attributes: - - - name: reload-action-info -- type: nest - - - name: dl-reload-act-info - subset-of: devlink - attributes: - - - name: reload-action -- type: u8 - - - name: reload-action-stats -- type: nest - - - name: dl-reload-act-stats - subset-of: devlink - attributes: - - - name: reload-stats-entry -- type: nest - - - name: dl-reload-stats-entry - subset-of: devlink - attributes: - - - name: reload-stats-limit -- type: u8 - - - name: reload-stats-value -- type: u32 - - - name: dl-info-version - subset-of: devlink - attributes: - - - name: info-version-name -- type: string - - - name: info-version-value -- type: string - - operations: - enum-model: directional -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -index 8b86b28b47a6..1c1b53136c7b 100644 ---- a/Documentation/netlink/specs/dpll.yaml -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -278,36 +278,28 @@ attribute-sets: - attributes: - - - name: parent-id -- type: u32 - - - name: direction -- type: u32 - - - name: prio -- type: u32 - - - name: state -- type: u32 - - - name: pin-parent-pin - subset-of: pin - attributes: - - - name: parent-id -- type: u32 - - - name: state -- type: u32 - - - name: frequency-range - subset-of: pin - attributes: - - - name: frequency-min -- type: u64 - - - name: frequency-max -- type: u64 - - operations: - enum-name: dpll_cmd -diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml -index 837b565577ca..5c7a65b009b4 100644 ---- a/Documentation/netlink/specs/ethtool.yaml -+++ b/Documentation/netlink/specs/ethtool.yaml -@@ -818,13 +818,10 @@ attribute-sets: - attributes: - - - name: hist-bkt-low -- type: u32 - - - name: hist-bkt-hi -- type: u32 - - - name: hist-val -- type: u64 - - - name: stats - attributes: --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch b/kernel-std/debian/patches/ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch deleted file mode 100644 index ee37f07a..00000000 --- a/kernel-std/debian/patches/ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 304d5b650378394e20c1f65af6a4898c49f95e12 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:33 +0200 -Subject: [PATCH 22/46] dpll: spec: add support for pin-dpll signal phase - offset/adjust - -Add attributes for providing the user with: -- measurement of signals phase offset between pin and dpll -- ability to adjust the phase of pin signal - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit c3c6ab95c397134bf5948f18743b3ba8008e7c47) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/dpll.yaml | 30 +++++++++++++++++++++++++++ - drivers/dpll/dpll_nl.c | 8 ++++--- - drivers/dpll/dpll_nl.h | 2 +- - include/uapi/linux/dpll.h | 6 ++++++ - 4 files changed, 42 insertions(+), 4 deletions(-) - -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -index 1c1b53136c7b..cf8abe1c0550 100644 ---- a/Documentation/netlink/specs/dpll.yaml -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -164,6 +164,18 @@ definitions: - - - name: state-can-change - doc: pin state can be changed -+ - -+ type: const -+ name: phase-offset-divider -+ value: 1000 -+ doc: | -+ phase offset divider allows userspace to calculate a value of -+ measured signal phase difference between a pin and dpll device -+ as a fractional value with three digit decimal precision. -+ Value of (DPLL_A_PHASE_OFFSET / DPLL_PHASE_OFFSET_DIVIDER) is an -+ integer part of a measured phase offset value. -+ Value of (DPLL_A_PHASE_OFFSET % DPLL_PHASE_OFFSET_DIVIDER) is a -+ fractional part of a measured phase offset value. - - attribute-sets: - - -@@ -272,6 +284,18 @@ attribute-sets: - type: nest - multi-attr: true - nested-attributes: pin-parent-pin -+ - -+ name: phase-adjust-min -+ type: s32 -+ - -+ name: phase-adjust-max -+ type: s32 -+ - -+ name: phase-adjust -+ type: s32 -+ - -+ name: phase-offset -+ type: s64 - - - name: pin-parent-device - subset-of: pin -@@ -284,6 +308,8 @@ attribute-sets: - name: prio - - - name: state -+ - -+ name: phase-offset - - - name: pin-parent-pin - subset-of: pin -@@ -431,6 +457,9 @@ operations: - - capabilities - - parent-device - - parent-pin -+ - phase-adjust-min -+ - phase-adjust-max -+ - phase-adjust - - dump: - pre: dpll-lock-dumpit -@@ -458,6 +487,7 @@ operations: - - state - - parent-device - - parent-pin -+ - phase-adjust - - - name: pin-create-ntf - doc: Notification about pin appearing -diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c -index 14064c8c783b..eaee5be7aa64 100644 ---- a/drivers/dpll/dpll_nl.c -+++ b/drivers/dpll/dpll_nl.c -@@ -11,11 +11,12 @@ - #include - - /* Common nested types */ --const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1] = { -+const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1] = { - [DPLL_A_PIN_PARENT_ID] = { .type = NLA_U32, }, - [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), - [DPLL_A_PIN_PRIO] = { .type = NLA_U32, }, - [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), -+ [DPLL_A_PIN_PHASE_OFFSET] = { .type = NLA_S64, }, - }; - - const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1] = { -@@ -61,7 +62,7 @@ static const struct nla_policy dpll_pin_get_dump_nl_policy[DPLL_A_PIN_ID + 1] = - }; - - /* DPLL_CMD_PIN_SET - do */ --static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] = { -+static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PHASE_ADJUST + 1] = { - [DPLL_A_PIN_ID] = { .type = NLA_U32, }, - [DPLL_A_PIN_FREQUENCY] = { .type = NLA_U64, }, - [DPLL_A_PIN_DIRECTION] = NLA_POLICY_RANGE(NLA_U32, 1, 2), -@@ -69,6 +70,7 @@ static const struct nla_policy dpll_pin_set_nl_policy[DPLL_A_PIN_PARENT_PIN + 1] - [DPLL_A_PIN_STATE] = NLA_POLICY_RANGE(NLA_U32, 1, 3), - [DPLL_A_PIN_PARENT_DEVICE] = NLA_POLICY_NESTED(dpll_pin_parent_device_nl_policy), - [DPLL_A_PIN_PARENT_PIN] = NLA_POLICY_NESTED(dpll_pin_parent_pin_nl_policy), -+ [DPLL_A_PIN_PHASE_ADJUST] = { .type = NLA_S32, }, - }; - - /* Ops table for dpll */ -@@ -140,7 +142,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { - .doit = dpll_nl_pin_set_doit, - .post_doit = dpll_pin_post_doit, - .policy = dpll_pin_set_nl_policy, -- .maxattr = DPLL_A_PIN_PARENT_PIN, -+ .maxattr = DPLL_A_PIN_PHASE_ADJUST, - .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DO, - }, - }; -diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h -index 1f67aaed4742..92d4c9c4f788 100644 ---- a/drivers/dpll/dpll_nl.h -+++ b/drivers/dpll/dpll_nl.h -@@ -12,7 +12,7 @@ - #include - - /* Common nested types */ --extern const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_STATE + 1]; -+extern const struct nla_policy dpll_pin_parent_device_nl_policy[DPLL_A_PIN_PHASE_OFFSET + 1]; - extern const struct nla_policy dpll_pin_parent_pin_nl_policy[DPLL_A_PIN_STATE + 1]; - - int dpll_lock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, -diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h -index 20ef0718f8dc..715a491d2727 100644 ---- a/include/uapi/linux/dpll.h -+++ b/include/uapi/linux/dpll.h -@@ -138,6 +138,8 @@ enum dpll_pin_capabilities { - DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE = 4, - }; - -+#define DPLL_PHASE_OFFSET_DIVIDER 1000 -+ - enum dpll_a { - DPLL_A_ID = 1, - DPLL_A_MODULE_NAME, -@@ -173,6 +175,10 @@ enum dpll_a_pin { - DPLL_A_PIN_CAPABILITIES, - DPLL_A_PIN_PARENT_DEVICE, - DPLL_A_PIN_PARENT_PIN, -+ DPLL_A_PIN_PHASE_ADJUST_MIN, -+ DPLL_A_PIN_PHASE_ADJUST_MAX, -+ DPLL_A_PIN_PHASE_ADJUST, -+ DPLL_A_PIN_PHASE_OFFSET, - - __DPLL_A_PIN_MAX, - DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch b/kernel-std/debian/patches/ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch deleted file mode 100644 index 0e8508be..00000000 --- a/kernel-std/debian/patches/ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch +++ /dev/null @@ -1,251 +0,0 @@ -From 39f2322307b6cacde3f44d6ea8f64cc62d35ec79 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:34 +0200 -Subject: [PATCH 23/46] dpll: netlink/core: add support for pin-dpll signal - phase offset/adjust - -Add callback ops for pin-dpll phase measurement. -Add callback for pin signal phase adjustment. -Add min and max phase adjustment values to pin proprties. -Invoke callbacks in dpll_netlink.c when filling the pin details to -provide user with phase related attribute values. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit d7fbc0b7e846e9e0e70ae766d274b8720fbab412) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 138 +++++++++++++++++++++++++++++++++++- - include/linux/dpll.h | 18 +++++ - 2 files changed, 155 insertions(+), 1 deletion(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index e20daba6896a..09a6c2a1ea92 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -212,6 +212,53 @@ dpll_msg_add_pin_direction(struct sk_buff *msg, struct dpll_pin *pin, - return 0; - } - -+static int -+dpll_msg_add_pin_phase_adjust(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ s32 phase_adjust; -+ int ret; -+ -+ if (!ops->phase_adjust_get) -+ return 0; -+ ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), -+ &phase_adjust, extack); -+ if (ret) -+ return ret; -+ if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST, phase_adjust)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+static int -+dpll_msg_add_phase_offset(struct sk_buff *msg, struct dpll_pin *pin, -+ struct dpll_pin_ref *ref, -+ struct netlink_ext_ack *extack) -+{ -+ const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -+ struct dpll_device *dpll = ref->dpll; -+ s64 phase_offset; -+ int ret; -+ -+ if (!ops->phase_offset_get) -+ return 0; -+ ret = ops->phase_offset_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), &phase_offset, -+ extack); -+ if (ret) -+ return ret; -+ if (nla_put_64bit(msg, DPLL_A_PIN_PHASE_OFFSET, sizeof(phase_offset), -+ &phase_offset, DPLL_A_PIN_PAD)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ - static int - dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, - struct dpll_pin_ref *ref, struct netlink_ext_ack *extack) -@@ -330,6 +377,9 @@ dpll_msg_add_pin_dplls(struct sk_buff *msg, struct dpll_pin *pin, - if (ret) - goto nest_cancel; - ret = dpll_msg_add_pin_direction(msg, pin, ref, extack); -+ if (ret) -+ goto nest_cancel; -+ ret = dpll_msg_add_phase_offset(msg, pin, ref, extack); - if (ret) - goto nest_cancel; - nla_nest_end(msg, attr); -@@ -377,6 +427,15 @@ dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, - if (nla_put_u32(msg, DPLL_A_PIN_CAPABILITIES, prop->capabilities)) - return -EMSGSIZE; - ret = dpll_msg_add_pin_freq(msg, pin, ref, extack); -+ if (ret) -+ return ret; -+ if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST_MIN, -+ prop->phase_range.min)) -+ return -EMSGSIZE; -+ if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST_MAX, -+ prop->phase_range.max)) -+ return -EMSGSIZE; -+ ret = dpll_msg_add_pin_phase_adjust(msg, pin, ref, extack); - if (ret) - return ret; - if (xa_empty(&pin->parent_refs)) -@@ -416,7 +475,7 @@ dpll_device_get_one(struct dpll_device *dpll, struct sk_buff *msg, - if (nla_put_u32(msg, DPLL_A_TYPE, dpll->type)) - return -EMSGSIZE; - -- return ret; -+ return 0; - } - - static int -@@ -705,6 +764,78 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, - return 0; - } - -+static int -+dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, -+ struct netlink_ext_ack *extack) -+{ -+ struct dpll_pin_ref *ref, *failed; -+ const struct dpll_pin_ops *ops; -+ s32 phase_adj, old_phase_adj; -+ struct dpll_device *dpll; -+ unsigned long i; -+ int ret; -+ -+ phase_adj = nla_get_s32(phase_adj_attr); -+ if (phase_adj > pin->prop->phase_range.max || -+ phase_adj < pin->prop->phase_range.min) { -+ NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr, -+ "phase adjust value not supported"); -+ return -EINVAL; -+ } -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ ops = dpll_pin_ops(ref); -+ if (!ops->phase_adjust_set || !ops->phase_adjust_get) { -+ NL_SET_ERR_MSG(extack, "phase adjust not supported"); -+ return -EOPNOTSUPP; -+ } -+ } -+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), &old_phase_adj, -+ extack); -+ if (ret) { -+ NL_SET_ERR_MSG(extack, "unable to get old phase adjust value"); -+ return ret; -+ } -+ if (phase_adj == old_phase_adj) -+ return 0; -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ ret = ops->phase_adjust_set(pin, -+ dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), phase_adj, -+ extack); -+ if (ret) { -+ failed = ref; -+ NL_SET_ERR_MSG_FMT(extack, -+ "phase adjust set failed for dpll_id:%u", -+ dpll->id); -+ goto rollback; -+ } -+ } -+ __dpll_pin_change_ntf(pin); -+ -+ return 0; -+ -+rollback: -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ if (ref == failed) -+ break; -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ if (ops->phase_adjust_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), old_phase_adj, -+ extack)) -+ NL_SET_ERR_MSG(extack, "set phase adjust rollback failed"); -+ } -+ return ret; -+} -+ - static int - dpll_pin_parent_device_set(struct dpll_pin *pin, struct nlattr *parent_nest, - struct netlink_ext_ack *extack) -@@ -793,6 +924,11 @@ dpll_pin_set_from_nlattr(struct dpll_pin *pin, struct genl_info *info) - if (ret) - return ret; - break; -+ case DPLL_A_PIN_PHASE_ADJUST: -+ ret = dpll_pin_phase_adj_set(pin, a, info->extack); -+ if (ret) -+ return ret; -+ break; - case DPLL_A_PIN_PARENT_DEVICE: - ret = dpll_pin_parent_device_set(pin, a, info->extack); - if (ret) -diff --git a/include/linux/dpll.h b/include/linux/dpll.h -index bbc480cd2932..578fc5fa3750 100644 ---- a/include/linux/dpll.h -+++ b/include/linux/dpll.h -@@ -68,6 +68,18 @@ struct dpll_pin_ops { - int (*prio_set)(const struct dpll_pin *pin, void *pin_priv, - const struct dpll_device *dpll, void *dpll_priv, - const u32 prio, struct netlink_ext_ack *extack); -+ int (*phase_offset_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s64 *phase_offset, -+ struct netlink_ext_ack *extack); -+ int (*phase_adjust_get)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 *phase_adjust, -+ struct netlink_ext_ack *extack); -+ int (*phase_adjust_set)(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ const s32 phase_adjust, -+ struct netlink_ext_ack *extack); - }; - - struct dpll_pin_frequency { -@@ -91,6 +103,11 @@ struct dpll_pin_frequency { - #define DPLL_PIN_FREQUENCY_DCF77 \ - DPLL_PIN_FREQUENCY(DPLL_PIN_FREQUENCY_77_5_KHZ) - -+struct dpll_pin_phase_adjust_range { -+ s32 min; -+ s32 max; -+}; -+ - struct dpll_pin_properties { - const char *board_label; - const char *panel_label; -@@ -99,6 +116,7 @@ struct dpll_pin_properties { - unsigned long capabilities; - u32 freq_supported_num; - struct dpll_pin_frequency *freq_supported; -+ struct dpll_pin_phase_adjust_range phase_range; - }; - - #if IS_ENABLED(CONFIG_DPLL) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch b/kernel-std/debian/patches/ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch deleted file mode 100644 index 892fd7bb..00000000 --- a/kernel-std/debian/patches/ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch +++ /dev/null @@ -1,342 +0,0 @@ -From 2cad1ea959a38a58726855eeda1d618d99226774 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:35 +0200 -Subject: [PATCH 24/46] ice: dpll: implement phase related callbacks - -Implement new callback ops related to measurement and adjustment of -signal phase for pin-dpll in ice driver. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 90e1c90750d773fc991833f317b439236e13fc25) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 220 +++++++++++++++++++++- - drivers/net/ethernet/intel/ice/ice_dpll.h | 10 +- - 2 files changed, 226 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 1faee9cb944d..835c419ccc74 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -878,6 +878,199 @@ ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, - return 0; - } - -+/** -+ * ice_dpll_pin_phase_adjust_get - callback for get pin phase adjust value -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: on success holds pin phase_adjust value -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting phase adjust value of a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_phase_adjust_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 *phase_adjust, -+ struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_pf *pf = p->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ *phase_adjust = p->phase_adjust; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ -+/** -+ * ice_dpll_pin_phase_adjust_set - helper for setting a pin phase adjust value -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: phase_adjust to be set -+ * @extack: error reporting -+ * @type: type of a pin -+ * -+ * Helper for dpll subsystem callback. Handler for setting phase adjust value -+ * of a pin. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 phase_adjust, -+ struct netlink_ext_ack *extack, -+ enum ice_dpll_pin_type type) -+{ -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ u8 flag, flags_en = 0; -+ int ret; -+ -+ mutex_lock(&pf->dplls.lock); -+ switch (type) { -+ case ICE_DPLL_PIN_TYPE_INPUT: -+ flag = ICE_AQC_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY; -+ if (p->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_ESYNC_EN) -+ flags_en |= ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_EN; -+ if (p->flags[0] & ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN) -+ flags_en |= ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN; -+ ret = ice_aq_set_input_pin_cfg(&pf->hw, p->idx, flag, flags_en, -+ 0, phase_adjust); -+ break; -+ case ICE_DPLL_PIN_TYPE_OUTPUT: -+ flag = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_PHASE; -+ if (p->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_OUT_EN) -+ flag |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; -+ if (p->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) -+ flag |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; -+ ret = ice_aq_set_output_pin_cfg(&pf->hw, p->idx, flag, 0, 0, -+ phase_adjust); -+ break; -+ default: -+ ret = -EINVAL; -+ } -+ if (!ret) -+ p->phase_adjust = phase_adjust; -+ mutex_unlock(&pf->dplls.lock); -+ if (ret) -+ NL_SET_ERR_MSG_FMT(extack, -+ "err:%d %s failed to set pin phase_adjust:%d for pin:%u on dpll:%u\n", -+ ret, -+ ice_aq_str(pf->hw.adminq.sq_last_status), -+ phase_adjust, p->idx, d->dpll_idx); -+ -+ return ret; -+} -+ -+/** -+ * ice_dpll_input_phase_adjust_set - callback for set input pin phase adjust -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: phase_adjust to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Wraps a handler for setting phase adjust on input -+ * pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_input_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 phase_adjust, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_phase_adjust_set(pin, pin_priv, dpll, dpll_priv, -+ phase_adjust, extack, -+ ICE_DPLL_PIN_TYPE_INPUT); -+} -+ -+/** -+ * ice_dpll_output_phase_adjust_set - callback for set output pin phase adjust -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_adjust: phase_adjust to be set -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Wraps a handler for setting phase adjust on output -+ * pin. -+ * -+ * Context: Calls a function which acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_output_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s32 phase_adjust, -+ struct netlink_ext_ack *extack) -+{ -+ return ice_dpll_pin_phase_adjust_set(pin, pin_priv, dpll, dpll_priv, -+ phase_adjust, extack, -+ ICE_DPLL_PIN_TYPE_OUTPUT); -+} -+ -+#define ICE_DPLL_PHASE_OFFSET_DIVIDER 100 -+#define ICE_DPLL_PHASE_OFFSET_FACTOR \ -+ (DPLL_PHASE_OFFSET_DIVIDER / ICE_DPLL_PHASE_OFFSET_DIVIDER) -+/** -+ * ice_dpll_phase_offset_get - callback for get dpll phase shift value -+ * @pin: pointer to a pin -+ * @pin_priv: private data pointer passed on pin registration -+ * @dpll: registered dpll pointer -+ * @dpll_priv: private data pointer passed on dpll registration -+ * @phase_offset: on success holds pin phase_offset value -+ * @extack: error reporting -+ * -+ * Dpll subsystem callback. Handler for getting phase shift value between -+ * dpll's input and output. -+ * -+ * Context: Acquires pf->dplls.lock -+ * Return: -+ * * 0 - success -+ * * negative - error -+ */ -+static int -+ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv, -+ const struct dpll_device *dpll, void *dpll_priv, -+ s64 *phase_offset, struct netlink_ext_ack *extack) -+{ -+ struct ice_dpll *d = dpll_priv; -+ struct ice_pf *pf = d->pf; -+ -+ mutex_lock(&pf->dplls.lock); -+ if (d->active_input == pin) -+ *phase_offset = d->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR; -+ else -+ *phase_offset = 0; -+ mutex_unlock(&pf->dplls.lock); -+ -+ return 0; -+} -+ - /** - * ice_dpll_rclk_state_on_pin_set - set a state on rclk pin - * @pin: pointer to a pin -@@ -993,6 +1186,9 @@ static const struct dpll_pin_ops ice_dpll_input_ops = { - .prio_get = ice_dpll_input_prio_get, - .prio_set = ice_dpll_input_prio_set, - .direction_get = ice_dpll_input_direction, -+ .phase_adjust_get = ice_dpll_pin_phase_adjust_get, -+ .phase_adjust_set = ice_dpll_input_phase_adjust_set, -+ .phase_offset_get = ice_dpll_phase_offset_get, - }; - - static const struct dpll_pin_ops ice_dpll_output_ops = { -@@ -1001,6 +1197,8 @@ static const struct dpll_pin_ops ice_dpll_output_ops = { - .state_on_dpll_get = ice_dpll_output_state_get, - .state_on_dpll_set = ice_dpll_output_state_set, - .direction_get = ice_dpll_output_direction, -+ .phase_adjust_get = ice_dpll_pin_phase_adjust_get, -+ .phase_adjust_set = ice_dpll_output_phase_adjust_set, - }; - - static const struct dpll_device_ops ice_dpll_ops = { -@@ -1031,6 +1229,8 @@ static u64 ice_generate_clock_id(struct ice_pf *pf) - */ - static void ice_dpll_notify_changes(struct ice_dpll *d) - { -+ bool pin_notified = false; -+ - if (d->prev_dpll_state != d->dpll_state) { - d->prev_dpll_state = d->dpll_state; - dpll_device_change_ntf(d->dpll); -@@ -1039,7 +1239,14 @@ static void ice_dpll_notify_changes(struct ice_dpll *d) - if (d->prev_input) - dpll_pin_change_ntf(d->prev_input); - d->prev_input = d->active_input; -- if (d->active_input) -+ if (d->active_input) { -+ dpll_pin_change_ntf(d->active_input); -+ pin_notified = true; -+ } -+ } -+ if (d->prev_phase_offset != d->phase_offset) { -+ d->prev_phase_offset = d->phase_offset; -+ if (!pin_notified && d->active_input) - dpll_pin_change_ntf(d->active_input); - } - } -@@ -1065,7 +1272,7 @@ ice_dpll_update_state(struct ice_pf *pf, struct ice_dpll *d, bool init) - - ret = ice_get_cgu_state(&pf->hw, d->dpll_idx, d->prev_dpll_state, - &d->input_idx, &d->ref_state, &d->eec_mode, -- &d->phase_shift, &d->dpll_state); -+ &d->phase_offset, &d->dpll_state); - - dev_dbg(ice_pf_to_dev(pf), - "update dpll=%d, prev_src_idx:%u, src_idx:%u, state:%d, prev:%d mode:%d\n", -@@ -1656,6 +1863,15 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - return ret; - pins[i].prop.capabilities |= - DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE; -+ pins[i].prop.phase_range.min = -+ pf->dplls.input_phase_adj_max; -+ pins[i].prop.phase_range.max = -+ -pf->dplls.input_phase_adj_max; -+ } else { -+ pins[i].prop.phase_range.min = -+ pf->dplls.output_phase_adj_max; -+ pins[i].prop.phase_range.max = -+ -pf->dplls.output_phase_adj_max; - } - pins[i].prop.capabilities |= - DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -index 2dfe764b81e1..bb32b6d88373 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.h -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -19,6 +19,7 @@ - * @state: state of a pin - * @prop: pin properties - * @freq: current frequency of a pin -+ * @phase_adjust: current phase adjust value - */ - struct ice_dpll_pin { - struct dpll_pin *pin; -@@ -30,6 +31,7 @@ struct ice_dpll_pin { - u8 state[ICE_DPLL_RCLK_NUM_MAX]; - struct dpll_pin_properties prop; - u32 freq; -+ s32 phase_adjust; - }; - - /** ice_dpll - store info required for DPLL control -@@ -40,7 +42,8 @@ struct ice_dpll_pin { - * @prev_input_idx: previously selected input index - * @ref_state: state of dpll reference signals - * @eec_mode: eec_mode dpll is configured for -- * @phase_shift: phase shift delay of a dpll -+ * @phase_offset: phase offset of active pin vs dpll signal -+ * @prev_phase_offset: previous phase offset of active pin vs dpll signal - * @input_prio: priorities of each input - * @dpll_state: current dpll sync state - * @prev_dpll_state: last dpll sync state -@@ -55,7 +58,8 @@ struct ice_dpll { - u8 prev_input_idx; - u8 ref_state; - u8 eec_mode; -- s64 phase_shift; -+ s64 phase_offset; -+ s64 prev_phase_offset; - u8 *input_prio; - enum dpll_lock_status dpll_state; - enum dpll_lock_status prev_dpll_state; -@@ -78,6 +82,8 @@ struct ice_dpll { - * @cgu_state_acq_err_num: number of errors returned during periodic work - * @base_rclk_idx: idx of first pin used for clock revocery pins - * @clock_id: clock_id of dplls -+ * @input_phase_adj_max: max phase adjust value for an input pins -+ * @output_phase_adj_max: max phase adjust value for an output pins - */ - struct ice_dplls { - struct kthread_worker *kworker; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch b/kernel-std/debian/patches/ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch deleted file mode 100644 index 0e3887b7..00000000 --- a/kernel-std/debian/patches/ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 48ea8a9833e381a05157086ab0dd8ee56246b7d5 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Wed, 11 Oct 2023 12:12:36 +0200 -Subject: [PATCH 25/46] dpll: netlink/core: change pin frequency set behavior - -Align the approach of pin frequency set behavior with the approach -introduced with pin phase adjust set. -Fail the request if any of devices did not registered the callback ops. -If callback op on any pin's registered device fails, return error and -rollback the value to previous one. - -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 20f6677234d8105e55beca355135e94bb10fbf74) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 50 +++++++++++++++++++++++++++++++------ - 1 file changed, 42 insertions(+), 8 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 09a6c2a1ea92..a6dc3997bf5c 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -615,8 +615,10 @@ static int - dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, - struct netlink_ext_ack *extack) - { -- u64 freq = nla_get_u64(a); -- struct dpll_pin_ref *ref; -+ u64 freq = nla_get_u64(a), old_freq; -+ struct dpll_pin_ref *ref, *failed; -+ const struct dpll_pin_ops *ops; -+ struct dpll_device *dpll; - unsigned long i; - int ret; - -@@ -626,19 +628,51 @@ dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a, - } - - xa_for_each(&pin->dpll_refs, i, ref) { -- const struct dpll_pin_ops *ops = dpll_pin_ops(ref); -- struct dpll_device *dpll = ref->dpll; -- -- if (!ops->frequency_set) -+ ops = dpll_pin_ops(ref); -+ if (!ops->frequency_set || !ops->frequency_get) { -+ NL_SET_ERR_MSG(extack, "frequency set not supported by the device"); - return -EOPNOTSUPP; -+ } -+ } -+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs); -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ ret = ops->frequency_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll, -+ dpll_priv(dpll), &old_freq, extack); -+ if (ret) { -+ NL_SET_ERR_MSG(extack, "unable to get old frequency value"); -+ return ret; -+ } -+ if (freq == old_freq) -+ return 0; -+ -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; - ret = ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin), - dpll, dpll_priv(dpll), freq, extack); -- if (ret) -- return ret; -+ if (ret) { -+ failed = ref; -+ NL_SET_ERR_MSG_FMT(extack, "frequency set failed for dpll_id:%u", -+ dpll->id); -+ goto rollback; -+ } - } - __dpll_pin_change_ntf(pin); - - return 0; -+ -+rollback: -+ xa_for_each(&pin->dpll_refs, i, ref) { -+ if (ref == failed) -+ break; -+ ops = dpll_pin_ops(ref); -+ dpll = ref->dpll; -+ if (ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin), -+ dpll, dpll_priv(dpll), old_freq, extack)) -+ NL_SET_ERR_MSG(extack, "set frequency rollback failed"); -+ } -+ return ret; - } - - static int --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch b/kernel-std/debian/patches/ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch deleted file mode 100644 index ea67a594..00000000 --- a/kernel-std/debian/patches/ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 1db547235552584bc7a2f1bacc43cc55c4db50aa Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 13 Oct 2023 12:25:10 +0200 -Subject: [PATCH 26/46] ice: dpll: fix initial lock status of dpll - -When dpll device is registered and dpll subsystem performs notify of a -new device, the lock state value provided to dpll subsystem equals 0 -which is invalid value for the `enum dpll_lock_status`. -Provide correct value by obtaining it from firmware before registering -the dpll device. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Signed-off-by: Aleksandr Loktionov -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 7a1aba89ac54ccf6cad23a91a34c0ab24b1d7997) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 835c419ccc74..607f534055b6 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -1756,6 +1756,7 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu, - } - d->pf = pf; - if (cgu) { -+ ice_dpll_update_state(pf, d, true); - ret = dpll_device_register(d->dpll, type, &ice_dpll_ops, d); - if (ret) { - dpll_device_put(d->dpll); -@@ -1796,8 +1797,6 @@ static int ice_dpll_init_worker(struct ice_pf *pf) - struct ice_dplls *d = &pf->dplls; - struct kthread_worker *kworker; - -- ice_dpll_update_state(pf, &d->eec, true); -- ice_dpll_update_state(pf, &d->pps, true); - kthread_init_delayed_work(&d->work, ice_dpll_periodic_work); - kworker = kthread_create_worker(0, "ice-dplls-%s", - dev_name(ice_pf_to_dev(pf))); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch b/kernel-std/debian/patches/ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch deleted file mode 100644 index e23253fa..00000000 --- a/kernel-std/debian/patches/ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 2f2ca7f272758284fb9c15ed5f513cdeaefee46c Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Tue, 31 Oct 2023 18:06:54 +0100 -Subject: [PATCH 27/46] ice: dpll: fix check for dpll input priority range - -Supported priority value for input pins may differ with regard of NIC -firmware version. E810T NICs with 3.20/4.00 FW versions would accept -priority range 0-31, where firmware 4.10+ would support the range 0-9 -and extra value of 255. -Remove the in-range check as the driver has no information on supported -values from the running firmware, let firmware decide if given value is -correct and return extack error if the value is not supported. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Przemek Kitszel -Reviewed-by: Jacob Keller -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 4a4027f25dc3f39c2aafb3bf8926125c5378c9dc) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 6 ------ - drivers/net/ethernet/intel/ice/ice_dpll.h | 1 - - 2 files changed, 7 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 607f534055b6..831ba6683962 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -815,12 +815,6 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -- if (prio > ICE_DPLL_PRIO_MAX) { -- NL_SET_ERR_MSG_FMT(extack, "prio out of supported range 0-%d", -- ICE_DPLL_PRIO_MAX); -- return -EINVAL; -- } -- - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); - mutex_unlock(&pf->dplls.lock); -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h -index bb32b6d88373..93172e93995b 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.h -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h -@@ -6,7 +6,6 @@ - - #include "ice.h" - --#define ICE_DPLL_PRIO_MAX 0xF - #define ICE_DPLL_RCLK_NUM_MAX 4 - - /** ice_dpll_pin - store info about pins --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch b/kernel-std/debian/patches/ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch deleted file mode 100644 index f7a44ebf..00000000 --- a/kernel-std/debian/patches/ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch +++ /dev/null @@ -1,346 +0,0 @@ -From 6add02878183b5256a0b01ee820f3e0cc878e15d Mon Sep 17 00:00:00 2001 -From: Jacob Keller -Date: Mon, 17 Jul 2023 15:17:13 -0700 -Subject: [PATCH 28/46] ice: introduce hw->phy_model for handling PTP PHY - differences - -The ice driver has PTP support which works across a couple of different -device families. The device families each have different PHY hardware which -have unique requirements for programming. - -Today, there is E810-based hardware, and E822-based hardware. To handle -this, the driver checks the ice_is_e810() function to separate between the -two existing families of hardware. - -Future development is going to add new hardware designs which have further -unique requirements. To make this easier, introduce a phy_model field to -the HW structure. This field represents what PHY model the current device -has, and is used to allow distinguishing which logic a particular device -needs. - -This will make supporting future upcoming hardware easier, by providing an -obvious place to initialize the PHY model, and by already using switch/case -statements instead of the previous if statements. - -Astute reviewers may notice that there are a handful of remaining checks -for ice_is_e810() left in ice_ptp.c These conflict with some other -cleanup patches in development, and will be fixed in the near future. - -Signed-off-by: Jacob Keller -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit be16574609f14c67efd89d5d8f9f19ab7724bfc9) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_ptp.c | 32 ++++-- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 102 ++++++++++++++++---- - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 + - drivers/net/ethernet/intel/ice/ice_type.h | 8 ++ - 4 files changed, 117 insertions(+), 27 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index c4270708a769..3648d3cccacc 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -1366,6 +1366,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port) - void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - { - struct ice_ptp_port *ptp_port; -+ struct ice_hw *hw = &pf->hw; - - if (!test_bit(ICE_FLAG_PTP, pf->flags)) - return; -@@ -1380,11 +1381,16 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) - /* Update cached link status for this port immediately */ - ptp_port->link_up = linkup; - -- /* E810 devices do not need to reconfigure the PHY */ -- if (ice_is_e810(&pf->hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: -+ /* Do not reconfigure E810 PHY */ - return; -- -- ice_ptp_port_phy_restart(ptp_port); -+ case ICE_PHY_E822: -+ ice_ptp_port_phy_restart(ptp_port); -+ return; -+ default: -+ dev_warn(ice_pf_to_dev(pf), "%s: Unknown PHY type\n", __func__); -+ } - } - - /** -@@ -2687,14 +2693,22 @@ static int ice_ptp_init_work(struct ice_pf *pf, struct ice_ptp *ptp) - */ - static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) - { -+ struct ice_hw *hw = &pf->hw; -+ - mutex_init(&ptp_port->ps_lock); - -- if (ice_is_e810(&pf->hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_ptp_init_tx_e810(pf, &ptp_port->tx); -+ case ICE_PHY_E822: -+ kthread_init_delayed_work(&ptp_port->ov_work, -+ ice_ptp_wait_for_offsets); - -- kthread_init_delayed_work(&ptp_port->ov_work, -- ice_ptp_wait_for_offsets); -- return ice_ptp_init_tx_e822(pf, &ptp_port->tx, ptp_port->port_num); -+ return ice_ptp_init_tx_e822(pf, &ptp_port->tx, -+ ptp_port->port_num); -+ default: -+ return -ENODEV; -+ } - } - - /** -@@ -2715,6 +2729,8 @@ void ice_ptp_init(struct ice_pf *pf) - struct ice_hw *hw = &pf->hw; - int err; - -+ ice_ptp_init_phy_model(hw); -+ - /* If this function owns the clock hardware, it must allocate and - * configure the PTP clock device to represent it. - */ -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 8ccd633d9c2e..9aef80ad5100 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -3275,6 +3275,21 @@ void ice_ptp_unlock(struct ice_hw *hw) - wr32(hw, PFTSYN_SEM + (PFTSYN_SEM_BYTES * hw->pf_id), 0); - } - -+/** -+ * ice_ptp_init_phy_model - Initialize hw->phy_model based on device type -+ * @hw: pointer to the HW structure -+ * -+ * Determine the PHY model for the device, and initialize hw->phy_model -+ * for use by other functions. -+ */ -+void ice_ptp_init_phy_model(struct ice_hw *hw) -+{ -+ if (ice_is_e810(hw)) -+ hw->phy_model = ICE_PHY_E810; -+ else -+ hw->phy_model = ICE_PHY_E822; -+} -+ - /** - * ice_ptp_tmr_cmd - Prepare and trigger a timer sync command - * @hw: pointer to HW struct -@@ -3293,10 +3308,17 @@ static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - ice_ptp_src_cmd(hw, cmd); - - /* Next, prepare the ports */ -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_port_cmd_e810(hw, cmd); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_port_cmd_e822(hw, cmd); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) { - ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY ports for timer command %u, err %d\n", - cmd, err); -@@ -3338,10 +3360,17 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time) - - /* PHY timers */ - /* Fill Rx and Tx ports and send msg to PHY */ -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_prep_phy_time_e822(hw, time & 0xFFFFFFFF); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) - return err; - -@@ -3373,10 +3402,17 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval)); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval)); - -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_prep_phy_incval_e810(hw, incval); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_prep_phy_incval_e822(hw, incval); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) - return err; - -@@ -3432,10 +3468,17 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0); - wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj); - -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - err = ice_ptp_prep_phy_adj_e810(hw, adj); -- else -+ break; -+ case ICE_PHY_E822: - err = ice_ptp_prep_phy_adj_e822(hw, adj); -+ break; -+ default: -+ err = -EOPNOTSUPP; -+ } -+ - if (err) - return err; - -@@ -3455,10 +3498,14 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj) - */ - int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_read_phy_tstamp_e810(hw, block, idx, tstamp); -- else -+ case ICE_PHY_E822: - return ice_read_phy_tstamp_e822(hw, block, idx, tstamp); -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -@@ -3473,10 +3520,14 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp) - */ - int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_clear_phy_tstamp_e810(hw, block, idx); -- else -+ case ICE_PHY_E822: - return ice_clear_phy_tstamp_e822(hw, block, idx); -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -@@ -3530,10 +3581,14 @@ int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx) - */ - void ice_ptp_reset_ts_memory(struct ice_hw *hw) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E822: -+ ice_ptp_reset_ts_memory_e822(hw); -+ break; -+ case ICE_PHY_E810: -+ default: - return; -- -- ice_ptp_reset_ts_memory_e822(hw); -+ } - } - - /** -@@ -3552,10 +3607,14 @@ int ice_ptp_init_phc(struct ice_hw *hw) - /* Clear event err indications for auxiliary pins */ - (void)rd32(hw, GLTSYN_STAT(src_idx)); - -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_ptp_init_phc_e810(hw); -- else -+ case ICE_PHY_E822: - return ice_ptp_init_phc_e822(hw); -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -@@ -3571,12 +3630,17 @@ int ice_ptp_init_phc(struct ice_hw *hw) - */ - int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready) - { -- if (ice_is_e810(hw)) -+ switch (hw->phy_model) { -+ case ICE_PHY_E810: - return ice_get_phy_tx_tstamp_ready_e810(hw, block, - tstamp_ready); -- else -+ case ICE_PHY_E822: - return ice_get_phy_tx_tstamp_ready_e822(hw, block, - tstamp_ready); -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } - } - - /** -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index d81e77386b54..4f71d4bfeadf 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -281,6 +281,8 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, - enum dpll_lock_status *dpll_state); - int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - -+void ice_ptp_init_phy_model(struct ice_hw *hw); -+ - #define PFTSYN_SEM_BYTES 4 - - #define ICE_PTP_CLOCK_INDEX_0 0x00 -diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h -index 5eb778d9ae64..4cd131546aa9 100644 ---- a/drivers/net/ethernet/intel/ice/ice_type.h -+++ b/drivers/net/ethernet/intel/ice/ice_type.h -@@ -822,6 +822,13 @@ struct ice_mbx_data { - u16 async_watermark_val; - }; - -+/* PHY model */ -+enum ice_phy_model { -+ ICE_PHY_UNSUP = -1, -+ ICE_PHY_E810 = 1, -+ ICE_PHY_E822, -+}; -+ - /* Port hardware description */ - struct ice_hw { - u8 __iomem *hw_addr; -@@ -843,6 +850,7 @@ struct ice_hw { - u8 revision_id; - - u8 pf_id; /* device profile info */ -+ enum ice_phy_model phy_model; - - u16 max_burst_size; /* driver sets this value */ - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch b/kernel-std/debian/patches/ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch deleted file mode 100644 index ca5bd8a8..00000000 --- a/kernel-std/debian/patches/ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 4014377612cd199b2488074dbd6865cd1a1a835e Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Tue, 31 Oct 2023 18:08:00 +0100 -Subject: [PATCH 29/46] ice: dpll: fix output pin capabilities - -The dpll output pins which are used to feed clock signal of PHY and MAC -circuits cannot be disconnected, those integrated circuits require clock -signal for operation. -By stopping assignment of DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE pin -capability, prevent the user from invoking the state set callback on -those pins, setting the state on those pins already returns error, as -firmware doesn't allow the change of their state. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") -Reviewed-by: Andrii Staikov -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 6db5f2cd9ebb12e930a82c01714a6589576cd50f) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 12 +++-- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 54 +++++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 2 + - 3 files changed, 64 insertions(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 831ba6683962..86b180cb32a0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -1823,6 +1823,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - int num_pins, i, ret = -EINVAL; - struct ice_hw *hw = &pf->hw; - struct ice_dpll_pin *pins; -+ unsigned long caps; - u8 freq_supp_num; - bool input; - -@@ -1842,6 +1843,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - } - - for (i = 0; i < num_pins; i++) { -+ caps = 0; - pins[i].idx = i; - pins[i].prop.board_label = ice_cgu_get_pin_name(hw, i, input); - pins[i].prop.type = ice_cgu_get_pin_type(hw, i, input); -@@ -1854,8 +1856,8 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - &dp->input_prio[i]); - if (ret) - return ret; -- pins[i].prop.capabilities |= -- DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE; -+ caps |= (DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE | -+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE); - pins[i].prop.phase_range.min = - pf->dplls.input_phase_adj_max; - pins[i].prop.phase_range.max = -@@ -1865,9 +1867,11 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, - pf->dplls.output_phase_adj_max; - pins[i].prop.phase_range.max = - -pf->dplls.output_phase_adj_max; -+ ret = ice_cgu_get_output_pin_state_caps(hw, i, &caps); -+ if (ret) -+ return ret; - } -- pins[i].prop.capabilities |= -- DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ pins[i].prop.capabilities = caps; - ret = ice_dpll_pin_state_update(pf, &pins[i], pin_type, NULL); - if (ret) - return ret; -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 9aef80ad5100..a299af39a7c4 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -3935,3 +3935,57 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) - - return ret; - } -+ -+/** -+ * ice_cgu_get_output_pin_state_caps - get output pin state capabilities -+ * @hw: pointer to the hw struct -+ * @pin_id: id of a pin -+ * @caps: capabilities to modify -+ * -+ * Return: -+ * * 0 - success, state capabilities were modified -+ * * negative - failure, capabilities were not modified -+ */ -+int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, -+ unsigned long *caps) -+{ -+ bool can_change = true; -+ -+ switch (hw->device_id) { -+ case ICE_DEV_ID_E810C_SFP: -+ if (pin_id == ZL_OUT2 || pin_id == ZL_OUT3) -+ can_change = false; -+ break; -+ case ICE_DEV_ID_E810C_QSFP: -+ if (pin_id == ZL_OUT2 || pin_id == ZL_OUT3 || pin_id == ZL_OUT4) -+ can_change = false; -+ break; -+ case ICE_DEV_ID_E823L_10G_BASE_T: -+ case ICE_DEV_ID_E823L_1GBE: -+ case ICE_DEV_ID_E823L_BACKPLANE: -+ case ICE_DEV_ID_E823L_QSFP: -+ case ICE_DEV_ID_E823L_SFP: -+ case ICE_DEV_ID_E823C_10G_BASE_T: -+ case ICE_DEV_ID_E823C_BACKPLANE: -+ case ICE_DEV_ID_E823C_QSFP: -+ case ICE_DEV_ID_E823C_SFP: -+ case ICE_DEV_ID_E823C_SGMII: -+ if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 && -+ pin_id == ZL_OUT2) -+ can_change = false; -+ else if (hw->cgu_part_number == -+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 && -+ pin_id == SI_OUT1) -+ can_change = false; -+ break; -+ default: -+ return -EINVAL; -+ } -+ if (can_change) -+ *caps |= DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ else -+ *caps &= ~DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE; -+ -+ return 0; -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -index 4f71d4bfeadf..9dc30918f044 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h -@@ -282,6 +282,8 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, - int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num); - - void ice_ptp_init_phy_model(struct ice_hw *hw); -+int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id, -+ unsigned long *caps); - - #define PFTSYN_SEM_BYTES 4 - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch b/kernel-std/debian/patches/ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch deleted file mode 100644 index a9ec21bf..00000000 --- a/kernel-std/debian/patches/ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch +++ /dev/null @@ -1,75 +0,0 @@ -From f29c2ce39b0b42b323163a29fb1e0366f75b3e91 Mon Sep 17 00:00:00 2001 -From: Hao Ge -Date: Tue, 21 Nov 2023 09:37:09 +0800 -Subject: [PATCH 30/46] dpll: Fix potential msg memleak when genlmsg_put_reply - failed - -We should clean the skb resource if genlmsg_put_reply failed. - -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Signed-off-by: Hao Ge -Reviewed-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20231121013709.73323-1-gehao@kylinos.cn -Signed-off-by: Jakub Kicinski -(cherry picked from commit b6fe6f03716da246b453369f98a553d4ab21447c) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 17 ++++++++++++----- - 1 file changed, 12 insertions(+), 5 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index a6dc3997bf5c..442a0ebeb953 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -1093,9 +1093,10 @@ int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_PIN_ID_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -- -+ } - pin = dpll_pin_find_from_nlattr(info); - if (!IS_ERR(pin)) { - ret = dpll_msg_add_pin_handle(msg, pin); -@@ -1123,8 +1124,10 @@ int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_PIN_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -+ } - ret = dpll_cmd_pin_get_one(msg, pin, info->extack); - if (ret) { - nlmsg_free(msg); -@@ -1256,8 +1259,10 @@ int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_DEVICE_ID_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -+ } - - dpll = dpll_device_find_from_nlattr(info); - if (!IS_ERR(dpll)) { -@@ -1284,8 +1289,10 @@ int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info) - return -ENOMEM; - hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0, - DPLL_CMD_DEVICE_GET); -- if (!hdr) -+ if (!hdr) { -+ nlmsg_free(msg); - return -EMSGSIZE; -+ } - - ret = dpll_device_get_one(dpll, msg, info->extack); - if (ret) { --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch b/kernel-std/debian/patches/ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch deleted file mode 100644 index 3a9882f3..00000000 --- a/kernel-std/debian/patches/ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch +++ /dev/null @@ -1,102 +0,0 @@ -From a13fb6033eb54791b67f6a62c2328baf1b3ed85a Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 1 Dec 2023 10:08:40 -0800 -Subject: [PATCH 31/46] ice: add CGU info to devlink info callback - -If Clock Generation Unit is present on NIC board user shall know its -details. -Provide the devlink info callback with a new: -- fixed type object (cgu.id) indicating hardware variant of onboard CGU, -- running type object (fw.cgu) consisting of CGU id, config and firmware -versions. -These information shall be known for debugging purposes. - -Test (on NIC board with CGU) -$ devlink dev info / | grep cgu - cgu.id 36 - fw.cgu 8032.16973825.6021 - -Test (on NIC board without CGU) -$ devlink dev info / | grep cgu -c -0 - -Reviewed-by: Larysa Zaremba -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -Signed-off-by: Paolo Abeni -(cherry picked from commit b86455a1cbef6829e8da3f93d37a233be2616569) -Signed-off-by: Jiping Ma ---- - Documentation/networking/devlink/ice.rst | 9 +++++++++ - drivers/net/ethernet/intel/ice/ice_devlink.c | 20 ++++++++++++++++++++ - 2 files changed, 29 insertions(+) - -diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst -index 2f60e34ab926..7f30ebd5debb 100644 ---- a/Documentation/networking/devlink/ice.rst -+++ b/Documentation/networking/devlink/ice.rst -@@ -38,6 +38,10 @@ The ``ice`` driver reports the following versions - - fixed - - K65390-000 - - The Product Board Assembly (PBA) identifier of the board. -+ * - ``cgu.id`` -+ - fixed -+ - 36 -+ - The Clock Generation Unit (CGU) hardware revision identifier. - * - ``fw.mgmt`` - - running - - 2.1.7 -@@ -104,6 +108,11 @@ The ``ice`` driver reports the following versions - - running - - 0xee16ced7 - - The first 4 bytes of the hash of the netlist module contents. -+ * - ``fw.cgu`` -+ - running -+ - 8032.16973825.6021 -+ - The version of Clock Generation Unit (CGU). Format: -+ ... - - Flash Update - ============ -diff --git a/drivers/net/ethernet/intel/ice/ice_devlink.c b/drivers/net/ethernet/intel/ice/ice_devlink.c -index 80dc5445b50d..3a2261823d93 100644 ---- a/drivers/net/ethernet/intel/ice/ice_devlink.c -+++ b/drivers/net/ethernet/intel/ice/ice_devlink.c -@@ -193,6 +193,24 @@ ice_info_pending_netlist_build(struct ice_pf __always_unused *pf, - snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", netlist->hash); - } - -+static void ice_info_cgu_fw_build(struct ice_pf *pf, struct ice_info_ctx *ctx) -+{ -+ u32 id, cfg_ver, fw_ver; -+ -+ if (!ice_is_feature_supported(pf, ICE_F_CGU)) -+ return; -+ if (ice_aq_get_cgu_info(&pf->hw, &id, &cfg_ver, &fw_ver)) -+ return; -+ snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", id, cfg_ver, fw_ver); -+} -+ -+static void ice_info_cgu_id(struct ice_pf *pf, struct ice_info_ctx *ctx) -+{ -+ if (!ice_is_feature_supported(pf, ICE_F_CGU)) -+ return; -+ snprintf(ctx->buf, sizeof(ctx->buf), "%u", pf->hw.cgu_part_number); -+} -+ - #define fixed(key, getter) { ICE_VERSION_FIXED, key, getter, NULL } - #define running(key, getter) { ICE_VERSION_RUNNING, key, getter, NULL } - #define stored(key, getter, fallback) { ICE_VERSION_STORED, key, getter, fallback } -@@ -235,6 +253,8 @@ static const struct ice_devlink_version { - running("fw.app.bundle_id", ice_info_ddp_pkg_bundle_id), - combined("fw.netlist", ice_info_netlist_ver, ice_info_pending_netlist_ver), - combined("fw.netlist.build", ice_info_netlist_build, ice_info_pending_netlist_build), -+ fixed("cgu.id", ice_info_cgu_id), -+ running("fw.cgu", ice_info_cgu_fw_build), - }; - - /** --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch b/kernel-std/debian/patches/ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch deleted file mode 100644 index 51a3fc66..00000000 --- a/kernel-std/debian/patches/ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 0fe793ace5580801d48d93b3670f84506c336d6f Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Mon, 11 Dec 2023 09:37:58 +0100 -Subject: [PATCH 32/46] dpll: sanitize possible null pointer dereference in - dpll_pin_parent_pin_set() - -User may not pass DPLL_A_PIN_STATE attribute in the pin set operation -message. Sanitize that by checking if the attr pointer is not null -and process the passed state attribute value only in that case. - -Reported-by: Xingyuan Mo -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Signed-off-by: Jiri Pirko -Acked-by: Vadim Fedorenko -Link: https://lore.kernel.org/r/20231211083758.1082853-1-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 65c95f78917ea6fa7ff189a2c19879c4fe161873) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 13 ++++++++----- - 1 file changed, 8 insertions(+), 5 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 442a0ebeb953..ce7cf736f020 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -925,7 +925,6 @@ dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, - struct netlink_ext_ack *extack) - { - struct nlattr *tb[DPLL_A_PIN_MAX + 1]; -- enum dpll_pin_state state; - u32 ppin_idx; - int ret; - -@@ -936,10 +935,14 @@ dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, - return -EINVAL; - } - ppin_idx = nla_get_u32(tb[DPLL_A_PIN_PARENT_ID]); -- state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -- ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); -- if (ret) -- return ret; -+ -+ if (tb[DPLL_A_PIN_STATE]) { -+ enum dpll_pin_state state = nla_get_u32(tb[DPLL_A_PIN_STATE]); -+ -+ ret = dpll_pin_on_pin_state_set(pin, ppin_idx, state, extack); -+ if (ret) -+ return ret; -+ } - - return 0; - } --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch b/kernel-std/debian/patches/ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch deleted file mode 100644 index 1ce44caa..00000000 --- a/kernel-std/debian/patches/ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 6bfe9392d6a26b04b24d310fc0e6342f139842eb Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Tue, 12 Dec 2023 16:06:05 +0100 -Subject: [PATCH 33/46] dpll: allocate pin ids in cycle - -Pin ID is just a number. Nobody should rely on a certain value, instead, -user should use either pin-id-get op or RTNetlink to get it. - -Unify the pin ID allocation behavior with what there is already -implemented for dpll devices. - -Signed-off-by: Jiri Pirko -Link: https://lore.kernel.org/r/20231212150605.1141261-1-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 97f265ef7f5b526b33d6030b2a1fc69a2259bf4a) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 3568149b9562..1eca8cc271f8 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -22,7 +22,8 @@ DEFINE_MUTEX(dpll_lock); - DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC); - DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC); - --static u32 dpll_xa_id; -+static u32 dpll_device_xa_id; -+static u32 dpll_pin_xa_id; - - #define ASSERT_DPLL_REGISTERED(d) \ - WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -@@ -246,7 +247,7 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module) - dpll->clock_id = clock_id; - dpll->module = module; - ret = xa_alloc_cyclic(&dpll_device_xa, &dpll->id, dpll, xa_limit_32b, -- &dpll_xa_id, GFP_KERNEL); -+ &dpll_device_xa_id, GFP_KERNEL); - if (ret < 0) { - kfree(dpll); - return ERR_PTR(ret); -@@ -446,7 +447,8 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - refcount_set(&pin->refcount, 1); - xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); - xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); -- ret = xa_alloc(&dpll_pin_xa, &pin->id, pin, xa_limit_16b, GFP_KERNEL); -+ ret = xa_alloc_cyclic(&dpll_pin_xa, &pin->id, pin, xa_limit_32b, -+ &dpll_pin_xa_id, GFP_KERNEL); - if (ret) - goto err; - return pin; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch b/kernel-std/debian/patches/ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch deleted file mode 100644 index ffe318fe..00000000 --- a/kernel-std/debian/patches/ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch +++ /dev/null @@ -1,105 +0,0 @@ -From aebb7cbbcfce883a276aebfd7840d5297a471204 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Mon, 18 Dec 2023 15:58:55 +0100 -Subject: [PATCH 34/46] ice: dpll: fix phase offset value - -Stop dividing the phase_offset value received from firmware. This fault -is present since the initial implementation. -The phase_offset value received from firmware is in 0.01ps resolution. -Dpll subsystem is using the value in 0.001ps, raw value is adjusted -before providing it to the user. - -The user can observe the value of phase offset with response to -`pin-get` netlink message of dpll subsystem for an active pin: -$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ - --do pin-get --json '{"id":2}' - -Where example of correct response would be: -{'board-label': 'C827_0-RCLKA', - 'capabilities': 6, - 'clock-id': 4658613174691613800, - 'frequency': 1953125, - 'id': 2, - 'module-name': 'ice', - 'parent-device': [{'direction': 'input', - 'parent-id': 6, - 'phase-offset': -216839550, - 'prio': 9, - 'state': 'connected'}, - {'direction': 'input', - 'parent-id': 7, - 'phase-offset': -42930, - 'prio': 8, - 'state': 'connected'}], - 'phase-adjust': 0, - 'phase-adjust-max': 16723, - 'phase-adjust-min': -16723, - 'type': 'mux'} - -Provided phase-offset value (-42930) shall be divided by the user with -DPLL_PHASE_OFFSET_DIVIDER to get actual value of -42.930 ps. - -Before the fix, the response was not correct: -{'board-label': 'C827_0-RCLKA', - 'capabilities': 6, - 'clock-id': 4658613174691613800, - 'frequency': 1953125, - 'id': 2, - 'module-name': 'ice', - 'parent-device': [{'direction': 'input', - 'parent-id': 6, - 'phase-offset': -216839, - 'prio': 9, - 'state': 'connected'}, - {'direction': 'input', - 'parent-id': 7, - 'phase-offset': -42, - 'prio': 8, - 'state': 'connected'}], - 'phase-adjust': 0, - 'phase-adjust-max': 16723, - 'phase-adjust-min': -16723, - 'type': 'mux'} - -Where phase-offset value (-42), after division -(DPLL_PHASE_OFFSET_DIVIDER) would be: -0.042 ps. - -Fixes: 8a3a565ff210 ("ice: add admin commands to access cgu configuration") -Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") -Reviewed-by: Aleksandr Loktionov -Reviewed-by: Przemek Kitszel -Signed-off-by: Arkadiusz Kubalewski -Reviewed-by: Paul Menzel -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 8278a6a43d030a3aa8d7768148e74844331e39e3) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.c | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c -index a1f1f037f327..7674267a2d90 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.c -+++ b/drivers/net/ethernet/intel/ice/ice_common.c -@@ -5303,7 +5303,6 @@ ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, - u8 *eec_mode) - { - struct ice_aqc_get_cgu_dpll_status *cmd; -- const s64 nsec_per_psec = 1000LL; - struct ice_aq_desc desc; - int status; - -@@ -5319,8 +5318,7 @@ ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state, - *phase_offset = le32_to_cpu(cmd->phase_offset_h); - *phase_offset <<= 32; - *phase_offset += le32_to_cpu(cmd->phase_offset_l); -- *phase_offset = div64_s64(sign_extend64(*phase_offset, 47), -- nsec_per_psec); -+ *phase_offset = sign_extend64(*phase_offset, 47); - *eec_mode = cmd->eec_mode; - } - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch b/kernel-std/debian/patches/ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch deleted file mode 100644 index a235c301..00000000 --- a/kernel-std/debian/patches/ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 34cbb064beb22a19c3c69fcefbc0c84eaa14d076 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:01 +0100 -Subject: [PATCH 35/46] dpll: fix broken error path in dpll_pin_alloc(..) - -If pin type is not expected, or pin properities failed to allocate -memory, the unwind error path shall not destroy pin's xarrays, which -were not yet initialized. -Add new goto label and use it to fix broken error path. - -Reviewed-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit b6a11a7fc4d6337f7ea720b9287d1b9749c4eae0) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 1eca8cc271f8..c08772ee9fd6 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -441,7 +441,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX || - prop->type > DPLL_PIN_TYPE_MAX)) { - ret = -EINVAL; -- goto err; -+ goto err_pin_prop; - } - pin->prop = prop; - refcount_set(&pin->refcount, 1); -@@ -450,11 +450,12 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - ret = xa_alloc_cyclic(&dpll_pin_xa, &pin->id, pin, xa_limit_32b, - &dpll_pin_xa_id, GFP_KERNEL); - if (ret) -- goto err; -+ goto err_xa_alloc; - return pin; --err: -+err_xa_alloc: - xa_destroy(&pin->dpll_refs); - xa_destroy(&pin->parent_refs); -+err_pin_prop: - kfree(pin); - return ERR_PTR(ret); - } --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch b/kernel-std/debian/patches/ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch deleted file mode 100644 index d8bcd0fc..00000000 --- a/kernel-std/debian/patches/ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch +++ /dev/null @@ -1,255 +0,0 @@ -From 0d3ade390857fb44333de60cadc255a92011d46f Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:02 +0100 -Subject: [PATCH 36/46] dpll: fix pin dump crash for rebound module - -When a kernel module is unbound but the pin resources were not entirely -freed (other kernel module instance of the same PCI device have had kept -the reference to that pin), and kernel module is again bound, the pin -properties would not be updated (the properties are only assigned when -memory for the pin is allocated), prop pointer still points to the -kernel module memory of the kernel module which was deallocated on the -unbind. - -If the pin dump is invoked in this state, the result is a kernel crash. -Prevent the crash by storing persistent pin properties in dpll subsystem, -copy the content from the kernel module when pin is allocated, instead of -using memory of the kernel module. - -Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Reviewed-by: Jan Glaza -Reviewed-by: Przemek Kitszel -Signed-off-by: Arkadiusz Kubalewski -Reviewed-by: Jiri Pirko -Signed-off-by: David S. Miller -(cherry picked from commit 830ead5fb0c5855ce4d70ba2ed4a673b5f1e7d9b) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 55 +++++++++++++++++++++++++++++++++++-- - drivers/dpll/dpll_core.h | 4 +-- - drivers/dpll/dpll_netlink.c | 28 +++++++++---------- - 3 files changed, 69 insertions(+), 18 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index c08772ee9fd6..cb62696467d1 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -425,6 +425,53 @@ void dpll_device_unregister(struct dpll_device *dpll, - } - EXPORT_SYMBOL_GPL(dpll_device_unregister); - -+static void dpll_pin_prop_free(struct dpll_pin_properties *prop) -+{ -+ kfree(prop->package_label); -+ kfree(prop->panel_label); -+ kfree(prop->board_label); -+ kfree(prop->freq_supported); -+} -+ -+static int dpll_pin_prop_dup(const struct dpll_pin_properties *src, -+ struct dpll_pin_properties *dst) -+{ -+ memcpy(dst, src, sizeof(*dst)); -+ if (src->freq_supported && src->freq_supported_num) { -+ size_t freq_size = src->freq_supported_num * -+ sizeof(*src->freq_supported); -+ dst->freq_supported = kmemdup(src->freq_supported, -+ freq_size, GFP_KERNEL); -+ if (!src->freq_supported) -+ return -ENOMEM; -+ } -+ if (src->board_label) { -+ dst->board_label = kstrdup(src->board_label, GFP_KERNEL); -+ if (!dst->board_label) -+ goto err_board_label; -+ } -+ if (src->panel_label) { -+ dst->panel_label = kstrdup(src->panel_label, GFP_KERNEL); -+ if (!dst->panel_label) -+ goto err_panel_label; -+ } -+ if (src->package_label) { -+ dst->package_label = kstrdup(src->package_label, GFP_KERNEL); -+ if (!dst->package_label) -+ goto err_package_label; -+ } -+ -+ return 0; -+ -+err_package_label: -+ kfree(dst->panel_label); -+err_panel_label: -+ kfree(dst->board_label); -+err_board_label: -+ kfree(dst->freq_supported); -+ return -ENOMEM; -+} -+ - static struct dpll_pin * - dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - const struct dpll_pin_properties *prop) -@@ -443,7 +490,9 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - ret = -EINVAL; - goto err_pin_prop; - } -- pin->prop = prop; -+ ret = dpll_pin_prop_dup(prop, &pin->prop); -+ if (ret) -+ goto err_pin_prop; - refcount_set(&pin->refcount, 1); - xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); - xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); -@@ -455,6 +504,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, - err_xa_alloc: - xa_destroy(&pin->dpll_refs); - xa_destroy(&pin->parent_refs); -+ dpll_pin_prop_free(&pin->prop); - err_pin_prop: - kfree(pin); - return ERR_PTR(ret); -@@ -515,6 +565,7 @@ void dpll_pin_put(struct dpll_pin *pin) - xa_destroy(&pin->dpll_refs); - xa_destroy(&pin->parent_refs); - xa_erase(&dpll_pin_xa, pin->id); -+ dpll_pin_prop_free(&pin->prop); - kfree(pin); - } - mutex_unlock(&dpll_lock); -@@ -637,7 +688,7 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - unsigned long i, stop; - int ret; - -- if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX)) -+ if (WARN_ON(parent->prop.type != DPLL_PIN_TYPE_MUX)) - return -EINVAL; - - if (WARN_ON(!ops) || -diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h -index 5585873c5c1b..717f715015c7 100644 ---- a/drivers/dpll/dpll_core.h -+++ b/drivers/dpll/dpll_core.h -@@ -44,7 +44,7 @@ struct dpll_device { - * @module: module of creator - * @dpll_refs: hold referencees to dplls pin was registered with - * @parent_refs: hold references to parent pins pin was registered with -- * @prop: pointer to pin properties given by registerer -+ * @prop: pin properties copied from the registerer - * @rclk_dev_name: holds name of device when pin can recover clock from it - * @refcount: refcount - **/ -@@ -55,7 +55,7 @@ struct dpll_pin { - struct module *module; - struct xarray dpll_refs; - struct xarray parent_refs; -- const struct dpll_pin_properties *prop; -+ struct dpll_pin_properties prop; - refcount_t refcount; - }; - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index ce7cf736f020..4c64611d32ac 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -278,17 +278,17 @@ dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, - if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY, sizeof(freq), &freq, - DPLL_A_PIN_PAD)) - return -EMSGSIZE; -- for (fs = 0; fs < pin->prop->freq_supported_num; fs++) { -+ for (fs = 0; fs < pin->prop.freq_supported_num; fs++) { - nest = nla_nest_start(msg, DPLL_A_PIN_FREQUENCY_SUPPORTED); - if (!nest) - return -EMSGSIZE; -- freq = pin->prop->freq_supported[fs].min; -+ freq = pin->prop.freq_supported[fs].min; - if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, sizeof(freq), - &freq, DPLL_A_PIN_PAD)) { - nla_nest_cancel(msg, nest); - return -EMSGSIZE; - } -- freq = pin->prop->freq_supported[fs].max; -+ freq = pin->prop.freq_supported[fs].max; - if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, sizeof(freq), - &freq, DPLL_A_PIN_PAD)) { - nla_nest_cancel(msg, nest); -@@ -304,9 +304,9 @@ static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) - { - int fs; - -- for (fs = 0; fs < pin->prop->freq_supported_num; fs++) -- if (freq >= pin->prop->freq_supported[fs].min && -- freq <= pin->prop->freq_supported[fs].max) -+ for (fs = 0; fs < pin->prop.freq_supported_num; fs++) -+ if (freq >= pin->prop.freq_supported[fs].min && -+ freq <= pin->prop.freq_supported[fs].max) - return true; - return false; - } -@@ -396,7 +396,7 @@ static int - dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, - struct netlink_ext_ack *extack) - { -- const struct dpll_pin_properties *prop = pin->prop; -+ const struct dpll_pin_properties *prop = &pin->prop; - struct dpll_pin_ref *ref; - int ret; - -@@ -689,7 +689,7 @@ dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "state changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -725,7 +725,7 @@ dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "state changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -752,7 +752,7 @@ dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "prio changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -780,7 +780,7 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, - int ret; - - if (!(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE & -- pin->prop->capabilities)) { -+ pin->prop.capabilities)) { - NL_SET_ERR_MSG(extack, "direction changing is not allowed"); - return -EOPNOTSUPP; - } -@@ -810,8 +810,8 @@ dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, - int ret; - - phase_adj = nla_get_s32(phase_adj_attr); -- if (phase_adj > pin->prop->phase_range.max || -- phase_adj < pin->prop->phase_range.min) { -+ if (phase_adj > pin->prop.phase_range.max || -+ phase_adj < pin->prop.phase_range.min) { - NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr, - "phase adjust value not supported"); - return -EINVAL; -@@ -995,7 +995,7 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, - unsigned long i; - - xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) { -- prop = pin->prop; -+ prop = &pin->prop; - cid_match = clock_id ? pin->clock_id == clock_id : true; - mod_match = mod_name_attr && module_name(pin->module) ? - !nla_strcmp(mod_name_attr, --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch b/kernel-std/debian/patches/ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch deleted file mode 100644 index 3b3a1f93..00000000 --- a/kernel-std/debian/patches/ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch +++ /dev/null @@ -1,95 +0,0 @@ -From f4e9960be23f4982fc11fff1e5c78539254f0819 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:03 +0100 -Subject: [PATCH 37/46] dpll: fix userspace availability of pins - -If parent pin was unregistered but child pin was not, the userspace -would see the "zombie" pins - the ones that were registered with -a parent pin (dpll_pin_on_pin_register(..)). -Technically those are not available - as there is no dpll device in the -system. Do not dump those pins and prevent userspace from any -interaction with them. Provide a unified function to determine if the -pin is available and use it before acting/responding for user requests. - -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Reviewed-by: Jan Glaza -Reviewed-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit db2ec3c94667eaeecc6a74d96594fab6baf80fdc) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_netlink.c | 29 +++++++++++++++++++++++++++-- - 1 file changed, 27 insertions(+), 2 deletions(-) - -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 4c64611d32ac..7cc99d627942 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -525,6 +525,24 @@ __dpll_device_change_ntf(struct dpll_device *dpll) - return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll); - } - -+static bool dpll_pin_available(struct dpll_pin *pin) -+{ -+ struct dpll_pin_ref *par_ref; -+ unsigned long i; -+ -+ if (!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED)) -+ return false; -+ xa_for_each(&pin->parent_refs, i, par_ref) -+ if (xa_get_mark(&dpll_pin_xa, par_ref->pin->id, -+ DPLL_REGISTERED)) -+ return true; -+ xa_for_each(&pin->dpll_refs, i, par_ref) -+ if (xa_get_mark(&dpll_device_xa, par_ref->dpll->id, -+ DPLL_REGISTERED)) -+ return true; -+ return false; -+} -+ - /** - * dpll_device_change_ntf - notify that the dpll device has been changed - * @dpll: registered dpll pointer -@@ -551,7 +569,7 @@ dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) - int ret = -ENOMEM; - void *hdr; - -- if (WARN_ON(!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))) -+ if (!dpll_pin_available(pin)) - return -ENODEV; - - msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -@@ -1102,6 +1120,10 @@ int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) - } - pin = dpll_pin_find_from_nlattr(info); - if (!IS_ERR(pin)) { -+ if (!dpll_pin_available(pin)) { -+ nlmsg_free(msg); -+ return -ENODEV; -+ } - ret = dpll_msg_add_pin_handle(msg, pin); - if (ret) { - nlmsg_free(msg); -@@ -1151,6 +1173,8 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - - xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, - ctx->idx) { -+ if (!dpll_pin_available(pin)) -+ continue; - hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, - cb->nlh->nlmsg_seq, - &dpll_nl_family, NLM_F_MULTI, -@@ -1413,7 +1437,8 @@ int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - } - info->user_ptr[0] = xa_load(&dpll_pin_xa, - nla_get_u32(info->attrs[DPLL_A_PIN_ID])); -- if (!info->user_ptr[0]) { -+ if (!info->user_ptr[0] || -+ !dpll_pin_available(info->user_ptr[0])) { - NL_SET_ERR_MSG(info->extack, "pin not found"); - ret = -ENODEV; - goto unlock_dev; --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch b/kernel-std/debian/patches/ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch deleted file mode 100644 index 51abb96e..00000000 --- a/kernel-std/debian/patches/ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 9066d8d88ced7a53f57c8511bac4e40df4ff288b Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 19 Jan 2024 14:43:04 +0100 -Subject: [PATCH 38/46] dpll: fix register pin with unregistered parent pin - -In case of multiple kernel module instances using the same dpll device: -if only one registers dpll device, then only that one can register -directly connected pins with a dpll device. When unregistered parent is -responsible for determining if the muxed pin can be registered with it -or not, the drivers need to be loaded in serialized order to work -correctly - first the driver instance which registers the direct pins -needs to be loaded, then the other instances could register muxed type -pins. - -Allow registration of a pin with a parent even if the parent was not -yet registered, thus allow ability for unserialized driver instance -load order. -Do not WARN_ON notification for unregistered pin, which can be invoked -for described case, instead just return error. - -Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Reviewed-by: Jan Glaza -Reviewed-by: Jiri Pirko -Signed-off-by: Arkadiusz Kubalewski -Signed-off-by: David S. Miller -(cherry picked from commit 7dc5b18ff71bd6f948810ab8a08b6a6ff8b315c5) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 6 ------ - 1 file changed, 6 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index cb62696467d1..5152bd1b0daf 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -29,8 +29,6 @@ static u32 dpll_pin_xa_id; - WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) - #define ASSERT_DPLL_NOT_REGISTERED(d) \ - WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) --#define ASSERT_PIN_REGISTERED(p) \ -- WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED)) - - struct dpll_device_registration { - struct list_head list; -@@ -616,8 +614,6 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, - WARN_ON(!ops->state_on_dpll_get) || - WARN_ON(!ops->direction_get)) - return -EINVAL; -- if (ASSERT_DPLL_REGISTERED(dpll)) -- return -EINVAL; - - mutex_lock(&dpll_lock); - if (WARN_ON(!(dpll->module == pin->module && -@@ -695,8 +691,6 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, - WARN_ON(!ops->state_on_pin_get) || - WARN_ON(!ops->direction_get)) - return -EINVAL; -- if (ASSERT_PIN_REGISTERED(parent)) -- return -EINVAL; - - mutex_lock(&dpll_lock); - ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch b/kernel-std/debian/patches/ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch deleted file mode 100644 index 7b0c9c09..00000000 --- a/kernel-std/debian/patches/ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch +++ /dev/null @@ -1,144 +0,0 @@ -From 0b98cc67efc4404adc805e1a4a7166a8401ddbd1 Mon Sep 17 00:00:00 2001 -From: Yochai Hagvi -Date: Thu, 25 Jan 2024 15:40:55 +0200 -Subject: [PATCH 39/46] ice: fix connection state of DPLL and out pin - -Fix the connection state between source DPLL and output pin, updating the -attribute 'state' of 'parent_device'. Previously, the connection state -was broken, and didn't reflect the correct state. - -When 'state_on_dpll_set' is called with the value -'DPLL_PIN_STATE_CONNECTED' (1), the output pin will switch to the given -DPLL, and the state of the given DPLL will be set to connected. -E.g.: - --do pin-set --json '{"id":2, "parent-device":{"parent-id":1, - "state": 1 }}' -This command will connect DPLL device with id 1 to output pin with id 2. - -When 'state_on_dpll_set' is called with the value -'DPLL_PIN_STATE_DISCONNECTED' (2) and the given DPLL is currently -connected, then the output pin will be disabled. -E.g: - --do pin-set --json '{"id":2, "parent-device":{"parent-id":1, - "state": 2 }}' -This command will disable output pin with id 2 if DPLL device with ID 1 is -connected to it; otherwise, the command is ignored. - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Wojciech Drewek -Reviewed-by: Arkadiusz Kubalewski -Signed-off-by: Yochai Hagvi -Tested-by: Sunitha Mekala (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit e8335ef57c6816d81b24173ba88cc9b3f043687f) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 43 +++++++++++++++++------ - 1 file changed, 32 insertions(+), 11 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 86b180cb32a0..0f836adc0e58 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -254,6 +254,7 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, - * ice_dpll_pin_enable - enable a pin on dplls - * @hw: board private hw structure - * @pin: pointer to a pin -+ * @dpll_idx: dpll index to connect to output pin - * @pin_type: type of pin being enabled - * @extack: error reporting - * -@@ -266,7 +267,7 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, - */ - static int - ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, -- enum ice_dpll_pin_type pin_type, -+ u8 dpll_idx, enum ice_dpll_pin_type pin_type, - struct netlink_ext_ack *extack) - { - u8 flags = 0; -@@ -280,10 +281,12 @@ ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, - ret = ice_aq_set_input_pin_cfg(hw, pin->idx, 0, flags, 0, 0); - break; - case ICE_DPLL_PIN_TYPE_OUTPUT: -+ flags = ICE_AQC_SET_CGU_OUT_CFG_UPDATE_SRC_SEL; - if (pin->flags[0] & ICE_AQC_GET_CGU_OUT_CFG_ESYNC_EN) - flags |= ICE_AQC_SET_CGU_OUT_CFG_ESYNC_EN; - flags |= ICE_AQC_SET_CGU_OUT_CFG_OUT_EN; -- ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, 0, 0, 0); -+ ret = ice_aq_set_output_pin_cfg(hw, pin->idx, flags, dpll_idx, -+ 0, 0); - break; - default: - return -EINVAL; -@@ -398,14 +401,27 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, - break; - case ICE_DPLL_PIN_TYPE_OUTPUT: - ret = ice_aq_get_output_pin_cfg(&pf->hw, pin->idx, -- &pin->flags[0], NULL, -+ &pin->flags[0], &parent, - &pin->freq, NULL); - if (ret) - goto err; -- if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) -- pin->state[0] = DPLL_PIN_STATE_CONNECTED; -- else -- pin->state[0] = DPLL_PIN_STATE_DISCONNECTED; -+ -+ parent &= ICE_AQC_GET_CGU_OUT_CFG_DPLL_SRC_SEL; -+ if (ICE_AQC_SET_CGU_OUT_CFG_OUT_EN & pin->flags[0]) { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ parent == pf->dplls.eec.dpll_idx ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_DISCONNECTED; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ parent == pf->dplls.pps.dpll_idx ? -+ DPLL_PIN_STATE_CONNECTED : -+ DPLL_PIN_STATE_DISCONNECTED; -+ } else { -+ pin->state[pf->dplls.eec.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ pin->state[pf->dplls.pps.dpll_idx] = -+ DPLL_PIN_STATE_DISCONNECTED; -+ } - break; - case ICE_DPLL_PIN_TYPE_RCLK_INPUT: - for (parent = 0; parent < pf->dplls.rclk.num_parents; -@@ -595,7 +611,8 @@ ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, - - mutex_lock(&pf->dplls.lock); - if (enable) -- ret = ice_dpll_pin_enable(&pf->hw, p, pin_type, extack); -+ ret = ice_dpll_pin_enable(&pf->hw, p, d->dpll_idx, pin_type, -+ extack); - else - ret = ice_dpll_pin_disable(&pf->hw, p, pin_type, extack); - if (!ret) -@@ -628,6 +645,11 @@ ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv, - struct netlink_ext_ack *extack) - { - bool enable = state == DPLL_PIN_STATE_CONNECTED; -+ struct ice_dpll_pin *p = pin_priv; -+ struct ice_dpll *d = dpll_priv; -+ -+ if (!enable && p->state[d->dpll_idx] == DPLL_PIN_STATE_DISCONNECTED) -+ return 0; - - return ice_dpll_pin_state_set(pin, pin_priv, dpll, dpll_priv, enable, - extack, ICE_DPLL_PIN_TYPE_OUTPUT); -@@ -694,10 +716,9 @@ ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, - ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); - if (ret) - goto unlock; -- if (pin_type == ICE_DPLL_PIN_TYPE_INPUT) -+ if (pin_type == ICE_DPLL_PIN_TYPE_INPUT || -+ pin_type == ICE_DPLL_PIN_TYPE_OUTPUT) - *state = p->state[d->dpll_idx]; -- else if (pin_type == ICE_DPLL_PIN_TYPE_OUTPUT) -- *state = p->state[0]; - ret = 0; - unlock: - mutex_unlock(&pf->dplls.lock); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch b/kernel-std/debian/patches/ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch deleted file mode 100644 index ebfdb97e..00000000 --- a/kernel-std/debian/patches/ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch +++ /dev/null @@ -1,217 +0,0 @@ -From e01f5b5e574aca4688e649ae69d7a00b37f95b87 Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 7 Feb 2024 12:59:02 +0100 -Subject: [PATCH 40/46] dpll: fix possible deadlock during netlink dump - operation - -Recently, I've been hitting following deadlock warning during dpll pin -dump: - -[52804.637962] ====================================================== -[52804.638536] WARNING: possible circular locking dependency detected -[52804.639111] 6.8.0-rc2jiri+ #1 Not tainted -[52804.639529] ------------------------------------------------------ -[52804.640104] python3/2984 is trying to acquire lock: -[52804.640581] ffff88810e642678 (nlk_cb_mutex-GENERIC){+.+.}-{3:3}, at: netlink_dump+0xb3/0x780 -[52804.641417] - but task is already holding lock: -[52804.642010] ffffffff83bde4c8 (dpll_lock){+.+.}-{3:3}, at: dpll_lock_dumpit+0x13/0x20 -[52804.642747] - which lock already depends on the new lock. - -[52804.643551] - the existing dependency chain (in reverse order) is: -[52804.644259] - -> #1 (dpll_lock){+.+.}-{3:3}: -[52804.644836] lock_acquire+0x174/0x3e0 -[52804.645271] __mutex_lock+0x119/0x1150 -[52804.645723] dpll_lock_dumpit+0x13/0x20 -[52804.646169] genl_start+0x266/0x320 -[52804.646578] __netlink_dump_start+0x321/0x450 -[52804.647056] genl_family_rcv_msg_dumpit+0x155/0x1e0 -[52804.647575] genl_rcv_msg+0x1ed/0x3b0 -[52804.648001] netlink_rcv_skb+0xdc/0x210 -[52804.648440] genl_rcv+0x24/0x40 -[52804.648831] netlink_unicast+0x2f1/0x490 -[52804.649290] netlink_sendmsg+0x36d/0x660 -[52804.649742] __sock_sendmsg+0x73/0xc0 -[52804.650165] __sys_sendto+0x184/0x210 -[52804.650597] __x64_sys_sendto+0x72/0x80 -[52804.651045] do_syscall_64+0x6f/0x140 -[52804.651474] entry_SYSCALL_64_after_hwframe+0x46/0x4e -[52804.652001] - -> #0 (nlk_cb_mutex-GENERIC){+.+.}-{3:3}: -[52804.652650] check_prev_add+0x1ae/0x1280 -[52804.653107] __lock_acquire+0x1ed3/0x29a0 -[52804.653559] lock_acquire+0x174/0x3e0 -[52804.653984] __mutex_lock+0x119/0x1150 -[52804.654423] netlink_dump+0xb3/0x780 -[52804.654845] __netlink_dump_start+0x389/0x450 -[52804.655321] genl_family_rcv_msg_dumpit+0x155/0x1e0 -[52804.655842] genl_rcv_msg+0x1ed/0x3b0 -[52804.656272] netlink_rcv_skb+0xdc/0x210 -[52804.656721] genl_rcv+0x24/0x40 -[52804.657119] netlink_unicast+0x2f1/0x490 -[52804.657570] netlink_sendmsg+0x36d/0x660 -[52804.658022] __sock_sendmsg+0x73/0xc0 -[52804.658450] __sys_sendto+0x184/0x210 -[52804.658877] __x64_sys_sendto+0x72/0x80 -[52804.659322] do_syscall_64+0x6f/0x140 -[52804.659752] entry_SYSCALL_64_after_hwframe+0x46/0x4e -[52804.660281] - other info that might help us debug this: - -[52804.661077] Possible unsafe locking scenario: - -[52804.661671] CPU0 CPU1 -[52804.662129] ---- ---- -[52804.662577] lock(dpll_lock); -[52804.662924] lock(nlk_cb_mutex-GENERIC); -[52804.663538] lock(dpll_lock); -[52804.664073] lock(nlk_cb_mutex-GENERIC); -[52804.664490] - -The issue as follows: __netlink_dump_start() calls control->start(cb) -with nlk->cb_mutex held. In control->start(cb) the dpll_lock is taken. -Then nlk->cb_mutex is released and taken again in netlink_dump(), while -dpll_lock still being held. That leads to ABBA deadlock when another -CPU races with the same operation. - -Fix this by moving dpll_lock taking into dumpit() callback which ensures -correct lock taking order. - -Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") -Signed-off-by: Jiri Pirko -Reviewed-by: Arkadiusz Kubalewski -Link: https://lore.kernel.org/r/20240207115902.371649-1-jiri@resnulli.us -Signed-off-by: Jakub Kicinski -(cherry picked from commit 53c0441dd2c44ee93fddb5473885fd41e4bc2361) -Signed-off-by: Jiping Ma ---- - Documentation/netlink/specs/dpll.yaml | 4 ---- - drivers/dpll/dpll_netlink.c | 20 ++++++-------------- - drivers/dpll/dpll_nl.c | 4 ---- - drivers/dpll/dpll_nl.h | 2 -- - 4 files changed, 6 insertions(+), 24 deletions(-) - -diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml -index cf8abe1c0550..2b4c4bcd8361 100644 ---- a/Documentation/netlink/specs/dpll.yaml -+++ b/Documentation/netlink/specs/dpll.yaml -@@ -374,8 +374,6 @@ operations: - - type - - dump: -- pre: dpll-lock-dumpit -- post: dpll-unlock-dumpit - reply: *dev-attrs - - - -@@ -462,8 +460,6 @@ operations: - - phase-adjust - - dump: -- pre: dpll-lock-dumpit -- post: dpll-unlock-dumpit - request: - attributes: - - id -diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c -index 7cc99d627942..c8c2e836193a 100644 ---- a/drivers/dpll/dpll_netlink.c -+++ b/drivers/dpll/dpll_netlink.c -@@ -1171,6 +1171,7 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - unsigned long i; - int ret = 0; - -+ mutex_lock(&dpll_lock); - xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, - ctx->idx) { - if (!dpll_pin_available(pin)) -@@ -1190,6 +1191,8 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - } - genlmsg_end(skb, hdr); - } -+ mutex_unlock(&dpll_lock); -+ - if (ret == -EMSGSIZE) { - ctx->idx = i; - return skb->len; -@@ -1345,6 +1348,7 @@ int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - unsigned long i; - int ret = 0; - -+ mutex_lock(&dpll_lock); - xa_for_each_marked_start(&dpll_device_xa, i, dpll, DPLL_REGISTERED, - ctx->idx) { - hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, -@@ -1361,6 +1365,8 @@ int dpll_nl_device_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) - } - genlmsg_end(skb, hdr); - } -+ mutex_unlock(&dpll_lock); -+ - if (ret == -EMSGSIZE) { - ctx->idx = i; - return skb->len; -@@ -1411,20 +1417,6 @@ dpll_unlock_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - mutex_unlock(&dpll_lock); - } - --int dpll_lock_dumpit(struct netlink_callback *cb) --{ -- mutex_lock(&dpll_lock); -- -- return 0; --} -- --int dpll_unlock_dumpit(struct netlink_callback *cb) --{ -- mutex_unlock(&dpll_lock); -- -- return 0; --} -- - int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - struct genl_info *info) - { -diff --git a/drivers/dpll/dpll_nl.c b/drivers/dpll/dpll_nl.c -index eaee5be7aa64..1e95f5397cfc 100644 ---- a/drivers/dpll/dpll_nl.c -+++ b/drivers/dpll/dpll_nl.c -@@ -95,9 +95,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { - }, - { - .cmd = DPLL_CMD_DEVICE_GET, -- .start = dpll_lock_dumpit, - .dumpit = dpll_nl_device_get_dumpit, -- .done = dpll_unlock_dumpit, - .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, - }, - { -@@ -129,9 +127,7 @@ static const struct genl_split_ops dpll_nl_ops[] = { - }, - { - .cmd = DPLL_CMD_PIN_GET, -- .start = dpll_lock_dumpit, - .dumpit = dpll_nl_pin_get_dumpit, -- .done = dpll_unlock_dumpit, - .policy = dpll_pin_get_dump_nl_policy, - .maxattr = DPLL_A_PIN_ID, - .flags = GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP, -diff --git a/drivers/dpll/dpll_nl.h b/drivers/dpll/dpll_nl.h -index 92d4c9c4f788..f491262bee4f 100644 ---- a/drivers/dpll/dpll_nl.h -+++ b/drivers/dpll/dpll_nl.h -@@ -30,8 +30,6 @@ dpll_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - void - dpll_pin_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb, - struct genl_info *info); --int dpll_lock_dumpit(struct netlink_callback *cb); --int dpll_unlock_dumpit(struct netlink_callback *cb); - - int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info); - int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch b/kernel-std/debian/patches/ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch deleted file mode 100644 index 6e63d913..00000000 --- a/kernel-std/debian/patches/ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch +++ /dev/null @@ -1,42 +0,0 @@ -From ee4551cc0066fdd14d58353a8b7d290fe56ea863 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Thu, 8 Feb 2024 23:56:31 +0100 -Subject: [PATCH 41/46] ice: fix dpll input pin phase_adjust value updates - -The value of phase_adjust for input pin shall be updated in -ice_dpll_pin_state_update(..). Fix by adding proper argument to the -firmware query function call - a pin's struct field pointer where the -phase_adjust value during driver runtime is stored. - -Previously the phase_adjust used to misinform user about actual -phase_adjust value. I.e., if phase_adjust was set to a non zero value and -if driver was reloaded, the user would see the value equal 0, which is -not correct - the actual value is equal to value set before driver reload. - -Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") -Reviewed-by: Alan Brady -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 3b14430c65b4f510b2a310ca4f18ed6ca7184b00) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 0f836adc0e58..10a469060d32 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -373,7 +373,7 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, - case ICE_DPLL_PIN_TYPE_INPUT: - ret = ice_aq_get_input_pin_cfg(&pf->hw, pin->idx, NULL, NULL, - NULL, &pin->flags[0], -- &pin->freq, NULL); -+ &pin->freq, &pin->phase_adjust); - if (ret) - goto err; - if (ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN & pin->flags[0]) { --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch b/kernel-std/debian/patches/ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch deleted file mode 100644 index 38a7f490..00000000 --- a/kernel-std/debian/patches/ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch +++ /dev/null @@ -1,137 +0,0 @@ -From 1a24c78b6c536e74432a58be216fec85d9c34dc2 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 9 Feb 2024 22:24:30 +0100 -Subject: [PATCH 42/46] ice: fix dpll and dpll_pin data access on PF reset - -Do not allow to acquire data or alter configuration of dpll and pins -through firmware if PF reset is in progress, this would cause confusing -netlink extack errors as the firmware cannot respond or process the -request properly during the reset time. - -Return (-EBUSY) and extack error for the user who tries access/modify -the config of dpll/pin through firmware during the reset time. - -The PF reset and kernel access to dpll data are both asynchronous. It is -not possible to guard all the possible reset paths with any determinictic -approach. I.e., it is possible that reset starts after reset check is -performed (or if the reset would be checked after mutex is locked), but at -the same time it is not possible to wait for dpll mutex unlock in the -reset flow. -This is best effort solution to at least give a clue to the user -what is happening in most of the cases, knowing that there are possible -race conditions where the user could see a different error received -from firmware due to reset unexpectedly starting. - -Test by looping execution of below steps until netlink error appears: -- perform PF reset -$ echo 1 > /sys/class/net//device/reset -- i.e. try to alter/read dpll/pin config: -$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ - --dump pin-get - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Aleksandr Loktionov -Reviewed-by: Przemek Kitszel -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit fc7fd1a10a9d2d38378b42e9a508da4c68018453) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 38 +++++++++++++++++++++++ - 1 file changed, 38 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 10a469060d32..9c8be237c7e5 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -30,6 +30,26 @@ static const char * const pin_type_name[] = { - [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input", - }; - -+/** -+ * ice_dpll_is_reset - check if reset is in progress -+ * @pf: private board structure -+ * @extack: error reporting -+ * -+ * If reset is in progress, fill extack with error. -+ * -+ * Return: -+ * * false - no reset in progress -+ * * true - reset in progress -+ */ -+static bool ice_dpll_is_reset(struct ice_pf *pf, struct netlink_ext_ack *extack) -+{ -+ if (ice_is_reset_in_progress(pf->state)) { -+ NL_SET_ERR_MSG(extack, "PF reset in progress"); -+ return true; -+ } -+ return false; -+} -+ - /** - * ice_dpll_pin_freq_set - set pin's frequency - * @pf: private board structure -@@ -109,6 +129,9 @@ ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_pin_freq_set(pf, p, pin_type, frequency, extack); - mutex_unlock(&pf->dplls.lock); -@@ -609,6 +632,9 @@ ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - if (enable) - ret = ice_dpll_pin_enable(&pf->hw, p, d->dpll_idx, pin_type, -@@ -712,6 +738,9 @@ ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_pin_state_update(pf, p, pin_type, extack); - if (ret) -@@ -836,6 +865,9 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, - struct ice_pf *pf = d->pf; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack); - mutex_unlock(&pf->dplls.lock); -@@ -1115,6 +1147,9 @@ ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv, - int ret = -EINVAL; - u32 hw_idx; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - hw_idx = parent->idx - pf->dplls.base_rclk_idx; - if (hw_idx >= pf->dplls.num_inputs) -@@ -1169,6 +1204,9 @@ ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv, - int ret = -EINVAL; - u32 hw_idx; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - hw_idx = parent->idx - pf->dplls.base_rclk_idx; - if (hw_idx >= pf->dplls.num_inputs) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch b/kernel-std/debian/patches/ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch deleted file mode 100644 index fac7344e..00000000 --- a/kernel-std/debian/patches/ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch +++ /dev/null @@ -1,52 +0,0 @@ -From d5d13ad1b0bc3df914a17b874d659a0295688ef6 Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 9 Feb 2024 22:24:31 +0100 -Subject: [PATCH 43/46] ice: fix dpll periodic work data updates on PF reset - -Do not allow dpll periodic work function to acquire data from firmware -if PF reset is in progress. Acquiring data will cause dmesg errors as the -firmware cannot respond or process the request properly during the reset -time. - -Test by looping execution of below step until dmesg error appears: -- perform PF reset -$ echo 1 > /sys/class/net//device/reset - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Reviewed-by: Igor Bagnucki -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 9a8385fe14bcb250a3889e744dc54e9c411d8400) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 9c8be237c7e5..bcb9b9c13aab 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -1390,8 +1390,10 @@ static void ice_dpll_periodic_work(struct kthread_work *work) - struct ice_pf *pf = container_of(d, struct ice_pf, dplls); - struct ice_dpll *de = &pf->dplls.eec; - struct ice_dpll *dp = &pf->dplls.pps; -- int ret; -+ int ret = 0; - -+ if (ice_is_reset_in_progress(pf->state)) -+ goto resched; - mutex_lock(&pf->dplls.lock); - ret = ice_dpll_update_state(pf, de, false); - if (!ret) -@@ -1411,6 +1413,7 @@ static void ice_dpll_periodic_work(struct kthread_work *work) - ice_dpll_notify_changes(de); - ice_dpll_notify_changes(dp); - -+resched: - /* Run twice a second or reschedule if update failed */ - kthread_queue_delayed_work(d->kworker, &d->work, - ret ? msecs_to_jiffies(10) : --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch b/kernel-std/debian/patches/ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch deleted file mode 100644 index 1ca397d5..00000000 --- a/kernel-std/debian/patches/ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 68e3016c20d27468ffecfc77674f8722f28e09dd Mon Sep 17 00:00:00 2001 -From: Arkadiusz Kubalewski -Date: Fri, 9 Feb 2024 22:24:32 +0100 -Subject: [PATCH 44/46] ice: fix pin phase adjust updates on PF reset - -Do not allow to set phase adjust value for a pin if PF reset is in -progress, this would cause confusing netlink extack errors as the firmware -cannot process the request properly during the reset time. - -Return (-EBUSY) and report extack error for the user who tries configure -pin phase adjust during the reset time. - -Test by looping execution of below steps until netlink error appears: -- perform PF reset -$ echo 1 > /sys/class/net//device/reset -- change pin phase adjust value: -$ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ - --do pin-set --json '{"id":0, "phase-adjust":1000}' - -Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks") -Reviewed-by: Igor Bagnucki -Signed-off-by: Arkadiusz Kubalewski -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit ee89921da471edcb4b1e67f5bbfedddf39749782) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index bcb9b9c13aab..2b657d43c769 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -988,6 +988,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, - u8 flag, flags_en = 0; - int ret; - -+ if (ice_dpll_is_reset(pf, extack)) -+ return -EBUSY; -+ - mutex_lock(&pf->dplls.lock); - switch (type) { - case ICE_DPLL_PIN_TYPE_INPUT: --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch b/kernel-std/debian/patches/ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch deleted file mode 100644 index e85230a2..00000000 --- a/kernel-std/debian/patches/ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 2f27891def7f2f5cdba668d9eefa6a9652475f23 Mon Sep 17 00:00:00 2001 -From: Michal Schmidt -Date: Fri, 1 Mar 2024 14:37:08 +0100 -Subject: [PATCH 45/46] ice: fix uninitialized dplls mutex usage - -The pf->dplls.lock mutex is initialized too late, after its first use. -Move it to the top of ice_dpll_init. -Note that the "err_exit" error path destroys the mutex. And the mutex is -the last thing destroyed in ice_dpll_deinit. -This fixes the following warning with CONFIG_DEBUG_MUTEXES: - - ice 0000:10:00.0: The DDP package was successfully loaded: ICE OS Default Package version 1.3.36.0 - ice 0000:10:00.0: 252.048 Gb/s available PCIe bandwidth (16.0 GT/s PCIe x16 link) - ice 0000:10:00.0: PTP init successful - ------------[ cut here ]------------ - DEBUG_LOCKS_WARN_ON(lock->magic != lock) - WARNING: CPU: 0 PID: 410 at kernel/locking/mutex.c:587 __mutex_lock+0x773/0xd40 - Modules linked in: crct10dif_pclmul crc32_pclmul crc32c_intel polyval_clmulni polyval_generic ice(+) nvme nvme_c> - CPU: 0 PID: 410 Comm: kworker/0:4 Not tainted 6.8.0-rc5+ #3 - Hardware name: HPE ProLiant DL110 Gen10 Plus/ProLiant DL110 Gen10 Plus, BIOS U56 10/19/2023 - Workqueue: events work_for_cpu_fn - RIP: 0010:__mutex_lock+0x773/0xd40 - Code: c0 0f 84 1d f9 ff ff 44 8b 35 0d 9c 69 01 45 85 f6 0f 85 0d f9 ff ff 48 c7 c6 12 a2 a9 85 48 c7 c7 12 f1 a> - RSP: 0018:ff7eb1a3417a7ae0 EFLAGS: 00010286 - RAX: 0000000000000000 RBX: 0000000000000002 RCX: 0000000000000000 - RDX: 0000000000000002 RSI: ffffffff85ac2bff RDI: 00000000ffffffff - RBP: ff7eb1a3417a7b80 R08: 0000000000000000 R09: 00000000ffffbfff - R10: ff7eb1a3417a7978 R11: ff32b80f7fd2e568 R12: 0000000000000000 - R13: 0000000000000000 R14: 0000000000000000 R15: ff32b7f02c50e0d8 - FS: 0000000000000000(0000) GS:ff32b80efe800000(0000) knlGS:0000000000000000 - CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 - CR2: 000055b5852cc000 CR3: 000000003c43a004 CR4: 0000000000771ef0 - DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 - DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 - PKRU: 55555554 - Call Trace: - - ? __warn+0x84/0x170 - ? __mutex_lock+0x773/0xd40 - ? report_bug+0x1c7/0x1d0 - ? prb_read_valid+0x1b/0x30 - ? handle_bug+0x42/0x70 - ? exc_invalid_op+0x18/0x70 - ? asm_exc_invalid_op+0x1a/0x20 - ? __mutex_lock+0x773/0xd40 - ? rcu_is_watching+0x11/0x50 - ? __kmalloc_node_track_caller+0x346/0x490 - ? ice_dpll_lock_status_get+0x28/0x50 [ice] - ? __pfx_ice_dpll_lock_status_get+0x10/0x10 [ice] - ? ice_dpll_lock_status_get+0x28/0x50 [ice] - ice_dpll_lock_status_get+0x28/0x50 [ice] - dpll_device_get_one+0x14f/0x2e0 - dpll_device_event_send+0x7d/0x150 - dpll_device_register+0x124/0x180 - ice_dpll_init_dpll+0x7b/0xd0 [ice] - ice_dpll_init+0x224/0xa40 [ice] - ? _dev_info+0x70/0x90 - ice_load+0x468/0x690 [ice] - ice_probe+0x75b/0xa10 [ice] - ? _raw_spin_unlock_irqrestore+0x4f/0x80 - ? process_one_work+0x1a3/0x500 - local_pci_probe+0x47/0xa0 - work_for_cpu_fn+0x17/0x30 - process_one_work+0x20d/0x500 - worker_thread+0x1df/0x3e0 - ? __pfx_worker_thread+0x10/0x10 - kthread+0x103/0x140 - ? __pfx_kthread+0x10/0x10 - ret_from_fork+0x31/0x50 - ? __pfx_kthread+0x10/0x10 - ret_from_fork_asm+0x1b/0x30 - - irq event stamp: 125197 - hardirqs last enabled at (125197): [] finish_task_switch.isra.0+0x12d/0x3d0 - hardirqs last disabled at (125196): [] __schedule+0xea4/0x19f0 - softirqs last enabled at (105334): [] napi_get_frags_check+0x1a/0x60 - softirqs last disabled at (105332): [] napi_get_frags_check+0x1a/0x60 - ---[ end trace 0000000000000000 ]--- - -Fixes: d7999f5ea64b ("ice: implement dpll interface to control cgu") -Signed-off-by: Michal Schmidt -Reviewed-by: Maciej Fijalkowski -Signed-off-by: Tony Nguyen -(cherry picked from commit 9224fc86f1776193650a33a275cac628952f80a9) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_dpll.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c -index 2b657d43c769..68b894bb68fe 100644 ---- a/drivers/net/ethernet/intel/ice/ice_dpll.c -+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c -@@ -2146,6 +2146,7 @@ void ice_dpll_init(struct ice_pf *pf) - struct ice_dplls *d = &pf->dplls; - int err = 0; - -+ mutex_init(&d->lock); - err = ice_dpll_init_info(pf, cgu); - if (err) - goto err_exit; -@@ -2158,7 +2159,6 @@ void ice_dpll_init(struct ice_pf *pf) - err = ice_dpll_init_pins(pf, cgu); - if (err) - goto deinit_pps; -- mutex_init(&d->lock); - if (cgu) { - err = ice_dpll_init_worker(pf); - if (err) --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch b/kernel-std/debian/patches/ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch deleted file mode 100644 index 20051b96..00000000 --- a/kernel-std/debian/patches/ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch +++ /dev/null @@ -1,61 +0,0 @@ -From d07be637791f946437f99e73b1de32f0d2edb2d3 Mon Sep 17 00:00:00 2001 -From: Jiri Pirko -Date: Wed, 6 Mar 2024 16:12:40 +0100 -Subject: [PATCH 46/46] dpll: fix dpll_xa_ref_*_del() for multiple - registrations - -Currently, if there are multiple registrations of the same pin on the -same dpll device, following warnings are observed: -WARNING: CPU: 5 PID: 2212 at drivers/dpll/dpll_core.c:143 dpll_xa_ref_pin_del.isra.0+0x21e/0x230 -WARNING: CPU: 5 PID: 2212 at drivers/dpll/dpll_core.c:223 __dpll_pin_unregister+0x2b3/0x2c0 - -The problem is, that in both dpll_xa_ref_dpll_del() and -dpll_xa_ref_pin_del() registration is only removed from list in case the -reference count drops to zero. That is wrong, the registration has to -be removed always. - -To fix this, remove the registration from the list and free -it unconditionally, instead of doing it only when the ref reference -counter reaches zero. - -Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") -Signed-off-by: Jiri Pirko -Reviewed-by: Rahul Rameshbabu -Signed-off-by: David S. Miller -(cherry picked from commit b446631f355ece73b13c311dd712c47381a23172) -Signed-off-by: Jiping Ma ---- - drivers/dpll/dpll_core.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c -index 5152bd1b0daf..04c4640db115 100644 ---- a/drivers/dpll/dpll_core.c -+++ b/drivers/dpll/dpll_core.c -@@ -129,9 +129,9 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin, - reg = dpll_pin_registration_find(ref, ops, priv); - if (WARN_ON(!reg)) - return -EINVAL; -+ list_del(®->list); -+ kfree(reg); - if (refcount_dec_and_test(&ref->refcount)) { -- list_del(®->list); -- kfree(reg); - xa_erase(xa_pins, i); - WARN_ON(!list_empty(&ref->registration_list)); - kfree(ref); -@@ -209,9 +209,9 @@ dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll, - reg = dpll_pin_registration_find(ref, ops, priv); - if (WARN_ON(!reg)) - return; -+ list_del(®->list); -+ kfree(reg); - if (refcount_dec_and_test(&ref->refcount)) { -- list_del(®->list); -- kfree(reg); - xa_erase(xa_dplls, i); - WARN_ON(!list_empty(&ref->registration_list)); - kfree(ref); --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch b/kernel-std/debian/patches/ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch deleted file mode 100644 index 92438458..00000000 --- a/kernel-std/debian/patches/ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 08d5dda0bdd0582db906670d6960d2438ddf234a Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Wed, 7 Aug 2024 07:59:00 +0000 -Subject: [PATCH] ice: modify the ice driver min version to "stx.2" - -Change the ice driver min version to stx.2 because we back ported -some dpll related commits from kernel-6.7, kernel-6.8 and kernel-6.9. - -The ice driver version should be ice-6.6.40-stx.2. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index e87916981b5d..6fb76ccb9dd3 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.1" -+ICE_STX = "-stx.2" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch b/kernel-std/debian/patches/ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch deleted file mode 100644 index d0440e3e..00000000 --- a/kernel-std/debian/patches/ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch +++ /dev/null @@ -1,214 +0,0 @@ -From 9176c0a850a8f57213c298d6030f4ac1a511570a Mon Sep 17 00:00:00 2001 -From: Marcin Szycik -Date: Thu, 4 Apr 2024 16:04:51 +0200 -Subject: [PATCH 1/2] ice: Add automatic VF reset on Tx MDD events - -In cases when VF sends malformed packets that are classified as malicious, -it can cause Tx queue to freeze as a result of Malicious Driver Detection -event. Such malformed packets can appear as a result of a faulty userspace -app running on VF. This frozen queue can be stuck for several minutes being -unusable. - -User might prefer to immediately bring the VF back to operational state -after such event, which can be done by automatically resetting the VF which -caused MDD. This is already implemented for Rx events (mdd-auto-reset-vf -flag private flag needs to be set). - -Extend the VF auto reset to also cover Tx MDD events. When any MDD event -occurs on VF (Tx or Rx) and the mdd-auto-reset-vf private flag is set, -perform a graceful VF reset to quickly bring it back to operational state. - -Reviewed-by: Wojciech Drewek -Reviewed-by: Przemek Kitszel -Co-developed-by: Liang-Min Wang -Signed-off-by: Liang-Min Wang -Signed-off-by: Marcin Szycik -Reviewed-by: Simon Horman -Tested-by: Rafal Romanowski -Signed-off-by: Tony Nguyen -(cherry picked from commit cc2a9d6c03b804c301447326aff4cf2359867f9c) -[jma: Adjust the patch for the content changes.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_main.c | 57 +++++++++++++++++----- - drivers/net/ethernet/intel/ice/ice_sriov.c | 25 +++++++--- - drivers/net/ethernet/intel/ice/ice_sriov.h | 2 + - 3 files changed, 67 insertions(+), 17 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 6d75284301cc..8a6acb5a722e 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -1718,6 +1718,39 @@ static void ice_service_timer(struct timer_list *t) - ice_service_task_schedule(pf); - } - -+/** -+ * ice_mdd_maybe_reset_vf - reset VF after MDD event -+ * @pf: pointer to the PF structure -+ * @vf: pointer to the VF structure -+ * @reset_vf_tx: whether Tx MDD has occurred -+ * @reset_vf_rx: whether Rx MDD has occurred -+ * -+ * Since the queue can get stuck on VF MDD events, the PF can be configured to -+ * automatically reset the VF by enabling the private ethtool flag -+ * mdd-auto-reset-vf. -+ */ -+static void ice_mdd_maybe_reset_vf(struct ice_pf *pf, struct ice_vf *vf, -+ bool reset_vf_tx, bool reset_vf_rx) -+{ -+ struct device *dev = ice_pf_to_dev(pf); -+ -+ if (!test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)) -+ return; -+ -+ /* VF MDD event counters will be cleared by reset, so print the event -+ * prior to reset. -+ */ -+ if (reset_vf_tx) -+ ice_print_vf_tx_mdd_event(vf); -+ -+ if (reset_vf_rx) -+ ice_print_vf_rx_mdd_event(vf); -+ -+ dev_info(dev, "PF-to-VF reset on PF %d VF %d due to MDD event\n", -+ pf->hw.pf_id, vf->vf_id); -+ ice_reset_vf(vf, ICE_VF_RESET_NOTIFY | ICE_VF_RESET_LOCK); -+} -+ - /** - * ice_handle_mdd_event - handle malicious driver detect event - * @pf: pointer to the PF structure -@@ -1823,6 +1856,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - */ - mutex_lock(&pf->vfs.table_lock); - ice_for_each_vf(pf, bkt, vf) { -+ bool reset_vf_tx = false, reset_vf_rx = false; -+ - reg = rd32(hw, VP_MDET_TX_PQM(vf->vf_id)); - if (reg & VP_MDET_TX_PQM_VALID_M) { - wr32(hw, VP_MDET_TX_PQM(vf->vf_id), 0xFFFF); -@@ -1831,6 +1866,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - if (netif_msg_tx_err(pf)) - dev_info(dev, "Malicious Driver Detection event TX_PQM detected on VF %d\n", - vf->vf_id); -+ -+ reset_vf_tx = true; - } - - reg = rd32(hw, VP_MDET_TX_TCLAN(vf->vf_id)); -@@ -1841,6 +1878,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - if (netif_msg_tx_err(pf)) - dev_info(dev, "Malicious Driver Detection event TX_TCLAN detected on VF %d\n", - vf->vf_id); -+ -+ reset_vf_tx = true; - } - - reg = rd32(hw, VP_MDET_TX_TDPU(vf->vf_id)); -@@ -1851,6 +1890,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - if (netif_msg_tx_err(pf)) - dev_info(dev, "Malicious Driver Detection event TX_TDPU detected on VF %d\n", - vf->vf_id); -+ -+ reset_vf_tx = true; - } - - reg = rd32(hw, VP_MDET_RX(vf->vf_id)); -@@ -1862,18 +1903,12 @@ static void ice_handle_mdd_event(struct ice_pf *pf) - dev_info(dev, "Malicious Driver Detection event RX detected on VF %d\n", - vf->vf_id); - -- /* Since the queue is disabled on VF Rx MDD events, the -- * PF can be configured to reset the VF through ethtool -- * private flag mdd-auto-reset-vf. -- */ -- if (test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags)) { -- /* VF MDD event counters will be cleared by -- * reset, so print the event prior to reset. -- */ -- ice_print_vf_rx_mdd_event(vf); -- ice_reset_vf(vf, ICE_VF_RESET_LOCK); -- } -+ reset_vf_rx = true; - } -+ -+ if (reset_vf_tx || reset_vf_rx) -+ ice_mdd_maybe_reset_vf(pf, vf, reset_vf_tx, -+ reset_vf_rx); - } - mutex_unlock(&pf->vfs.table_lock); - -diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.c b/drivers/net/ethernet/intel/ice/ice_sriov.c -index 31314e7540f8..442162be23ea 100644 ---- a/drivers/net/ethernet/intel/ice/ice_sriov.c -+++ b/drivers/net/ethernet/intel/ice/ice_sriov.c -@@ -1662,6 +1662,24 @@ void ice_print_vf_rx_mdd_event(struct ice_vf *vf) - ? "on" : "off"); - } - -+/** -+ * ice_print_vf_tx_mdd_event - print VF Tx malicious driver detect event -+ * @vf: pointer to the VF structure -+ */ -+void ice_print_vf_tx_mdd_event(struct ice_vf *vf) -+{ -+ struct ice_pf *pf = vf->pf; -+ struct device *dev; -+ -+ dev = ice_pf_to_dev(pf); -+ -+ dev_info(dev, "%d Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pM. mdd-auto-reset-vfs=%s\n", -+ vf->mdd_tx_events.count, pf->hw.pf_id, vf->vf_id, -+ vf->dev_lan_addr, -+ test_bit(ICE_FLAG_MDD_AUTO_RESET_VF, pf->flags) -+ ? "on" : "off"); -+} -+ - /** - * ice_print_vfs_mdd_events - print VFs malicious driver detect event - * @pf: pointer to the PF structure -@@ -1670,8 +1688,6 @@ void ice_print_vf_rx_mdd_event(struct ice_vf *vf) - */ - void ice_print_vfs_mdd_events(struct ice_pf *pf) - { -- struct device *dev = ice_pf_to_dev(pf); -- struct ice_hw *hw = &pf->hw; - struct ice_vf *vf; - unsigned int bkt; - -@@ -1698,10 +1714,7 @@ void ice_print_vfs_mdd_events(struct ice_pf *pf) - if (vf->mdd_tx_events.count != vf->mdd_tx_events.last_printed) { - vf->mdd_tx_events.last_printed = - vf->mdd_tx_events.count; -- -- dev_info(dev, "%d Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pM.\n", -- vf->mdd_tx_events.count, hw->pf_id, vf->vf_id, -- vf->dev_lan_addr); -+ ice_print_vf_tx_mdd_event(vf); - } - } - mutex_unlock(&pf->vfs.table_lock); -diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.h b/drivers/net/ethernet/intel/ice/ice_sriov.h -index 346cb2666f3a..7f733208d402 100644 ---- a/drivers/net/ethernet/intel/ice/ice_sriov.h -+++ b/drivers/net/ethernet/intel/ice/ice_sriov.h -@@ -58,6 +58,7 @@ void - ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event); - void ice_print_vfs_mdd_events(struct ice_pf *pf); - void ice_print_vf_rx_mdd_event(struct ice_vf *vf); -+void ice_print_vf_tx_mdd_event(struct ice_vf *vf); - bool - ice_vc_validate_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto); - #else /* CONFIG_PCI_IOV */ -@@ -67,6 +68,7 @@ static inline - void ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event) { } - static inline void ice_print_vfs_mdd_events(struct ice_pf *pf) { } - static inline void ice_print_vf_rx_mdd_event(struct ice_vf *vf) { } -+static inline void ice_print_vf_tx_mdd_event(struct ice_vf *vf) { } - static inline void ice_restore_all_vfs_msi_state(struct pci_dev *pdev) { } - - static inline int --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch b/kernel-std/debian/patches/ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch deleted file mode 100644 index 9bc17ddd..00000000 --- a/kernel-std/debian/patches/ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 7bd9084525e4174cbb3ea5af07589c0851f77c62 Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Tue, 13 Aug 2024 01:42:23 +0000 -Subject: [PATCH 2/2] ice: modify the ice driver min version to stx.3 - -Change the ice driver min version to stx.3 because we back ported -https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git -/commit/?id=cc2a9d6c03b804c301447326aff4cf2359867f9c (ice: Add -automatic VF reset on Tx MDD events) from linux-6.10.y. - -The ice driver version should be ice-6.6.40-stx.3. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 6fb76ccb9dd3..5807b310bdca 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.2" -+ICE_STX = "-stx.3" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch b/kernel-std/debian/patches/ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch deleted file mode 100644 index 72fc21c3..00000000 --- a/kernel-std/debian/patches/ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 2df80b59509ec642cc2e075a6bb3dbb6d4a1fdde Mon Sep 17 00:00:00 2001 -From: Jiping Ma -Date: Thu, 12 Sep 2024 00:30:57 +0000 -Subject: [PATCH] ice:modify the ice driver version to stx.5 - -Change the ice driver min version to stx.5 because we back ported -the upstream commit https://git.kernel.org/pub/scm/linux/kernel/git -/netdev/net.git/commit/?id=d2940002b0aa to fix "subcloud crashes -with sriov_config.sh". - -The ice driver version should be ice-6.6.40-stx.5. - -Signed-off-by: Jiping Ma ---- - Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/Makefile b/Makefile -index 7163d25405f8..6da58d35c2c0 100644 ---- a/Makefile -+++ b/Makefile -@@ -1227,7 +1227,7 @@ uapi-asm-generic: - - # KERNELRELEASE can change from a few different places, meaning version.h - # needs to be updated, so this check is forced on all builds --ICE_STX = "-stx.4" -+ICE_STX = "-stx.5" - I40E_STX = "-stx.0" - IAVF_STX = "-stx.0" - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch b/kernel-std/debian/patches/ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch deleted file mode 100644 index a2d833a0..00000000 --- a/kernel-std/debian/patches/ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch +++ /dev/null @@ -1,258 +0,0 @@ -From d3330a6882510c725c417f295112080802d70de8 Mon Sep 17 00:00:00 2001 -From: Michal Schmidt -Date: Tue, 26 Mar 2024 00:20:37 +0100 -Subject: [PATCH 1/2] ice: add ice_adapter for shared data across PFs on the - same NIC - -There is a need for synchronization between ice PFs on the same physical -adapter. - -Add a "struct ice_adapter" for holding data shared between PFs of the -same multifunction PCI device. The struct is refcounted - each ice_pf -holds a reference to it. - -Its first use will be for PTP. I expect it will be useful also to -improve the ugliness that is ice_prot_id_tbl. - -Reviewed-by: Przemek Kitszel -Signed-off-by: Michal Schmidt -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit 0e2bddf9e5f926ce32ed635012d0f8a0b54075d5) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/Makefile | 3 +- - drivers/net/ethernet/intel/ice/ice.h | 2 + - drivers/net/ethernet/intel/ice/ice_adapter.c | 114 +++++++++++++++++++ - drivers/net/ethernet/intel/ice/ice_adapter.h | 22 ++++ - drivers/net/ethernet/intel/ice/ice_main.c | 8 ++ - 5 files changed, 148 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/ethernet/intel/ice/ice_adapter.c - create mode 100644 drivers/net/ethernet/intel/ice/ice_adapter.h - -diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile -index 8757bec23fb3..487e8f95e152 100644 ---- a/drivers/net/ethernet/intel/ice/Makefile -+++ b/drivers/net/ethernet/intel/ice/Makefile -@@ -36,7 +36,8 @@ ice-y := ice_main.o \ - ice_repr.o \ - ice_tc_lib.o \ - ice_fwlog.o \ -- ice_debugfs.o -+ ice_debugfs.o \ -+ ice_adapter.o - ice-$(CONFIG_PCI_IOV) += \ - ice_sriov.o \ - ice_virtchnl.o \ -diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h -index ed1c6cdedeff..03e5655938a7 100644 ---- a/drivers/net/ethernet/intel/ice/ice.h -+++ b/drivers/net/ethernet/intel/ice/ice.h -@@ -77,6 +77,7 @@ - #include "ice_gnss.h" - #include "ice_irq.h" - #include "ice_dpll.h" -+#include "ice_adapter.h" - - extern const char ice_drv_ver[]; - #define ICE_BAR0 0 -@@ -536,6 +537,7 @@ struct ice_agg_node { - - struct ice_pf { - struct pci_dev *pdev; -+ struct ice_adapter *adapter; - - struct devlink_region *nvm_region; - struct devlink_region *sram_region; -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.c b/drivers/net/ethernet/intel/ice/ice_adapter.c -new file mode 100644 -index 000000000000..f00ab998e853 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.c -@@ -0,0 +1,114 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+// SPDX-FileCopyrightText: Copyright Red Hat -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "ice_adapter.h" -+ -+static DEFINE_XARRAY(ice_adapters); -+ -+/* PCI bus number is 8 bits. Slot is 5 bits. Domain can have the rest. */ -+#define INDEX_FIELD_DOMAIN GENMASK(BITS_PER_LONG - 1, 13) -+#define INDEX_FIELD_BUS GENMASK(12, 5) -+#define INDEX_FIELD_SLOT GENMASK(4, 0) -+ -+static unsigned long ice_adapter_index(const struct pci_dev *pdev) -+{ -+ unsigned int domain = pci_domain_nr(pdev->bus); -+ -+ WARN_ON(domain > FIELD_MAX(INDEX_FIELD_DOMAIN)); -+ -+ return FIELD_PREP(INDEX_FIELD_DOMAIN, domain) | -+ FIELD_PREP(INDEX_FIELD_BUS, pdev->bus->number) | -+ FIELD_PREP(INDEX_FIELD_SLOT, PCI_SLOT(pdev->devfn)); -+} -+ -+static struct ice_adapter *ice_adapter_new(void) -+{ -+ struct ice_adapter *adapter; -+ -+ adapter = kzalloc(sizeof(*adapter), GFP_KERNEL); -+ if (!adapter) -+ return NULL; -+ -+ refcount_set(&adapter->refcount, 1); -+ -+ return adapter; -+} -+ -+static void ice_adapter_free(struct ice_adapter *adapter) -+{ -+ kfree(adapter); -+} -+ -+DEFINE_FREE(ice_adapter_free, struct ice_adapter*, if (_T) ice_adapter_free(_T)) -+ -+/** -+ * ice_adapter_get - Get a shared ice_adapter structure. -+ * @pdev: Pointer to the pci_dev whose driver is getting the ice_adapter. -+ * -+ * Gets a pointer to a shared ice_adapter structure. Physical functions (PFs) -+ * of the same multi-function PCI device share one ice_adapter structure. -+ * The ice_adapter is reference-counted. The PF driver must use ice_adapter_put -+ * to release its reference. -+ * -+ * Context: Process, may sleep. -+ * Return: Pointer to ice_adapter on success. -+ * ERR_PTR() on error. -ENOMEM is the only possible error. -+ */ -+struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev) -+{ -+ struct ice_adapter *ret, __free(ice_adapter_free) *adapter = NULL; -+ unsigned long index = ice_adapter_index(pdev); -+ -+ adapter = ice_adapter_new(); -+ if (!adapter) -+ return ERR_PTR(-ENOMEM); -+ -+ xa_lock(&ice_adapters); -+ ret = __xa_cmpxchg(&ice_adapters, index, NULL, adapter, GFP_KERNEL); -+ if (xa_is_err(ret)) { -+ ret = ERR_PTR(xa_err(ret)); -+ goto unlock; -+ } -+ if (ret) { -+ refcount_inc(&ret->refcount); -+ goto unlock; -+ } -+ ret = no_free_ptr(adapter); -+unlock: -+ xa_unlock(&ice_adapters); -+ return ret; -+} -+ -+/** -+ * ice_adapter_put - Release a reference to the shared ice_adapter structure. -+ * @pdev: Pointer to the pci_dev whose driver is releasing the ice_adapter. -+ * -+ * Releases the reference to ice_adapter previously obtained with -+ * ice_adapter_get. -+ * -+ * Context: Any. -+ */ -+void ice_adapter_put(const struct pci_dev *pdev) -+{ -+ unsigned long index = ice_adapter_index(pdev); -+ struct ice_adapter *adapter; -+ -+ xa_lock(&ice_adapters); -+ adapter = xa_load(&ice_adapters, index); -+ if (WARN_ON(!adapter)) -+ goto unlock; -+ -+ if (!refcount_dec_and_test(&adapter->refcount)) -+ goto unlock; -+ -+ WARN_ON(__xa_erase(&ice_adapters, index) != adapter); -+ ice_adapter_free(adapter); -+unlock: -+ xa_unlock(&ice_adapters); -+} -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.h b/drivers/net/ethernet/intel/ice/ice_adapter.h -new file mode 100644 -index 000000000000..cb5a02eb24c1 ---- /dev/null -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.h -@@ -0,0 +1,22 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+/* SPDX-FileCopyrightText: Copyright Red Hat */ -+ -+#ifndef _ICE_ADAPTER_H_ -+#define _ICE_ADAPTER_H_ -+ -+#include -+ -+struct pci_dev; -+ -+/** -+ * struct ice_adapter - PCI adapter resources shared across PFs -+ * @refcount: Reference count. struct ice_pf objects hold the references. -+ */ -+struct ice_adapter { -+ refcount_t refcount; -+}; -+ -+struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev); -+void ice_adapter_put(const struct pci_dev *pdev); -+ -+#endif /* _ICE_ADAPTER_H */ -diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c -index 685635a22616..b95d6b1f05e0 100644 ---- a/drivers/net/ethernet/intel/ice/ice_main.c -+++ b/drivers/net/ethernet/intel/ice/ice_main.c -@@ -5142,6 +5142,7 @@ static int - ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - { - struct device *dev = &pdev->dev; -+ struct ice_adapter *adapter; - struct ice_pf *pf; - struct ice_hw *hw; - int err; -@@ -5194,7 +5195,12 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - - pci_set_master(pdev); - -+ adapter = ice_adapter_get(pdev); -+ if (IS_ERR(adapter)) -+ return PTR_ERR(adapter); -+ - pf->pdev = pdev; -+ pf->adapter = adapter; - pci_set_drvdata(pdev, pf); - set_bit(ICE_DOWN, pf->state); - /* Disable service task until DOWN bit is cleared */ -@@ -5245,6 +5251,7 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent) - err_load: - ice_deinit(pf); - err_init: -+ ice_adapter_put(pdev); - pci_disable_device(pdev); - return err; - } -@@ -5349,6 +5356,7 @@ static void ice_remove(struct pci_dev *pdev) - ice_setup_mc_magic_wake(pf); - ice_set_wake(pf); - -+ ice_adapter_put(pdev); - pci_disable_device(pdev); - } - --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch b/kernel-std/debian/patches/ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch deleted file mode 100644 index bb979876..00000000 --- a/kernel-std/debian/patches/ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch +++ /dev/null @@ -1,151 +0,0 @@ -From 72628177274c4993ebc3e36f183f97cb44f08234 Mon Sep 17 00:00:00 2001 -From: Michal Schmidt -Date: Tue, 26 Mar 2024 00:20:38 +0100 -Subject: [PATCH 2/2] ice: avoid the PTP hardware semaphore in gettimex64 path - -The PTP hardware semaphore (PFTSYN_SEM) is used to synchronize -operations that program the PTP timers. The operations involve issuing -commands to the sideband queue. The E810 does not have a hardware -sideband queue, so the admin queue is used. The admin queue is slow. -I have observed delays in hundreds of milliseconds waiting for -ice_sq_done. - -When phc2sys reads the time from the ice PTP clock and PFTSYN_SEM is -held by a task performing one of the slow operations, ice_ptp_lock can -easily time out. phc2sys gets -EBUSY and the kernel prints: - ice 0000:XX:YY.0: PTP failed to get time -These messages appear once every few seconds, causing log spam. - -The E810 datasheet recommends an algorithm for reading the upper 64 bits -of the GLTSYN_TIME register. It matches what's implemented in -ice_ptp_read_src_clk_reg. It is robust against wrap-around, but not -necessarily against the concurrent setting of the register (with -GLTSYN_CMD_{INIT,ADJ}_TIME commands). Perhaps that's why -ice_ptp_gettimex64 also takes PFTSYN_SEM. - -The race with time setters can be prevented without relying on the PTP -hardware semaphore. Using the "ice_adapter" from the previous patch, -we can have a common spinlock for the PFs that share the clock hardware. -It will protect the reading and writing to the GLTSYN_TIME register. -The writing is performed indirectly, by the hardware, as a result of -the driver writing GLTSYN_CMD_SYNC in ice_ptp_exec_tmr_cmd. I wasn't -sure if the ice_flush there is enough to make sure GLTSYN_TIME has been -updated, but it works well in my testing. - -My test code can be seen here: -https://gitlab.com/mschmidt2/linux/-/commits/ice-ptp-host-side-lock-10 -It consists of: - - kernel threads reading the time in a busy loop and looking at the - deltas between consecutive values, reporting new maxima. - - a shell script that sets the time repeatedly; - - a bpftrace probe to produce a histogram of the measured deltas. -Without the spinlock ptp_gltsyn_time_lock, it is easy to see tearing. -Deltas in the [2G, 4G) range appear in the histograms. -With the spinlock added, there is no tearing and the biggest delta I saw -was in the range [1M, 2M), that is under 2 ms. - -Reviewed-by: Jacob Keller -Reviewed-by: Przemek Kitszel -Signed-off-by: Michal Schmidt -Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) -Signed-off-by: Tony Nguyen -(cherry picked from commit d29a8134c78232213fb88f20d7ae865ec364e367) -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_adapter.c | 2 ++ - drivers/net/ethernet/intel/ice/ice_adapter.h | 6 ++++++ - drivers/net/ethernet/intel/ice/ice_ptp.c | 8 +------- - drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 3 +++ - 4 files changed, 12 insertions(+), 7 deletions(-) - -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.c b/drivers/net/ethernet/intel/ice/ice_adapter.c -index f00ab998e853..52d15ef7f4b1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adapter.c -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include "ice_adapter.h" - -@@ -35,6 +36,7 @@ static struct ice_adapter *ice_adapter_new(void) - if (!adapter) - return NULL; - -+ spin_lock_init(&adapter->ptp_gltsyn_time_lock); - refcount_set(&adapter->refcount, 1); - - return adapter; -diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.h b/drivers/net/ethernet/intel/ice/ice_adapter.h -index cb5a02eb24c1..9d11014ec02f 100644 ---- a/drivers/net/ethernet/intel/ice/ice_adapter.h -+++ b/drivers/net/ethernet/intel/ice/ice_adapter.h -@@ -4,15 +4,21 @@ - #ifndef _ICE_ADAPTER_H_ - #define _ICE_ADAPTER_H_ - -+#include - #include - - struct pci_dev; - - /** - * struct ice_adapter - PCI adapter resources shared across PFs -+ * @ptp_gltsyn_time_lock: Spinlock protecting access to the GLTSYN_TIME -+ * register of the PTP clock. - * @refcount: Reference count. struct ice_pf objects hold the references. - */ - struct ice_adapter { -+ /* For access to the GLTSYN_TIME register */ -+ spinlock_t ptp_gltsyn_time_lock; -+ - refcount_t refcount; - }; - -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c -index 44b8fc8021cd..307d2cc023e1 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp.c -@@ -372,6 +372,7 @@ ice_ptp_read_src_clk_reg(struct ice_pf *pf, struct ptp_system_timestamp *sts) - u8 tmr_idx; - - tmr_idx = ice_get_ptp_src_clock_index(hw); -+ guard(spinlock)(&pf->adapter->ptp_gltsyn_time_lock); - /* Read the system timestamp pre PHC read */ - ptp_read_system_prets(sts); - -@@ -1978,15 +1979,8 @@ ice_ptp_gettimex64(struct ptp_clock_info *info, struct timespec64 *ts, - struct ptp_system_timestamp *sts) - { - struct ice_pf *pf = ptp_info_to_pf(info); -- struct ice_hw *hw = &pf->hw; -- -- if (!ice_ptp_lock(hw)) { -- dev_err(ice_pf_to_dev(pf), "PTP failed to get time\n"); -- return -EBUSY; -- } - - ice_ptp_read_time(pf, ts, sts); -- ice_ptp_unlock(hw); - - return 0; - } -diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -index 313a72dad813..72f080011364 100644 ---- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c -@@ -274,6 +274,9 @@ static void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd) - */ - static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw) - { -+ struct ice_pf *pf = container_of(hw, struct ice_pf, hw); -+ -+ guard(spinlock)(&pf->adapter->ptp_gltsyn_time_lock); - wr32(hw, GLTSYN_CMD_SYNC, SYNC_EXEC_CMD); - ice_flush(hw); - } --- -2.43.0 - diff --git a/kernel-std/debian/patches/ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch b/kernel-std/debian/patches/ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch deleted file mode 100644 index 06ed85ed..00000000 --- a/kernel-std/debian/patches/ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 3229486de73d93dde2a355e73c31d815ab8a7576 Mon Sep 17 00:00:00 2001 -From: Kent Overstreet -Date: Mon, 11 Dec 2023 15:15:38 -0500 -Subject: [PATCH] refcount: Split out refcount_types.h - -More trimming of sched.h dependencies. - -Signed-off-by: Kent Overstreet -(cherry picked from commit f9d6966b7f4182f612208f9dad9e2cfaaf667ba3) -[Added "ice.h" in ice_comm.h to fix the ice_pf not defined issue.] -Signed-off-by: Jiping Ma ---- - drivers/net/ethernet/intel/ice/ice_common.h | 1 + - include/linux/refcount.h | 13 +------------ - include/linux/refcount_types.h | 19 +++++++++++++++++++ - include/linux/sched.h | 2 +- - include/linux/sched/task.h | 1 + - 5 files changed, 23 insertions(+), 13 deletions(-) - create mode 100644 include/linux/refcount_types.h - -diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h -index 9d38777310e5..1cc4be304d9c 100644 ---- a/drivers/net/ethernet/intel/ice/ice_common.h -+++ b/drivers/net/ethernet/intel/ice/ice_common.h -@@ -6,6 +6,7 @@ - - #include - -+#include "ice.h" - #include "ice_type.h" - #include "ice_nvm.h" - #include "ice_flex_pipe.h" -diff --git a/include/linux/refcount.h b/include/linux/refcount.h -index a62fcca97486..85c6df0d1bef 100644 ---- a/include/linux/refcount.h -+++ b/include/linux/refcount.h -@@ -96,22 +96,11 @@ - #include - #include - #include -+#include - #include - - struct mutex; - --/** -- * typedef refcount_t - variant of atomic_t specialized for reference counts -- * @refs: atomic_t counter field -- * -- * The counter saturates at REFCOUNT_SATURATED and will not move once -- * there. This avoids wrapping the counter and causing 'spurious' -- * use-after-free bugs. -- */ --typedef struct refcount_struct { -- atomic_t refs; --} refcount_t; -- - #define REFCOUNT_INIT(n) { .refs = ATOMIC_INIT(n), } - #define REFCOUNT_MAX INT_MAX - #define REFCOUNT_SATURATED (INT_MIN / 2) -diff --git a/include/linux/refcount_types.h b/include/linux/refcount_types.h -new file mode 100644 -index 000000000000..162004f06edf ---- /dev/null -+++ b/include/linux/refcount_types.h -@@ -0,0 +1,19 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+#ifndef _LINUX_REFCOUNT_TYPES_H -+#define _LINUX_REFCOUNT_TYPES_H -+ -+#include -+ -+/** -+ * typedef refcount_t - variant of atomic_t specialized for reference counts -+ * @refs: atomic_t counter field -+ * -+ * The counter saturates at REFCOUNT_SATURATED and will not move once -+ * there. This avoids wrapping the counter and causing 'spurious' -+ * use-after-free bugs. -+ */ -+typedef struct refcount_struct { -+ atomic_t refs; -+} refcount_t; -+ -+#endif /* _LINUX_REFCOUNT_TYPES_H */ -diff --git a/include/linux/sched.h b/include/linux/sched.h -index 7b92c4d35ddd..3f85c80c5d44 100644 ---- a/include/linux/sched.h -+++ b/include/linux/sched.h -@@ -22,7 +22,7 @@ - #include - #include - #include --#include -+#include - #include - #include - #include -diff --git a/include/linux/sched/task.h b/include/linux/sched/task.h -index a23af225c898..1880ae21a9cb 100644 ---- a/include/linux/sched/task.h -+++ b/include/linux/sched/task.h -@@ -7,6 +7,7 @@ - * functionality: - */ - -+#include - #include - #include - --- -2.43.0 - diff --git a/kernel-std/debian/patches/series b/kernel-std/debian/patches/series index 29b6a2c0..7f016a86 100644 --- a/kernel-std/debian/patches/series +++ b/kernel-std/debian/patches/series @@ -13,97 +13,4 @@ 0013-Revert-sched-idle-Move-quiet_vmstate-into-the-NOHZ-c.patch 0014-Port-negative-dentries-limit-feature-from-3.10.patch 0015-Add-the-pci-reboot-quirk-in-DMI-table-for-Dell-Power.patch -0016-Add-driver-versions-for-ice-i40e-and-iavf.patch -0017-ice-Use-irq_update_affinity_hint.patch -0018-sched-debug-Fix-the-runnable-tasks-output.patch -ice-dpll/0001-dpll-documentation-on-DPLL-subsystem-interface.patch -ice-dpll/0002-dpll-spec-Add-Netlink-spec-in-YAML.patch -ice-dpll/0003-dpll-core-Add-DPLL-framework-base-functions.patch -ice-dpll/0004-dpll-netlink-Add-DPLL-framework-base-functions.patch -ice-dpll/0005-netdev-expose-DPLL-pin-handle-for-netdevice.patch -ice-dpll/0006-ice-add-admin-commands-to-access-cgu-configuration.patch -ice-dpll/0007-ice-implement-dpll-interface-to-control-cgu.patch -ice-dpll/0008-ptp_ocp-implement-DPLL-ops.patch -ice-dpll/0009-mlx5-Implement-SyncE-support-using-DPLL-infrastructu.patch -ice-dpll/0010-netdev-Remove-unneeded-semicolon.patch -ice-dpll/0011-MAINTAINERS-adjust-header-file-entry-in-DPLL-SUBSYST.patch -ice-dpll/0012-Documentation-dpll-Fix-code-blocks.patch -ice-dpll/0013-Documentation-dpll-wrap-DPLL_CMD_PIN_GET-output-in-a.patch -ice-dpll/0014-ice-remove-ICE_F_PTP_EXTTS-feature-flag.patch -ice-dpll/0015-ice-check-netlist-before-enabling-ICE_F_GNSS.patch -ice-dpll/0016-ice-fix-linking-when-CONFIG_PTP_1588_CLOCK-n.patch -ice-dpll/0017-ptp-Fix-type-of-mode-parameter-in-ptp_ocp_dpll_mode_.patch -ice-dpll/0018-mlx5-Fix-type-of-mode-parameter-in-mlx5_dpll_device_.patch -ice-dpll/0019-tools-ynl-gen-lift-type-requirement-for-attribute-su.patch -ice-dpll/0020-dpll-docs-add-support-for-pin-signal-phase-offset-ad.patch -ice-dpll/0021-netlink-specs-remove-redundant-type-keys-from-attrib.patch -ice-dpll/0022-dpll-spec-add-support-for-pin-dpll-signal-phase-offs.patch -ice-dpll/0023-dpll-netlink-core-add-support-for-pin-dpll-signal-ph.patch -ice-dpll/0024-ice-dpll-implement-phase-related-callbacks.patch -ice-dpll/0025-dpll-netlink-core-change-pin-frequency-set-behavior.patch -ice-dpll/0026-ice-dpll-fix-initial-lock-status-of-dpll.patch -ice-dpll/0027-ice-dpll-fix-check-for-dpll-input-priority-range.patch -ice-dpll/0028-ice-introduce-hw-phy_model-for-handling-PTP-PHY-diff.patch -ice-dpll/0029-ice-dpll-fix-output-pin-capabilities.patch -ice-dpll/0030-dpll-Fix-potential-msg-memleak-when-genlmsg_put_repl.patch -ice-dpll/0031-ice-add-CGU-info-to-devlink-info-callback.patch -ice-dpll/0032-dpll-sanitize-possible-null-pointer-dereference-in-d.patch -ice-dpll/0033-dpll-allocate-pin-ids-in-cycle.patch -ice-dpll/0034-ice-dpll-fix-phase-offset-value.patch -ice-dpll/0035-dpll-fix-broken-error-path-in-dpll_pin_alloc.patch -ice-dpll/0036-dpll-fix-pin-dump-crash-for-rebound-module.patch -ice-dpll/0037-dpll-fix-userspace-availability-of-pins.patch -ice-dpll/0038-dpll-fix-register-pin-with-unregistered-parent-pin.patch -ice-dpll/0039-ice-fix-connection-state-of-DPLL-and-out-pin.patch -ice-dpll/0040-dpll-fix-possible-deadlock-during-netlink-dump-opera.patch -ice-dpll/0041-ice-fix-dpll-input-pin-phase_adjust-value-updates.patch -ice-dpll/0042-ice-fix-dpll-and-dpll_pin-data-access-on-PF-reset.patch -ice-dpll/0043-ice-fix-dpll-periodic-work-data-updates-on-PF-reset.patch -ice-dpll/0044-ice-fix-pin-phase-adjust-updates-on-PF-reset.patch -ice-dpll/0045-ice-fix-uninitialized-dplls-mutex-usage.patch -ice-dpll/0046-dpll-fix-dpll_xa_ref_-_del-for-multiple-registration.patch -ice-dpll/0047-ice-modify-the-ice-driver-min-version-to-stx.2.patch -ice-mdd/0001-ice-Add-automatic-VF-reset-on-Tx-MDD-events.patch -ice-mdd/0002-ice-modify-the-ice-driver-min-version-to-stx.3.patch -ice-VDF/0001-ice-Auxbus-devices-driver-for-E822-TS.patch -ice-VDF/0002-ice-introduce-ice_pf_src_tmr_owned.patch -ice-VDF/0003-ice-Re-enable-timestamping-correctly-after-reset.patch -ice-VDF/0004-ice-periodically-kick-Tx-timestamp-interrupt.patch -ice-VDF/0005-ice-PTP-Rename-macros-used-for-PHY-QUAD-port-definit.patch -ice-VDF/0006-ice-PTP-move-quad-value-check-inside-ice_fill_phy_ms.patch -ice-VDF/0007-ice-remove-ptp_tx-ring-parameter-flag.patch -ice-VDF/0008-ice-unify-logic-for-programming-PFINT_TSYN_MSK.patch -ice-VDF/0009-ice-PTP-Clean-up-timestamp-registers-correctly.patch -ice-VDF/0010-ice-Use-PTP-auxbus-for-all-PHYs-restart-in-E822.patch -ice-VDF/0011-ice-Rename-E822-to-E82X.patch -ice-VDF/0012-ice-Schedule-service-task-in-IRQ-top-half.patch -ice-VDF/0013-ice-Enable-SW-interrupt-from-FW-for-LL-TS.patch -ice-VDF/0014-ice-PTP-add-clock-domain-number-to-auxiliary-interfa.patch -ice-VDF/0015-ice-restore-timestamp-configuration-after-device-res.patch -ice-VDF/0016-ice-introduce-PTP-state-machine.patch -ice-VDF/0017-ice-pass-reset-type-to-PTP-reset-functions.patch -ice-VDF/0018-ice-rename-verify_cached-to-has_ready_bitmap.patch -ice-VDF/0019-ice-don-t-check-has_ready_bitmap-in-E810-functions.patch -ice-VDF/0020-ice-rename-ice_ptp_tx_cfg_intr.patch -ice-VDF/0021-ice-factor-out-ice_ptp_rebuild_owner.patch -ice-VDF/0022-ice-stop-destroying-and-reinitalizing-Tx-tracker-dur.patch -ice-VDF/0023-ice-Remove-and-readd-netdev-during-devlink-reload.patch -ice-VDF/0024-ice-remove-FW-logging-code.patch -ice-VDF/0025-ice-configure-FW-logging.patch -ice-VDF/0026-ice-enable-FW-logging.patch -ice-VDF/0027-ice-add-ability-to-read-and-configure-FW-log-data.patch -ice-VDF/0028-ice-Fix-debugfs-with-devlink-reload.patch -ice-VDF/0029-ice-remove-vf-lan_vsi_num-field.patch -ice-VDF/0030-ice-rename-ice_write_-functions-to-ice_pack_ctx_.patch -ice-VDF/0031-ice-use-GENMASK-instead-of-BIT-n-1-in-pack-functions.patch -ice-VDF/0032-ice-cleanup-line-splitting-for-context-set-functions.patch -ice-VDF/0033-ice-do-not-disable-Tx-queues-twice-in-ice_down.patch -ice-VDF/0034-ice-Fix-improper-extts-handling.patch -ice-VDF/0035-ice-Don-t-process-extts-if-PTP-is-disabled.patch -ice-VDF/0036-ice-Introduce-ice_ptp_hw-struct.patch -ice-VDF/0037-ice-Introduce-ice_get_base_incval-helper.patch -ice-VDF/0038-ice-modify-the-ice-driver-version-to-stx.4.patch -ice-ptp-vsi/0002-ice-modify-the-ice-driver-version-to-stx.5.patch -ice-ptp-vsi/0003-ice-add-ice_adapter-for-shared-data-across-PFs-on-th.patch -ice-ptp-vsi/0004-ice-avoid-the-PTP-hardware-semaphore-in-gettimex64-p.patch -ice-ptp-vsi/0005-refcount-Split-out-refcount_types.h.patch +0016-tools-Fix-the-build-errors.patch diff --git a/kernel-std/debian/source/changelog b/kernel-std/debian/source/changelog index bfee398c..c8884a16 100644 --- a/kernel-std/debian/source/changelog +++ b/kernel-std/debian/source/changelog @@ -1,3 +1,8 @@ +linux (6.12.18-1) unstable; urgency=medium + * New upstream update: + https://git.yoctoproject.org/linux-yocto/commit/?h=v6.12/standard/base&id=5fb23ddafcdc46eaf87f7e4f50e416ac9114cbf7 + -- Jiping Ma Mon, 10 Mar 2025 14:33:21 +0800 + linux (6.6.71-1) unstable; urgency=medium * New upstream update: diff --git a/kernel-std/debian/source/config b/kernel-std/debian/source/config index 9865442e..79163c76 100644 --- a/kernel-std/debian/source/config +++ b/kernel-std/debian/source/config @@ -7,6 +7,7 @@ CONFIG_IRQ_WORK=y # CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set +# CONFIG_WERROR is not set CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_HAVE_KERNEL_GZIP=y @@ -25,9 +26,9 @@ CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSVIPC_COMPAT=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y # CONFIG_WATCH_QUEUE is not set @@ -49,7 +50,6 @@ CONFIG_HARDIRQS_SW_RESEND=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y @@ -60,14 +60,16 @@ CONFIG_SPARSE_IRQ=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y -CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST_IDLE=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y # # Timers subsystem @@ -77,17 +79,40 @@ CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set # CONFIG_NO_HZ_IDLE is not set CONFIG_NO_HZ_FULL=y -CONFIG_CONTEXT_TRACKING=y -# CONFIG_CONTEXT_TRACKING_FORCE is not set +CONFIG_CONTEXT_TRACKING_USER=y +# CONFIG_CONTEXT_TRACKING_USER_FORCE is not set CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125 # end of Timers subsystem +CONFIG_BPF=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y + +# +# BPF subsystem +# +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +CONFIG_BPF_JIT_ALWAYS_ON=y +CONFIG_BPF_JIT_DEFAULT_ON=y +CONFIG_BPF_UNPRIV_DEFAULT_OFF=y +CONFIG_USERMODE_DRIVER=y +CONFIG_BPF_PRELOAD=y +CONFIG_BPF_PRELOAD_UMD=m +# CONFIG_BPF_LSM is not set +# end of BPF subsystem + +CONFIG_PREEMPT_BUILD=y # CONFIG_PREEMPT_NONE is not set # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_PREEMPT_COUNT=y CONFIG_PREEMPTION=y +CONFIG_PREEMPT_DYNAMIC=y +# CONFIG_SCHED_CORE is not set +# CONFIG_SCHED_CLASS_EXT is not set # # CPU/Task time and stats accounting @@ -114,23 +139,24 @@ CONFIG_CPU_ISOLATION=y CONFIG_TREE_RCU=y CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set -CONFIG_SRCU=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_RUDE_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_NOCB_CPU=y +# CONFIG_RCU_NOCB_CPU_DEFAULT_ALL is not set +# CONFIG_RCU_LAZY is not set # end of RCU Subsystem -CONFIG_BUILD_BIN2C=y # CONFIG_IKCONFIG is not set # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 -CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +# CONFIG_PRINTK_INDEX is not set CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # @@ -142,30 +168,40 @@ CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_HAS_INT128=y +CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC10_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y +CONFIG_MEMCG_V1=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y +CONFIG_GROUP_SCHED_WEIGHT=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y # CONFIG_RT_GROUP_SCHED is not set +CONFIG_SCHED_MM_CID=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y +CONFIG_CPUSETS_V1=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_MISC=y # CONFIG_CGROUP_DEBUG is not set CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y @@ -177,7 +213,6 @@ CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y -# CONFIG_SYSFS_DEPRECATED is not set CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" @@ -189,14 +224,15 @@ CONFIG_RD_LZO=y CONFIG_RD_LZ4=y CONFIG_RD_ZSTD=y # CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y +CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y -CONFIG_BPF=y # CONFIG_EXPERT is not set CONFIG_UID16=y CONFIG_MULTIUSER=y @@ -205,11 +241,9 @@ CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y -CONFIG_PRINTK_NMI=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y -CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -220,26 +254,17 @@ CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y -CONFIG_HAVE_ARCH_USERFAULTFD_WP=y CONFIG_MEMBARRIER=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y -CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_BPF_LSM is not set -CONFIG_BPF_SYSCALL=y -CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y -CONFIG_BPF_JIT_ALWAYS_ON=y -CONFIG_BPF_JIT_DEFAULT_ON=y -CONFIG_USERMODE_DRIVER=y -CONFIG_BPF_PRELOAD=y -CONFIG_BPF_PRELOAD_UMD=m -CONFIG_USERFAULTFD=y -CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y -# CONFIG_EMBEDDED is not set +CONFIG_CACHESTAT_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_SELFTEST is not set +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_HAVE_PERF_EVENTS=y +CONFIG_GUEST_PERF_EVENTS=y # # Kernel Performance Events And Counters @@ -248,20 +273,26 @@ CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters -CONFIG_VM_EVENT_COUNTERS=y CONFIG_SIGEXIT=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -CONFIG_SLAB_FREELIST_RANDOM=y -# CONFIG_SLAB_FREELIST_HARDENED is not set -CONFIG_SHUFFLE_PAGE_ALLOCATOR=y -CONFIG_SLUB_CPU_PARTIAL=y CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y + +# +# Kexec and crash features +# +CONFIG_CRASH_RESERVE=y +CONFIG_VMCORE_INFO=y +CONFIG_KEXEC_CORE=y +CONFIG_HAVE_IMA_KEXEC=y +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +# CONFIG_KEXEC_SIG is not set +CONFIG_KEXEC_JUMP=y +CONFIG_CRASH_DUMP=y +CONFIG_CRASH_HOTPLUG=y +CONFIG_CRASH_MAX_MEMORY_RANGES=8192 +# end of Kexec and crash features # end of General setup CONFIG_64BIT=y @@ -282,17 +313,9 @@ CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FILTER_PGPROT=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ZONE_DMA32=y CONFIG_AUDIT_ARCH=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_HAVE_INTEL_TXT=y CONFIG_X86_64_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y @@ -304,15 +327,12 @@ CONFIG_CC_HAS_SANE_STACKPROTECTOR=y # # Processor type and features # -CONFIG_ZONE_DMA=y CONFIG_SMP=y -CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_X2APIC=y +# CONFIG_X86_POSTED_MSI is not set CONFIG_X86_MPPARSE=y -# CONFIG_GOLDFISH is not set -CONFIG_RETPOLINE=y # CONFIG_X86_CPU_RESCTRL is not set -# CONFIG_QEMUX86 is not set +# CONFIG_X86_FRED is not set CONFIG_X86_EXTENDED_PLATFORM=y # CONFIG_X86_NUMACHIP is not set # CONFIG_X86_VSMP is not set @@ -338,6 +358,7 @@ CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_JAILHOUSE_GUEST is not set # CONFIG_ACRN_GUEST is not set +# CONFIG_INTEL_TDX_GUEST is not set # CONFIG_MK8 is not set # CONFIG_MPSC is not set CONFIG_MCORE2=y @@ -349,6 +370,7 @@ CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_P6_NOP=y CONFIG_X86_TSC=y +CONFIG_X86_HAVE_PAE=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 @@ -364,15 +386,18 @@ CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y # CONFIG_GART_IOMMU is not set +CONFIG_BOOT_VESA_SUPPORT=y # CONFIG_MAXSMP is not set CONFIG_NR_CPUS_RANGE_BEGIN=2 CONFIG_NR_CPUS_RANGE_END=512 CONFIG_NR_CPUS_DEFAULT=64 CONFIG_NR_CPUS=256 +CONFIG_SCHED_CLUSTER=y CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y +CONFIG_ACPI_MADT_WAKEUP=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y @@ -381,7 +406,6 @@ CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_AMD=y CONFIG_X86_MCE_THRESHOLD=y CONFIG_X86_MCE_INJECT=m -CONFIG_X86_THERMAL_VECTOR=y # # Performance monitoring @@ -390,67 +414,74 @@ CONFIG_PERF_EVENTS_INTEL_UNCORE=m CONFIG_PERF_EVENTS_INTEL_RAPL=m CONFIG_PERF_EVENTS_INTEL_CSTATE=m CONFIG_PERF_EVENTS_AMD_POWER=m +CONFIG_PERF_EVENTS_AMD_UNCORE=y +# CONFIG_PERF_EVENTS_AMD_BRS is not set # end of Performance monitoring CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX64=y CONFIG_X86_VSYSCALL_EMULATION=y CONFIG_X86_IOPL_IOPERM=y -# CONFIG_I8K is not set CONFIG_MICROCODE=y -CONFIG_MICROCODE_INTEL=y -# CONFIG_MICROCODE_AMD is not set -# CONFIG_MICROCODE_OLD_INTERFACE is not set +# CONFIG_MICROCODE_LATE_LOADING is not set CONFIG_X86_MSR=y CONFIG_X86_CPUID=y CONFIG_X86_5LEVEL=y CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_X86_CPA_STATISTICS is not set +CONFIG_X86_MEM_ENCRYPT=y CONFIG_AMD_MEM_ENCRYPT=y -# CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set CONFIG_NUMA=y CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y -# CONFIG_NUMA_EMU is not set CONFIG_NODES_SHIFT=10 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_X86_PMEM_LEGACY_DEVICE=y CONFIG_X86_PMEM_LEGACY=m CONFIG_X86_CHECK_BIOS_CORRUPTION=y # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set -CONFIG_X86_RESERVE_LOW=64 CONFIG_MTRR=y CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=1 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y -CONFIG_ARCH_USES_PG_UNCACHED=y -CONFIG_ARCH_RANDOM=y -CONFIG_X86_SMAP=y CONFIG_X86_UMIP=y +CONFIG_CC_HAS_IBT=y +CONFIG_X86_CET=y +CONFIG_X86_KERNEL_IBT=y CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y +CONFIG_ARCH_PKEY_BITS=4 CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set +CONFIG_X86_SGX=y +# CONFIG_X86_USER_SHADOW_STACK is not set CONFIG_EFI=y CONFIG_EFI_STUB=y +CONFIG_EFI_HANDOVER_PROTOCOL=y CONFIG_EFI_MIXED=y +CONFIG_EFI_RUNTIME_MAP=y # CONFIG_HZ_100 is not set # CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set CONFIG_HZ_1000=y CONFIG_HZ=1000 CONFIG_SCHED_HRTICK=y -CONFIG_KEXEC=y -CONFIG_KEXEC_FILE=y -CONFIG_ARCH_HAS_KEXEC_PURGATORY=y -# CONFIG_KEXEC_SIG is not set -CONFIG_CRASH_DUMP=y -CONFIG_KEXEC_JUMP=y +CONFIG_ARCH_SUPPORTS_KEXEC=y +CONFIG_ARCH_SUPPORTS_KEXEC_FILE=y +CONFIG_ARCH_SELECTS_KEXEC_FILE=y +CONFIG_ARCH_SUPPORTS_KEXEC_PURGATORY=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_SIG_FORCE=y +CONFIG_ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG=y +CONFIG_ARCH_SUPPORTS_KEXEC_JUMP=y +CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_DEFAULT_CRASH_DUMP=y +CONFIG_ARCH_SUPPORTS_CRASH_HOTPLUG=y +CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y CONFIG_RANDOMIZE_BASE=y @@ -460,24 +491,51 @@ CONFIG_DYNAMIC_MEMORY_LAYOUT=y CONFIG_RANDOMIZE_MEMORY=y CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0x0 CONFIG_HOTPLUG_CPU=y -# CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set -# CONFIG_DEBUG_HOTPLUG_CPU0 is not set # CONFIG_COMPAT_VDSO is not set -CONFIG_LEGACY_VSYSCALL_EMULATE=y -# CONFIG_LEGACY_VSYSCALL_XONLY is not set +CONFIG_LEGACY_VSYSCALL_XONLY=y # CONFIG_LEGACY_VSYSCALL_NONE is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="net.naming-scheme=vSTX7_0" +# CONFIG_CMDLINE_OVERRIDE is not set CONFIG_MODIFY_LDT_SYSCALL=y +# CONFIG_STRICT_SIGALTSTACK_SIZE is not set CONFIG_HAVE_LIVEPATCH=y CONFIG_LIVEPATCH=y # end of Processor type and features +CONFIG_CC_HAS_NAMED_AS=y +CONFIG_USE_X86_SEG_SUPPORT=y +CONFIG_CC_HAS_RETURN_THUNK=y +CONFIG_CC_HAS_ENTRY_PADDING=y +CONFIG_FUNCTION_PADDING_CFI=11 +CONFIG_FUNCTION_PADDING_BYTES=16 +CONFIG_CALL_PADDING=y +CONFIG_HAVE_CALL_THUNKS=y +CONFIG_CALL_THUNKS=y +CONFIG_PREFIX_SYMBOLS=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_MITIGATION_PAGE_TABLE_ISOLATION=y +CONFIG_MITIGATION_RETPOLINE=y +CONFIG_MITIGATION_RETHUNK=y +CONFIG_MITIGATION_UNRET_ENTRY=y +CONFIG_MITIGATION_CALL_DEPTH_TRACKING=y +# CONFIG_CALL_THUNKS_DEBUG is not set +CONFIG_MITIGATION_IBPB_ENTRY=y +CONFIG_MITIGATION_IBRS_ENTRY=y +CONFIG_MITIGATION_SRSO=y +CONFIG_MITIGATION_GDS=y +CONFIG_MITIGATION_RFDS=y +CONFIG_MITIGATION_SPECTRE_BHI=y +CONFIG_MITIGATION_MDS=y +CONFIG_MITIGATION_TAA=y +CONFIG_MITIGATION_MMIO_STALE_DATA=y +CONFIG_MITIGATION_L1TF=y +CONFIG_MITIGATION_RETBLEED=y +CONFIG_MITIGATION_SPECTRE_V1=y +CONFIG_MITIGATION_SPECTRE_V2=y +CONFIG_MITIGATION_SRBDS=y +CONFIG_MITIGATION_SSB=y CONFIG_ARCH_HAS_ADD_PAGES=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_USE_PERCPU_NUMA_NODE_ID=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y # # Power management and ACPI options @@ -488,10 +546,13 @@ CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_HIBERNATION_COMP_LZO=y +CONFIG_HIBERNATION_DEF_COMP="lzo" CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_USERSPACE_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y CONFIG_PM_DEBUG=y @@ -507,8 +568,11 @@ CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_TABLE_LIB=y +CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y +# CONFIG_ACPI_FPDT is not set CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y @@ -529,6 +593,7 @@ CONFIG_ACPI_IPMI=m CONFIG_ACPI_HOTPLUG_CPU=y # CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_PLATFORM_PROFILE=m CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y # CONFIG_ACPI_DEBUG is not set @@ -537,12 +602,11 @@ CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_IOAPIC=y CONFIG_ACPI_SBS=m CONFIG_ACPI_HED=y -# CONFIG_ACPI_CUSTOM_METHOD is not set CONFIG_ACPI_BGRT=y CONFIG_ACPI_NFIT=m # CONFIG_NFIT_SECURITY_DEBUG is not set CONFIG_ACPI_NUMA=y -# CONFIG_ACPI_HMAT is not set +CONFIG_ACPI_HMAT=y CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_ACPI_APEI=y @@ -554,9 +618,12 @@ CONFIG_ACPI_APEI_EINJ=m # CONFIG_ACPI_DPTF is not set CONFIG_ACPI_WATCHDOG=y # CONFIG_ACPI_CONFIGFS is not set +# CONFIG_ACPI_PFRUT is not set +CONFIG_ACPI_PCC=y +# CONFIG_ACPI_FFH is not set CONFIG_PMIC_OPREGION=y +CONFIG_ACPI_PRMT=y CONFIG_X86_PM_TIMER=y -CONFIG_SFI=y # # CPU Frequency scaling @@ -581,6 +648,9 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CONFIG_X86_INTEL_PSTATE=y # CONFIG_X86_PCC_CPUFREQ is not set +CONFIG_X86_AMD_PSTATE=y +CONFIG_X86_AMD_PSTATE_DEFAULT_MODE=3 +# CONFIG_X86_AMD_PSTATE_UT is not set CONFIG_X86_ACPI_CPUFREQ=m CONFIG_X86_ACPI_CPUFREQ_CPB=y # CONFIG_X86_POWERNOW_K8 is not set @@ -614,101 +684,80 @@ CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_MMCONF_FAM10H=y CONFIG_ISA_DMA_API=y +# CONFIG_QEMUX86 is not set CONFIG_AMD_NB=y -# CONFIG_X86_SYSFB is not set # end of Bus options (PCI etc.) # # Binary Emulations # CONFIG_IA32_EMULATION=y -# CONFIG_X86_X32 is not set +# CONFIG_IA32_EMULATION_DEFAULT_DISABLED is not set +CONFIG_X86_X32_ABI=y CONFIG_COMPAT_32=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y -CONFIG_SYSVIPC_COMPAT=y # end of Binary Emulations -# -# Firmware Drivers -# -# CONFIG_EDD is not set -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_DMIID=y -CONFIG_DMI_SYSFS=y -CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y -CONFIG_ISCSI_IBFT_FIND=y -CONFIG_ISCSI_IBFT=m -CONFIG_FW_CFG_SYSFS=y -# CONFIG_FW_CFG_SYSFS_CMDLINE is not set -# CONFIG_GOOGLE_FIRMWARE is not set - -# -# EFI (Extensible Firmware Interface) Support -# -CONFIG_EFI_VARS=y -CONFIG_EFI_ESRT=y -CONFIG_EFI_VARS_PSTORE=y -CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y -CONFIG_EFI_RUNTIME_MAP=y -# CONFIG_EFI_FAKE_MEMMAP is not set -CONFIG_EFI_RUNTIME_WRAPPERS=y -CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y -# CONFIG_EFI_BOOTLOADER_CONTROL is not set -# CONFIG_EFI_CAPSULE_LOADER is not set -# CONFIG_EFI_TEST is not set -# CONFIG_APPLE_PROPERTIES is not set -# CONFIG_RESET_ATTACK_MITIGATION is not set -# CONFIG_EFI_RCI2_TABLE is not set -# CONFIG_EFI_DISABLE_PCI_DMA is not set -# end of EFI (Extensible Firmware Interface) Support - -CONFIG_UEFI_CPER=y -CONFIG_UEFI_CPER_X86=y -CONFIG_EFI_EARLYCON=y -CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y - -# -# Tegra firmware driver -# -# end of Tegra firmware driver -# end of Firmware Drivers - -CONFIG_HAVE_KVM=y +CONFIG_KVM_COMMON=y +CONFIG_HAVE_KVM_PFNCACHE=y CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y -CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_HAVE_KVM_DIRTY_RING=y +CONFIG_HAVE_KVM_DIRTY_RING_TSO=y +CONFIG_HAVE_KVM_DIRTY_RING_ACQ_REL=y CONFIG_KVM_MMIO=y CONFIG_KVM_ASYNC_PF=y CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_READONLY_MEM=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_GENERIC_PRE_FAULT_MEMORY=y CONFIG_KVM_COMPAT=y CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_NO_POLL=y CONFIG_KVM_XFER_TO_GUEST_WORK=y +CONFIG_HAVE_KVM_PM_NOTIFIER=y +CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y +CONFIG_KVM_GENERIC_MMU_NOTIFIER=y +CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES=y +CONFIG_KVM_PRIVATE_MEM=y +CONFIG_KVM_GENERIC_PRIVATE_MEM=y +CONFIG_HAVE_KVM_ARCH_GMEM_PREPARE=y +CONFIG_HAVE_KVM_ARCH_GMEM_INVALIDATE=y CONFIG_VIRTUALIZATION=y +CONFIG_KVM_X86=m CONFIG_KVM=m CONFIG_KVM_INTEL=m +CONFIG_X86_SGX_KVM=y CONFIG_KVM_AMD=m CONFIG_KVM_AMD_SEV=y -CONFIG_KVM_MMU_AUDIT=y +CONFIG_KVM_SMM=y +CONFIG_KVM_HYPERV=y +# CONFIG_KVM_XEN is not set +CONFIG_KVM_EXTERNAL_WRITE_TRACKING=y +CONFIG_KVM_MAX_NR_VCPUS=1024 CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y +CONFIG_AS_TPAUSE=y +CONFIG_AS_GFNI=y +CONFIG_AS_VAES=y +CONFIG_AS_VPCLMULQDQ=y +CONFIG_AS_WRUSS=y +CONFIG_ARCH_CONFIGURES_CPU_MITIGATIONS=y # # General architecture-dependent options # -CONFIG_CRASH_CORE=y -CONFIG_KEXEC_CORE=y CONFIG_HOTPLUG_SMT=y +CONFIG_HOTPLUG_CORE_SYNC=y +CONFIG_HOTPLUG_CORE_SYNC_DEAD=y +CONFIG_HOTPLUG_CORE_SYNC_FULL=y +CONFIG_HOTPLUG_SPLIT_STARTUP=y +CONFIG_HOTPLUG_PARALLEL=y CONFIG_GENERIC_ENTRY=y -# CONFIG_OPROFILE is not set -CONFIG_HAVE_OPROFILE=y -CONFIG_OPROFILE_NMI_TIMER=y CONFIG_KPROBES=y CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set @@ -719,25 +768,33 @@ CONFIG_UPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_KRETPROBES=y +CONFIG_KRETPROBE_ON_RETHOOK=y CONFIG_USER_RETURN_NOTIFIER=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y +CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y +CONFIG_ARCH_HAS_CPU_FINALIZE_INIT=y +CONFIG_ARCH_HAS_CPU_PASID=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y +CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y @@ -750,7 +807,11 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y +CONFIG_MMU_GATHER_MERGE_VMAS=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y +CONFIG_ARCH_HAVE_EXTRA_ELF_NOTES=y +CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y @@ -760,22 +821,33 @@ CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y +# CONFIG_SECCOMP_CACHE_DEBUG is not set CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG=y +CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y +CONFIG_LTO_NONE=y +CONFIG_ARCH_SUPPORTS_CFI_CLANG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y -CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y +CONFIG_HAVE_CONTEXT_TRACKING_USER_OFFSTACK=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y @@ -783,13 +855,27 @@ CONFIG_ARCH_MMAP_RND_BITS=28 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 CONFIG_HAVE_ARCH_COMPAT_MMAP_BASES=y +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 +CONFIG_HAVE_OBJTOOL=y +CONFIG_HAVE_JUMP_LABEL_HACK=y +CONFIG_HAVE_NOINSTR_HACK=y +CONFIG_HAVE_NOINSTR_VALIDATION=y +CONFIG_HAVE_UACCESS_VALIDATION=y CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_RELIABLE_STACKTRACE=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_COMPAT_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y +CONFIG_ARCH_SUPPORTS_RT=y CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_VMAP_STACK=y +CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=y CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y @@ -798,9 +884,21 @@ CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y # CONFIG_LOCK_EVENT_COUNTS is not set CONFIG_ARCH_HAS_MEM_ENCRYPT=y +CONFIG_ARCH_HAS_CC_PLATFORM=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_STATIC_CALL_INLINE=y +CONFIG_HAVE_PREEMPT_DYNAMIC=y +CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y +CONFIG_ARCH_HAS_ELFCORE_COMPAT=y +CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y +CONFIG_DYNAMIC_SIGFRAME=y +CONFIG_HAVE_ARCH_NODE_DEV_GROUP=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -810,44 +908,54 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y +CONFIG_FUNCTION_ALIGNMENT_4B=y +CONFIG_FUNCTION_ALIGNMENT_16B=y +CONFIG_FUNCTION_ALIGNMENT=16 # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULE_SIG_FORMAT=y CONFIG_MODULES=y +# CONFIG_MODULE_DEBUG is not set CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set CONFIG_MODVERSIONS=y CONFIG_ASM_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_SIG=y +# CONFIG_MODULE_SIG_FORCE is not set +CONFIG_MODULE_SIG_ALL=y # CONFIG_MODULE_SIG_SHA1 is not set -# CONFIG_MODULE_SIG_SHA224 is not set CONFIG_MODULE_SIG_SHA256=y # CONFIG_MODULE_SIG_SHA384 is not set # CONFIG_MODULE_SIG_SHA512 is not set +# CONFIG_MODULE_SIG_SHA3_256 is not set +# CONFIG_MODULE_SIG_SHA3_384 is not set +# CONFIG_MODULE_SIG_SHA3_512 is not set CONFIG_MODULE_SIG_HASH="sha256" # CONFIG_MODULE_COMPRESS is not set # CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set -# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y -CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_LEGACY_AUTOLOAD=y CONFIG_BLK_CGROUP_RWSTAT=y -CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSG_COMMON=y +CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=m +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set CONFIG_BLK_DEV_THROTTLING=y -# CONFIG_BLK_DEV_THROTTLING_LOW is not set -# CONFIG_BLK_CMDLINE_PARSER is not set CONFIG_BLK_WBT=y -# CONFIG_BLK_CGROUP_IOLATENCY is not set -# CONFIG_BLK_CGROUP_IOCOST is not set CONFIG_BLK_WBT_MQ=y +# CONFIG_BLK_CGROUP_IOLATENCY is not set +# CONFIG_BLK_CGROUP_FC_APPID is not set +# CONFIG_BLK_CGROUP_IOCOST is not set +# CONFIG_BLK_CGROUP_IOPRIO is not set CONFIG_BLK_DEBUG_FS=y # CONFIG_BLK_SED_OPAL is not set # CONFIG_BLK_INLINE_ENCRYPTION is not set @@ -877,11 +985,11 @@ CONFIG_EFI_PARTITION=y # CONFIG_CMDLINE_PARTITION is not set # end of Partition Types -CONFIG_BLOCK_COMPAT=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_VIRTIO=y -CONFIG_BLK_MQ_RDMA=y CONFIG_BLK_PM=y +CONFIG_BLOCK_HOLDER_DEPRECATED=y +CONFIG_BLK_MQ_STACKING=y # # IO Schedulers @@ -925,40 +1033,11 @@ CONFIG_COREDUMP=y # # Memory Management options # -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_NEED_MULTIPLE_NODES=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_NUMA_KEEP_MEMINFO=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_MEMORY_HOTPLUG is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_MEMORY_BALLOON=y -CONFIG_BALLOON_COMPACTION=y -CONFIG_COMPACTION=y -CONFIG_PAGE_REPORTING=y -CONFIG_MIGRATION=y -CONFIG_CONTIG_ALLOC=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -CONFIG_MMU_NOTIFIER=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_MEMORY_FAILURE=y -CONFIG_HWPOISON_INJECT=m -# CONFIG_TRANSPARENT_HUGEPAGE is not set -CONFIG_ARCH_WANTS_THP_SWAP=y -CONFIG_CLEANCACHE=y -CONFIG_FRONTSWAP=y -# CONFIG_CMA is not set -CONFIG_MEM_SOFT_DIRTY=y +CONFIG_ZPOOL=y +CONFIG_SWAP=y CONFIG_ZSWAP=y +# CONFIG_ZSWAP_DEFAULT_ON is not set +# CONFIG_ZSWAP_SHRINKER_DEFAULT_ON is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set @@ -967,32 +1046,124 @@ CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD_DEPRECATED is not set # CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y CONFIG_ZBUD=y -# CONFIG_Z3FOLD is not set +# CONFIG_Z3FOLD_DEPRECATED is not set CONFIG_ZSMALLOC=y # CONFIG_ZSMALLOC_STAT is not set +CONFIG_ZSMALLOC_CHAIN_SIZE=8 + +# +# Slab allocator options +# +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +CONFIG_SLAB_FREELIST_RANDOM=y +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLAB_BUCKETS is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# CONFIG_RANDOM_KMALLOC_CACHES is not set +# end of Slab allocator options + +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP=y +CONFIG_ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP=y +CONFIG_HAVE_GUP_FAST=y +CONFIG_NUMA_KEEP_MEMINFO=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_SPLIT_PTE_PTLOCKS=y +CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_SPLIT_PMD_PTLOCKS=y +CONFIG_MEMORY_BALLOON=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_PAGE_REPORTING=y +CONFIG_MIGRATION=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_CONTIG_ALLOC=y +CONFIG_PCP_BATCH_SCALE_MAX=5 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_MEMORY_FAILURE=y +CONFIG_HWPOISON_INJECT=m +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANTS_THP_SWAP=y +# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +# CONFIG_CMA is not set +CONFIG_MEM_SOFT_DIRTY=y CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_PTE_DEVMAP=y +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DMA32=y +CONFIG_HMM_MIRROR=y +CONFIG_GET_FREE_REGION=y CONFIG_VMAP_PFN=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y +CONFIG_ARCH_USES_PG_ARCH_2=y +CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set -# CONFIG_GUP_BENCHMARK is not set +# CONFIG_GUP_TEST is not set +# CONFIG_DMAPOOL_TEST is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_MEMFD_CREATE=y +CONFIG_SECRETMEM=y +# CONFIG_ANON_VMA_NAME is not set +CONFIG_HAVE_ARCH_USERFAULTFD_WP=y +CONFIG_HAVE_ARCH_USERFAULTFD_MINOR=y +CONFIG_USERFAULTFD=y +CONFIG_PTE_MARKER_UFFD_WP=y +CONFIG_LRU_GEN=y +# CONFIG_LRU_GEN_ENABLED is not set +# CONFIG_LRU_GEN_STATS is not set +CONFIG_LRU_GEN_WALKS_MMU=y +CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y +CONFIG_PER_VMA_LOCK=y +CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_IOMMU_MM_DATA=y +CONFIG_EXECMEM=y +CONFIG_NUMA_MEMBLKS=y +# CONFIG_NUMA_EMU is not set + +# +# Data Access Monitoring +# +# CONFIG_DAMON is not set +# end of Data Access Monitoring # end of Memory Management options CONFIG_NET=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y +CONFIG_NET_XGRESS=y CONFIG_NET_REDIRECT=y +CONFIG_SKB_DECRYPTED=y CONFIG_SKB_EXTENSIONS=y +CONFIG_NET_DEVMEM=y # # Networking options @@ -1000,7 +1171,7 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y -CONFIG_UNIX_SCM=y +CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=m CONFIG_TLS=m CONFIG_TLS_DEVICE=y @@ -1022,6 +1193,7 @@ CONFIG_NET_KEY_MIGRATE=y # CONFIG_SMC is not set CONFIG_XDP_SOCKETS=y # CONFIG_XDP_SOCKETS_DIAG is not set +CONFIG_NET_HANDSHAKE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y @@ -1051,6 +1223,7 @@ CONFIG_INET_ESP=m CONFIG_INET_ESP_OFFLOAD=m # CONFIG_INET_ESPINTCP is not set CONFIG_INET_IPCOMP=m +CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_XFRM_TUNNEL=m CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=m @@ -1078,6 +1251,8 @@ CONFIG_TCP_CONG_BBR=m CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_SIGPOOL=y +# CONFIG_TCP_AO is not set CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y @@ -1107,6 +1282,7 @@ CONFIG_IPV6_SEG6_LWTUNNEL=y # CONFIG_IPV6_SEG6_HMAC is not set CONFIG_IPV6_SEG6_BPF=y CONFIG_IPV6_RPL_LWTUNNEL=y +# CONFIG_IPV6_IOAM6_LWTUNNEL is not set CONFIG_NETLABEL=y # CONFIG_MPTCP is not set CONFIG_NETWORK_SECMARK=y @@ -1120,16 +1296,19 @@ CONFIG_BRIDGE_NETFILTER=m # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y +CONFIG_NETFILTER_EGRESS=y +CONFIG_NETFILTER_SKIP_EGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y +CONFIG_NETFILTER_BPF_LINK=y +# CONFIG_NETFILTER_NETLINK_HOOK is not set # CONFIG_NETFILTER_NETLINK_ACCT is not set CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_NETLINK_OSF=m CONFIG_NF_CONNTRACK=m -CONFIG_NF_LOG_COMMON=m -CONFIG_NF_LOG_NETDEV=m +CONFIG_NF_LOG_SYSLOG=m CONFIG_NETFILTER_CONNCOUNT=m CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y @@ -1139,6 +1318,7 @@ CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CONNTRACK_OVS=y CONFIG_NF_CT_PROTO_DCCP=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y @@ -1166,13 +1346,13 @@ CONFIG_NF_NAT_SIP=m CONFIG_NF_NAT_TFTP=m CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y +CONFIG_NF_NAT_OVS=y CONFIG_NETFILTER_SYNPROXY=m CONFIG_NF_TABLES=m CONFIG_NF_TABLES_INET=y CONFIG_NF_TABLES_NETDEV=y CONFIG_NFT_NUMGEN=m CONFIG_NFT_CT=m -CONFIG_NFT_COUNTER=m CONFIG_NFT_CONNLIMIT=m CONFIG_NFT_LOG=m CONFIG_NFT_LIMIT=m @@ -1180,7 +1360,6 @@ CONFIG_NFT_MASQ=m CONFIG_NFT_REDIR=m CONFIG_NFT_NAT=m # CONFIG_NFT_TUNNEL is not set -CONFIG_NFT_OBJREF=m CONFIG_NFT_QUEUE=m CONFIG_NFT_QUOTA=m CONFIG_NFT_REJECT=m @@ -1198,8 +1377,10 @@ CONFIG_NF_DUP_NETDEV=m CONFIG_NFT_DUP_NETDEV=m CONFIG_NFT_FWD_NETDEV=m CONFIG_NFT_FIB_NETDEV=m +# CONFIG_NFT_REJECT_NETDEV is not set # CONFIG_NF_FLOW_TABLE is not set CONFIG_NETFILTER_XTABLES=y +# CONFIG_NETFILTER_XTABLES_COMPAT is not set # # Xtables combined modules @@ -1339,6 +1520,7 @@ CONFIG_IP_VS_SH=m # CONFIG_IP_VS_MH is not set CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m +# CONFIG_IP_VS_TWOS is not set # # IPVS SH scheduler @@ -1361,6 +1543,7 @@ CONFIG_IP_VS_PE_SIP=m # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV4=m CONFIG_NF_TPROXY_IPV4=m CONFIG_NF_TABLES_IPV4=y @@ -1388,12 +1571,12 @@ CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_IP_NF_TARGET_NETMAP=m CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m CONFIG_IP_NF_RAW=m CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m +CONFIG_NFT_COMPAT_ARP=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m # end of IP: Netfilter Configuration @@ -1401,6 +1584,7 @@ CONFIG_IP_NF_ARP_MANGLE=m # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m CONFIG_NF_SOCKET_IPV6=m CONFIG_NF_TPROXY_IPV6=m CONFIG_NF_TABLES_IPV6=y @@ -1437,8 +1621,8 @@ CONFIG_NF_DEFRAG_IPV6=m CONFIG_NF_TABLES_BRIDGE=m CONFIG_NFT_BRIDGE_META=m CONFIG_NFT_BRIDGE_REJECT=m -CONFIG_NF_LOG_BRIDGE=m # CONFIG_NF_CONNTRACK_BRIDGE is not set +CONFIG_BRIDGE_NF_EBTABLES_LEGACY=m CONFIG_BRIDGE_NF_EBTABLES=m CONFIG_BRIDGE_EBT_BROUTE=m CONFIG_BRIDGE_EBT_T_FILTER=m @@ -1460,8 +1644,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m -CONFIG_BPFILTER=y -CONFIG_BPFILTER_UMH=m CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_OBJCNT is not set # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5 is not set @@ -1494,12 +1676,11 @@ CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y # CONFIG_BRIDGE_MRP is not set -CONFIG_HAVE_NET_DSA=y +# CONFIG_BRIDGE_CFM is not set # CONFIG_NET_DSA is not set CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y -# CONFIG_DECNET is not set CONFIG_LLC=m # CONFIG_LLC2 is not set # CONFIG_ATALK is not set @@ -1519,10 +1700,8 @@ CONFIG_NET_SCHED=y # # Queueing/Scheduling # -CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m CONFIG_NET_SCH_HFSC=m -CONFIG_NET_SCH_ATM=m CONFIG_NET_SCH_PRIO=m CONFIG_NET_SCH_MULTIQ=m CONFIG_NET_SCH_RED=m @@ -1532,9 +1711,9 @@ CONFIG_NET_SCH_TEQL=m CONFIG_NET_SCH_TBF=m # CONFIG_NET_SCH_CBS is not set CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_MQPRIO_LIB=m CONFIG_NET_SCH_TAPRIO=m CONFIG_NET_SCH_GRED=m -CONFIG_NET_SCH_DSMARK=m CONFIG_NET_SCH_NETEM=m CONFIG_NET_SCH_DRR=m CONFIG_NET_SCH_MQPRIO=m @@ -1563,14 +1742,11 @@ CONFIG_DEFAULT_NET_SCH="fq_codel" # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_TCINDEX=m CONFIG_NET_CLS_ROUTE4=m CONFIG_NET_CLS_FW=m CONFIG_NET_CLS_U32=m CONFIG_CLS_U32_PERF=y CONFIG_CLS_U32_MARK=y -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_RSVP6=m CONFIG_NET_CLS_FLOW=m CONFIG_NET_CLS_CGROUP=y CONFIG_NET_CLS_BPF=m @@ -1592,7 +1768,6 @@ CONFIG_NET_ACT_GACT=m CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=m CONFIG_NET_ACT_SAMPLE=m -# CONFIG_NET_ACT_IPT is not set CONFIG_NET_ACT_NAT=m CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SIMP=m @@ -1632,14 +1807,16 @@ CONFIG_NET_SWITCHDEV=y CONFIG_NET_L3_MASTER_DEV=y # CONFIG_QRTR is not set # CONFIG_NET_NCSI is not set +CONFIG_PCPU_DEV_REFCNT=y +CONFIG_MAX_SKB_FRAGS=17 CONFIG_RPS=y CONFIG_RFS_ACCEL=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_XPS=y CONFIG_CGROUP_NET_PRIO=y CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y -CONFIG_BPF_JIT=y CONFIG_BPF_STREAM_PARSER=y CONFIG_NET_FLOW_LIMIT=y @@ -1658,64 +1835,11 @@ CONFIG_CAN_BCM=m CONFIG_CAN_GW=m # CONFIG_CAN_J1939 is not set # CONFIG_CAN_ISOTP is not set - -# -# CAN Device Drivers -# -CONFIG_CAN_VCAN=m -# CONFIG_CAN_VXCAN is not set -CONFIG_CAN_SLCAN=m -CONFIG_CAN_DEV=m -CONFIG_CAN_CALC_BITTIMING=y -# CONFIG_CAN_KVASER_PCIEFD is not set -CONFIG_CAN_C_CAN=m -CONFIG_CAN_C_CAN_PLATFORM=m -CONFIG_CAN_C_CAN_PCI=m -CONFIG_CAN_CC770=m -# CONFIG_CAN_CC770_ISA is not set -CONFIG_CAN_CC770_PLATFORM=m -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_PEAK_PCIEFD is not set -CONFIG_CAN_SJA1000=m -CONFIG_CAN_EMS_PCI=m -# CONFIG_CAN_F81601 is not set -CONFIG_CAN_KVASER_PCI=m -CONFIG_CAN_PEAK_PCI=m -CONFIG_CAN_PEAK_PCIEC=y -CONFIG_CAN_PLX_PCI=m -# CONFIG_CAN_SJA1000_ISA is not set -CONFIG_CAN_SJA1000_PLATFORM=m -CONFIG_CAN_SOFTING=m - -# -# CAN SPI interfaces -# -# CONFIG_CAN_HI311X is not set -# CONFIG_CAN_MCP251X is not set -# CONFIG_CAN_MCP251XFD is not set -# end of CAN SPI interfaces - -# -# CAN USB interfaces -# -CONFIG_CAN_8DEV_USB=m -CONFIG_CAN_EMS_USB=m -CONFIG_CAN_ESD_USB2=m -# CONFIG_CAN_GS_USB is not set -CONFIG_CAN_KVASER_USB=m -# CONFIG_CAN_MCBA_USB is not set -CONFIG_CAN_PEAK_USB=m -# CONFIG_CAN_UCAN is not set -# end of CAN USB interfaces - -# CONFIG_CAN_DEBUG_DEVICES is not set -# end of CAN Device Drivers - # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set # CONFIG_AF_KCM is not set CONFIG_STREAM_PARSER=y +# CONFIG_MCTP is not set CONFIG_FIB_RULES=y CONFIG_WIRELESS=y # CONFIG_CFG80211 is not set @@ -1724,7 +1848,6 @@ CONFIG_WIRELESS=y # CFG80211 needs to be enabled for MAC80211 # CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -# CONFIG_WIMAX is not set CONFIG_RFKILL=m CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y @@ -1742,12 +1865,13 @@ CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_SOCK_VALIDATE_XMIT=y +CONFIG_NET_SELFTESTS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y CONFIG_PAGE_POOL=y +# CONFIG_PAGE_POOL_STATS is not set CONFIG_FAILOVER=m CONFIG_ETHTOOL_NETLINK=y -CONFIG_HAVE_EBPF_JIT=y # # Device Drivers @@ -1755,12 +1879,14 @@ CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EISA=y # CONFIG_EISA is not set CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y CONFIG_HOTPLUG_PCI_PCIE=y CONFIG_PCIEAER=y # CONFIG_PCIEAER_INJECT is not set +CONFIG_PCIEAER_CXL=y # CONFIG_PCIE_ECRC is not set CONFIG_PCIEASPM=y CONFIG_PCIEASPM_DEFAULT=y @@ -1772,19 +1898,22 @@ CONFIG_PCIE_DPC=y # CONFIG_PCIE_PTM is not set # CONFIG_PCIE_EDR is not set CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set CONFIG_PCI_REALLOC_ENABLE_AUTO=y CONFIG_PCI_STUB=y CONFIG_PCI_PF_STUB=m CONFIG_PCI_ATS=y +CONFIG_PCI_DOE=y CONFIG_PCI_LOCKLESS_CONFIG=y CONFIG_PCI_IOV=y +# CONFIG_PCI_NPEM is not set CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y CONFIG_PCI_LABEL=y CONFIG_PCI_HYPERV=m +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=64 CONFIG_HOTPLUG_PCI=y CONFIG_HOTPLUG_PCI_ACPI=y # CONFIG_HOTPLUG_PCI_ACPI_IBM is not set @@ -1798,21 +1927,26 @@ CONFIG_VMD=y CONFIG_PCI_HYPERV_INTERFACE=m # -# DesignWare PCI Core Support +# Cadence-based PCIe controllers +# +# end of Cadence-based PCIe controllers + +# +# DesignWare-based PCIe controllers # -# CONFIG_PCIE_DW_PLAT_HOST is not set # CONFIG_PCI_MESON is not set -# end of DesignWare PCI Core Support +# CONFIG_PCIE_DW_PLAT_HOST is not set +# end of DesignWare-based PCIe controllers # -# Mobiveil PCIe Core Support +# Mobiveil-based PCIe controllers # -# end of Mobiveil PCIe Core Support +# end of Mobiveil-based PCIe controllers # -# Cadence PCIe controllers support +# PLDA-based PCIe controllers # -# end of Cadence PCIe controllers support +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1827,6 +1961,16 @@ CONFIG_PCI_HYPERV_INTERFACE=m # CONFIG_PCI_SW_SWITCHTEC is not set # end of PCI switch controller drivers +CONFIG_CXL_BUS=y +CONFIG_CXL_PCI=m +# CONFIG_CXL_MEM_RAW_COMMANDS is not set +CONFIG_CXL_ACPI=m +CONFIG_CXL_PMEM=m +CONFIG_CXL_MEM=m +CONFIG_CXL_PORT=y +CONFIG_CXL_SUSPEND=y +CONFIG_CXL_REGION=y +# CONFIG_CXL_REGION_INVALIDATION_TEST is not set # CONFIG_PCCARD is not set # CONFIG_RAPIDIO is not set @@ -1837,6 +1981,7 @@ CONFIG_AUXILIARY_BUS=y # CONFIG_UEVENT_HELPER is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_DEVTMPFS_SAFE is not set CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y @@ -1844,17 +1989,23 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # Firmware loader # CONFIG_FW_LOADER=y +CONFIG_FW_LOADER_DEBUG=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y CONFIG_EXTRA_FIRMWARE="" # CONFIG_FW_LOADER_USER_HELPER is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y +CONFIG_FW_UPLOAD=y # end of Firmware loader CONFIG_ALLOW_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set +CONFIG_HMEM_REPORTING=y # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y @@ -1863,24 +2014,91 @@ CONFIG_REGMAP_SPI=m CONFIG_REGMAP_MMIO=y CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set +# CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT is not set # end of Generic Driver Options # # Bus devices # # CONFIG_MHI_BUS is not set +# CONFIG_MHI_BUS_EP is not set # end of Bus devices +# +# Cache Drivers +# +# end of Cache Drivers + CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y + +# +# Firmware Drivers +# + +# +# ARM System Control and Management Interface Protocol +# +# end of ARM System Control and Management Interface Protocol + +# CONFIG_EDD is not set +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_DMIID=y +CONFIG_DMI_SYSFS=y +CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y +CONFIG_ISCSI_IBFT_FIND=y +CONFIG_ISCSI_IBFT=m +CONFIG_FW_CFG_SYSFS=y +# CONFIG_FW_CFG_SYSFS_CMDLINE is not set +CONFIG_SYSFB=y +# CONFIG_SYSFB_SIMPLEFB is not set +# CONFIG_GOOGLE_FIRMWARE is not set + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_ESRT=y +CONFIG_EFI_VARS_PSTORE=y +CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y +CONFIG_EFI_SOFT_RESERVE=y +CONFIG_EFI_DXE_MEM_ATTRIBUTES=y +CONFIG_EFI_RUNTIME_WRAPPERS=y +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_TEST is not set +# CONFIG_APPLE_PROPERTIES is not set +# CONFIG_RESET_ATTACK_MITIGATION is not set +# CONFIG_EFI_RCI2_TABLE is not set +# CONFIG_EFI_DISABLE_PCI_DMA is not set +CONFIG_EFI_EARLYCON=y +CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y +# CONFIG_EFI_DISABLE_RUNTIME is not set +# CONFIG_EFI_COCO_SECRET is not set +CONFIG_UNACCEPTED_MEMORY=y +# end of EFI (Extensible Firmware Interface) Support + +CONFIG_UEFI_CPER=y +CONFIG_UEFI_CPER_X86=y + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + +# +# Tegra firmware driver +# +# end of Tegra firmware driver +# end of Firmware Drivers + CONFIG_GNSS=y +# CONFIG_GNSS_USB is not set CONFIG_MTD=m # CONFIG_MTD_TESTS is not set # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set # end of Partition parsers @@ -1891,6 +2109,10 @@ CONFIG_MTD=m CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m # CONFIG_MTD_BLOCK_RO is not set + +# +# Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. +# # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set @@ -1898,6 +2120,7 @@ CONFIG_MTD_BLOCK=m # CONFIG_SSFDC is not set # CONFIG_SM_FTL is not set # CONFIG_MTD_OOPS is not set +# CONFIG_MTD_PSTORE is not set # CONFIG_MTD_SWAP is not set # CONFIG_MTD_PARTITIONED_MASTER is not set @@ -1920,7 +2143,6 @@ CONFIG_MTD_CFI_I2=y # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -1930,6 +2152,7 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_PMC551 is not set # CONFIG_MTD_DATAFLASH is not set # CONFIG_MTD_MCHP23K256 is not set +# CONFIG_MTD_MCHP48L640 is not set # CONFIG_MTD_SST25L is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set @@ -1945,6 +2168,7 @@ CONFIG_MTD_CFI_I2=y # # NAND # +# CONFIG_MTD_NAND_CORE is not set # CONFIG_MTD_ONENAND is not set # CONFIG_MTD_RAW_NAND is not set # CONFIG_MTD_SPI_NAND is not set @@ -1952,6 +2176,10 @@ CONFIG_MTD_CFI_I2=y # # ECC engine support # +# CONFIG_MTD_NAND_ECC is not set +# CONFIG_MTD_NAND_ECC_SW_HAMMING is not set +# CONFIG_MTD_NAND_ECC_SW_BCH is not set +# CONFIG_MTD_NAND_ECC_MXIC is not set # end of ECC engine support # end of NAND @@ -1968,6 +2196,7 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 # CONFIG_MTD_UBI_FASTMAP is not set # CONFIG_MTD_UBI_GLUEBI is not set # CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_UBI_NVMEM is not set # CONFIG_MTD_HYPERBUS is not set # CONFIG_OF is not set CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y @@ -1985,17 +2214,25 @@ CONFIG_BLK_DEV=y CONFIG_CDROM=y # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set CONFIG_ZRAM=m +# CONFIG_ZRAM_BACKEND_LZ4 is not set +# CONFIG_ZRAM_BACKEND_LZ4HC is not set +# CONFIG_ZRAM_BACKEND_ZSTD is not set +# CONFIG_ZRAM_BACKEND_DEFLATE is not set +# CONFIG_ZRAM_BACKEND_842 is not set +CONFIG_ZRAM_BACKEND_FORCE_LZO=y +CONFIG_ZRAM_BACKEND_LZO=y +CONFIG_ZRAM_DEF_COMP_LZORLE=y +# CONFIG_ZRAM_DEF_COMP_LZO is not set +CONFIG_ZRAM_DEF_COMP="lzo-rle" CONFIG_ZRAM_WRITEBACK=y +# CONFIG_ZRAM_TRACK_ENTRY_ACTIME is not set # CONFIG_ZRAM_MEMORY_TRACKING is not set -# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_ZRAM_MULTI_COMP is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_DRBD=m CONFIG_DRBD_FAULT_INJECTION=y CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_SKD is not set -# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_RAM=m CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=16384 @@ -2003,7 +2240,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 # CONFIG_ATA_OVER_ETH is not set CONFIG_VIRTIO_BLK=m CONFIG_BLK_DEV_RBD=m -# CONFIG_BLK_DEV_RSXX is not set +# CONFIG_BLK_DEV_UBLK is not set # # NVME Support @@ -2011,16 +2248,22 @@ CONFIG_BLK_DEV_RBD=m CONFIG_NVME_CORE=m CONFIG_BLK_DEV_NVME=m # CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_VERBOSE_ERRORS is not set # CONFIG_NVME_HWMON is not set CONFIG_NVME_FABRICS=m CONFIG_NVME_FC=m CONFIG_NVME_TCP=m +# CONFIG_NVME_TCP_TLS is not set +# CONFIG_NVME_HOST_AUTH is not set CONFIG_NVME_TARGET=m +# CONFIG_NVME_TARGET_DEBUGFS is not set # CONFIG_NVME_TARGET_PASSTHRU is not set CONFIG_NVME_TARGET_LOOP=m CONFIG_NVME_TARGET_FC=m CONFIG_NVME_TARGET_FCLOOP=m CONFIG_NVME_TARGET_TCP=m +# CONFIG_NVME_TARGET_TCP_TLS is not set +# CONFIG_NVME_TARGET_AUTH is not set # end of NVME Support # @@ -2030,6 +2273,7 @@ CONFIG_NVME_TARGET_TCP=m # CONFIG_DUMMY_IRQ is not set # CONFIG_IBM_ASM is not set # CONFIG_PHANTOM is not set +# CONFIG_RPMB is not set # CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ENCLOSURE_SERVICES is not set @@ -2044,10 +2288,11 @@ CONFIG_HP_ILO=m # CONFIG_DS1682 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set +# CONFIG_DW_XDATA_PCIE is not set # CONFIG_PCI_ENDPOINT_TEST is not set # CONFIG_XILINX_SDFEC is not set CONFIG_MISC_RTSX=m -# CONFIG_PVPANIC is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -2055,7 +2300,6 @@ CONFIG_MISC_RTSX=m # CONFIG_EEPROM_AT24=m # CONFIG_EEPROM_AT25 is not set -CONFIG_EEPROM_LEGACY=m # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set @@ -2076,25 +2320,30 @@ CONFIG_EEPROM_LEGACY=m CONFIG_INTEL_MEI=m CONFIG_INTEL_MEI_ME=m # CONFIG_INTEL_MEI_TXE is not set +# CONFIG_INTEL_MEI_GSC is not set +# CONFIG_INTEL_MEI_VSC_HW is not set # CONFIG_INTEL_MEI_HDCP is not set +# CONFIG_INTEL_MEI_PXP is not set +# CONFIG_INTEL_MEI_GSC_PROXY is not set # CONFIG_VMWARE_VMCI is not set # CONFIG_GENWQE is not set # CONFIG_ECHO is not set +# CONFIG_BCM_VK is not set # CONFIG_MISC_ALCOR_PCI is not set CONFIG_MISC_RTSX_PCI=m CONFIG_MISC_RTSX_USB=m -# CONFIG_HABANA_AI is not set # CONFIG_UACCE is not set +# CONFIG_PVPANIC is not set +# CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - # # SCSI device support # CONFIG_SCSI_MOD=y CONFIG_RAID_ATTRS=y +CONFIG_SCSI_COMMON=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y @@ -2107,6 +2356,7 @@ CONFIG_BLK_DEV_SD=m # CONFIG_CHR_DEV_ST is not set CONFIG_BLK_DEV_SR=y # CONFIG_CHR_DEV_SG is not set +CONFIG_BLK_DEV_BSG=y # CONFIG_CHR_DEV_SCH is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -2147,7 +2397,6 @@ CONFIG_SCSI_MVSAS=y CONFIG_SCSI_MVSAS_DEBUG=y # CONFIG_SCSI_MVSAS_TASKLET is not set # CONFIG_SCSI_MVUMI is not set -CONFIG_SCSI_DPT_I2O=y # CONFIG_SCSI_ADVANSYS is not set CONFIG_SCSI_ARCMSR=y # CONFIG_SCSI_ESAS2R is not set @@ -2158,8 +2407,8 @@ CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT3SAS_MAX_SGE=128 CONFIG_SCSI_MPT2SAS=m +CONFIG_SCSI_MPI3MR=m CONFIG_SCSI_SMARTPQI=y -# CONFIG_SCSI_UFSHCD is not set CONFIG_SCSI_HPTIOP=y # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_MYRB is not set @@ -2173,7 +2422,6 @@ CONFIG_LIBFCOE=m # CONFIG_SCSI_SNIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FDOMAIN_PCI is not set -CONFIG_SCSI_GDTH=y CONFIG_SCSI_ISCI=y CONFIG_SCSI_IPS=y # CONFIG_SCSI_INITIO is not set @@ -2189,6 +2437,7 @@ CONFIG_QEDI=m CONFIG_QEDF=m CONFIG_SCSI_LPFC=m # CONFIG_SCSI_LPFC_DEBUG_FS is not set +# CONFIG_SCSI_EFCT is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_WD719X is not set @@ -2220,6 +2469,7 @@ CONFIG_SATA_PMP=y CONFIG_SATA_AHCI=m CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=m +# CONFIG_AHCI_DWC is not set # CONFIG_SATA_INIC162X is not set # CONFIG_SATA_ACARD_AHCI is not set # CONFIG_SATA_SIL24 is not set @@ -2303,13 +2553,12 @@ CONFIG_ATA_GENERIC=m CONFIG_MD=y CONFIG_BLK_DEV_MD=y CONFIG_MD_AUTODETECT=y +CONFIG_MD_BITMAP_FILE=y CONFIG_MD_LINEAR=m CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -# CONFIG_MD_MULTIPATH is not set -CONFIG_MD_FAULTY=m # CONFIG_MD_CLUSTER is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y @@ -2337,6 +2586,7 @@ CONFIG_DM_MULTIPATH=m CONFIG_DM_MULTIPATH_QL=m CONFIG_DM_MULTIPATH_ST=m # CONFIG_DM_MULTIPATH_HST is not set +# CONFIG_DM_MULTIPATH_IOA is not set CONFIG_DM_DELAY=m # CONFIG_DM_DUST is not set CONFIG_DM_UEVENT=y @@ -2347,6 +2597,8 @@ CONFIG_DM_VERITY=m # CONFIG_DM_SWITCH is not set CONFIG_DM_LOG_WRITES=m CONFIG_DM_INTEGRITY=m +CONFIG_DM_AUDIT=y +# CONFIG_DM_VDO is not set CONFIG_TARGET_CORE=m CONFIG_TCM_IBLOCK=m CONFIG_TCM_FILEIO=m @@ -2355,6 +2607,7 @@ CONFIG_TCM_USER2=m CONFIG_LOOPBACK_TARGET=m # CONFIG_TCM_FC is not set CONFIG_ISCSI_TARGET=m +# CONFIG_REMOTE_TARGET is not set CONFIG_FUSION=y CONFIG_FUSION_SPI=m # CONFIG_FUSION_FC is not set @@ -2396,9 +2649,12 @@ CONFIG_VXLAN=m # CONFIG_BAREUDP is not set # CONFIG_GTP is not set CONFIG_GENEVE=m +# CONFIG_PFCP is not set +# CONFIG_AMT is not set CONFIG_MACSEC=m CONFIG_NETCONSOLE=m CONFIG_NETCONSOLE_DYNAMIC=y +# CONFIG_NETCONSOLE_EXTENDED_LOG is not set CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_TUN=m @@ -2407,18 +2663,13 @@ CONFIG_TAP=m CONFIG_VETH=m CONFIG_VIRTIO_NET=m # CONFIG_NLMON is not set +# CONFIG_NETKIT is not set CONFIG_NET_VRF=m CONFIG_VSOCKMON=m # CONFIG_ARCNET is not set # CONFIG_ATM_DRIVERS is not set - -# -# Distributed Switch Architecture drivers -# -# end of Distributed Switch Architecture drivers - CONFIG_ETHERNET=y -CONFIG_MDIO=m +CONFIG_MDIO=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set # CONFIG_NET_VENDOR_AGERE is not set @@ -2433,16 +2684,19 @@ CONFIG_NET_VENDOR_AMD=y CONFIG_AMD_XGBE=m # CONFIG_AMD_XGBE_DCB is not set CONFIG_AMD_XGBE_HAVE_ECC=y +# CONFIG_PDS_CORE is not set CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_AQTION=m # CONFIG_NET_VENDOR_ARC is not set +CONFIG_NET_VENDOR_ASIX=y +# CONFIG_SPI_AX88796C is not set CONFIG_NET_VENDOR_ATHEROS=y # CONFIG_ATL2 is not set # CONFIG_ATL1 is not set # CONFIG_ATL1E is not set # CONFIG_ATL1C is not set # CONFIG_ALX is not set -# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_CX_ECAT is not set CONFIG_NET_VENDOR_BROADCOM=y # CONFIG_B44 is not set # CONFIG_BCMGENET is not set @@ -2454,12 +2708,6 @@ CONFIG_BNX2X=m CONFIG_BNX2X_SRIOV=y # CONFIG_SYSTEMPORT is not set # CONFIG_BNXT is not set -# CONFIG_BNXT_SRIOV is not set -# CONFIG_BNXT_FLOWER_OFFLOAD is not set -# CONFIG_BNXT_DCB is not set -# CONFIG_BNXT_HWMON is not set -CONFIG_NET_VENDOR_BROCADE=y -# CONFIG_BNA is not set CONFIG_NET_VENDOR_CADENCE=y # CONFIG_MACB is not set CONFIG_NET_VENDOR_CAVIUM=y @@ -2468,6 +2716,7 @@ CONFIG_NET_VENDOR_CAVIUM=y # CONFIG_THUNDER_NIC_BGX is not set # CONFIG_THUNDER_NIC_RGX is not set CONFIG_CAVIUM_PTP=y +CONFIG_LIQUIDIO_CORE=m CONFIG_LIQUIDIO=m CONFIG_LIQUIDIO_VF=m CONFIG_NET_VENDOR_CHELSIO=y @@ -2478,7 +2727,8 @@ CONFIG_NET_VENDOR_CHELSIO=y CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=m # CONFIG_NET_VENDOR_CORTINA is not set -# CONFIG_CX_ECAT is not set +CONFIG_NET_VENDOR_DAVICOM=y +# CONFIG_DM9051 is not set CONFIG_DNET=m CONFIG_NET_VENDOR_DEC=y # CONFIG_NET_TULIP is not set @@ -2492,13 +2742,19 @@ CONFIG_BE2NET_HWMON=y # CONFIG_BE2NET_BE3 is not set CONFIG_BE2NET_LANCER=y CONFIG_BE2NET_SKYHAWK=y +CONFIG_NET_VENDOR_ENGLEDER=y +# CONFIG_TSNEP is not set # CONFIG_NET_VENDOR_EZCHIP is not set +CONFIG_NET_VENDOR_FUNGIBLE=y +# CONFIG_FUN_ETH is not set CONFIG_NET_VENDOR_GOOGLE=y CONFIG_GVE=m CONFIG_NET_VENDOR_HUAWEI=y CONFIG_HINIC=m # CONFIG_NET_VENDOR_I825XX is not set CONFIG_NET_VENDOR_INTEL=y +CONFIG_LIBETH=m +CONFIG_LIBIE=m # CONFIG_E100 is not set CONFIG_E1000=m CONFIG_E1000E=m @@ -2507,7 +2763,6 @@ CONFIG_IGB=m CONFIG_IGB_HWMON=y CONFIG_IGB_DCA=y CONFIG_IGBVF=m -# CONFIG_IXGB is not set CONFIG_IXGBE=m CONFIG_IXGBE_HWMON=y CONFIG_IXGBE_DCA=y @@ -2516,13 +2771,24 @@ CONFIG_IXGBE_IPSEC=y CONFIG_IXGBEVF=m CONFIG_IXGBEVF_IPSEC=y CONFIG_I40E=m +CONFIG_I40E_DCB=y CONFIG_IAVF=m +CONFIG_I40EVF=m CONFIG_ICE=m +CONFIG_ICE_HWMON=y +CONFIG_ICE_SWITCHDEV=y +CONFIG_ICE_HWTS=y # CONFIG_FM10K is not set CONFIG_IGC=m +# CONFIG_IDPF is not set # CONFIG_JME is not set +CONFIG_NET_VENDOR_ADI=y +# CONFIG_ADIN1110 is not set +CONFIG_NET_VENDOR_LITEX=y # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set +CONFIG_NET_VENDOR_META=y +# CONFIG_FBNIC is not set CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set @@ -2530,22 +2796,25 @@ CONFIG_NET_VENDOR_MICREL=y # CONFIG_KSZ884X_PCI is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set +CONFIG_NET_VENDOR_MICROSOFT=y +CONFIG_MICROSOFT_MANA=m CONFIG_NET_VENDOR_MYRI=y # CONFIG_MYRI10GE is not set # CONFIG_FEALNX is not set +# CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NATSEMI is not set CONFIG_NET_VENDOR_NETERION=y # CONFIG_S2IO is not set -# CONFIG_VXGE is not set CONFIG_NET_VENDOR_NETRONOME=y CONFIG_NFP=m CONFIG_NFP_APP_FLOWER=y CONFIG_NFP_APP_ABM_NIC=y +CONFIG_NFP_NET_IPSEC=y # CONFIG_NFP_DEBUG is not set -# CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NVIDIA is not set CONFIG_NET_VENDOR_OKI=y # CONFIG_ETHOC is not set +# CONFIG_OA_TC6 is not set CONFIG_NET_VENDOR_PACKET_ENGINES=y # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set @@ -2562,6 +2831,8 @@ CONFIG_QEDE=m CONFIG_QED_ISCSI=y CONFIG_QED_FCOE=y CONFIG_QED_OOO=y +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set # CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_RDC is not set CONFIG_NET_VENDOR_REALTEK=y @@ -2572,16 +2843,26 @@ CONFIG_8139TOO=m CONFIG_8139TOO_8129=y # CONFIG_8139_OLD_RX_RESET is not set CONFIG_R8169=m +# CONFIG_RTASE is not set # CONFIG_NET_VENDOR_RENESAS is not set CONFIG_NET_VENDOR_ROCKER=y CONFIG_ROCKER=m # CONFIG_NET_VENDOR_SAMSUNG is not set # CONFIG_NET_VENDOR_SEEQ is not set -CONFIG_NET_VENDOR_SOLARFLARE=y -CONFIG_SFC=m -CONFIG_SFC_FALCON=y # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set +CONFIG_NET_VENDOR_SOLARFLARE=y +CONFIG_SFC=m +CONFIG_SFC_MTD=y +CONFIG_SFC_MCDI_MON=y +CONFIG_SFC_SRIOV=y +CONFIG_SFC_MCDI_LOGGING=y +CONFIG_SFC_FALCON=y +CONFIG_SFC_SIENA=m +CONFIG_SFC_SIENA_MTD=y +CONFIG_SFC_SIENA_MCDI_MON=y +CONFIG_SFC_SIENA_SRIOV=y +CONFIG_SFC_SIENA_MCDI_LOGGING=y # CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_SOCIONEXT is not set # CONFIG_NET_VENDOR_STMICRO is not set @@ -2589,15 +2870,18 @@ CONFIG_SFC_FALCON=y # CONFIG_NET_VENDOR_SYNOPSYS is not set # CONFIG_NET_VENDOR_TEHUTI is not set # CONFIG_NET_VENDOR_TI is not set +CONFIG_NET_VENDOR_VERTEXCOM=y +# CONFIG_MSE102X is not set # CONFIG_NET_VENDOR_VIA is not set +CONFIG_NET_VENDOR_WANGXUN=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_NET_SB1000 is not set CONFIG_PHYLIB=y CONFIG_SWPHY=y CONFIG_LED_TRIGGER_PHY=y @@ -2606,8 +2890,10 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set CONFIG_AMD_PHY=m # CONFIG_ADIN_PHY is not set +# CONFIG_ADIN1100_PHY is not set CONFIG_AQUANTIA_PHY=m # CONFIG_AX88796B_PHY is not set CONFIG_BROADCOM_PHY=m @@ -2616,6 +2902,7 @@ CONFIG_BCM7XXX_PHY=m # CONFIG_BCM84881_PHY is not set # CONFIG_BCM87XX_PHY is not set CONFIG_BCM_NET_PHYLIB=m +CONFIG_BCM_NET_PHYPTP=m # CONFIG_CICADA_PHY is not set CONFIG_CORTINA_PHY=m # CONFIG_DAVICOM_PHY is not set @@ -2625,12 +2912,23 @@ CONFIG_INTEL_XWAY_PHY=m # CONFIG_LSI_ET1011C_PHY is not set CONFIG_MARVELL_PHY=m CONFIG_MARVELL_10G_PHY=m +# CONFIG_MARVELL_88Q2XXX_PHY is not set +# CONFIG_MARVELL_88X2222_PHY is not set +# CONFIG_MAXLINEAR_GPHY is not set +# CONFIG_MEDIATEK_GE_PHY is not set # CONFIG_MICREL_PHY is not set +# CONFIG_MICROCHIP_T1S_PHY is not set CONFIG_MICROCHIP_PHY=m CONFIG_MICROCHIP_T1_PHY=m CONFIG_MICROSEMI_PHY=m +# CONFIG_MOTORCOMM_PHY is not set # CONFIG_NATIONAL_PHY is not set +# CONFIG_NXP_CBTX_PHY is not set +# CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set +# CONFIG_NCN26000_PHY is not set +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y CONFIG_RENESAS_PHY=m @@ -2643,11 +2941,69 @@ CONFIG_DP83822_PHY=m CONFIG_DP83848_PHY=m # CONFIG_DP83867_PHY is not set # CONFIG_DP83869_PHY is not set +# CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set # CONFIG_VITESSE_PHY is not set CONFIG_XILINX_GMII2RGMII=m CONFIG_MICREL_KS8995MA=m +CONFIG_CAN_DEV=m +CONFIG_CAN_VCAN=m +# CONFIG_CAN_VXCAN is not set +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +# CONFIG_CAN_CAN327 is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +CONFIG_CAN_SLCAN=m +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +CONFIG_CAN_C_CAN_PCI=m +CONFIG_CAN_CC770=m +# CONFIG_CAN_CC770_ISA is not set +CONFIG_CAN_CC770_PLATFORM=m +# CONFIG_CAN_CTUCANFD_PCI is not set +# CONFIG_CAN_ESD_402_PCI is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +CONFIG_CAN_SJA1000=m +CONFIG_CAN_EMS_PCI=m +# CONFIG_CAN_F81601 is not set +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_PEAK_PCI=m +CONFIG_CAN_PEAK_PCIEC=y +CONFIG_CAN_PLX_PCI=m +# CONFIG_CAN_SJA1000_ISA is not set +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_SOFTING=m + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +# CONFIG_CAN_MCP251XFD is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB=m +# CONFIG_CAN_ETAS_ES58X is not set +# CONFIG_CAN_F81604 is not set +# CONFIG_CAN_GS_USB is not set +CONFIG_CAN_KVASER_USB=m +# CONFIG_CAN_MCBA_USB is not set +CONFIG_CAN_PEAK_USB=m +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y +CONFIG_FWNODE_MDIO=y +CONFIG_ACPI_MDIO=y CONFIG_MDIO_DEVRES=y # CONFIG_MDIO_BITBANG is not set CONFIG_MDIO_BCM_UNIMAC=m @@ -2673,6 +3029,11 @@ CONFIG_PPP_FILTER=y CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=m CONFIG_PPPOE=m +# CONFIG_PPPOE_HASH_BITS_1 is not set +# CONFIG_PPPOE_HASH_BITS_2 is not set +CONFIG_PPPOE_HASH_BITS_4=y +# CONFIG_PPPOE_HASH_BITS_8 is not set +CONFIG_PPPOE_HASH_BITS=4 CONFIG_PPTP=m CONFIG_PPPOL2TP=m CONFIG_PPP_ASYNC=m @@ -2699,23 +3060,20 @@ CONFIG_WLAN_VENDOR_ATH=y # CONFIG_ATH5K_PCI is not set # CONFIG_WLAN_VENDOR_ATMEL is not set CONFIG_WLAN_VENDOR_BROADCOM=y -# CONFIG_WLAN_VENDOR_CISCO is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_WLAN_VENDOR_INTERSIL is not set CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_WLAN_VENDOR_MICROCHIP=y +CONFIG_WLAN_VENDOR_PURELIFI=y CONFIG_WLAN_VENDOR_RALINK=y CONFIG_WLAN_VENDOR_REALTEK=y # CONFIG_WLAN_VENDOR_RSI is not set +CONFIG_WLAN_VENDOR_SILABS=y # CONFIG_WLAN_VENDOR_ST is not set # CONFIG_WLAN_VENDOR_TI is not set # CONFIG_WLAN_VENDOR_ZYDAS is not set CONFIG_WLAN_VENDOR_QUANTENNA=y - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# # CONFIG_WAN is not set CONFIG_IEEE802154_DRIVERS=m CONFIG_IEEE802154_FAKELB=m @@ -2727,13 +3085,23 @@ CONFIG_IEEE802154_FAKELB=m # CONFIG_IEEE802154_CA8210 is not set # CONFIG_IEEE802154_MCR20A is not set # CONFIG_IEEE802154_HWSIM is not set + +# +# Wireless WAN +# +CONFIG_WWAN=m +CONFIG_WWAN_DEBUGFS=y +# CONFIG_WWAN_HWSIM is not set +CONFIG_IOSM=m +# CONFIG_MTK_T7XX is not set +# end of Wireless WAN + CONFIG_VMXNET3=m CONFIG_FUJITSU_ES=m CONFIG_HYPERV_NET=m CONFIG_NETDEVSIM=m CONFIG_NET_FAILOVER=m # CONFIG_ISDN is not set -# CONFIG_NVM is not set # # Input device support @@ -2741,9 +3109,9 @@ CONFIG_NET_FAILOVER=m CONFIG_INPUT=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=m -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set +CONFIG_INPUT_SPARSEKMAP=m # CONFIG_INPUT_MATRIXKMAP is not set +CONFIG_INPUT_VIVALDIFMAP=y # # Userland interfaces @@ -2778,7 +3146,6 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_LM8323 is not set # CONFIG_KEYBOARD_LM8333 is not set # CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set @@ -2787,6 +3154,7 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_TM2_TOUCHKEY is not set # CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_CYPRESS_SF is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y @@ -2839,9 +3207,12 @@ CONFIG_INPUT_MISC=y # CONFIG_INPUT_PWM_BEEPER is not set # CONFIG_INPUT_PWM_VIBRA is not set CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +# CONFIG_INPUT_DA7280_HAPTICS is not set # CONFIG_INPUT_ADXL34X is not set # CONFIG_INPUT_IMS_PCU is not set # CONFIG_INPUT_IQS269A is not set +# CONFIG_INPUT_IQS626A is not set +# CONFIG_INPUT_IQS7222 is not set # CONFIG_INPUT_CMA3000 is not set # CONFIG_INPUT_IDEAPAD_SLIDEBAR is not set # CONFIG_INPUT_DRV260X_HAPTICS is not set @@ -2890,10 +3261,10 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set +CONFIG_LEGACY_TIOCSTI=y CONFIG_LDISC_AUTOLOAD=y # @@ -2907,12 +3278,14 @@ CONFIG_SERIAL_8250_PNP=y # CONFIG_SERIAL_8250_FINTEK is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y +CONFIG_SERIAL_8250_PCILIB=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_PCI1XXXX is not set CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set CONFIG_SERIAL_8250_RSA=y @@ -2921,6 +3294,7 @@ CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_RT288X is not set CONFIG_SERIAL_8250_LPSS=y CONFIG_SERIAL_8250_MID=y +CONFIG_SERIAL_8250_PERICOM=y # # Non-8250 serial port support @@ -2936,7 +3310,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_SC16IS7XX is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_IFX6X60 is not set # CONFIG_SERIAL_ARC is not set # CONFIG_SERIAL_RP2 is not set # CONFIG_SERIAL_FSL_LPUART is not set @@ -2946,20 +3319,12 @@ CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_NONSTANDARD=y -# CONFIG_ROCKETPORT is not set -CONFIG_CYCLADES=m -# CONFIG_CYZ_INTR is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set -CONFIG_SYNCLINK=m -CONFIG_SYNCLINKMP=m -CONFIG_SYNCLINK_GT=m -# CONFIG_ISI is not set CONFIG_N_HDLC=m # CONFIG_N_GSM is not set # CONFIG_NOZOMI is not set # CONFIG_NULL_TTY is not set -# CONFIG_TRACE_SINK is not set CONFIG_HVC_DRIVER=y # CONFIG_SERIAL_DEV_BUS is not set CONFIG_VIRTIO_CONSOLE=m @@ -2984,44 +3349,41 @@ CONFIG_HW_RANDOM_VIRTIO=y # CONFIG_APPLICOM is not set # CONFIG_MWAVE is not set CONFIG_DEVMEM=y -# CONFIG_DEVKMEM is not set CONFIG_NVRAM=y -CONFIG_RAW_DRIVER=y -CONFIG_MAX_RAW_DEVS=8192 CONFIG_DEVPORT=y CONFIG_HPET=y CONFIG_HPET_MMAP=y # CONFIG_HPET_MMAP_DEFAULT is not set # CONFIG_HANGCHECK_TIMER is not set -CONFIG_TCG_TPM=m +CONFIG_TCG_TPM=y +CONFIG_TCG_TPM2_HMAC=y CONFIG_HW_RANDOM_TPM=y -CONFIG_TCG_TIS_CORE=m -CONFIG_TCG_TIS=m +CONFIG_TCG_TIS_CORE=y +CONFIG_TCG_TIS=y # CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C is not set +CONFIG_TCG_TIS_I2C_CR50=m CONFIG_TCG_TIS_I2C_ATMEL=m CONFIG_TCG_TIS_I2C_INFINEON=m CONFIG_TCG_TIS_I2C_NUVOTON=m CONFIG_TCG_NSC=m CONFIG_TCG_ATMEL=m CONFIG_TCG_INFINEON=m -CONFIG_TCG_CRB=m +CONFIG_TCG_CRB=y # CONFIG_TCG_VTPM_PROXY is not set # CONFIG_TCG_TIS_ST33ZP24_I2C is not set # CONFIG_TCG_TIS_ST33ZP24_SPI is not set # CONFIG_TELCLOCK is not set # CONFIG_XILLYBUS is not set +# CONFIG_XILLYUSB is not set # end of Character devices -# CONFIG_RANDOM_TRUST_CPU is not set -# CONFIG_RANDOM_TRUST_BOOTLOADER is not set - # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=m CONFIG_I2C_MUX=m @@ -3038,7 +3400,7 @@ CONFIG_I2C_MUX_MLXCPLD=m CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=m -CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_ALGOBIT=y # # I2C Hardware Bus support @@ -3064,6 +3426,7 @@ CONFIG_I2C_ISMT=m # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_ZHAOXIN is not set # # ACPI drivers @@ -3077,6 +3440,7 @@ CONFIG_I2C_SCMI=m CONFIG_I2C_DESIGNWARE_CORE=m # CONFIG_I2C_DESIGNWARE_SLAVE is not set CONFIG_I2C_DESIGNWARE_PLATFORM=m +# CONFIG_I2C_DESIGNWARE_AMDPSP is not set CONFIG_I2C_DESIGNWARE_BAYTRAIL=y # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EMEV2 is not set @@ -3090,6 +3454,8 @@ CONFIG_I2C_DESIGNWARE_BAYTRAIL=y # External I2C/SMBus adapter drivers # # CONFIG_I2C_DIOLAN_U2C is not set +# CONFIG_I2C_CP2615 is not set +# CONFIG_I2C_PCI1XXXX is not set # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set CONFIG_I2C_TINY_USB=m @@ -3098,6 +3464,7 @@ CONFIG_I2C_TINY_USB=m # Other I2C/SMBus bus drivers # CONFIG_I2C_MLXCPLD=m +# CONFIG_I2C_VIRTIO is not set # end of I2C Hardware Bus support CONFIG_I2C_STUB=m @@ -3120,19 +3487,20 @@ CONFIG_SPI_MASTER=y # CONFIG_SPI_AXI_SPI_ENGINE is not set CONFIG_SPI_BITBANG=m # CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_CH341 is not set # CONFIG_SPI_DESIGNWARE is not set -# CONFIG_SPI_NXP_FLEXSPI is not set # CONFIG_SPI_GPIO is not set +# CONFIG_SPI_MICROCHIP_CORE is not set +# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set # CONFIG_SPI_LANTIQ_SSC is not set # CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PCI1XXXX is not set # CONFIG_SPI_PXA2XX is not set -# CONFIG_SPI_ROCKCHIP is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_MXIC is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set # CONFIG_SPI_AMD is not set # @@ -3168,12 +3536,16 @@ CONFIG_PPS=y # PTP clock support # CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_DP83640_PHY=y # CONFIG_PTP_1588_CLOCK_INES is not set CONFIG_PTP_1588_CLOCK_KVM=y # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set +# CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_VMW is not set +CONFIG_PTP_1588_CLOCK_OCP=m # end of PTP clock support CONFIG_PINCTRL=y @@ -3181,24 +3553,36 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set -CONFIG_PINCTRL_AMD=m +# CONFIG_PINCTRL_AMD is not set +# CONFIG_PINCTRL_CY8C95X0 is not set # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SX150X is not set + +# +# Intel pinctrl drivers +# CONFIG_PINCTRL_BAYTRAIL=y # CONFIG_PINCTRL_CHERRYVIEW is not set # CONFIG_PINCTRL_LYNXPOINT is not set CONFIG_PINCTRL_INTEL=y +# CONFIG_PINCTRL_INTEL_PLATFORM is not set +CONFIG_PINCTRL_ALDERLAKE=m CONFIG_PINCTRL_BROXTON=m CONFIG_PINCTRL_CANNONLAKE=m CONFIG_PINCTRL_CEDARFORK=m CONFIG_PINCTRL_DENVERTON=m +CONFIG_PINCTRL_ELKHARTLAKE=m # CONFIG_PINCTRL_EMMITSBURG is not set CONFIG_PINCTRL_GEMINILAKE=m CONFIG_PINCTRL_ICELAKE=m # CONFIG_PINCTRL_JASPERLAKE is not set +CONFIG_PINCTRL_LAKEFIELD=m CONFIG_PINCTRL_LEWISBURG=m +# CONFIG_PINCTRL_METEORLAKE is not set +# CONFIG_PINCTRL_METEORPOINT is not set CONFIG_PINCTRL_SUNRISEPOINT=m # CONFIG_PINCTRL_TIGERLAKE is not set +# end of Intel pinctrl drivers # # Renesas pinctrl drivers @@ -3210,7 +3594,6 @@ CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y CONFIG_GPIO_CDEV=y CONFIG_GPIO_CDEV_V1=y CONFIG_GPIO_GENERIC=m @@ -3222,16 +3605,16 @@ CONFIG_GPIO_AMDPT=m # CONFIG_GPIO_DWAPB is not set # CONFIG_GPIO_EXAR is not set # CONFIG_GPIO_GENERIC_PLATFORM is not set +# CONFIG_GPIO_GRANITERAPIDS is not set CONFIG_GPIO_ICH=m # CONFIG_GPIO_MB86S7X is not set -# CONFIG_GPIO_VX855 is not set -# CONFIG_GPIO_XILINX is not set # CONFIG_GPIO_AMD_FCH is not set # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # +# CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_F7188X is not set # CONFIG_GPIO_IT87 is not set # CONFIG_GPIO_SCH is not set @@ -3243,7 +3626,8 @@ CONFIG_GPIO_ICH=m # # I2C GPIO expanders # -# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_FXL6408 is not set +# CONFIG_GPIO_DS4520 is not set # CONFIG_GPIO_MAX7300 is not set # CONFIG_GPIO_MAX732X is not set # CONFIG_GPIO_PCA953X is not set @@ -3255,6 +3639,7 @@ CONFIG_GPIO_ICH=m # # MFD GPIO expanders # +# CONFIG_GPIO_ELKHARTLAKE is not set # end of MFD GPIO expanders # @@ -3283,43 +3668,65 @@ CONFIG_GPIO_ICH=m # # end of USB GPIO expanders +# +# Virtual GPIO drivers +# # CONFIG_GPIO_AGGREGATOR is not set +# CONFIG_GPIO_LATCH is not set # CONFIG_GPIO_MOCKUP is not set +# CONFIG_GPIO_VIRTIO is not set +# CONFIG_GPIO_SIM is not set +# end of Virtual GPIO drivers + +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y # CONFIG_POWER_RESET_RESTART is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y -# CONFIG_PDA_POWER is not set # CONFIG_GENERIC_ADC_BATTERY is not set +# CONFIG_IP5XXX_POWER is not set # CONFIG_TEST_POWER is not set # CONFIG_CHARGER_ADP5061 is not set # CONFIG_BATTERY_CW2015 is not set # CONFIG_BATTERY_DS2780 is not set # CONFIG_BATTERY_DS2781 is not set # CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_SAMSUNG_SDI is not set # CONFIG_BATTERY_SBS is not set # CONFIG_CHARGER_SBS is not set # CONFIG_MANAGER_SBS is not set # CONFIG_BATTERY_BQ27XXX is not set # CONFIG_BATTERY_MAX17040 is not set # CONFIG_BATTERY_MAX17042 is not set +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_LT3651 is not set +# CONFIG_CHARGER_LTC4162L is not set +# CONFIG_CHARGER_MAX77976 is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24257 is not set # CONFIG_CHARGER_BQ24735 is not set # CONFIG_CHARGER_BQ2515X is not set # CONFIG_CHARGER_BQ25890 is not set # CONFIG_CHARGER_BQ25980 is not set -# CONFIG_CHARGER_SMB347 is not set +# CONFIG_CHARGER_BQ256XX is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_BATTERY_GOLDFISH is not set # CONFIG_BATTERY_RT5033 is not set # CONFIG_CHARGER_RT9455 is not set # CONFIG_CHARGER_BD99954 is not set +# CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -3331,7 +3738,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -3344,33 +3750,39 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADT7462 is not set # CONFIG_SENSORS_ADT7470 is not set # CONFIG_SENSORS_ADT7475 is not set +# CONFIG_SENSORS_AHT10 is not set +CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set # CONFIG_SENSORS_K8TEMP is not set # CONFIG_SENSORS_K10TEMP is not set # CONFIG_SENSORS_FAM15H_POWER is not set -# CONFIG_SENSORS_AMD_ENERGY is not set # CONFIG_SENSORS_APPLESMC is not set # CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set +CONFIG_SENSORS_CORSAIR_PSU=m # CONFIG_SENSORS_DRIVETEMP is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set CONFIG_SENSORS_DELL_SMM=m +# CONFIG_I8K is not set # CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FSCHMD is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set # CONFIG_SENSORS_G762 is not set # CONFIG_SENSORS_HIH6130 is not set +# CONFIG_SENSORS_HS3001 is not set # CONFIG_SENSORS_IBMAEM is not set # CONFIG_SENSORS_IBMPEX is not set # CONFIG_SENSORS_IIO_HWMON is not set @@ -3378,34 +3790,44 @@ CONFIG_SENSORS_I5500=m CONFIG_SENSORS_CORETEMP=m # CONFIG_SENSORS_IT87 is not set CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LENOVO_EC is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set +# CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set # CONFIG_SENSORS_LTC4222 is not set # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_MAX1668 is not set # CONFIG_SENSORS_MAX197 is not set # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX31760 is not set +# CONFIG_MAX31827 is not set +# CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set +# CONFIG_SENSORS_MC34VR500 is not set # CONFIG_SENSORS_MCP3021 is not set # CONFIG_SENSORS_MLXREG_FAN is not set # CONFIG_SENSORS_TC654 is not set +# CONFIG_SENSORS_TPS23861 is not set # CONFIG_SENSORS_MR75203 is not set # CONFIG_SENSORS_ADCXX is not set # CONFIG_SENSORS_LM63 is not set @@ -3429,24 +3851,40 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT6775_I2C is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set +# CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set +# CONFIG_SENSORS_NZXT_SMART2 is not set +# CONFIG_SENSORS_OCC_P8_I2C is not set +# CONFIG_SENSORS_OXP is not set # CONFIG_SENSORS_PCF8591 is not set CONFIG_PMBUS=m # CONFIG_SENSORS_PMBUS is not set +# CONFIG_SENSORS_ACBEL_FSG032 is not set # CONFIG_SENSORS_ADM1266 is not set # CONFIG_SENSORS_ADM1275 is not set +# CONFIG_SENSORS_ADP1050 is not set # CONFIG_SENSORS_BEL_PFE is not set +# CONFIG_SENSORS_BPA_RS600 is not set +# CONFIG_SENSORS_DELTA_AHE50DC_FAN is not set +# CONFIG_SENSORS_FSP_3Y is not set # CONFIG_SENSORS_IBM_CFFPS is not set +# CONFIG_SENSORS_DPS920AB is not set # CONFIG_SENSORS_INSPUR_IPSPS is not set # CONFIG_SENSORS_IR35221 is not set +# CONFIG_SENSORS_IR36021 is not set # CONFIG_SENSORS_IR38064 is not set # CONFIG_SENSORS_IRPS5401 is not set # CONFIG_SENSORS_ISL68137 is not set # CONFIG_SENSORS_LM25066 is not set +# CONFIG_SENSORS_LT7182S is not set # CONFIG_SENSORS_LTC2978 is not set # CONFIG_SENSORS_LTC3815 is not set +# CONFIG_SENSORS_LTC4286 is not set +# CONFIG_SENSORS_MAX15301 is not set # CONFIG_SENSORS_MAX16064 is not set # CONFIG_SENSORS_MAX16601 is not set # CONFIG_SENSORS_MAX20730 is not set @@ -3454,22 +3892,47 @@ CONFIG_PMBUS=m # CONFIG_SENSORS_MAX31785 is not set # CONFIG_SENSORS_MAX34440 is not set # CONFIG_SENSORS_MAX8688 is not set +# CONFIG_SENSORS_MP2856 is not set +# CONFIG_SENSORS_MP2888 is not set +# CONFIG_SENSORS_MP2891 is not set # CONFIG_SENSORS_MP2975 is not set +# CONFIG_SENSORS_MP2993 is not set +# CONFIG_SENSORS_MP5023 is not set +# CONFIG_SENSORS_MP5920 is not set +# CONFIG_SENSORS_MP5990 is not set +# CONFIG_SENSORS_MP9941 is not set +# CONFIG_SENSORS_MPQ7932 is not set +# CONFIG_SENSORS_MPQ8785 is not set +# CONFIG_SENSORS_PIM4328 is not set +# CONFIG_SENSORS_PLI1209BC is not set +# CONFIG_SENSORS_PM6764TR is not set # CONFIG_SENSORS_PXE1610 is not set +# CONFIG_SENSORS_Q54SJ108A2 is not set +# CONFIG_SENSORS_STPDDC60 is not set +# CONFIG_SENSORS_TDA38640 is not set # CONFIG_SENSORS_TPS40422 is not set # CONFIG_SENSORS_TPS53679 is not set +# CONFIG_SENSORS_TPS546D24 is not set # CONFIG_SENSORS_UCD9000 is not set # CONFIG_SENSORS_UCD9200 is not set +# CONFIG_SENSORS_XDP710 is not set +# CONFIG_SENSORS_XDPE152 is not set # CONFIG_SENSORS_XDPE122 is not set # CONFIG_SENSORS_ZL6100 is not set +# CONFIG_SENSORS_PT5161L is not set +# CONFIG_SENSORS_PWM_FAN is not set +# CONFIG_SENSORS_SBTSI is not set +# CONFIG_SENSORS_SBRMI is not set CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_SHT21 is not set # CONFIG_SENSORS_SHT3x is not set +CONFIG_SENSORS_SHT4x=m # CONFIG_SENSORS_SHTC1 is not set # CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC2305 is not set # CONFIG_SENSORS_EMC6W201 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set @@ -3477,14 +3940,15 @@ CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_SCH5627 is not set # CONFIG_SENSORS_SCH5636 is not set # CONFIG_SENSORS_STTS751 is not set -# CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_ADC128D818 is not set # CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_ADS7871 is not set # CONFIG_SENSORS_AMC6821 is not set # CONFIG_SENSORS_INA209 is not set # CONFIG_SENSORS_INA2XX is not set +# CONFIG_SENSORS_INA238 is not set # CONFIG_SENSORS_INA3221 is not set +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -3492,6 +3956,7 @@ CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_TMP108 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_TMP464 is not set # CONFIG_SENSORS_TMP513 is not set # CONFIG_SENSORS_VIA_CPUTEMP is not set # CONFIG_SENSORS_VIA686A is not set @@ -3514,12 +3979,16 @@ CONFIG_SENSORS_SHT15=m # CONFIG_SENSORS_ACPI_POWER=m # CONFIG_SENSORS_ATK0110 is not set +CONFIG_SENSORS_ASUS_WMI=m +CONFIG_SENSORS_ASUS_EC=m +# CONFIG_SENSORS_HP_WMI is not set CONFIG_THERMAL=y -# CONFIG_THERMAL_NETLINK is not set +CONFIG_THERMAL_NETLINK=y # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set +# CONFIG_THERMAL_CORE_TESTING is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -3533,6 +4002,8 @@ CONFIG_THERMAL_GOV_USER_SPACE=y # Intel thermal drivers # CONFIG_INTEL_POWERCLAMP=m +CONFIG_X86_THERMAL_VECTOR=y +CONFIG_INTEL_TCC=y CONFIG_X86_PKG_TEMP_THERMAL=m CONFIG_INTEL_SOC_DTS_IOSF_CORE=m # CONFIG_INTEL_SOC_DTS_THERMAL is not set @@ -3543,9 +4014,12 @@ CONFIG_INTEL_SOC_DTS_IOSF_CORE=m CONFIG_INT340X_THERMAL=m CONFIG_ACPI_THERMAL_REL=m # CONFIG_INT3406_THERMAL is not set +CONFIG_PROC_THERMAL_MMIO_RAPL=m # end of ACPI INT340X thermal drivers CONFIG_INTEL_PCH_THERMAL=m +# CONFIG_INTEL_TCC_COOLING is not set +CONFIG_INTEL_HFI_THERMAL=y # end of Intel thermal drivers # CONFIG_GENERIC_ADC_THERMAL is not set @@ -3555,6 +4029,7 @@ CONFIG_WATCHDOG_CORE=y CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_SYSFS=y +CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT=y # # Watchdog Pretimeout Governors @@ -3565,6 +4040,7 @@ CONFIG_WATCHDOG_SYSFS=y # Watchdog Device Drivers # CONFIG_SOFT_WATCHDOG=y +# CONFIG_LENOVO_SE10_WDT is not set CONFIG_WDAT_WDT=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_ZIIRAVE_WATCHDOG is not set @@ -3574,9 +4050,11 @@ CONFIG_WDAT_WDT=m # CONFIG_MAX63XX_WATCHDOG is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set +# CONFIG_ADVANTECH_EC_WDT is not set # CONFIG_ALIM1535_WDT is not set # CONFIG_ALIM7101_WDT is not set # CONFIG_EBC_C384_WDT is not set +# CONFIG_EXAR_WDT is not set # CONFIG_F71808E_WDT is not set # CONFIG_SP5100_TCO is not set # CONFIG_SBC_FITPC2_WATCHDOG is not set @@ -3609,6 +4087,7 @@ CONFIG_HPWDT_NMI_DECODING=y CONFIG_INTEL_MEI_WDT=m # CONFIG_NI903X_WDT is not set # CONFIG_NIC7018_WDT is not set +CONFIG_SIEMENS_SIMATIC_IPC_WDT=m # CONFIG_MEN_A21_WDT is not set # @@ -3631,11 +4110,13 @@ CONFIG_BCMA_POSSIBLE=y # CONFIG_MFD_CORE=y # CONFIG_MFD_AS3711 is not set +# CONFIG_MFD_SMPRO is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set # CONFIG_MFD_BCM590XX is not set # CONFIG_MFD_BD9571MWV is not set # CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_CS42L43_I2C is not set # CONFIG_MFD_MADERA is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_DA9052_SPI is not set @@ -3648,12 +4129,9 @@ CONFIG_MFD_CORE=y # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set # CONFIG_MFD_MP2629 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set CONFIG_LPC_ICH=m CONFIG_LPC_SCH=m -# CONFIG_INTEL_SOC_PMIC_CHTDC_TI is not set CONFIG_MFD_INTEL_LPSS=y CONFIG_MFD_INTEL_LPSS_ACPI=y CONFIG_MFD_INTEL_LPSS_PCI=y @@ -3665,6 +4143,7 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_MAX14577 is not set +# CONFIG_MFD_MAX77541 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77843 is not set # CONFIG_MFD_MAX8907 is not set @@ -3672,22 +4151,24 @@ CONFIG_MFD_INTEL_LPSS_PCI=y # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6360 is not set +# CONFIG_MFD_MT6370 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set +# CONFIG_MFD_OCELOT is not set # CONFIG_EZX_PCAP is not set # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RT5120 is not set # CONFIG_MFD_RC5T583 is not set -# CONFIG_MFD_SEC_CORE is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set -# CONFIG_ABX500_CORE is not set CONFIG_MFD_SYSCON=y -# CONFIG_MFD_TI_AM335X_TSCADC is not set # CONFIG_MFD_LP3943 is not set # CONFIG_MFD_LP8788 is not set # CONFIG_MFD_TI_LMU is not set @@ -3702,7 +4183,8 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_TPS65912_SPI is not set -# CONFIG_MFD_TPS80031 is not set +# CONFIG_MFD_TPS6594_I2C is not set +# CONFIG_MFD_TPS6594_SPI is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_WL1273_CORE is not set @@ -3716,41 +4198,59 @@ CONFIG_MFD_SYSCON=y # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_INTEL_M10_BMC is not set +# CONFIG_MFD_ATC260X_I2C is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set +# CONFIG_MFD_INTEL_M10_BMC_SPI is not set # end of Multifunction device drivers # CONFIG_REGULATOR is not set # CONFIG_RC_CORE is not set CONFIG_CEC_CORE=m + +# +# CEC support +# CONFIG_MEDIA_CEC_SUPPORT=y # CONFIG_CEC_CH7322 is not set # CONFIG_CEC_GPIO is not set # CONFIG_CEC_SECO is not set CONFIG_USB_PULSE8_CEC=m CONFIG_USB_RAINSHADOW_CEC=m +# end of CEC support + # CONFIG_MEDIA_SUPPORT is not set # # Graphics support # +CONFIG_APERTURE_HELPERS=y +CONFIG_SCREEN_INFO=y +CONFIG_VIDEO=y +# CONFIG_AUXDISPLAY is not set # CONFIG_AGP is not set CONFIG_INTEL_GTT=m -CONFIG_VGA_ARB=y -CONFIG_VGA_ARB_MAX_GPUS=64 # CONFIG_VGA_SWITCHEROO is not set CONFIG_DRM=m CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_DP_AUX_CHARDEV=y -# CONFIG_DRM_DEBUG_SELFTEST is not set +# CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=m -CONFIG_DRM_KMS_FB_HELPER=y +# CONFIG_DRM_PANIC is not set CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -CONFIG_DRM_DP_CEC=y +CONFIG_DRM_DISPLAY_HELPER=m +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y CONFIG_DRM_TTM=m -CONFIG_DRM_TTM_DMA_PAGE_POOL=y -CONFIG_DRM_GEM_SHMEM_HELPER=y +CONFIG_DRM_EXEC=m +CONFIG_DRM_BUDDY=m +CONFIG_DRM_TTM_HELPER=m +CONFIG_DRM_GEM_SHMEM_HELPER=m +CONFIG_DRM_SUBALLOC_HELPER=m CONFIG_DRM_SCHED=m # @@ -3771,8 +4271,8 @@ CONFIG_DRM_SCHED=m CONFIG_DRM_AMDGPU=m # CONFIG_DRM_AMDGPU_SI is not set # CONFIG_DRM_AMDGPU_CIK is not set -# CONFIG_DRM_AMDGPU_USERPTR is not set -# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set +CONFIG_DRM_AMDGPU_USERPTR=y +# CONFIG_DRM_AMD_ISP is not set # # ACP (Audio CoProcessor) Configuration @@ -3784,10 +4284,8 @@ CONFIG_DRM_AMDGPU=m # Display Engine Configuration # CONFIG_DRM_AMD_DC=y -CONFIG_DRM_AMD_DC_DCN=y -# CONFIG_DRM_AMD_DC_DCN3_0 is not set -# CONFIG_DRM_AMD_DC_HDCP is not set -# CONFIG_DRM_AMD_DC_SI is not set +CONFIG_DRM_AMD_DC_FP=y +# CONFIG_DRM_AMD_SECURE_DISPLAY is not set # end of Display Engine Configuration CONFIG_HSA_AMD=y @@ -3797,15 +4295,18 @@ CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y -CONFIG_DRM_I915_GVT=y CONFIG_DRM_I915_GVT_KVMGT=m +CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 CONFIG_DRM_I915_FENCE_TIMEOUT=10000 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 +CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 +CONFIG_DRM_I915_GVT=y +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set CONFIG_DRM_VKMS=m # CONFIG_DRM_VMWGFX is not set @@ -3814,14 +4315,18 @@ CONFIG_DRM_VKMS=m # CONFIG_DRM_AST is not set # CONFIG_DRM_MGAG200 is not set # CONFIG_DRM_QXL is not set -# CONFIG_DRM_BOCHS is not set CONFIG_DRM_VIRTIO_GPU=m +CONFIG_DRM_VIRTIO_GPU_KMS=y CONFIG_DRM_PANEL=y # # Display Panels # +# CONFIG_DRM_PANEL_AUO_A030JTN01 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # end of Display Panels CONFIG_DRM_BRIDGE=y @@ -3834,9 +4339,13 @@ CONFIG_DRM_PANEL_BRIDGE=y # end of Display Interface Bridges # CONFIG_DRM_ETNAVIV is not set +# CONFIG_DRM_BOCHS is not set # CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_GM12U320 is not set +# CONFIG_DRM_PANEL_MIPI_DBI is not set +# CONFIG_DRM_SIMPLEDRM is not set # CONFIG_TINYDRM_HX8357D is not set +# CONFIG_TINYDRM_ILI9163 is not set # CONFIG_TINYDRM_ILI9225 is not set # CONFIG_TINYDRM_ILI9341 is not set # CONFIG_TINYDRM_ILI9486 is not set @@ -3845,32 +4354,15 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_TINYDRM_ST7586 is not set # CONFIG_TINYDRM_ST7735R is not set # CONFIG_DRM_VBOXVIDEO is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_GUD is not set +# CONFIG_DRM_SSD130X is not set +CONFIG_DRM_HYPERV=m CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # # Frame buffer Devices # -CONFIG_FB_CMDLINE=y -CONFIG_FB_NOTIFY=y CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB_BOOT_VESA_SUPPORT=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -CONFIG_FB_SYS_FILLRECT=m -CONFIG_FB_SYS_COPYAREA=m -CONFIG_FB_SYS_IMAGEBLIT=m -# CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=m -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_MODE_HELPERS is not set -CONFIG_FB_TILEBLITTING=y - -# -# Frame buffer hardware drivers -# # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set @@ -3888,7 +4380,6 @@ CONFIG_FB_EFI=y # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_I740 is not set -# CONFIG_FB_LE80578 is not set # CONFIG_FB_MATROX is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set @@ -3914,7 +4405,28 @@ CONFIG_FB_EFI=y # CONFIG_FB_MB862XX is not set CONFIG_FB_HYPERV=m # CONFIG_FB_SIMPLE is not set +# CONFIG_FB_SSD1307 is not set # CONFIG_FB_SM712 is not set +CONFIG_FB_CORE=y +CONFIG_FB_NOTIFY=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DEVICE=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYSMEM_FOPS=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_IOMEM_FOPS=y +CONFIG_FB_IOMEM_HELPERS=y +CONFIG_FB_IOMEM_HELPERS_DEFERRED=y +CONFIG_FB_SYSMEM_HELPERS=y +CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y +# CONFIG_FB_MODE_HELPERS is not set +CONFIG_FB_TILEBLITTING=y # end of Frame buffer Devices # @@ -3935,15 +4447,19 @@ CONFIG_LCD_CLASS_DEVICE=m # CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set +# CONFIG_BACKLIGHT_KTZ8866 is not set # CONFIG_BACKLIGHT_PWM is not set # CONFIG_BACKLIGHT_APPLE is not set # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_SAHARA is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set # CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -3960,6 +4476,7 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set # CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set @@ -3968,11 +4485,9 @@ CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y # CONFIG_LOGO is not set # end of Graphics support +# CONFIG_DRM_ACCEL is not set # CONFIG_SOUND is not set - -# -# HID support -# +CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_BATTERY_STRENGTH is not set # CONFIG_HIDRAW is not set @@ -4005,11 +4520,14 @@ CONFIG_HID_CYPRESS=m CONFIG_HID_ELAN=m # CONFIG_HID_ELECOM is not set CONFIG_HID_ELO=m +# CONFIG_HID_EVISION is not set CONFIG_HID_EZKEY=m CONFIG_HID_GEMBIRD=m CONFIG_HID_GFRM=m # CONFIG_HID_GLORIOUS is not set # CONFIG_HID_HOLTEK is not set +# CONFIG_HID_GOODIX_SPI is not set +# CONFIG_HID_GOOGLE_STADIA_FF is not set # CONFIG_HID_VIVALDI is not set CONFIG_HID_GT683R=m # CONFIG_HID_KEYTOUCH is not set @@ -4017,6 +4535,8 @@ CONFIG_HID_GT683R=m # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_VRC2 is not set +# CONFIG_HID_XIAOMI is not set # CONFIG_HID_GYRATION is not set # CONFIG_HID_ICADE is not set CONFIG_HID_ITE=m @@ -4026,6 +4546,7 @@ CONFIG_HID_KENSINGTON=m # CONFIG_HID_LCPOWER is not set CONFIG_HID_LED=m CONFIG_HID_LENOVO=m +# CONFIG_HID_LETSKETCH is not set CONFIG_HID_LOGITECH=m CONFIG_HID_LOGITECH_HIDPP=m # CONFIG_LOGITECH_FF is not set @@ -4035,10 +4556,13 @@ CONFIG_HID_LOGITECH_HIDPP=m # CONFIG_HID_MAGICMOUSE is not set # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MEGAWORLD_FF is not set # CONFIG_HID_REDRAGON is not set CONFIG_HID_MICROSOFT=m CONFIG_HID_MONTEREY=m CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NINTENDO=m +CONFIG_NINTENDO_FF=y CONFIG_HID_NTI=m # CONFIG_HID_NTRIG is not set # CONFIG_HID_ORTEK is not set @@ -4047,11 +4571,15 @@ CONFIG_HID_PENMOUNT=m # CONFIG_HID_PETALYNX is not set # CONFIG_HID_PICOLCD is not set CONFIG_HID_PLANTRONICS=m +# CONFIG_HID_PXRC is not set +# CONFIG_HID_RAZER is not set # CONFIG_HID_PRIMAX is not set # CONFIG_HID_RETRODE is not set # CONFIG_HID_ROCCAT is not set # CONFIG_HID_SAITEK is not set # CONFIG_HID_SAMSUNG is not set +CONFIG_HID_SEMITEK=m +# CONFIG_HID_SIGMAMICRO is not set # CONFIG_HID_SONY is not set # CONFIG_HID_SPEEDLINK is not set # CONFIG_HID_STEAM is not set @@ -4063,21 +4591,30 @@ CONFIG_HID_HYPERV_MOUSE=m # CONFIG_HID_SMARTJOYPLUS is not set # CONFIG_HID_TIVO is not set # CONFIG_HID_TOPSEED is not set +# CONFIG_HID_TOPRE is not set # CONFIG_HID_THINGM is not set # CONFIG_HID_THRUSTMASTER is not set # CONFIG_HID_UDRAW_PS3 is not set # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set CONFIG_HID_XINMO=m # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set CONFIG_HID_SENSOR_HUB=y CONFIG_HID_SENSOR_CUSTOM_SENSOR=m CONFIG_HID_ALPS=m +# CONFIG_HID_MCP2200 is not set # CONFIG_HID_MCP2221 is not set # end of Special HID drivers +# +# HID-BPF support +# +# CONFIG_HID_BPF is not set +# end of HID-BPF support + # # USB HID support # @@ -4086,11 +4623,10 @@ CONFIG_USB_HID=y # CONFIG_USB_HIDDEV is not set # end of USB HID support -# -# I2C HID support -# CONFIG_I2C_HID=m -# end of I2C HID support +CONFIG_I2C_HID_ACPI=m +CONFIG_I2C_HID_OF=m +CONFIG_I2C_HID_CORE=m # # Intel ISH HID support @@ -4098,7 +4634,12 @@ CONFIG_I2C_HID=m CONFIG_INTEL_ISH_HID=m # CONFIG_INTEL_ISH_FIRMWARE_DOWNLOADER is not set # end of Intel ISH HID support -# end of HID support + +# +# AMD SFH HID Support +# +CONFIG_AMD_SFH_HID=m +# end of AMD SFH HID Support CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y @@ -4109,6 +4650,7 @@ CONFIG_USB_LED_TRIG=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +CONFIG_USB_PCI_AMD=y # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # @@ -4121,6 +4663,7 @@ CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_OTG_PRODUCTLIST is not set CONFIG_USB_LEDS_TRIGGER_USBPORT=m CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -4140,7 +4683,6 @@ CONFIG_USB_EHCI_PCI=y # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set # CONFIG_USB_MAX3421_HCD is not set # CONFIG_USB_OHCI_HCD is not set CONFIG_USB_UHCI_HCD=y @@ -4186,7 +4728,11 @@ CONFIG_USB_UAS=m # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USBIP_CORE is not set -# CONFIG_USB_CDNS3 is not set + +# +# USB dual-mode controller drivers +# +# CONFIG_USB_CDNS_SUPPORT is not set # CONFIG_USB_MUSB_HDRC is not set # CONFIG_USB_DWC3 is not set # CONFIG_USB_DWC2 is not set @@ -4240,7 +4786,6 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_SERIAL_SYMBOL is not set # CONFIG_USB_SERIAL_TI is not set # CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OPTION is not set # CONFIG_USB_SERIAL_OMNINET is not set # CONFIG_USB_SERIAL_OPTICON is not set @@ -4249,6 +4794,7 @@ CONFIG_USB_SERIAL_PL2303=m # CONFIG_USB_SERIAL_SSU100 is not set # CONFIG_USB_SERIAL_QT2 is not set CONFIG_USB_SERIAL_UPD78F0730=m +CONFIG_USB_SERIAL_XR=m # CONFIG_USB_SERIAL_DEBUG is not set # @@ -4263,9 +4809,9 @@ CONFIG_USB_SERIAL_UPD78F0730=m # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_LJCA is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -4300,20 +4846,30 @@ CONFIG_TYPEC_FUSB302=m CONFIG_TYPEC_UCSI=y # CONFIG_UCSI_CCG is not set CONFIG_UCSI_ACPI=y -# CONFIG_TYPEC_HD3SS3220 is not set +# CONFIG_UCSI_STM32G0 is not set CONFIG_TYPEC_TPS6598X=m +# CONFIG_TYPEC_ANX7411 is not set +# CONFIG_TYPEC_RT1719 is not set +# CONFIG_TYPEC_HD3SS3220 is not set # CONFIG_TYPEC_STUSB160X is not set +# CONFIG_TYPEC_WUSB3801 is not set # # USB Type-C Multiplexer/DeMultiplexer Switch support # +# CONFIG_TYPEC_MUX_FSA4480 is not set +# CONFIG_TYPEC_MUX_GPIO_SBU is not set CONFIG_TYPEC_MUX_PI3USB30532=m +# CONFIG_TYPEC_MUX_IT5205 is not set +# CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # -CONFIG_TYPEC_DP_ALTMODE=y +CONFIG_TYPEC_DP_ALTMODE=m # CONFIG_TYPEC_NVIDIA_ALTMODE is not set # end of USB Type-C Alternate Mode drivers @@ -4351,6 +4907,7 @@ CONFIG_MMC_CQHCI=m # CONFIG_MMC_TOSHIBA_PCI is not set # CONFIG_MMC_MTK is not set # CONFIG_MMC_SDHCI_XENON is not set +# CONFIG_SCSI_UFSHCD is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -4362,6 +4919,7 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_APU is not set +# CONFIG_LEDS_AW200XX is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set # CONFIG_LEDS_LM3642 is not set @@ -4369,17 +4927,19 @@ CONFIG_LEDS_CLASS=y # CONFIG_LEDS_GPIO is not set # CONFIG_LEDS_LP3944 is not set # CONFIG_LEDS_LP3952 is not set -# CONFIG_LEDS_LP50XX is not set -# CONFIG_LEDS_CLEVO_MAIL is not set # CONFIG_LEDS_PCA955X is not set # CONFIG_LEDS_PCA963X is not set +# CONFIG_LEDS_PCA995X is not set # CONFIG_LEDS_DAC124S085 is not set # CONFIG_LEDS_PWM is not set +# CONFIG_LEDS_BD2606MVV is not set # CONFIG_LEDS_BD2802 is not set # CONFIG_LEDS_INTEL_SS4200 is not set +CONFIG_LEDS_LT3593=m # CONFIG_LEDS_TCA6507 is not set # CONFIG_LEDS_TLC591XX is not set # CONFIG_LEDS_LM355x is not set +# CONFIG_LEDS_IS31FL319X is not set # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) @@ -4389,7 +4949,15 @@ CONFIG_LEDS_MLXCPLD=m # CONFIG_LEDS_MLXREG is not set # CONFIG_LEDS_USER is not set # CONFIG_LEDS_NIC78BX is not set -# CONFIG_LEDS_TI_LMU_COMMON is not set +# CONFIG_LEDS_SPI_BYTE is not set + +# +# Flash and Torch LED drivers +# + +# +# RGB LED drivers +# # # LED Triggers @@ -4414,19 +4982,26 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=m # CONFIG_LEDS_TRIGGER_PANIC is not set # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -CONFIG_LEDS_TRIGGER_AUDIO=m +# CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set + +# +# Simple LED drivers +# +CONFIG_LEDS_SIEMENS_SIMATIC_IPC=m # CONFIG_ACCESSIBILITY is not set CONFIG_INFINIBAND=m # CONFIG_INFINIBAND_USER_MAD is not set # CONFIG_INFINIBAND_USER_ACCESS is not set # CONFIG_INFINIBAND_ADDR_TRANS is not set CONFIG_INFINIBAND_VIRT_DMA=y -# CONFIG_INFINIBAND_MTHCA is not set +CONFIG_INFINIBAND_IRDMA=m +# CONFIG_MANA_INFINIBAND is not set # CONFIG_MLX4_INFINIBAND is not set +# CONFIG_INFINIBAND_MTHCA is not set # CONFIG_INFINIBAND_OCRDMA is not set -# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set -# CONFIG_INFINIBAND_BNXT_RE is not set # CONFIG_INFINIBAND_QEDR is not set +# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set # CONFIG_INFINIBAND_RDMAVT is not set # CONFIG_RDMA_RXE is not set # CONFIG_RDMA_SIW is not set @@ -4465,6 +5040,7 @@ CONFIG_RTC_DRV_DS1374=m # CONFIG_RTC_DRV_DS1374_WDT is not set CONFIG_RTC_DRV_DS1672=m CONFIG_RTC_DRV_MAX6900=m +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_RS5C372=m CONFIG_RTC_DRV_ISL1208=m CONFIG_RTC_DRV_ISL12022=m @@ -4480,12 +5056,14 @@ CONFIG_RTC_DRV_BQ32K=m # CONFIG_RTC_DRV_S35390A is not set CONFIG_RTC_DRV_FM3130=m # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set CONFIG_RTC_DRV_RX8581=m CONFIG_RTC_DRV_RX8025=m CONFIG_RTC_DRV_EM3027=m # CONFIG_RTC_DRV_RV3028 is not set # CONFIG_RTC_DRV_RV3032 is not set # CONFIG_RTC_DRV_RV8803 is not set +# CONFIG_RTC_DRV_SD2405AL is not set # CONFIG_RTC_DRV_SD3078 is not set # @@ -4501,7 +5079,6 @@ CONFIG_RTC_DRV_EM3027=m # CONFIG_RTC_DRV_MAX6916 is not set # CONFIG_RTC_DRV_R9701 is not set CONFIG_RTC_DRV_RX4581=m -# CONFIG_RTC_DRV_RX6110 is not set # CONFIG_RTC_DRV_RS5C348 is not set # CONFIG_RTC_DRV_MAX6902 is not set # CONFIG_RTC_DRV_PCF2123 is not set @@ -4516,6 +5093,7 @@ CONFIG_RTC_DRV_DS3232_HWMON=y # CONFIG_RTC_DRV_PCF2127 is not set CONFIG_RTC_DRV_RV3029C2=m # CONFIG_RTC_DRV_RV3029_HWMON is not set +# CONFIG_RTC_DRV_RX6110 is not set # # Platform RTC drivers @@ -4532,9 +5110,7 @@ CONFIG_RTC_DRV_STK17TA8=m CONFIG_RTC_DRV_M48T35=m CONFIG_RTC_DRV_M48T59=m CONFIG_RTC_DRV_MSM6242=m -CONFIG_RTC_DRV_BQ4802=m CONFIG_RTC_DRV_RP5C01=m -CONFIG_RTC_DRV_V3020=m # # on-CPU RTC drivers @@ -4545,6 +5121,7 @@ CONFIG_RTC_DRV_V3020=m # HID Sensor RTC drivers # # CONFIG_RTC_DRV_HID_SENSOR_TIME is not set +# CONFIG_RTC_DRV_GOLDFISH is not set CONFIG_DMADEVICES=y # CONFIG_DMADEVICES_DEBUG is not set @@ -4556,20 +5133,26 @@ CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y # CONFIG_ALTERA_MSGDMA is not set CONFIG_INTEL_IDMA64=m +CONFIG_INTEL_IDXD_BUS=m CONFIG_INTEL_IDXD=m -CONFIG_INTEL_IDXD_PERFMON=y +# CONFIG_INTEL_IDXD_COMPAT is not set CONFIG_INTEL_IDXD_SVM=y +CONFIG_INTEL_IDXD_PERFMON=y CONFIG_INTEL_IOATDMA=m # CONFIG_PLX_DMA is not set +# CONFIG_XILINX_DMA is not set +# CONFIG_XILINX_XDMA is not set +# CONFIG_AMD_QDMA is not set +# CONFIG_AMD_PTDMA is not set # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y CONFIG_DW_DMAC=m CONFIG_DW_DMAC_PCI=y # CONFIG_DW_EDMA is not set -# CONFIG_DW_EDMA_PCIE is not set CONFIG_HSU_DMA=y # CONFIG_SF_PDMA is not set +# CONFIG_INTEL_LDMA is not set # # DMA Clients @@ -4585,12 +5168,13 @@ CONFIG_SYNC_FILE=y # CONFIG_SW_SYNC is not set # CONFIG_UDMABUF is not set # CONFIG_DMABUF_MOVE_NOTIFY is not set +# CONFIG_DMABUF_DEBUG is not set # CONFIG_DMABUF_SELFTESTS is not set # CONFIG_DMABUF_HEAPS is not set +# CONFIG_DMABUF_SYSFS_STATS is not set # end of DMABUF options CONFIG_DCA=m -# CONFIG_AUXDISPLAY is not set CONFIG_UIO=m # CONFIG_UIO_CIF is not set CONFIG_UIO_PDRV_GENIRQ=m @@ -4599,25 +5183,38 @@ CONFIG_UIO_PDRV_GENIRQ=m # CONFIG_UIO_SERCOS3 is not set CONFIG_UIO_PCI_GENERIC=m # CONFIG_UIO_NETX is not set -# CONFIG_UIO_PRUSS is not set # CONFIG_UIO_MF624 is not set CONFIG_UIO_HV_GENERIC=m -CONFIG_VFIO_IOMMU_TYPE1=m -CONFIG_VFIO_VIRQFD=m CONFIG_VFIO=m +CONFIG_VFIO_GROUP=y +CONFIG_VFIO_CONTAINER=y +CONFIG_VFIO_IOMMU_TYPE1=m CONFIG_VFIO_NOIOMMU=y -CONFIG_VFIO_PCI=m -# CONFIG_VFIO_PCI_VGA is not set +CONFIG_VFIO_VIRQFD=y +# CONFIG_VFIO_DEBUGFS is not set + +# +# VFIO support for PCI devices +# +CONFIG_VFIO_PCI_CORE=m CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y +CONFIG_VFIO_PCI=m +# CONFIG_VFIO_PCI_VGA is not set # CONFIG_VFIO_PCI_IGD is not set +# CONFIG_VIRTIO_VFIO_PCI is not set +# end of VFIO support for PCI devices + CONFIG_VFIO_MDEV=m -CONFIG_VFIO_MDEV_DEVICE=m -CONFIG_IRQ_BYPASS_MANAGER=m +CONFIG_IRQ_BYPASS_MANAGER=y # CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y +CONFIG_VIRTIO_PCI_LIB=y +CONFIG_VIRTIO_PCI_LIB_LEGACY=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_ADMIN_LEGACY=y CONFIG_VIRTIO_PCI_LEGACY=y # CONFIG_VIRTIO_PMEM is not set CONFIG_VIRTIO_BALLOON=m @@ -4625,8 +5222,10 @@ CONFIG_VIRTIO_INPUT=m CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set CONFIG_VIRTIO_DMA_SHARED_BUFFER=m +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_IOTLB=m +CONFIG_VHOST_TASK=y CONFIG_VHOST=m CONFIG_VHOST_MENU=y CONFIG_VHOST_NET=m @@ -4638,62 +5237,171 @@ CONFIG_VHOST_VSOCK=m # Microsoft Hyper-V guest support # CONFIG_HYPERV=m +# CONFIG_HYPERV_VTL_MODE is not set CONFIG_HYPERV_TIMER=y CONFIG_HYPERV_UTILS=m CONFIG_HYPERV_BALLOON=m # end of Microsoft Hyper-V guest support # CONFIG_GREYBUS is not set +CONFIG_COMEDI=m +# CONFIG_COMEDI_DEBUG is not set +CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 +CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 +CONFIG_COMEDI_MISC_DRIVERS=y +CONFIG_COMEDI_BOND=m +CONFIG_COMEDI_TEST=m +CONFIG_COMEDI_PARPORT=m +CONFIG_COMEDI_PCI_DRIVERS=m +CONFIG_COMEDI_8255_PCI=m +CONFIG_COMEDI_ADDI_WATCHDOG=m +CONFIG_COMEDI_ADDI_APCI_1032=m +CONFIG_COMEDI_ADDI_APCI_1500=m +CONFIG_COMEDI_ADDI_APCI_1516=m +CONFIG_COMEDI_ADDI_APCI_1564=m +CONFIG_COMEDI_ADDI_APCI_16XX=m +CONFIG_COMEDI_ADDI_APCI_2032=m +CONFIG_COMEDI_ADDI_APCI_2200=m +CONFIG_COMEDI_ADDI_APCI_3120=m +CONFIG_COMEDI_ADDI_APCI_3501=m +CONFIG_COMEDI_ADDI_APCI_3XXX=m +CONFIG_COMEDI_ADL_PCI6208=m +CONFIG_COMEDI_ADL_PCI7X3X=m +CONFIG_COMEDI_ADL_PCI8164=m +CONFIG_COMEDI_ADL_PCI9111=m +CONFIG_COMEDI_ADL_PCI9118=m +CONFIG_COMEDI_ADV_PCI1710=m +CONFIG_COMEDI_ADV_PCI1720=m +CONFIG_COMEDI_ADV_PCI1723=m +CONFIG_COMEDI_ADV_PCI1724=m +CONFIG_COMEDI_ADV_PCI1760=m +CONFIG_COMEDI_ADV_PCI_DIO=m +CONFIG_COMEDI_AMPLC_DIO200_PCI=m +CONFIG_COMEDI_AMPLC_PC236_PCI=m +CONFIG_COMEDI_AMPLC_PC263_PCI=m +CONFIG_COMEDI_AMPLC_PCI224=m +CONFIG_COMEDI_AMPLC_PCI230=m +CONFIG_COMEDI_CONTEC_PCI_DIO=m +CONFIG_COMEDI_DAS08_PCI=m +CONFIG_COMEDI_DT3000=m +CONFIG_COMEDI_DYNA_PCI10XX=m +CONFIG_COMEDI_GSC_HPDI=m +CONFIG_COMEDI_MF6X4=m +CONFIG_COMEDI_ICP_MULTI=m +CONFIG_COMEDI_DAQBOARD2000=m +CONFIG_COMEDI_JR3_PCI=m +CONFIG_COMEDI_KE_COUNTER=m +CONFIG_COMEDI_CB_PCIDAS64=m +CONFIG_COMEDI_CB_PCIDAS=m +CONFIG_COMEDI_CB_PCIDDA=m +CONFIG_COMEDI_CB_PCIMDAS=m +CONFIG_COMEDI_CB_PCIMDDA=m +CONFIG_COMEDI_ME4000=m +CONFIG_COMEDI_ME_DAQ=m +CONFIG_COMEDI_NI_6527=m +CONFIG_COMEDI_NI_65XX=m +CONFIG_COMEDI_NI_660X=m +CONFIG_COMEDI_NI_670X=m +CONFIG_COMEDI_NI_LABPC_PCI=m +CONFIG_COMEDI_NI_PCIDIO=m +CONFIG_COMEDI_NI_PCIMIO=m +CONFIG_COMEDI_RTD520=m +CONFIG_COMEDI_S626=m +CONFIG_COMEDI_MITE=m +CONFIG_COMEDI_NI_TIOCMD=m +CONFIG_COMEDI_USB_DRIVERS=m +CONFIG_COMEDI_DT9812=m +CONFIG_COMEDI_NI_USB6501=m +CONFIG_COMEDI_USBDUX=m +CONFIG_COMEDI_USBDUXFAST=m +CONFIG_COMEDI_USBDUXSIGMA=m +CONFIG_COMEDI_VMK80XX=m +CONFIG_COMEDI_8254=m +CONFIG_COMEDI_8255=m +CONFIG_COMEDI_8255_SA=m +CONFIG_COMEDI_KCOMEDILIB=m +CONFIG_COMEDI_AMPLC_DIO200=m +CONFIG_COMEDI_AMPLC_PC236=m +CONFIG_COMEDI_DAS08=m +CONFIG_COMEDI_NI_LABPC=m +CONFIG_COMEDI_NI_TIO=m +CONFIG_COMEDI_NI_ROUTING=m +# CONFIG_COMEDI_TESTS is not set # CONFIG_STAGING is not set +# CONFIG_GOLDFISH is not set +# CONFIG_CHROME_PLATFORMS is not set +CONFIG_MELLANOX_PLATFORM=y +CONFIG_MLXREG_HOTPLUG=m +# CONFIG_MLXREG_IO is not set +# CONFIG_MLXREG_LC is not set +# CONFIG_NVSW_SN2201 is not set +CONFIG_SURFACE_PLATFORMS=y +CONFIG_SURFACE3_WMI=m +# CONFIG_SURFACE_3_POWER_OPREGION is not set +CONFIG_SURFACE_GPE=m +CONFIG_SURFACE_HOTPLUG=m +# CONFIG_SURFACE_PRO3_BUTTON is not set CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_ACPI_WMI is not set +CONFIG_ACPI_WMI=m +CONFIG_WMI_BMOF=m +CONFIG_HUAWEI_WMI=m +# CONFIG_MXM_WMI is not set +CONFIG_NVIDIA_WMI_EC_BACKLIGHT=m +CONFIG_XIAOMI_WMI=m +CONFIG_GIGABYTE_WMI=m +# CONFIG_YOGABOOK is not set # CONFIG_ACERHDF is not set # CONFIG_ACER_WIRELESS is not set +CONFIG_ACER_WMI=m +CONFIG_AMD_PMC=m +CONFIG_AMD_MP2_STB=y +# CONFIG_AMD_HSMP is not set +# CONFIG_AMD_WBRF is not set +# CONFIG_ADV_SWBUTTON is not set # CONFIG_APPLE_GMUX is not set # CONFIG_ASUS_LAPTOP is not set # CONFIG_ASUS_WIRELESS is not set +CONFIG_ASUS_WMI=m +CONFIG_ASUS_NB_WMI=m +# CONFIG_ASUS_TF103C_DOCK is not set +# CONFIG_MERAKI_MX100 is not set # CONFIG_EEEPC_LAPTOP is not set +CONFIG_EEEPC_WMI=m +CONFIG_X86_PLATFORM_DRIVERS_DELL=y +CONFIG_ALIENWARE_WMI=m # CONFIG_DCDBAS is not set -CONFIG_DELL_SMBIOS=m CONFIG_DELL_LAPTOP=m -CONFIG_DELL_RBTN=m # CONFIG_DELL_RBU is not set +CONFIG_DELL_RBTN=m +CONFIG_DELL_PC=m +CONFIG_DELL_SMBIOS=m +CONFIG_DELL_SMBIOS_WMI=y CONFIG_DELL_SMO8800=m +CONFIG_DELL_WMI=m +# CONFIG_DELL_WMI_PRIVACY is not set +CONFIG_DELL_WMI_AIO=m +CONFIG_DELL_WMI_DESCRIPTOR=m +CONFIG_DELL_WMI_DDV=m +CONFIG_DELL_WMI_LED=m +CONFIG_DELL_WMI_SYSMAN=m # CONFIG_AMILO_RFKILL is not set # CONFIG_FUJITSU_LAPTOP is not set # CONFIG_FUJITSU_TABLET is not set # CONFIG_GPD_POCKET_FAN is not set -# CONFIG_HP_ACCEL is not set -# CONFIG_HP_WIRELESS is not set +# CONFIG_X86_PLATFORM_DRIVERS_HP is not set +# CONFIG_WIRELESS_HOTKEY is not set # CONFIG_IBM_RTL is not set # CONFIG_IDEAPAD_LAPTOP is not set # CONFIG_SENSORS_HDAPS is not set # CONFIG_THINKPAD_ACPI is not set +CONFIG_THINKPAD_LMI=m # CONFIG_INTEL_ATOMISP2_PM is not set -# CONFIG_INTEL_HID_EVENT is not set -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_MENLOW is not set -# CONFIG_INTEL_OAKTRAIL is not set -# CONFIG_INTEL_VBTN is not set -# CONFIG_SURFACE_3_POWER_OPREGION is not set -# CONFIG_SURFACE_PRO3_BUTTON is not set -# CONFIG_MSI_LAPTOP is not set -# CONFIG_PCENGINES_APU2 is not set -# CONFIG_SAMSUNG_LAPTOP is not set -# CONFIG_SAMSUNG_Q10 is not set -# CONFIG_TOSHIBA_BT_RFKILL is not set -# CONFIG_TOSHIBA_HAPS is not set -# CONFIG_ACPI_CMPC is not set -# CONFIG_COMPAL_LAPTOP is not set -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_SONY_LAPTOP is not set -# CONFIG_SYSTEM76_ACPI is not set -# CONFIG_TOPSTAR_LAPTOP is not set -# CONFIG_I2C_MULTI_INSTANTIATE is not set -CONFIG_MLX_PLATFORM=m -CONFIG_INTEL_IPS=m -CONFIG_INTEL_RST=m -# CONFIG_INTEL_SMARTCONNECT is not set +# CONFIG_INTEL_IFS is not set +# CONFIG_INTEL_SAR_INT1092 is not set +CONFIG_INTEL_PMC_CORE=m +CONFIG_INTEL_PMT_CLASS=m +CONFIG_INTEL_PMT_TELEMETRY=m +CONFIG_INTEL_PMT_CRASHLOG=m # # Intel Speed Select Technology interface support @@ -4701,21 +5409,68 @@ CONFIG_INTEL_RST=m # CONFIG_INTEL_SPEED_SELECT_INTERFACE is not set # end of Intel Speed Select Technology interface support -CONFIG_INTEL_TURBO_MAX_3=y +CONFIG_INTEL_WMI=y +# CONFIG_INTEL_WMI_SBL_FW_UPDATE is not set +CONFIG_INTEL_WMI_THUNDERBOLT=m + +# +# Intel Uncore Frequency Control +# CONFIG_INTEL_UNCORE_FREQ_CONTROL=m -CONFIG_INTEL_PMC_CORE=m +# end of Intel Uncore Frequency Control + +# CONFIG_INTEL_HID_EVENT is not set +# CONFIG_INTEL_VBTN is not set +# CONFIG_INTEL_INT0002_VGPIO is not set +# CONFIG_INTEL_OAKTRAIL is not set +# CONFIG_INTEL_ISHTP_ECLITE is not set # CONFIG_INTEL_PUNIT_IPC is not set +CONFIG_INTEL_RST=m +CONFIG_INTEL_SDSI=m +# CONFIG_INTEL_SMARTCONNECT is not set +# CONFIG_INTEL_TPMI is not set +CONFIG_INTEL_TURBO_MAX_3=y +CONFIG_INTEL_VSEC=m +# CONFIG_ACPI_QUICKSTART is not set +# CONFIG_MEEGOPAD_ANX7428 is not set +# CONFIG_MSI_EC is not set +# CONFIG_MSI_LAPTOP is not set +CONFIG_MSI_WMI=m +# CONFIG_MSI_WMI_PLATFORM is not set +# CONFIG_PCENGINES_APU2 is not set +# CONFIG_BARCO_P50_GPIO is not set +# CONFIG_SAMSUNG_LAPTOP is not set +# CONFIG_SAMSUNG_Q10 is not set +CONFIG_ACPI_TOSHIBA=m +# CONFIG_TOSHIBA_BT_RFKILL is not set +# CONFIG_TOSHIBA_HAPS is not set +CONFIG_TOSHIBA_WMI=m +# CONFIG_ACPI_CMPC is not set +# CONFIG_COMPAL_LAPTOP is not set +CONFIG_LG_LAPTOP=m +# CONFIG_PANASONIC_LAPTOP is not set +# CONFIG_SONY_LAPTOP is not set +# CONFIG_SYSTEM76_ACPI is not set +# CONFIG_TOPSTAR_LAPTOP is not set +CONFIG_SERIAL_MULTI_INSTANTIATE=m +CONFIG_MLX_PLATFORM=m +# CONFIG_INSPUR_PLATFORM_PROFILE is not set +# CONFIG_LENOVO_WMI_CAMERA is not set +CONFIG_FW_ATTR_CLASS=m +CONFIG_INTEL_IPS=m # CONFIG_INTEL_SCU_PCI is not set # CONFIG_INTEL_SCU_PLATFORM is not set -CONFIG_PMC_ATOM=y -# CONFIG_CHROME_PLATFORMS is not set -CONFIG_MELLANOX_PLATFORM=y -CONFIG_MLXREG_HOTPLUG=m -# CONFIG_MLXREG_IO is not set +CONFIG_SIEMENS_SIMATIC_IPC=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_APOLLOLAKE=m +CONFIG_SIEMENS_SIMATIC_IPC_BATT_ELKHARTLAKE=m +# CONFIG_WINMATE_FM07_KEYS is not set +# CONFIG_SEL3350_PLATFORM is not set +CONFIG_P2SB=y CONFIG_HAVE_CLK=y -CONFIG_CLKDEV_LOOKUP=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y +# CONFIG_LMK04832 is not set # CONFIG_COMMON_CLK_MAX9485 is not set # CONFIG_COMMON_CLK_SI5341 is not set # CONFIG_COMMON_CLK_SI5351 is not set @@ -4723,6 +5478,7 @@ CONFIG_COMMON_CLK=y # CONFIG_COMMON_CLK_CDCE706 is not set # CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_PWM is not set +# CONFIG_XILINX_VCU is not set CONFIG_HWSPINLOCK=y # @@ -4737,28 +5493,34 @@ CONFIG_MAILBOX=y CONFIG_PCC=y # CONFIG_ALTERA_MBOX is not set CONFIG_IOMMU_IOVA=y -CONFIG_IOASID=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # +CONFIG_IOMMU_IO_PGTABLE=y # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set +# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_SVA=y +CONFIG_IOMMU_IOPF=y CONFIG_AMD_IOMMU=y -CONFIG_AMD_IOMMU_V2=m CONFIG_DMAR_TABLE=y CONFIG_INTEL_IOMMU=y CONFIG_INTEL_IOMMU_SVM=y CONFIG_INTEL_IOMMU_DEFAULT_ON=y CONFIG_INTEL_IOMMU_FLOPPY_WA=y CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y +CONFIG_INTEL_IOMMU_PERF_EVENTS=y +# CONFIG_IOMMUFD is not set CONFIG_IRQ_REMAP=y CONFIG_HYPERV_IOMMU=y +# CONFIG_VIRTIO_IOMMU is not set # # Remoteproc drivers @@ -4784,11 +5546,6 @@ CONFIG_HYPERV_IOMMU=y # # end of Amlogic SoC drivers -# -# Aspeed SoC drivers -# -# end of Aspeed SoC drivers - # # Broadcom SoC drivers # @@ -4799,11 +5556,23 @@ CONFIG_HYPERV_IOMMU=y # # end of NXP/Freescale QorIQ SoC drivers +# +# fujitsu SoC drivers +# +# end of fujitsu SoC drivers + # # i.MX SoC drivers # # end of i.MX SoC drivers +# +# Enable LiteX SoC Builder specific drivers +# +# end of Enable LiteX SoC Builder specific drivers + +# CONFIG_WPCM450_SOC is not set + # # Qualcomm SoC drivers # @@ -4814,10 +5583,34 @@ CONFIG_HYPERV_IOMMU=y # # Xilinx SoC drivers # -# CONFIG_XILINX_VCU is not set # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains +# end of PM Domains + # CONFIG_PM_DEVFREQ is not set # CONFIG_EXTCON is not set # CONFIG_MEMORY is not set @@ -4835,26 +5628,41 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_IIO_SW_DEVICE is not set # CONFIG_IIO_SW_TRIGGER is not set # CONFIG_IIO_TRIGGERED_EVENT is not set +CONFIG_IIO_BACKEND=m # # Accelerometers # # CONFIG_ADIS16201 is not set # CONFIG_ADIS16209 is not set +# CONFIG_ADXL313_I2C is not set +# CONFIG_ADXL313_SPI is not set # CONFIG_ADXL345_I2C is not set # CONFIG_ADXL345_SPI is not set +# CONFIG_ADXL355_I2C is not set +# CONFIG_ADXL355_SPI is not set +# CONFIG_ADXL367_SPI is not set +# CONFIG_ADXL367_I2C is not set # CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set +# CONFIG_ADXL380_SPI is not set +# CONFIG_ADXL380_I2C is not set # CONFIG_BMA180 is not set # CONFIG_BMA220 is not set # CONFIG_BMA400 is not set # CONFIG_BMC150_ACCEL is not set +# CONFIG_BMI088_ACCEL is not set # CONFIG_DA280 is not set # CONFIG_DA311 is not set +# CONFIG_DMARD06 is not set # CONFIG_DMARD09 is not set # CONFIG_DMARD10 is not set +# CONFIG_FXLS8962AF_I2C is not set +# CONFIG_FXLS8962AF_SPI is not set CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_IIO_ST_ACCEL_3AXIS is not set +# CONFIG_IIO_KX022A_SPI is not set +# CONFIG_IIO_KX022A_I2C is not set # CONFIG_KXSD9 is not set # CONFIG_KXCJK1013 is not set # CONFIG_MC3230 is not set @@ -4864,9 +5672,11 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set +# CONFIG_MSA311 is not set # CONFIG_MXC4005 is not set # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set +# CONFIG_SCA3300 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # end of Accelerometers @@ -4874,13 +5684,20 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # # Analog to digital converters # +# CONFIG_AD4000 is not set +# CONFIG_AD4130 is not set +# CONFIG_AD4695 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set +# CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set @@ -4891,11 +5708,15 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set +CONFIG_AD9467=m +# CONFIG_ENVELOPE_DETECTOR is not set # CONFIG_HI8435 is not set # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -4903,13 +5724,21 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX11205 is not set +# CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set # CONFIG_MAX9611 is not set # CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1921 is not set +# CONFIG_PAC1934 is not set +# CONFIG_RICHTEK_RTQ6056 is not set +# CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set # CONFIG_TI_ADC084S021 is not set @@ -4918,34 +5747,66 @@ CONFIG_HID_SENSOR_ACCEL_3D=m # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set +# CONFIG_TI_ADS1119 is not set +# CONFIG_TI_ADS7924 is not set +# CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set +# CONFIG_TI_ADS8344 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS124S08 is not set +# CONFIG_TI_ADS131E08 is not set +# CONFIG_TI_LMP92064 is not set # CONFIG_TI_TLC4541 is not set +# CONFIG_TI_TSC2046 is not set +# CONFIG_VF610_ADC is not set # CONFIG_XILINX_XADC is not set # end of Analog to digital converters +# +# Analog to digital and digital to analog converters +# +# CONFIG_AD74115 is not set +# CONFIG_AD74413R is not set +# end of Analog to digital and digital to analog converters + # # Analog Front Ends # +# CONFIG_IIO_RESCALE is not set # end of Analog Front Ends # # Amplifiers # # CONFIG_AD8366 is not set +# CONFIG_ADA4250 is not set # CONFIG_HMC425 is not set # end of Amplifiers +# +# Capacitance to digital converters +# +# CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set +# end of Capacitance to digital converters + # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_SCD30_CORE is not set +# CONFIG_SCD4X is not set # CONFIG_SENSIRION_SGP30 is not set -# CONFIG_SPS30 is not set +# CONFIG_SENSIRION_SGP40 is not set +# CONFIG_SPS30_I2C is not set +# CONFIG_SENSEAIR_SUNRISE_CO2 is not set # CONFIG_VZ89X is not set # end of Chemical Sensors @@ -4956,6 +5817,11 @@ CONFIG_HID_SENSOR_IIO_COMMON=m CONFIG_HID_SENSOR_IIO_TRIGGER=m # end of Hid Sensor IIO Common +# +# IIO SCMI Sensors +# +# end of IIO SCMI Sensors + # # SSP Sensor Common # @@ -4965,6 +5831,7 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # # Digital to analog converters # +# CONFIG_AD3552R is not set # CONFIG_AD5064 is not set # CONFIG_AD5360 is not set # CONFIG_AD5380 is not set @@ -4975,27 +5842,38 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set +# CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set # CONFIG_AD5755 is not set # CONFIG_AD5758 is not set # CONFIG_AD5761 is not set # CONFIG_AD5764 is not set +# CONFIG_AD5766 is not set # CONFIG_AD5770R is not set # CONFIG_AD5791 is not set +# CONFIG_AD7293 is not set # CONFIG_AD7303 is not set # CONFIG_AD8801 is not set +# CONFIG_DPOT_DAC is not set # CONFIG_DS4424 is not set # CONFIG_LTC1660 is not set # CONFIG_LTC2632 is not set +# CONFIG_LTC2664 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set +# CONFIG_MAX5522 is not set +# CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set +# CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set # CONFIG_TI_DAC7311 is not set # CONFIG_TI_DAC7612 is not set +# CONFIG_VF610_DAC is not set # end of Digital to analog converters # @@ -5003,6 +5881,12 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # # end of IIO dummy driver +# +# Filters +# +# CONFIG_ADMV8818 is not set +# end of Filters + # # Frequency Synthesizers DDS/PLL # @@ -5018,6 +5902,12 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m # # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set +# CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set +# CONFIG_ADMV1013 is not set +# CONFIG_ADMV1014 is not set +# CONFIG_ADMV4420 is not set +# CONFIG_ADRF6780 is not set # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL @@ -5057,8 +5947,10 @@ CONFIG_HID_SENSOR_GYRO_3D=m # # CONFIG_AM2315 is not set # CONFIG_DHT11 is not set +# CONFIG_ENS210 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set @@ -5075,6 +5967,9 @@ CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set +# CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set @@ -5083,6 +5978,7 @@ CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_INV_MPU6050_I2C is not set # CONFIG_INV_MPU6050_SPI is not set # CONFIG_IIO_ST_LSM6DSX is not set +# CONFIG_IIO_ST_LSM9DS0 is not set # end of Inertial measurement units # @@ -5094,29 +5990,38 @@ CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set +# CONFIG_BH1745 is not set # CONFIG_BH1750 is not set # CONFIG_BH1780 is not set # CONFIG_CM32181 is not set # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set +# CONFIG_CM3605 is not set # CONFIG_CM36651 is not set # CONFIG_GP2AP002 is not set # CONFIG_GP2AP020A00F is not set # CONFIG_SENSORS_ISL29018 is not set # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m # CONFIG_JSA1212 is not set +# CONFIG_ROHM_BU27008 is not set +# CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set +# CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set # CONFIG_MAX44009 is not set # CONFIG_NOA1305 is not set # CONFIG_OPT3001 is not set +# CONFIG_OPT4001 is not set # CONFIG_PA12203001 is not set # CONFIG_SI1133 is not set # CONFIG_SI1145 is not set @@ -5126,13 +6031,16 @@ CONFIG_HID_SENSOR_PROX=m # CONFIG_TCS3472 is not set # CONFIG_SENSORS_TSL2563 is not set # CONFIG_TSL2583 is not set +# CONFIG_TSL2591 is not set # CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set # CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -5140,6 +6048,7 @@ CONFIG_HID_SENSOR_PROX=m # # Magnetometer sensors # +# CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set # CONFIG_BMC150_MAGN_I2C is not set @@ -5152,11 +6061,14 @@ CONFIG_HID_SENSOR_MAGNETOMETER_3D=m # CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set # CONFIG_SENSORS_RM3100_SPI is not set +# CONFIG_TI_TMAG5273 is not set +# CONFIG_YAMAHA_YAS530 is not set # end of Magnetometer sensors # # Multiplexers # +# CONFIG_IIO_MUX is not set # end of Multiplexers # @@ -5176,11 +6088,13 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # # Linear and angular position sensors # +# CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE is not set # end of Linear and angular position sensors # # Digital potentiometers # +# CONFIG_AD5110 is not set # CONFIG_AD5272 is not set # CONFIG_DS1803 is not set # CONFIG_MAX5432 is not set @@ -5191,6 +6105,7 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # CONFIG_MCP4531 is not set # CONFIG_MCP41010 is not set # CONFIG_TPL0102 is not set +# CONFIG_X9250 is not set # end of Digital potentiometers # @@ -5203,17 +6118,21 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set CONFIG_HID_SENSOR_PRESS=m # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set +# CONFIG_MPRLS0025PA is not set # CONFIG_MS5611 is not set # CONFIG_MS5637 is not set +# CONFIG_SDP500 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set # CONFIG_HP206C is not set @@ -5229,6 +6148,8 @@ CONFIG_HID_SENSOR_PRESS=m # # Proximity and distance sensors # +# CONFIG_HX9023S is not set +# CONFIG_IRSD200 is not set # CONFIG_ISL29501 is not set # CONFIG_LIDAR_LITE_V2 is not set # CONFIG_MB1232 is not set @@ -5236,10 +6157,13 @@ CONFIG_HID_SENSOR_PRESS=m # CONFIG_RFD77402 is not set # CONFIG_SRF04 is not set # CONFIG_SX9310 is not set +# CONFIG_SX9324 is not set +# CONFIG_SX9360 is not set # CONFIG_SX9500 is not set # CONFIG_SRF08 is not set # CONFIG_VCNL3020 is not set # CONFIG_VL53L0X_I2C is not set +# CONFIG_AW96103 is not set # end of Proximity and distance sensors # @@ -5247,6 +6171,7 @@ CONFIG_HID_SENSOR_PRESS=m # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -5257,11 +6182,16 @@ CONFIG_HID_SENSOR_PRESS=m CONFIG_HID_SENSOR_TEMP=m # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set +# CONFIG_TMP117 is not set # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set +# CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set +# CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors CONFIG_NTB=m @@ -5269,15 +6199,17 @@ CONFIG_NTB=m # CONFIG_NTB_AMD is not set # CONFIG_NTB_IDT is not set # CONFIG_NTB_INTEL is not set +# CONFIG_NTB_EPF is not set # CONFIG_NTB_SWITCHTEC is not set # CONFIG_NTB_PINGPONG is not set # CONFIG_NTB_TOOL is not set # CONFIG_NTB_PERF is not set # CONFIG_NTB_TRANSPORT is not set -# CONFIG_VME_BUS is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set +# CONFIG_PWM_CLK is not set +# CONFIG_PWM_DWC is not set +# CONFIG_PWM_GPIO is not set CONFIG_PWM_LPSS=m CONFIG_PWM_LPSS_PCI=m CONFIG_PWM_LPSS_PLATFORM=m @@ -5296,7 +6228,14 @@ CONFIG_PWM_LPSS_PLATFORM=m # # CONFIG_GENERIC_PHY is not set # CONFIG_USB_LGM_PHY is not set +# CONFIG_PHY_CAN_TRANSCEIVER is not set + +# +# PHY drivers for Broadcom platforms +# # CONFIG_BCM_KONA_USB2_PHY is not set +# end of PHY drivers for Broadcom platforms + # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_CPCAP_USB is not set @@ -5304,36 +6243,42 @@ CONFIG_PWM_LPSS_PLATFORM=m # end of PHY Subsystem CONFIG_POWERCAP=y -CONFIG_INTEL_RAPL=y CONFIG_INTEL_RAPL_CORE=y +CONFIG_INTEL_RAPL=y +CONFIG_IDLE_INJECT=y # CONFIG_MCB is not set # # Performance monitor support # +# CONFIG_DWC_PCIE_PMU is not set +# CONFIG_CXL_PMU is not set # end of Performance monitor support CONFIG_RAS=y # CONFIG_RAS_CEC is not set +# CONFIG_AMD_ATL is not set # CONFIG_USB4 is not set # # Android # -# CONFIG_ANDROID is not set +# CONFIG_ANDROID_BINDER_IPC is not set # end of Android CONFIG_LIBNVDIMM=m CONFIG_BLK_DEV_PMEM=m -CONFIG_ND_BLK=m CONFIG_ND_CLAIM=y CONFIG_ND_BTT=m CONFIG_BTT=y CONFIG_NVDIMM_KEYS=y -CONFIG_DAX_DRIVER=y +# CONFIG_NVDIMM_SECURITY_TEST is not set CONFIG_DAX=y +# CONFIG_DEV_DAX_HMEM is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +# CONFIG_NVMEM_LAYOUTS is not set +# CONFIG_NVMEM_RMEM is not set # # HW tracing support @@ -5344,12 +6289,14 @@ CONFIG_NVMEM_SYSFS=y # CONFIG_FPGA is not set # CONFIG_TEE is not set -# CONFIG_UNISYS_VISORBUS is not set # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set # CONFIG_INTERCONNECT is not set # CONFIG_COUNTER is not set # CONFIG_MOST is not set +# CONFIG_PECI is not set +# CONFIG_HTE is not set +CONFIG_DPLL=y # end of Device Drivers # @@ -5358,6 +6305,9 @@ CONFIG_NVMEM_SYSFS=y CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y +CONFIG_BUFFER_HEAD=y +CONFIG_LEGACY_DIRECT_IO=y # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set CONFIG_EXT4_FS=m @@ -5372,6 +6322,7 @@ CONFIG_FS_MBCACHE=m # CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_SUPPORT_V4=y +CONFIG_XFS_SUPPORT_ASCII_CI=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y # CONFIG_XFS_RT is not set @@ -5384,49 +6335,50 @@ CONFIG_GFS2_FS_LOCKING_DLM=y # CONFIG_BTRFS_FS is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set -CONFIG_FS_DAX=y +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y -# CONFIG_MANDATORY_FILE_LOCKING is not set # CONFIG_FS_ENCRYPTION is not set # CONFIG_FS_VERITY is not set CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y -CONFIG_PRINT_QUOTA_WARNING=y # CONFIG_QUOTA_DEBUG is not set CONFIG_QUOTA_TREE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y -CONFIG_AUTOFS4_FS=y CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set # CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW is not set # CONFIG_OVERLAY_FS_INDEX is not set # CONFIG_OVERLAY_FS_XINO_AUTO is not set # CONFIG_OVERLAY_FS_METACOPY is not set +# CONFIG_OVERLAY_FS_DEBUG is not set # # Caches # -CONFIG_FSCACHE=m +CONFIG_NETFS_SUPPORT=m +CONFIG_NETFS_STATS=y +# CONFIG_NETFS_DEBUG is not set +CONFIG_FSCACHE=y CONFIG_FSCACHE_STATS=y -# CONFIG_FSCACHE_HISTOGRAM is not set -# CONFIG_FSCACHE_DEBUG is not set -# CONFIG_FSCACHE_OBJECT_LIST is not set CONFIG_CACHEFILES=m # CONFIG_CACHEFILES_DEBUG is not set -# CONFIG_CACHEFILES_HISTOGRAM is not set +# CONFIG_CACHEFILES_ERROR_INJECTION is not set +# CONFIG_CACHEFILES_ONDEMAND is not set # end of Caches # @@ -5450,6 +6402,7 @@ CONFIG_FAT_DEFAULT_IOCHARSET="ascii" # CONFIG_VFAT_NO_CREATE_WITH_LONGNAMES is not set # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_EXFAT_FS is not set +# CONFIG_NTFS3_FS is not set # CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems @@ -5470,11 +6423,15 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y # CONFIG_TMPFS_INODE64 is not set +# CONFIG_TMPFS_QUOTA is not set CONFIG_HUGETLBFS=y +# CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON is not set CONFIG_HUGETLB_PAGE=y -CONFIG_MEMFD_CREATE=y +CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP=y +CONFIG_HUGETLB_PMD_PAGE_TABLE_SHARING=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_CONFIGFS_FS=y +CONFIG_EFIVAR_FS=m # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y @@ -5494,9 +6451,11 @@ CONFIG_MISC_FILESYSTEMS=y CONFIG_SQUASHFS=y # CONFIG_SQUASHFS_FILE_CACHE is not set CONFIG_SQUASHFS_FILE_DIRECT=y -# CONFIG_SQUASHFS_DECOMP_SINGLE is not set -# CONFIG_SQUASHFS_DECOMP_MULTI is not set -CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT is not set +CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI is not set +# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set CONFIG_SQUASHFS_XATTR=y CONFIG_SQUASHFS_ZLIB=y # CONFIG_SQUASHFS_LZ4 is not set @@ -5514,19 +6473,17 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 # CONFIG_QNX6FS_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y -CONFIG_PSTORE_DEFLATE_COMPRESS=y -# CONFIG_PSTORE_LZO_COMPRESS is not set -# CONFIG_PSTORE_LZ4_COMPRESS is not set -# CONFIG_PSTORE_LZ4HC_COMPRESS is not set -# CONFIG_PSTORE_842_COMPRESS is not set -# CONFIG_PSTORE_ZSTD_COMPRESS is not set +CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 CONFIG_PSTORE_COMPRESS=y -CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y -CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_CONSOLE is not set # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_FTRACE is not set CONFIG_PSTORE_RAM=m +CONFIG_PSTORE_ZONE=m +CONFIG_PSTORE_BLK=m +CONFIG_PSTORE_BLK_BLKDEV="" +CONFIG_PSTORE_BLK_KMSG_SIZE=64 +CONFIG_PSTORE_BLK_MAX_REASON=2 # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_EROFS_FS is not set @@ -5553,8 +6510,7 @@ CONFIG_NFS_USE_KERNEL_DNS=y # CONFIG_NFS_DISABLE_UDP_SUPPORT is not set # CONFIG_NFS_V4_2_READ_PLUS is not set CONFIG_NFSD=m -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y +# CONFIG_NFSD_V2 is not set CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y @@ -5563,16 +6519,21 @@ CONFIG_NFSD_SCSILAYOUT=y # CONFIG_NFSD_FLEXFILELAYOUT is not set # CONFIG_NFSD_V4_2_INTER_SSC is not set # CONFIG_NFSD_V4_SECURITY_LABEL is not set +CONFIG_NFSD_LEGACY_CLIENT_TRACKING=y CONFIG_GRACE_PERIOD=m CONFIG_LOCKD=m CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=m CONFIG_NFS_COMMON=y +# CONFIG_NFS_LOCALIO is not set +CONFIG_NFS_V4_2_SSC_HELPER=y CONFIG_SUNRPC=m CONFIG_SUNRPC_GSS=m CONFIG_SUNRPC_BACKCHANNEL=y CONFIG_RPCSEC_GSS_KRB5=m -# CONFIG_SUNRPC_DISABLE_INSECURE_ENCTYPES is not set +CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA1=y +# CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA is not set +# CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2 is not set # CONFIG_SUNRPC_DEBUG is not set CONFIG_CEPH_FS=m # CONFIG_CEPH_FSCACHE is not set @@ -5581,7 +6542,6 @@ CONFIG_CEPH_FS_POSIX_ACL=y CONFIG_CIFS=m # CONFIG_CIFS_STATS2 is not set CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y -CONFIG_CIFS_WEAK_PW_HASH=y CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y @@ -5589,7 +6549,13 @@ CONFIG_CIFS_DEBUG=y # CONFIG_CIFS_DEBUG2 is not set # CONFIG_CIFS_DEBUG_DUMP_KEYS is not set CONFIG_CIFS_DFS_UPCALL=y +# CONFIG_CIFS_SWN_UPCALL is not set # CONFIG_CIFS_FSCACHE is not set +# CONFIG_CIFS_COMPRESSION is not set +CONFIG_SMB_SERVER=m +CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y +# CONFIG_SMB_SERVER_KERBEROS5 is not set +CONFIG_SMBFS=m # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_NLS=y @@ -5643,6 +6609,7 @@ CONFIG_NLS_KOI8_U=m # CONFIG_NLS_MAC_ROMANIAN is not set # CONFIG_NLS_MAC_TURKISH is not set CONFIG_NLS_UTF8=m +CONFIG_NLS_UCS2_UTILS=m CONFIG_DLM=m CONFIG_DLM_DEBUG=y # CONFIG_UNICODE is not set @@ -5656,44 +6623,90 @@ CONFIG_KEYS=y # CONFIG_KEYS_REQUEST_CACHE is not set # CONFIG_PERSISTENT_KEYRINGS is not set CONFIG_TRUSTED_KEYS=m +CONFIG_HAVE_TRUSTED_KEYS=y +CONFIG_TRUSTED_KEYS_TPM=y CONFIG_ENCRYPTED_KEYS=y +# CONFIG_USER_DECRYPTED_DATA is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_PROC_MEM_ALWAYS_FORCE=y +# CONFIG_PROC_MEM_FORCE_PTRACE is not set +# CONFIG_PROC_MEM_NO_FORCE is not set CONFIG_SECURITY=y -CONFIG_SECURITY_WRITABLE_HOOKS=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y -CONFIG_PAGE_TABLE_ISOLATION=y # CONFIG_SECURITY_INFINIBAND is not set CONFIG_SECURITY_NETWORK_XFRM=y CONFIG_SECURITY_PATH=y CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=65536 -CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y CONFIG_HARDENED_USERCOPY=y -CONFIG_HARDENED_USERCOPY_FALLBACK=y CONFIG_FORTIFY_SOURCE=y # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y -CONFIG_SECURITY_SELINUX_DISABLE=y CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y -CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=0 CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 +# CONFIG_SECURITY_SELINUX_DEBUG is not set # CONFIG_SECURITY_SMACK is not set # CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y +# CONFIG_SECURITY_APPARMOR_DEBUG is not set +CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y +CONFIG_SECURITY_APPARMOR_HASH=y +CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y +CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y +CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y # CONFIG_SECURITY_LOADPIN is not set CONFIG_SECURITY_YAMA=y # CONFIG_SECURITY_SAFESETID is not set -CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y CONFIG_SECURITY_LOCKDOWN_LSM=y +CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y +CONFIG_LOCK_DOWN_KERNEL_FORCE_NONE=y +# CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY is not set +# CONFIG_LOCK_DOWN_KERNEL_FORCE_CONFIDENTIALITY is not set +# CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT is not set +CONFIG_SECURITY_LANDLOCK=y +# CONFIG_SECURITY_IPE is not set CONFIG_INTEGRITY=y +CONFIG_INTEGRITY_SIGNATURE=y +CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y +# CONFIG_INTEGRITY_TRUSTED_KEYRING is not set +CONFIG_INTEGRITY_PLATFORM_KEYRING=y +CONFIG_INTEGRITY_MACHINE_KEYRING=y +# CONFIG_INTEGRITY_CA_MACHINE_KEYRING is not set +CONFIG_LOAD_UEFI_KEYS=y CONFIG_INTEGRITY_AUDIT=y -# CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT is not set +CONFIG_IMA=y +# CONFIG_IMA_KEXEC is not set +CONFIG_IMA_MEASURE_PCR_IDX=10 +CONFIG_IMA_LSM_RULES=y +# CONFIG_IMA_NG_TEMPLATE is not set +CONFIG_IMA_SIG_TEMPLATE=y +CONFIG_IMA_DEFAULT_TEMPLATE="ima-sig" +# CONFIG_IMA_DEFAULT_HASH_SHA1 is not set +CONFIG_IMA_DEFAULT_HASH_SHA256=y +# CONFIG_IMA_DEFAULT_HASH_SHA512 is not set +CONFIG_IMA_DEFAULT_HASH="sha256" +# CONFIG_IMA_WRITE_POLICY is not set +# CONFIG_IMA_READ_POLICY is not set +CONFIG_IMA_APPRAISE=y +CONFIG_IMA_ARCH_POLICY=y +# CONFIG_IMA_APPRAISE_BUILD_POLICY is not set +CONFIG_IMA_APPRAISE_BOOTPARAM=y +# CONFIG_IMA_APPRAISE_MODSIG is not set +# CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY is not set +CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y +CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y +CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT=y +# CONFIG_IMA_DISABLE_HTABLE is not set +CONFIG_EVM=y +CONFIG_EVM_ATTR_FSUUID=y +# CONFIG_EVM_ADD_XATTRS is not set CONFIG_DEFAULT_SECURITY_SELINUX=y +# CONFIG_DEFAULT_SECURITY_APPARMOR is not set # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor,bpf" @@ -5708,6 +6721,15 @@ CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set # CONFIG_INIT_ON_FREE_DEFAULT_ON is not set # end of Memory initialization + +# +# Hardening of kernel data structures +# +CONFIG_LIST_HARDENED=y +# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# end of Hardening of kernel data structures + +CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options @@ -5723,10 +6745,14 @@ CONFIG_CRYPTO=y # Crypto core or helper # CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_FIPS_NAME="Linux Kernel Cryptographic API" +# CONFIG_CRYPTO_FIPS_CUSTOM_VERSION is not set CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_SIG=y +CONFIG_CRYPTO_SIG2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y @@ -5737,14 +6763,13 @@ CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y -CONFIG_CRYPTO_KPP=m +CONFIG_CRYPTO_KPP=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=m # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set # CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set -CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=m @@ -5752,127 +6777,102 @@ CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_GLUE_HELPER_X86=y +# end of Crypto core or helper # # Public-key cryptography # CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_DH=m -CONFIG_CRYPTO_ECC=m -CONFIG_CRYPTO_ECDH=m +# CONFIG_CRYPTO_DH_RFC7919_GROUPS is not set +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +# CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set -CONFIG_CRYPTO_CURVE25519_X86=m +# end of Public-key cryptography # -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_CHACHA20POLY1305=m -# CONFIG_CRYPTO_AEGIS128 is not set -# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_ECHAINIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CFB=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_LRW=m -# CONFIG_CRYPTO_OFB is not set -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_XTS=m -# CONFIG_CRYPTO_KEYWRAP is not set -# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set -# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set -# CONFIG_CRYPTO_ADIANTUM is not set -CONFIG_CRYPTO_ESSIV=m - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_VMAC=m - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32C_INTEL=m -CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_CRC32_PCLMUL=m -# CONFIG_CRYPTO_XXHASH is not set -# CONFIG_CRYPTO_BLAKE2B is not set -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_BLAKE2S_X86=m -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m -CONFIG_CRYPTO_GHASH=y -CONFIG_CRYPTO_POLY1305=m -CONFIG_CRYPTO_POLY1305_X86_64=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_RMD128=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_RMD256=m -CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_SSSE3=y -CONFIG_CRYPTO_SHA256_SSSE3=y -CONFIG_CRYPTO_SHA512_SSSE3=m -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_SHA3=m -# CONFIG_CRYPTO_SM3 is not set -# CONFIG_CRYPTO_STREEBOG is not set -CONFIG_CRYPTO_TGR192=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m - -# -# Ciphers +# Block ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set -CONFIG_CRYPTO_AES_NI_INTEL=y +# CONFIG_CRYPTO_ARIA is not set CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_BLOWFISH_COMMON=m -# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set CONFIG_CRYPTO_CAMELLIA=m -# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set -# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set CONFIG_CRYPTO_CAST_COMMON=m CONFIG_CRYPTO_CAST5=m -# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set CONFIG_CRYPTO_CAST6=m -# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set CONFIG_CRYPTO_DES=m -CONFIG_CRYPTO_DES3_EDE_X86_64=m CONFIG_CRYPTO_FCRYPT=m -# CONFIG_CRYPTO_SALSA20 is not set -CONFIG_CRYPTO_CHACHA20=m -CONFIG_CRYPTO_CHACHA20_X86_64=m CONFIG_CRYPTO_SERPENT=m -# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set -# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set -# CONFIG_CRYPTO_SM4 is not set +# CONFIG_CRYPTO_SM4_GENERIC is not set CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_TWOFISH_COMMON=m -# CONFIG_CRYPTO_TWOFISH_X86_64 is not set -# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set -# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +# CONFIG_CRYPTO_ADIANTUM is not set +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_HCTR2 is not set +# CONFIG_CRYPTO_KEYWRAP is not set +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_GENIV=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_ECHAINIV=m +CONFIG_CRYPTO_ESSIV=m +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +# CONFIG_CRYPTO_BLAKE2B is not set +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_POLY1305=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=y +# CONFIG_CRYPTO_SM3_GENERIC is not set +# CONFIG_CRYPTO_STREEBOG is not set +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +# CONFIG_CRYPTO_XXHASH is not set +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +# end of CRCs (cyclic redundancy checks) # # Compression @@ -5883,9 +6883,10 @@ CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set # CONFIG_CRYPTO_ZSTD is not set +# end of Compression # -# Random Number Generation +# Random number generation # CONFIG_CRYPTO_ANSI_CPRNG=m CONFIG_CRYPTO_DRBG_MENU=y @@ -5894,6 +6895,14 @@ CONFIG_CRYPTO_DRBG_HASH=y CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 +# end of Random number generation + +# +# Userspace interface +# CONFIG_CRYPTO_USER_API=y # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set @@ -5901,30 +6910,50 @@ CONFIG_CRYPTO_USER_API_RNG=y # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set CONFIG_CRYPTO_USER_API_AEAD=y # CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set -# CONFIG_CRYPTO_STATS is not set +# end of Userspace interface + CONFIG_CRYPTO_HASH_INFO=y # -# Crypto library routines +# Accelerated Cryptographic Algorithms for CPU (x86) # -CONFIG_CRYPTO_LIB_AES=y -CONFIG_CRYPTO_LIB_ARC4=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=m -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=m -CONFIG_CRYPTO_LIB_BLAKE2S=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m -CONFIG_CRYPTO_LIB_CHACHA=m -CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m -CONFIG_CRYPTO_LIB_CURVE25519=m -CONFIG_CRYPTO_LIB_DES=m -CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 -CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m -CONFIG_CRYPTO_LIB_POLY1305=m -CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m -CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_CURVE25519_X86=m +CONFIG_CRYPTO_AES_NI_INTEL=y +# CONFIG_CRYPTO_BLOWFISH_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_CAST5_AVX_X86_64 is not set +# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set +CONFIG_CRYPTO_DES3_EDE_X86_64=m +# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX_X86_64 is not set +# CONFIG_CRYPTO_SERPENT_AVX2_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_SM4_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64 is not set +# CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set +# CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set +# CONFIG_CRYPTO_ARIA_AESNI_AVX_X86_64 is not set +# CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64 is not set +# CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64 is not set +CONFIG_CRYPTO_CHACHA20_X86_64=m +# CONFIG_CRYPTO_AEGIS128_AESNI_SSE2 is not set +# CONFIG_CRYPTO_NHPOLY1305_SSE2 is not set +# CONFIG_CRYPTO_NHPOLY1305_AVX2 is not set +CONFIG_CRYPTO_BLAKE2S_X86=y +# CONFIG_CRYPTO_POLYVAL_CLMUL_NI is not set +CONFIG_CRYPTO_POLY1305_X86_64=m +CONFIG_CRYPTO_SHA1_SSSE3=y +CONFIG_CRYPTO_SHA256_SSSE3=y +CONFIG_CRYPTO_SHA512_SSSE3=m +# CONFIG_CRYPTO_SM3_AVX_X86_64 is not set +CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=m +CONFIG_CRYPTO_CRC32C_INTEL=m +CONFIG_CRYPTO_CRC32_PCLMUL=m +CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m +# end of Accelerated Cryptographic Algorithms for CPU (x86) + CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_PADLOCK is not set # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set @@ -5935,25 +6964,44 @@ CONFIG_CRYPTO_DEV_SP_CCP=y CONFIG_CRYPTO_DEV_CCP_CRYPTO=m CONFIG_CRYPTO_DEV_SP_PSP=y # CONFIG_CRYPTO_DEV_CCP_DEBUGFS is not set +CONFIG_CRYPTO_DEV_NITROX=m +CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m # CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set +# CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set -CONFIG_CRYPTO_DEV_NITROX=m -CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m +# CONFIG_CRYPTO_DEV_IAA_CRYPTO is not set # CONFIG_CRYPTO_DEV_VIRTIO is not set # CONFIG_CRYPTO_DEV_SAFEXCEL is not set # CONFIG_CRYPTO_DEV_AMLOGIC_GXL is not set CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y -# CONFIG_ASYMMETRIC_TPM_KEY_SUBTYPE is not set CONFIG_X509_CERTIFICATE_PARSER=y # CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set CONFIG_SIGNED_PE_FILE_VERIFICATION=y +# CONFIG_FIPS_SIGNATURE_SELFTEST is not set + +# +# Certificates for signature checking +# +CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" +CONFIG_MODULE_SIG_KEY_TYPE_RSA=y +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_TRUSTED_KEYS="/build/linux-eKiOoh/linux-6.12.16/debian/certs/debian-uefi-certs.pem" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_SECONDARY_TRUSTED_KEYRING=y +# CONFIG_SECONDARY_TRUSTED_KEYRING_SIGNED_BY_BUILTIN is not set +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" +# CONFIG_SYSTEM_REVOCATION_LIST is not set +# CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE is not set +# end of Certificates for signature checking CONFIG_BINARY_PRINTF=y @@ -5967,18 +7015,43 @@ CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y -CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_CORDIC=m # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y + +# +# Crypto library routines +# +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LIB_AES=y +CONFIG_CRYPTO_LIB_AESCFB=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=m +CONFIG_CRYPTO_LIB_CHACHA=m +CONFIG_CRYPTO_ARCH_HAVE_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=m +CONFIG_CRYPTO_LIB_CURVE25519=m +CONFIG_CRYPTO_LIB_DES=m +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11 +CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_POLY1305_GENERIC=m +CONFIG_CRYPTO_LIB_POLY1305=m +CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_SHA256=y +# end of Crypto library routines + CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y +CONFIG_CRC64_ROCKSOFT=y CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set @@ -5986,7 +7059,7 @@ CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set -# CONFIG_CRC64 is not set +CONFIG_CRC64=y # CONFIG_CRC4 is not set CONFIG_CRC7=m CONFIG_LIBCRC32C=m @@ -5998,14 +7071,18 @@ CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_ARM64=y CONFIG_XZ_DEC_SPARC=y +CONFIG_XZ_DEC_RISCV=y +# CONFIG_XZ_DEC_MICROLZMA is not set CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y @@ -6019,24 +7096,31 @@ CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=m CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y +CONFIG_BCH=m CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=m CONFIG_TEXTSEARCH_BM=m CONFIG_TEXTSEARCH_FSM=m CONFIG_BTREE=y CONFIG_INTERVAL_TREE=y +CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y -CONFIG_DMA_OPS=y +CONFIG_DMA_OPS_HELPERS=y +CONFIG_NEED_SG_DMA_FLAGS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED=y CONFIG_SWIOTLB=y +# CONFIG_SWIOTLB_DYNAMIC is not set +CONFIG_DMA_NEED_SYNC=y CONFIG_DMA_COHERENT_POOL=y # CONFIG_DMA_API_DEBUG is not set +# CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPU_RMAP=y @@ -6048,12 +7132,15 @@ CONFIG_LRU_CACHE=m CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y +CONFIG_SIGNATURE=y CONFIG_DIMLIB=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_TIME_NS=y +CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT=y +CONFIG_VDSO_GETRANDOM=y CONFIG_FONT_SUPPORT=y # CONFIG_FONTS is not set CONFIG_FONT_8x8=y @@ -6061,13 +7148,20 @@ CONFIG_FONT_8x16=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_PMEM_API=y CONFIG_MEMREGION=y +CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y CONFIG_ARCH_HAS_COPY_MC=y CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y -# CONFIG_STRING_SELFTEST is not set +# CONFIG_LWQ_TEST is not set # end of Library routines +CONFIG_PLDMFW=y +CONFIG_ASN1_ENCODER=m +CONFIG_FIRMWARE_TABLE=y + # # Kernel hacking # @@ -6077,6 +7171,7 @@ CONFIG_SBITMAP=y # CONFIG_PRINTK_TIME=y # CONFIG_PRINTK_CALLER is not set +# CONFIG_STACKTRACE_BUILD_ID is not set CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 @@ -6087,24 +7182,34 @@ CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_MISC is not set + # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_INFO_REDUCED is not set -# CONFIG_DEBUG_INFO_COMPRESSED is not set -# CONFIG_DEBUG_INFO_SPLIT is not set +CONFIG_AS_HAS_NON_CONST_ULEB128=y +# CONFIG_DEBUG_INFO_NONE is not set +# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set CONFIG_DEBUG_INFO_DWARF4=y +# CONFIG_DEBUG_INFO_DWARF5 is not set +# CONFIG_DEBUG_INFO_REDUCED is not set +CONFIG_DEBUG_INFO_COMPRESSED_NONE=y +# CONFIG_DEBUG_INFO_COMPRESSED_ZLIB is not set +# CONFIG_DEBUG_INFO_SPLIT is not set CONFIG_DEBUG_INFO_BTF=y +CONFIG_PAHOLE_HAS_SPLIT_BTF=y +CONFIG_DEBUG_INFO_BTF_MODULES=y +CONFIG_MODULE_ALLOW_BTF_MISMATCH=y # CONFIG_GDB_SCRIPTS is not set -CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_STRIP_ASM_SYMS=y # CONFIG_READABLE_ASM is not set # CONFIG_HEADERS_INSTALL is not set # CONFIG_DEBUG_SECTION_MISMATCH is not set CONFIG_SECTION_MISMATCH_WARN_ONLY=y -CONFIG_STACK_VALIDATION=y +CONFIG_OBJTOOL=y # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set # end of Compile-time checks and compiler options @@ -6121,19 +7226,26 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y # end of Generic Kernel Debugging Instruments -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_MISC is not set +# +# Networking Debugging +# +# CONFIG_NET_DEV_REFCNT_TRACKER is not set +# CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set +# end of Networking Debugging # # Memory Debugging # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set # CONFIG_PAGE_OWNER is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_PAGE_REF is not set @@ -6142,11 +7254,11 @@ CONFIG_ARCH_HAS_DEBUG_WX=y # CONFIG_DEBUG_WX is not set CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_PER_VMA_LOCK_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SHRINKER_DEBUG is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_SCHED_STACK_END_CHECK is not set CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y @@ -6156,11 +7268,17 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y +# CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_VMALLOC=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y # CONFIG_KASAN is not set +CONFIG_HAVE_ARCH_KFENCE=y +# CONFIG_KFENCE is not set +CONFIG_HAVE_ARCH_KMSAN=y # end of Memory Debugging # CONFIG_DEBUG_SHIRQ is not set @@ -6174,17 +7292,20 @@ CONFIG_PANIC_TIMEOUT=0 CONFIG_LOCKUP_DETECTOR=y CONFIG_SOFTLOCKUP_DETECTOR=y # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_HARDLOCKUP_DETECTOR_PERF=y -CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y +CONFIG_HAVE_HARDLOCKUP_DETECTOR_BUDDY=y CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_HARDLOCKUP_DETECTOR_PREFER_BUDDY is not set +CONFIG_HARDLOCKUP_DETECTOR_PERF=y +# CONFIG_HARDLOCKUP_DETECTOR_BUDDY is not set +# CONFIG_HARDLOCKUP_DETECTOR_ARCH is not set +CONFIG_HARDLOCKUP_DETECTOR_COUNTS_HRTIMER=y +CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y -CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=1 CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 # CONFIG_WQ_WATCHDOG is not set +# CONFIG_WQ_CPU_INTENSIVE_REPORT is not set # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs @@ -6196,7 +7317,6 @@ CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging -# CONFIG_DEBUG_TIMEKEEPING is not set # CONFIG_DEBUG_PREEMPT is not set # @@ -6219,6 +7339,8 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_CSD_LOCK_WAIT_DEBUG is not set # end of Lock Debugging (spinlocks, mutexes, etc...) +# CONFIG_NMI_CHECK_CPU is not set +# CONFIG_DEBUG_IRQFLAGS is not set CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set @@ -6230,11 +7352,9 @@ CONFIG_DEBUG_LIST=y # CONFIG_DEBUG_PLIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_DEBUG_MAPLE_TREE is not set # end of Debug kernel data structures -# CONFIG_DEBUG_CREDENTIALS is not set - # # RCU Debugging # @@ -6242,25 +7362,37 @@ CONFIG_DEBUG_LIST=y # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 +# CONFIG_RCU_CPU_STALL_CPUTIME is not set # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +# CONFIG_DEBUG_CGROUP_REF is not set CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y +CONFIG_HAVE_RETHOOK=y +CONFIG_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_ARGS=y +CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y +CONFIG_HAVE_OBJTOOL_MCOUNT=y +CONFIG_HAVE_OBJTOOL_NOP_MCOUNT=y CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y +CONFIG_BUILDTIME_MCOUNT_SORT=y +CONFIG_TRACER_MAX_TRACE=y CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y @@ -6272,21 +7404,27 @@ CONFIG_FTRACE=y # CONFIG_BOOTTIME_TRACING is not set CONFIG_FUNCTION_TRACER=y CONFIG_FUNCTION_GRAPH_TRACER=y +# CONFIG_FUNCTION_GRAPH_RETVAL is not set CONFIG_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y +CONFIG_DYNAMIC_FTRACE_WITH_ARGS=y +# CONFIG_FPROBE is not set # CONFIG_FUNCTION_PROFILER is not set CONFIG_STACK_TRACER=y # CONFIG_IRQSOFF_TRACER is not set # CONFIG_PREEMPT_TRACER is not set # CONFIG_SCHED_TRACER is not set CONFIG_HWLAT_TRACER=y +# CONFIG_OSNOISE_TRACER is not set +# CONFIG_TIMERLAT_TRACER is not set # CONFIG_MMIOTRACE is not set CONFIG_FTRACE_SYSCALLS=y # CONFIG_TRACER_SNAPSHOT is not set CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_PROBE_EVENTS_BTF_ARGS=y CONFIG_KPROBE_EVENTS=y # CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set CONFIG_UPROBE_EVENTS=y @@ -6295,29 +7433,36 @@ CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y # CONFIG_BPF_KPROBE_OVERRIDE is not set CONFIG_FTRACE_MCOUNT_RECORD=y +CONFIG_FTRACE_MCOUNT_USE_CC=y CONFIG_TRACING_MAP=y CONFIG_SYNTH_EVENTS=y +# CONFIG_USER_EVENTS is not set CONFIG_HIST_TRIGGERS=y # CONFIG_TRACE_EVENT_INJECT is not set # CONFIG_TRACEPOINT_BENCHMARK is not set # CONFIG_RING_BUFFER_BENCHMARK is not set # CONFIG_TRACE_EVAL_MAP_FILE is not set +# CONFIG_FTRACE_RECORD_RECURSION is not set +# CONFIG_FTRACE_VALIDATE_RCU_IS_WATCHING is not set # CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_FTRACE_SORT_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set # CONFIG_PREEMPTIRQ_DELAY_TEST is not set # CONFIG_SYNTH_EVENT_GEN_TEST is not set # CONFIG_KPROBE_EVENT_GEN_TEST is not set # CONFIG_HIST_TRIGGERS_DEBUG is not set +# CONFIG_RV is not set CONFIG_PROVIDE_OHCI1394_DMA_INIT=y # CONFIG_SAMPLES is not set +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y +CONFIG_HAVE_SAMPLE_FTRACE_DIRECT_MULTI=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y # CONFIG_STRICT_DEVMEM is not set # # x86 Debugging # -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_EARLY_PRINTK_USB=y # CONFIG_X86_VERBOSE_BOOTUP is not set CONFIG_EARLY_PRINTK=y @@ -6352,12 +7497,13 @@ CONFIG_ARCH_HAS_KCOV=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y # CONFIG_KCOV is not set CONFIG_RUNTIME_TESTING_MENU=y +# CONFIG_TEST_DHRY is not set # CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set # CONFIG_TEST_MIN_HEAP is not set -# CONFIG_TEST_SORT is not set -# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_TEST_DIV64 is not set +# CONFIG_TEST_MULDIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set @@ -6365,21 +7511,18 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_STRSCPY is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set -# CONFIG_TEST_OVERFLOW is not set +# CONFIG_TEST_MAPLE_TREE is not set # CONFIG_TEST_RHASHTABLE is not set -# CONFIG_TEST_HASH is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set # CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set @@ -6387,31 +7530,21 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set +# CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set # CONFIG_TEST_MEMCAT_P is not set -# CONFIG_TEST_LIVEPATCH is not set -# CONFIG_TEST_STACKINIT is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set # CONFIG_TEST_FPU is not set +# CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set +# CONFIG_TEST_OBJPOOL is not set +CONFIG_ARCH_USE_MEMTEST=y # CONFIG_MEMTEST is not set # CONFIG_HYPERV_TESTING is not set # end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking # end of Kernel hacking - -## -## file: init/Kconfig -## -CONFIG_MODULE_SIG_ALL=y -# CONFIG_MODULE_SIG_FORCE is not set - -## -## file: certs/Kconfig -## -CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" - -# -# Upgrade to 5.10.99 -# -CONFIG_BPF_UNPRIV_DEFAULT_OFF=y -# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set